-- BSDL for ADSP-TS20x
-- Digital Signal Processor,
-- Package 25x25mm PBGA
-- Silicon Revision(s) 1.2
--
-- ADSP-TS20x devices share the same boundary register and
-- therefore have a common BSDL file.
--
-- Created: 03/23/2005
--
--
--
entity ADSP_TS20x is
generic (PHYSICAL_PIN_MAP : string:="UNDEFINED");
port(
SCLK: linkage bit;
SCLK_VREF: linkage bit;
RST_IN: in bit;
RST_OUT: out bit;
POR_IN: in bit;
IRQ: in bit_vector(0 to 3);
DMAR: in bit_vector(0 to 3);
HBR: in bit;
BOFF: in bit;
MS: out bit_vector(0 to 1);
MSH: out bit;
SDCKE: inout bit;
LDQM: out bit;
HDQM: out bit;
BMS: inout bit;
IOWR: out bit;
IORD: out bit;
BM: inout bit;
EMU: out bit;
SDA10: out bit;
IOEN: out bit;
BUSLOCK: inout bit;
TMR0E: inout bit;
DATA: inout bit_vector(0 to 63);
ADDR: inout bit_vector(0 to 31);
RD: inout bit;
WRL: inout bit;
WRH: inout bit;
BRST: inout bit;
MSSD: inout bit_vector(0 to 3);
RAS: inout bit;
CAS: inout bit;
SDWE: inout bit;
HBG: inout bit;
BR: inout bit_vector(0 to 7);
FLAG: inout bit_vector(0 to 3);
L0DATOP: out bit_vector(0 to 3);
L0DATON: linkage bit_vector(0 to 3);
L1DATOP: out bit_vector(0 to 3);
L1DATON: linkage bit_vector(0 to 3);
L2DATOP: out bit_vector(0 to 3);
L2DATON: linkage bit_vector(0 to 3);
L3DATOP: out bit_vector(0 to 3);
L3DATON: linkage bit_vector(0 to 3);
L0CLKOUTP: out bit;
L0CLKOUTN: linkage bit;
L1CLKOUTP: out bit;
L1CLKOUTN: linkage bit;
L2CLKOUTP: out bit;
L2CLKOUTN: linkage bit;
L3CLKOUTP: out bit;
L3CLKOUTN: linkage bit;
L0ACKI: in bit;
L1ACKI: in bit;
L2ACKI: in bit;
L3ACKI: in bit;
L0DATIP: in bit_vector(0 to 3);
L0DATIN: linkage bit_vector(0 to 3);
L1DATIP: in bit_vector(0 to 3);
L1DATIN: linkage bit_vector(0 to 3);
L2DATIP: in bit_vector(0 to 3);
L2DATIN: linkage bit_vector(0 to 3);
L3DATIP: in bit_vector(0 to 3);
L3DATIN: linkage bit_vector(0 to 3);
L0CLKINP: in bit;
L0CLKINN: linkage bit;
L1CLKINP: in bit;
L1CLKINN: linkage bit;
L2CLKINP: in bit;
L2CLKINN: linkage bit;
L3CLKINP: in bit;
L3CLKINN: linkage bit;
L0ACKO: out bit;
L1ACKO: out bit;
L2ACKO: out bit;
L3ACKO: out bit;
LTSTOUT_01: out bit;-- NC
LTSTIN_01: in bit;-- VSS
LTSTOUT_23: out bit;--NC
LTSTIN_23: in bit;-- VSS
ACK: inout bit;
CPA: inout bit;
DPA: inout bit;
L0BCMPO: out bit;
L1BCMPO: inout bit;
L2BCMPO: inout bit;
L3BCMPO: inout bit;
L0BCMPI: in bit;
L1BCMPI: in bit;
L2BCMPI: in bit;
L3BCMPI: in bit;
ID: in bit_vector(0 to 2);
CONTROLIMP: in bit_vector(0 to 1);
SCLKRAT: in bit_vector(0 to 2);
DS: in bit_vector(0 to 2);
ENEDREG: in bit;
TCK: in bit;
TDI: in bit;
TDO: out bit;
TMS: in bit;
TRST: in bit;
VDD_DRAM: linkage bit_vector(0 to 24);
VDD: linkage bit_vector(0 to 72);
VDD_IO: linkage bit_vector(0 to 49);
VSS: linkage bit_vector(0 to 151);
VDD_A: linkage bit_vector(0 to 1);
VREF: linkage bit;
NC: linkage bit_vector(0 to 2));
use STD_1149_1_1990.all;
attribute PIN_MAP of ADSP_TS20x: entity is PHYSICAL_PIN_MAP;
constant BGA_ED_PACKAGE: PIN_MAP_STRING:=
"SCLK: P1," &
"SCLK_VREF: P2," &
"RST_IN: T1," &
"RST_OUT: U2," &
"POR_IN: V3," &
"IRQ: (AA5,AB6,AB5,AA3)," &
"DMAR: (AA7,AB7,AC6,AD6)," &
"HBR: AA8," &
"BOFF: AC8," &
"MS: (G3,F2)," &
"MSH: H2," &
"SDCKE: K2," &
"LDQM: K3," &
"HDQM: K4," &
"BMS: G4," &
"BM: P4," &
"IOWR: AC5," &
"IORD: AD5," &
"EMU: Y1," &
"SDA10: K1," &
"IOEN: AA6," &
"BUSLOCK: AD8," &
"TMR0E: Y3," &
"DATA: (D17,A17,B17,C16,D16," & -- DATA[0-4]
"A16,B16,C15,D15,A15,"& -- DATA[5-9]
"B15,A14,B14,C14,D14,"& -- DATA[10-14]
"A13,B13,C12,D12,A12,"& -- DATA[15-19]
"B12,C11,D11,A11,B11,"& -- DATA[20-24]
"A10,B10,C10,D10,A9,"& -- DATA[25-29]
"B9,C9,D9,A8,B8,"& -- DATA[30-34]
"C8,D8,A7,B7,C7,"& -- DATA[35-39]
"D7,A6,B6,A5,B5,"& -- DATA[40-44]
"C6,D6,C5,D5,A4,"& -- DATA[45-49]
"B4,A2,C4,B1,D3,"& -- DATA[50-54]
"D1,D2,E3,E4,F3,"& -- DATA[55-59]
"F4,E1,E2,F1),"& -- DATA[60-63]
"ADDR: (H24,H23,H22,H21,G24,"& -- ADDR[0-4]
"G23,G22,G21,F24,F23,"& -- ADDR[5-9]
"E24,E23,F22,F21,E22,"& -- ADDR[10-14]
"E21,D24,D23,B24,D22,"& -- ADDR[15-19]
"C21,A23,A21,B21,C20,"& -- ADDR[20-24]
"D20,C19,D19,A20,B20,"& -- ADDR[25-29]
"A19,B19),"& -- ADDR[30-31]
"RD: C18," &
"WRL: A18," &
"WRH: B18," &
"BRST: D18," &
"MSSD: (U1,G1,V1,H3)," &
"RAS: J1," &
"CAS: J2," &
"SDWE: L1," &
"HBG: AB8," &
"BR: (L2,L3,L4,M1,T3,M3,M4,R4)," &
"FLAG: (AC1,AA2,AA1,Y4)," &
"L0DATOP: (P24,P22,N22,M24)," &
"L0DATON: (P23,P21,N21,M23)," &
"L1DATOP: (AA24,Y22,Y24,W24)," &
"L1DATON: (AA23,Y21,Y23,W23)," &
"L2DATOP: (AB16,AD17,AD18,AB18)," &
"L2DATON: (AA16,AC17,AC18,AA18)," &
"L3DATOP: (AD9,AB10,AD11,AB11)," &
"L3DATON: (AC9,AA10,AC11,AA11)," &
"L0CLKOUTP: N24," &
"L0CLKOUTN: N23," &
"L1CLKOUTP: W22," &
"L1CLKOUTN: W21," &
"L2CLKOUTP: AB17," &
"L2CLKOUTN: AA17," &
"L3CLKOUTP: AD10," &
"L3CLKOUTN: AC10," &
"L0ACKI: R24," &
"L1ACKI: AC24," &
"L2ACKI: AD16," &
"L3ACKI: AB9," &
"L0DATIP: (J24,K22,L24,L22)," &
"L0DATIN: (J23,K21,L23,L21)," &
"L1DATIP: (T22,U24,V24,V22)," &
"L1DATIN: (T21,U23,V23,V21)," &
"L2DATIP: (AD21,AB20,AD20,AD19)," &
"L2DATIN: (AC21,AA20,AC20,AC19)," &
"L3DATIP: (AD14,AB14,AB13,AD12)," &
"L3DATIN: (AC14,AA14,AA13,AC12)," &
"L0CLKINP: K24," &
"L0CLKINN: K23," &
"L1CLKINP: U22," &
"L1CLKINN: U21," &
"L2CLKINP: AB19," &
"L2CLKINN: AA19," &
"L3CLKINP: AD13," &
"L3CLKINN: AC13," &
"L0ACKO: J21," &
"L1ACKO: T23," &
"L2ACKO: AB21," &
"L3ACKO: AC15," &
"LTSTOUT_01: R21," &
"LTSTIN_01: R22," &
"LTSTOUT_23: AA15," &
"LTSTIN_23: AB15," &
"ACK: C17," &
"CPA: AC7," &
"DPA: AD7," &
"L0BCMPO: R23," &
"L1BCMPO: AA22," &
"L2BCMPO: AC16," &
"L3BCMPO: AA9," &
"L0BCMPI: J22," &
"L1BCMPI: T24," &
"L2BCMPI: AD23," &
"L3BCMPI: AD15," &
"ID: (N1,AD2,U3)," &
"CONTROLIMP: (W1,V4)," &
"SCLKRAT: (H4,M2,T2)," &
"DS: (T4,U4,V2)," &
"ENEDREG: W2," &
"TCK: Y2," &
"TDI: W3," &
"TDO: W4," &
"TMS: AC4," &
"TRST: AD4," &
"VDD_DRAM: (U11,V11,W11,V12,W12," &
"V15,W15,V16,W16,R18," &
"R19,P18,P19,L19,K19," &
"L18,K18,G16,G15,F16," &
"F15,G12,G11,F12,F11)," &
"VDD: (F6,G6,H6,F7,G7," &
"H7,F8,G8,F9,V19," &
"G9,F10,G10,F13,G13," &
"F14,G14,F17,G17,F18," &
"G18,H18,F19,G19,H19," &
"J6,K6,L6,M6,J7," &
"K7,L7,M7,J18,M18," &
"J19,M19,N6,P6,R6," &
"T6,N7,P7,R7,T7," &
"N18,T18,N19,T19,U6," &
"V6,W6,U7,V7,W7," &
"V8,W8,V9,W9,W19," &
"V10,W10,V13,W13,V14," &
"W14,V17,W17,U18,V18," &
"W18,U19,U10)," &
"VDD_IO: (W5,Y6,Y8,Y10,Y11," &
"Y12,Y13,Y14,Y15,Y17," &
"Y19,U20,V20,W20,R20," &
"P20,N20,R5,P5,N5," &
"M20,L20,K20,M5,L5," &
"K5,H20,G20,F20,E19," &
"E17,E15,E14,E13,E12," &
"E11,E10,E8,E6,H5," &
"F5,U5,AC22,AD3,AC3,"&
"C24,C23,AB24,AB23,AD22)," &
"VSS: (A1,C1,B2,C2,A3," &
"B3,C3,D4,C13,D13," &
"D21,A22,B22,C22,B23," &
"A24,H1,AC23,E5,G5," &
"E7,H8,E9,H9,H10," &
"H11,H12,H13,H14,H15," &
"E16,H16,H17,E18,E20," &
"J3,J5,K8,L8,AD24," &
"M8,J9,K9,L9,M9," &
"J10,K10,L10,M10,J11," &
"K11,L11,M11,J12,K12," &
"L12,M12,J13,K13,L13," &
"M13,J14,K14,L14,M14," &
"J15,K15,L15,M15,J16," &
"K16,L16,M16,J17,K17," &
"L17,M17,J20,M21,M22," &
"R1,N2,P3,T5,N8," &
"P8,R8,T8,N9,P9," &
"R9,T9,N10,P10,R10," &
"T10,N11,P11,R11,T11," &
"N12,P12,R12,T12,N13," &
"P13,R13,T13,N14,P14," &
"R14,T14,N15,P15,R15," &
"T15,N16,P16,R16,T16," &
"N17,P17,R17,T17,T20," &
"V5,Y5,Y7,U8,U9," &
"Y9,U12,U13,U14,U15," &
"U16,Y16,U17,Y18,Y20," &
"AB1,AD1,AB2,AC2,AB3," &
"AA4,AA12,AB12,AA21,AB22,"&
"G2,J8)," &
"VDD_A: (N3,N4)," &
"VREF: J4," &
"NC: (AB4,R2,R3)";
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_RESET of TRST: signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (40.0e6, BOTH);
attribute INSTRUCTION_LENGTH of ADSP_TS20x: entity is 5;
-- Unspecified opcodes assigned to Bypass.
attribute INSTRUCTION_OPCODE of ADSP_TS20x: entity is
"BYPASS (11111)," &
"EXTEST (00000)," &
"SAMPLE (10000)," &
"IDCODE (01110)," &
"RESERVED (10010,00111,10111,01111," &
"01000,00100,10100,01100," &
"11110,00001,10001,01011," &
"00011,10011,11011)";
attribute INSTRUCTION_CAPTURE of ADSP_TS20x: entity is
"00001";
attribute INSTRUCTION_PRIVATE of ADSP_TS20x: entity is
"RESERVED";
attribute IDCODE_REGISTER of ADSP_TS20x: entity is
"0011" & -- Version
"0010011110101111" & -- Part number "27af" hex
"00001100101" & -- ADI mfct code 11'h065
"1"; -- Required bit
-- INSTRUCTION_USAGE has been obsoleted
-- attribute INSTRUCTION_USAGE of ADSP_TS20x: entity is
-- "INTEST (clock CLKIN)";
attribute BOUNDARY_CELLS of ADSP_TS20x: entity is
"BC_1, BC_2, BC_3, BC_4";
-- BC_1: output, control; BC_2: input; BC_3: internal; BC_4: clock;
attribute BOUNDARY_LENGTH of ADSP_TS20x: entity is 425;
attribute BOUNDARY_REGISTER of ADSP_TS20x: entity is
--num cell port function safe [ccell disval rslt ]
" 0 ( BC_1, EMU, output2, 1, 0, 1, Weak0 )," &
" 1 ( BC_2, ENEDREG, input, 0 ), " &
" 2 ( BC_2, CONTROLIMP(0), input, 0 ), " &
" 3 ( BC_2, CONTROLIMP(1), input, 0 ) , " &
" 4 ( BC_2, POR_IN, input, 0 ) , " &
" 5 ( BC_2, DS(2), input, 0 ) , " &
" 6 ( BC_3, *, internal, 1 ) , " & -- ts0 pull up scan
" 7 ( BC_3, *, internal, 0 ) , " &
" 8 ( BC_2, MSSD(2), input, 0 ) , " &
" 9 ( BC_1, *, control, 0 ) , " & --OE
" 10 ( BC_1, MSSD(2) , output3, 0 , 9 , 0 , Z ) , " &
" 11 ( BC_2, DS(1) , input, 0 ) , " &
" 12 ( BC_2, ID(2) , input, 0 ) , " &
" 13 ( BC_1, * , control, 0 ) , " &
" 14 ( BC_1, RST_OUT , output3, 0 , 13, 0 , Z ) , " &
" 15 ( BC_2, MSSD(0) , input, 0 ) , " &
" 16 ( BC_1, * , control, 0 ) , " & --OE
" 17 ( BC_1, MSSD(0) , output3, 0 , 16 , 0 , Z ) , " &
" 18 ( BC_2, DS(0) , input, 0 ) , " &
" 19 ( BC_2, BR(4) , input, 0 ) , " &
" 20 ( BC_1, * , control , 0 ) , " &
" 21 ( BC_1, BR(4) , output3 , 0 , 20 , 0 , Z ) , " &
" 22 ( BC_2, SCLKRAT(2) , input , 0 ) , " &
" 23 ( BC_2, RST_IN , input , 0 ) , " &
" 24 ( BC_2, BR(7) , input , 0 ) , " &
" 25 ( BC_1, * , control , 0 ) , " &
" 26 ( BC_1, BR(7) , output3 , 0 , 25 , 0 , Z ) , " &
" 27 ( BC_2, BM , input , 0 ) , " &
" 28 ( BC_1, * , control , 1 ) , " &
" 29 ( BC_1, BM , output3 , 0 , 28 , 1 , Z ) , " &
" 30 ( BC_2, ID(0) , input , 0 ) , " &
" 31 ( BC_2, BR(6) , input , 0 ) , " &
" 32 ( BC_1, * , control , 0 ) , " &
" 33 ( BC_1, BR(6) , output3 , 0 , 32 , 0 , Z ) , " &
" 34 ( BC_2, BR(5) , input , 0 ) , " &
" 35 ( BC_1, * , control , 0 ) , " &
" 36 ( BC_1, BR(5) , output3 , 0 , 35 , 0 , Z ) , " &
" 37 ( BC_2, SCLKRAT(1) , input , 0 ) , " &
" 38 ( BC_2, BR(3) , input , 0 ) , " &
" 39 ( BC_1, * , control , 0 ) , " &
" 40 ( BC_1, BR(3) , output3 , 0 , 39 , 0 , Z ) , " &
" 41 ( BC_2, BR(2) , input , 0 ) , " &
" 42 ( BC_1, * , control , 0 ) , " &
" 43 ( BC_1, BR(2) , output3 , 0 , 42 , 0 , Z ) , " &
" 44 ( BC_2, BR(1) , input , 0 ) , " &
" 45 ( BC_1, * , control , 0 ) , " &
" 46 ( BC_1, BR(1) , output3 , 0 , 45 , 0 , Z ) , " &
" 47 ( BC_2, BR(0) , input , 0 ) , " &
" 48 ( BC_1, * , control , 0 ) , " &
" 49 ( BC_1, BR(0) , output3 , 0 , 48 , 0 , Z ) , " &
" 50 ( BC_2, SDWE , input , 0 ) , " &
" 51 ( BC_1, * , control , 0 ) , " &
" 52 ( BC_1, SDWE , output3 , 0 , 51 , 0 , Z ) , " &
" 53 ( BC_3, * , internal ,1 ) , " &
" 54 ( BC_3, * , internal ,0 ) , " &
" 55 ( BC_2, SDCKE , input , 0 ) , " &
" 56 ( BC_1, * , control , 0 ) , " &
" 57 ( BC_1, SDCKE , output3 , 0 , 56 , 0 , Z ) , " &
" 58 ( BC_1, * , control , 0 ) , " &
" 59 ( BC_1, SDA10 , output3 , 0 , 58 , 0 , Z ) , " &
" 60 ( BC_1, * , control , 0 ) , " &
" 61 ( BC_1, HDQM , output3 , 0 , 60 , 0 , Z ) , " &
" 62 ( BC_1, * , control , 0 ) , " &
" 63 ( BC_1, LDQM , output3 , 0 , 62 , 0 , Z ) , " &
" 64 ( BC_3, * , internal ,1 ) , " & -- ts0 pull up scan
" 65 ( BC_3, * , internal ,0 ) , " &
" 66 ( BC_2, CAS , input , 0 ) , " &
" 67 ( BC_1, * , control , 0 ) , " &
" 68 ( BC_1, CAS , output3 , 0 , 67 , 0 , Z ) , " &
" 69 ( BC_2, RAS , input , 0 ) , " &
" 70 ( BC_1, * , control , 0 ) , " &
" 71 ( BC_1, RAS , output3 , 0 , 70 , 0 , Z ) , " &
" 72 ( BC_1, * , control , 0 ) , " &
" 73 ( BC_1, MSH , output3 , 0 , 72 , 0 , Z ) , " &
" 74 ( BC_2, SCLKRAT(0) , input , 0 ) , " &
" 75 ( BC_2, MSSD(3) , input , 0 ) , " &
" 76 ( BC_1, * , control , 0 ) , " &
" 77 ( BC_1, MSSD(3) , output3 , 0 , 76 , 0 , Z ) , " &
" 78 ( BC_2, MSSD(1) , input , 0 ) , " &
" 79 ( BC_1, * , control , 0 ) , " &
" 80 ( BC_1, MSSD(1) , output3 , 0 , 79 , 0 , Z ) , " &
" 81 ( BC_1, * , control , 0 ) , " &
" 82 ( BC_2, BMS , input , 0 ) , " &
" 83 ( BC_3, * , internal ,1 ) , " &
" 84 ( BC_1, BMS , output3 , 0 , 81 , 0 , Z ) , " &
" 85 ( BC_1, * , control , 0 ) , " &
" 86 ( BC_1, MS(0) , output3 , 0 , 85 , 0 , Z ) , " &
" 87 ( BC_1, * , control , 0 ) , " &
" 88 ( BC_1, MS(1) , output3 , 0 , 87 , 0 , Z ) , " &
" 89 ( BC_2, DATA(63) , input , 0 ) , " &
" 90 ( BC_1, DATA(63) , output3 , 0 , 113 , 0 , Z ) , " &
" 91 ( BC_2, DATA(62) , input , 0 ) , " &
" 92 ( BC_1, DATA(62) , output3 , 0 , 113 , 0 , Z ) , " &
" 93 ( BC_2, DATA(61) , input , 0 ) , " &
" 94 ( BC_1, DATA(61) , output3 , 0 , 113 , 0 , Z ) , " &
" 95 ( BC_2, DATA(60) , input , 0 ) , " &
" 96 ( BC_1, DATA(60) , output3 , 0 , 113 , 0 , Z ) , " &
" 97 ( BC_2, DATA(59) , input , 0 ) , " &
" 98 ( BC_1, DATA(59) , output3 , 0 , 113 , 0 , Z ) , " &
" 99 ( BC_2, DATA(58) , input , 0 ) , " &
" 100( BC_1, DATA(58) , output3 , 0 , 113 , 0 , Z ) , " &
" 101( BC_2, DATA(57) , input , 0 ) , " &
" 102( BC_1, DATA(57) , output3 , 0 , 113 , 0 , Z ) , " &
" 103( BC_2, DATA(56) , input , 0 ) , " &
" 104( BC_1, DATA(56) , output3 , 0 , 113 , 0 , Z ) , " &
" 105( BC_2, DATA(55) , input , 0 ) , " &
" 106( BC_1, DATA(55) , output3 , 0 , 113 , 0 , Z ) , " &
" 107( BC_2, DATA(54) , input , 0 ) , " &
" 108( BC_1, DATA(54) , output3 , 0 , 113 , 0 , Z ) , " &
" 109( BC_2, DATA(53) , input , 0 ) , " &
" 110( BC_1, DATA(53) , output3 , 0 , 113 , 0 , Z ) , " &
" 111( BC_2, DATA(52) , input , 0 ) , " &
" 112( BC_1, DATA(52) , output3 , 0 , 113 , 0 , Z ) , " &
" 113( BC_1, * , control , 0 ) , " &
" 114( BC_2, DATA(51) , input , 0 ) , " &
" 115( BC_1, DATA(51) , output3 , 0 , 113 , 0 , Z ) , " &
" 116( BC_2, DATA(50) , input , 0 ) , " &
" 117( BC_1, DATA(50) , output3 , 0 , 113 , 0 , Z ) , " &
" 118( BC_2, DATA(49) , input , 0 ) , " &
" 119( BC_1, DATA(49) , output3 , 0 , 113 , 0 , Z ) , " &
" 120( BC_2, DATA(48) , input , 0 ) , " &
" 121( BC_1, DATA(48) , output3 , 0 , 113 , 0 , Z ) , " &
" 122( BC_2, DATA(47) , input , 0 ) , " &
" 123( BC_1, DATA(47) , output3 , 0 , 113 , 0 , Z ) , " &
" 124( BC_2, DATA(46) , input , 0 ) , " &
" 125( BC_1, DATA(46) , output3 , 0 , 113 , 0 , Z ) , " &
" 126( BC_2, DATA(45) , input , 0 ) , " &
" 127( BC_1, DATA(45) , output3 , 0 , 113 , 0 , Z ) , " &
" 128( BC_2, DATA(44) , input , 0 ) , " &
" 129( BC_1, DATA(44) , output3 , 0 , 113 , 0 , Z ) , " &
" 130( BC_2, DATA(43) , input , 0 ) , " &
" 131( BC_1, DATA(43) , output3 , 0 , 113 , 0 , Z ) , " &
" 132( BC_2, DATA(42) , input , 0 ) , " &
" 133( BC_1, DATA(42) , output3 , 0 , 113 , 0 , Z ) , " &
" 134( BC_2, DATA(41) , input , 0 ) , " &
" 135( BC_1, DATA(41) , output3 , 0 , 113 , 0 , Z ) , " &
" 136( BC_2, DATA(40) , input , 0 ) , " &
" 137( BC_1, DATA(40) , output3 , 0 , 113 , 0 , Z ) , " &
" 138( BC_2, DATA(39) , input , 0 ) , " &
" 139( BC_1, DATA(39) , output3 , 0 , 113 , 0 , Z ) , " &
" 140( BC_2, DATA(38) , input , 0 ) , " &
" 141( BC_1, DATA(38) , output3 , 0 , 113 , 0 , Z ) , " &
" 142( BC_2, DATA(37) , input , 0 ) , " &
" 143( BC_1, DATA(37) , output3 , 0 , 113 , 0 , Z ) , " &
" 144( BC_2, DATA(36) , input , 0 ) , " &
" 145( BC_1, DATA(36) , output3 , 0 , 113 , 0 , Z ) , " &
" 146( BC_2, DATA(35) , input , 0 ) , " &
" 147( BC_1, DATA(35) , output3 , 0 , 113 , 0 , Z ) , " &
" 148( BC_2, DATA(34) , input , 0 ) , " &
" 149( BC_1, DATA(34) , output3 , 0 , 113 , 0 , Z ) , " &
" 150( BC_2, DATA(33) , input , 0 ) , " &
" 151( BC_1, DATA(33) , output3 , 0 , 113 , 0 , Z ) , " &
" 152( BC_2, DATA(32) , input , 0 ) , " &
" 153( BC_1, DATA(32) , output3 , 0 , 113 , 0 , Z ) , " &
" 154( BC_2, DATA(31) , input , 0 ) , " &
" 155( BC_1, DATA(31) , output3 , 0 , 172 , 0 , Z ) , " &
" 156( BC_2, DATA(30) , input , 0 ) , " &
" 157( BC_1, DATA(30) , output3 , 0 , 172 , 0 , Z ) , " &
" 158( BC_2, DATA(29) , input , 0 ) , " &
" 159( BC_1, DATA(29) , output3 , 0 , 172 , 0 , Z ) , " &
" 160( BC_2, DATA(28) , input , 0 ) , " &
" 161( BC_1, DATA(28) , output3 , 0 , 172 , 0 , Z ) , " &
" 162( BC_2, DATA(27) , input , 0 ) , " &
" 163( BC_1, DATA(27) , output3 , 0 , 172 , 0 , Z ) , " &
" 164( BC_2, DATA(26) , input , 0 ) , " &
" 165( BC_1, DATA(26) , output3 , 0 , 172 , 0 , Z ) , " &
" 166( BC_2, DATA(25) , input , 0 ) , " &
" 167( BC_1, DATA(25) , output3 , 0 , 172 , 0 , Z ) , " &
" 168( BC_2, DATA(24) , input , 0 ) , " &
" 169( BC_1, DATA(24) , output3 , 0 , 172 , 0 , Z ) , " &
" 170( BC_2, DATA(23) , input , 0 ) , " &
" 171( BC_1, DATA(23) , output3 , 0 , 172 , 0 , Z ) , " &
" 172( BC_1, * , control , 0 ) , " &
" 173( BC_2 , DATA(22) , input , 0 ) , " &
" 174( BC_1 , DATA(22) , output3 , 0 , 172 , 0 , Z ) , " &
" 175( BC_2 , DATA(21) , input , 0 ) , " &
" 176( BC_1 , DATA(21) , output3 , 0 , 172 , 0 , Z ) , " &
" 177( BC_2 , DATA(20) , input , 0 ) , " &
" 178( BC_1 , DATA(20) , output3 , 0 , 172 , 0 , Z ) , " &
" 179( BC_2 , DATA(19) , input , 0 ) , " &
" 180( BC_1 , DATA(19) , output3 , 0 , 172 , 0 , Z ) , " &
" 181( BC_2 , DATA(18) , input , 0 ) , " &
" 182( BC_1 , DATA(18) , output3 , 0 , 172 , 0 , Z ) , " &
" 183( BC_2 , DATA(17) , input , 0 ) , " &
" 184( BC_1 , DATA(17) , output3 , 0 , 172 , 0 , Z ) , " &
" 185( BC_2 , DATA(16), input , 0 ) , " &
" 186( BC_1 , DATA(16), output3 , 0 , 172 , 0 , Z ) , " &
" 187( BC_2 , DATA(15), input , 0 ) , " &
" 188( BC_1 , DATA(15), output3 , 0 , 172 , 0 , Z ) , " &
" 189( BC_2 , DATA(14), input , 0 ) , " &
" 190( BC_1 , DATA(14), output3 , 0 , 172 , 0 , Z ) , " &
" 191( BC_2 , DATA(13), input , 0 ) , " &
" 192( BC_1 , DATA(13), output3 , 0 , 172 , 0 , Z ) , " &
" 193( BC_2 , DATA(12), input , 0 ) , " &
" 194( BC_1 , DATA(12), output3 , 0 , 172 , 0 , Z ) , " &
" 195( BC_2 , DATA(11), input , 0 ) , " &
" 196( BC_1 , DATA(11), output3 , 0 , 172 , 0 , Z ) , " &
" 197( BC_2 , DATA(10), input , 0 ) , " &
" 198( BC_1 , DATA(10), output3 , 0 , 172 , 0 , Z ) , " &
" 199( BC_2 , DATA(9) , input , 0 ) , " &
" 200( BC_1 , DATA(9) , output3 , 0 , 172 , 0 , Z ) , " &
" 201( BC_2 , DATA(8) , input , 0 ) , " &
" 202( BC_1 , DATA(8) , output3 , 0 , 172 , 0 , Z ) , " &
" 203( BC_2 , DATA(7) , input , 0 ) , " &
" 204( BC_1 , DATA(7) , output3 , 0 , 172 , 0 , Z ) , " &
" 205( BC_2 , DATA(6) , input , 0 ) , " &
" 206( BC_1 , DATA(6) , output3 , 0 , 172 , 0 , Z ) , " &
" 207( BC_2 , DATA(5) , input , 0 ) , " &
" 208( BC_1 , DATA(5) , output3 , 0 , 172 , 0 , Z ) , " &
" 209( BC_2 , DATA(4) , input , 0 ) , " &
" 210( BC_1 , DATA(4) , output3 , 0 , 172 , 0 , Z ) , " &
" 211( BC_2 , DATA(3) , input , 0 ) , " &
" 212( BC_1 , DATA(3) , output3 , 0 , 172 , 0 , Z ) , " &
" 213( BC_2 , DATA(2) , input , 0 ) , " &
" 214( BC_1 , DATA(2) , output3 , 0 , 172 , 0 , Z ) , " &
" 215( BC_2 , DATA(1) , input , 0 ) , " &
" 216( BC_1 , DATA(1) , output3 , 0 , 172 , 0 , Z ) , " &
" 217( BC_2 , DATA(0) , input , 0 ) , " &
" 218( BC_1 , DATA(0) , output3 , 0 , 172 , 0 , Z ) , " &
" 219( BC_3 , * , internal ,1 ) , " & --500ohm pu en
" 220( BC_3 , * , internal ,0 ) , " & --50ohm pu en
" 221( BC_2 , ACK , input , 0 ) , " &
" 222( BC_3 , * , internal ,0 ) , " & --50ohm pu en
" 223( BC_1 , ACK , output2 , 0 ), " &
" 224( BC_2 , WRH , input , 0 ) , " &
" 225( BC_1 , * , control , 0 ) , " &
" 226( BC_1 , WRH , output3 , 0 , 225 , 0 , Z ) , " &
" 227( BC_2 , WRL , input , 0 ) , " &
" 228( BC_1 , * , control , 0 ) , " &
" 229( BC_1 , WRL , output3 , 0 , 228 , 0 , Z ) , " &
" 230( BC_2 , BRST , input , 0 ) , " &
" 231( BC_1 , * , control , 0 ) , " &
" 232( BC_1 , BRST , output3 , 0 , 231 , 0 , Z ) , " &
" 233( BC_2 , RD , input , 0 ) , " &
" 234( BC_1 , * , control , 0 ) , " &
" 235( BC_1 , RD , output3 , 0 , 234 , 0 , Z ) , " &
" 236( BC_2 , ADDR(31) , input , 0 ) , " &
" 237( BC_1 , ADDR(31) , output3 , 0 , 262 , 0 , Z ) , " &
" 238( BC_2 , ADDR(30) , input , 0 ) , " &
" 239( BC_1 , ADDR(30) , output3 , 0 , 262 , 0 , Z ) , " &
" 240( BC_2 , ADDR(29) , input , 0 ) , " &
" 241( BC_1 , ADDR(29) , output3 , 0 , 262 , 0 , Z ) , " &
" 242( BC_2 , ADDR(28) , input , 0 ) , " &
" 243( BC_1 , ADDR(28) , output3 , 0 , 262 , 0 , Z ) , " &
" 244( BC_2 , ADDR(27) , input , 0 ) , " &
" 245( BC_1 , ADDR(27) , output3 , 0 , 262 , 0 , Z ) , " &
" 246( BC_2 , ADDR(26) , input , 0 ) , " &
" 247( BC_1 , ADDR(26) , output3 , 0 , 262 , 0 , Z ) , " &
" 248( BC_2 , ADDR(25) , input , 0 ) , " &
" 249( BC_1 , ADDR(25) , output3 , 0 , 262 , 0 , Z ) , " &
" 250( BC_2 , ADDR(24) , input , 0 ) , " &
" 251( BC_1 , ADDR(24) , output3 , 0 , 262 , 0 , Z ) , " &
" 252( BC_2 , ADDR(23) , input , 0 ) , " &
" 253( BC_1 , ADDR(23) , output3 , 0 , 262 , 0 , Z ) , " &
" 254( BC_2 , ADDR(22) , input , 0 ) , " &
" 255( BC_1 , ADDR(22) , output3 , 0 , 262 , 0 , Z ) , " &
" 256( BC_2 , ADDR(21) , input , 0 ) , " &
" 257( BC_1 , ADDR(21) , output3 , 0 , 262 , 0 , Z ) , " &
" 258( BC_2 , ADDR(20) , input , 0 ) , " &
" 259( BC_1 , ADDR(20) , output3 , 0 , 262 , 0 , Z ) , " &
" 260( BC_2 , ADDR(19) , input , 0 ) , " &
" 261( BC_1 , ADDR(19) , output3 , 0 , 262 , 0 , Z ) , " &
" 262( BC_1 , * , control , 0 ) , " &
" 263( BC_2 , ADDR(18) , input , 0 ) , " &
" 264( BC_1 , ADDR(18) , output3 , 0 , 262 , 0 , Z ) , " &
" 265( BC_2 , ADDR(17) , input , 0 ) , " &
" 266( BC_1 , ADDR(17) , output3 , 0 , 262 , 0 , Z ) , " &
" 267( BC_2 , ADDR(16) , input , 0 ) , " &
" 268( BC_1 , ADDR(16) , output3 , 0 , 262 , 0 , Z ) , " &
" 269( BC_2 , ADDR(15) , input , 0 ) , " &
" 270( BC_1 , ADDR(15) , output3 , 0 , 262 , 0 , Z ) , " &
" 271( BC_2 , ADDR(14) , input , 0 ) , " &
" 272( BC_1 , ADDR(14) , output3 , 0 , 262 , 0 , Z ) , " &
" 273( BC_2 , ADDR(13) , input , 0 ) , " &
" 274( BC_1 , ADDR(13) , output3 , 0 , 262 , 0 , Z ) , " &
" 275( BC_2 , ADDR(12) , input , 0 ) , " &
" 276( BC_1 , ADDR(12) , output3 , 0 , 262 , 0 , Z ) , " &
" 277( BC_2 , ADDR(11) , input , 0 ) , " &
" 278( BC_1 , ADDR(11) , output3 , 0 , 262 , 0 , Z ) , " &
" 279( BC_2 , ADDR(10) , input , 0 ) , " &
" 280( BC_1 , ADDR(10) , output3 , 0 , 262 , 0 , Z ) , " &
" 281( BC_2 , ADDR(9) , input , 0 ) , " &
" 282( BC_1 , ADDR(9) , output3 , 0 , 262 , 0 , Z ) , " &
" 283( BC_2 , ADDR(8) , input , 0 ) , " &
" 284( BC_1 , ADDR(8) , output3 , 0 , 262 , 0 , Z ) , " &
" 285( BC_2 , ADDR(7) , input , 0 ) , " &
" 286( BC_1 , ADDR(7) , output3 , 0 , 262 , 0 , Z ) , " &
" 287( BC_2 , ADDR(6) , input , 0 ) , " &
" 288( BC_1 , ADDR(6) , output3 , 0 , 262 , 0 , Z ) , " &
" 289( BC_2 , ADDR(5) , input , 0 ) , " &
" 290( BC_1 , ADDR(5) , output3 , 0 , 262 , 0 , Z ) , " &
" 291( BC_2 , ADDR(4) , input , 0 ) , " &
" 292( BC_1 , ADDR(4) , output3 , 0 , 262 , 0 , Z ) , " &
" 293( BC_2 , ADDR(3) , input , 0 ) , " &
" 294( BC_1 , ADDR(3) , output3 , 0 , 262 , 0 , Z ) , " &
" 295( BC_2 , ADDR(2) , input , 0 ) , " &
" 296( BC_1 , ADDR(2) , output3 , 0 , 262 , 0 , Z ) , " &
" 297( BC_2 , ADDR(1) , input , 0 ) , " &
" 298( BC_1 , ADDR(1) , output3 , 0 , 262 , 0 , Z ) , " &
" 299( BC_2 , ADDR(0) , input , 0 ) , " &
" 300( BC_1 , ADDR(0) , output3 , 0 , 262 , 0 , Z ) , " &
" 301( BC_1 , * , control , 0 ) , " &
" 302( BC_1 , L0ACKO, output3 , 0 , 301 , 0 , Z ) , " &
" 303( BC_2 , L0BCMPI, input , 0 ) , " &
" 304( BC_2 , L0DATIP(0), input , 0 ) , " &
" 305( BC_2 , L0DATIP(1), input , 0 ) , " &
" 306( BC_2 , L0CLKINP, input , 0 ) , " &
" 307( BC_2 , L0DATIP(2), input , 0 ) , " &
" 308( BC_2 , L0DATIP(3), input , 0 ) , " &
" 309( BC_1 , * , control , 0 ) , " &
" 310( BC_1 , L0DATOP(3), output3 , 0 , 309 , 0 , Z ) , " &
" 311( BC_1 , L0DATOP(2), output3 , 0 , 309 , 0 , Z ) , " &
" 312( BC_1 , L0CLKOUTP, output3 , 0 , 309 , 0 , Z ) , " &
" 313( BC_1 , L0DATOP(1), output3 , 0 , 309 , 0 , Z ) , " &
" 314( BC_1 , L0DATOP(0), output3 , 0 , 309 , 0 , Z ) , " &
" 315( BC_1 , * , control , 0 ) , " &
" 316( BC_1 , L0BCMPO, output3 , 0 , 315 , 0 , Z ) , " &
" 317( BC_2 , L0ACKI, input , 0 ) , " &
" 318( BC_1 , * , control , 0 ) , " &
" 319( BC_1 , LTSTOUT_01, output3 , 0 , 318 , 0 , Z ) , " &
" 320( BC_2 , LTSTIN_01, input , 0 ) , " &
" 321( BC_1 , * , control , 0 ) , " &
" 322( BC_1 , L1ACKO, output3 , 0 , 321 , 0 , Z ) , " &
" 323( BC_2 , L1BCMPI, input , 0 ) , " &
" 324( BC_2 , L1DATIP(0), input , 0 ) , " &
" 325( BC_2 , L1DATIP(1), input , 0 ) , " &
" 326( BC_2 , L1CLKINP, input , 0 ) , " &
" 327( BC_2 , L1DATIP(2), input , 0 ) , " &
" 328( BC_2 , L1DATIP(3), input , 0 ) , " &
" 329( BC_1 , * , control , 0 ) , " &
" 330( BC_1 , L1DATOP(3), output3 , 0 , 329 , 0 , Z ) , " &
" 331( BC_1 , L1DATOP(2), output3 , 0 , 329 , 0 , Z ) , " &
" 332( BC_1 , L1CLKOUTP, output3 , 0 , 329 , 0 , Z ) , " &
" 333( BC_1 , L1DATOP(1), output3 , 0 , 329 , 0 , Z ) , " &
" 334( BC_1 , L1DATOP(0), output3 , 0 , 329 , 0 , Z ) , " &
" 335( BC_2 , L1BCMPO, input , 0 ) , " & -- strap
" 336( BC_1 , * , control , 1 ) , " &
" 337( BC_1 , L1BCMPO, output3 , 0 , 336 , 1 , Z ) , " &
" 338( BC_2 , L1ACKI, input , 0 ) , " &
" 339( BC_1 , * , control , 0 ) , " &
" 340( BC_1 , L2ACKO, output3 , 0 , 339 , 0 , Z ) , " &
" 341( BC_2 , L2BCMPI, input , 0 ) , " &
" 342( BC_2 , L2DATIP(0), input , 0 ) , " &
" 343( BC_2 , L2DATIP(1), input , 0 ) , " &
" 344( BC_2 , L2CLKINP, input , 0 ) , " &
" 345( BC_2 , L2DATIP(2), input , 0 ) , " &
" 346( BC_2 , L2DATIP(3), input , 0 ) , " &
" 347( BC_1 , * , control , 0 ) , " &
" 348( BC_1 , L2DATOP(3), output3 , 0 , 347 , 0 , Z ) , " &
" 349( BC_1 , L2DATOP(2), output3 , 0 , 347 , 0 , Z ) , " &
" 350( BC_1 , L2CLKOUTP, output3 , 0 , 347 , 0 , Z ) , " &
" 351( BC_1 , L2DATOP(1), output3 , 0 , 347 , 0 , Z ) , " &
" 352( BC_1 , L2DATOP(0), output3 , 0 , 347 , 0 , Z ) , " &
" 353( BC_2 , L2BCMPO, input , 0 ) , " & -- strap
" 354( BC_1 , * , control , 1 ) , " &
" 355( BC_1 , L2BCMPO, output3 , 0 , 354 , 1 , Z ) , " &
" 356( BC_2 , L2ACKI, input , 0 ) , " &
" 357( BC_1 , * , control , 0 ) , " &
" 358( BC_1 , LTSTOUT_23, output3 , 0 , 357 , 0 , Z ) , " &
" 359( BC_2 , LTSTIN_23, input , 0 ) , " &
" 360( BC_1 , * , control , 0 ) , " &
" 361( BC_1 , L3ACKO, output3 , 0 , 360 , 0 , Z ) , " &
" 362( BC_2 , L3BCMPI, input , 0 ) , " &
" 363( BC_2 , L3DATIP(0), input , 0 ) , " &
" 364( BC_2 , L3DATIP(1), input , 0 ) , " &
" 365( BC_2 , L3CLKINP, input , 0 ) , " &
" 366( BC_2 , L3DATIP(2), input , 0 ) , " &
" 367( BC_2 , L3DATIP(3), input , 0 ) , " &
" 368( BC_1 , * , control , 0 ) , " &
" 369( BC_1 , L3DATOP(3), output3 , 0 , 368 , 0 , Z ) , " &
" 370( BC_1 , L3DATOP(2), output3 , 0 , 368 , 0 , Z ) , " &
" 371( BC_1 , L3CLKOUTP, output3 , 0 , 368 , 0 , Z ) , " &
" 372( BC_1 , L3DATOP(1), output3 , 0 , 368 , 0 , Z ) , " &
" 373( BC_1 , L3DATOP(0), output3 , 0 , 368 , 0 , Z ) , " &
" 374( BC_2 , L3BCMPO, input , 0 ) , " & -- strap
" 375( BC_1 , * , control , 1 ) , " &
" 376( BC_1 , L3BCMPO, output3 , 0 , 375 , 1 , Z ) , " &
" 377( BC_2 , L3ACKI, input , 0 ) , " &
" 378( BC_2 , BOFF , input , 0 ) , " &
" 379( BC_1 , * , control , 0 ) , " &
" 380( BC_2 , BUSLOCK , input , 0 ) , " & -- strap
" 381( BC_3 , * , internal ,1 ) , " &
" 382( BC_1 , BUSLOCK, output3 , 0 , 379 , 0 , Z ) , " &
" 383( BC_2 , HBR , input , 0 ) , " &
" 384( BC_3 , * , internal ,1 ) , " & -- ts0 pull up scan
" 385( BC_3 , * , internal ,0 ) , " &
" 386( BC_2 , HBG , input , 0 ) , " &
" 387( BC_1 , * , control , 0 ) , " &
" 388( BC_1 , HBG , output3 , 0 , 387 , 0 , Z ) , " &
" 389( BC_3 , * , internal , 1 ) , " &
" 390( BC_2 , CPA , input , 0 ) , " &
" 391( BC_1 , CPA , output2 , 1 , 391 , 1, pull1 ) , " &
" 392( BC_3 , * , internal , 1 ) , " &
" 393( BC_2 , DPA , input , 0 ) , " &
" 394( BC_1 , DPA , output2 , 1 , 394 , 1, pull1 ) , " &
" 395( BC_2 , DMAR(0) , input , 0 ) , " &
" 396( BC_2 , DMAR(1) , input , 0 ) , " &
" 397( BC_2 , DMAR(2) , input , 0 ) , " &
" 398( BC_2 , DMAR(3) , input , 0 ) , " &
" 399( BC_1 , * , control , 0 ) , " &
" 400( BC_1 , IOWR, output3 , 0 , 399 , 0 , Z ) , " &
" 401( BC_1 , * , control , 0 ) , " &
" 402( BC_1 , IORD, output3 , 0 , 401 , 0 , Z ) , " &
" 403( BC_1 , * , control , 0 ) , " &
" 404( BC_1 , IOEN, output3 , 0 , 403 , 0 , Z ) , " &
" 405( BC_2 , IRQ(0) , input , 0 ) , " &
" 406( BC_2 , IRQ(1) , input , 0 ) , " &
" 407( BC_2 , IRQ(2) , input , 0 ) , " &
" 408( BC_2 , ID(1) , input , 0 ) , " &
" 409( BC_2 , IRQ(3) , input , 0 ) , " &
" 410( BC_2 , FLAG(0) , input , 0 ) , " &
" 411( BC_1 , * , control , 0 ) , " &
" 412( BC_1 , FLAG(0) , output3 , 0 , 411 , 0 , Z ) , " &
" 413( BC_2 , FLAG(1) , input , 0 ) , " &
" 414( BC_1 , * , control , 0 ) , " &
" 415( BC_1 , FLAG(1) , output3 , 0 , 414 , 0 , Z ) , " &
" 416( BC_2 , FLAG(2) , input , 0 ) , " &
" 417( BC_1 , * , control , 0 ) , " &
" 418( BC_1 , FLAG(2) , output3 , 0 , 417 , 0 , Z ) , " &
" 419( BC_2 , FLAG(3) , input , 0 ) , " &
" 420( BC_1 , * , control , 0 ) , " &
" 421( BC_1 , FLAG(3) , output3 , 0 , 420, 0 , Z ) , " &
" 422( BC_2 , TMR0E , input , 0 ) , " &
" 423( BC_1 , * , control , 1 ) , " &
" 424( BC_1 , TMR0E , output3 , 0 , 423 , 1 , Z )" ;
end ADSP_TS20x;