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BSDL File: corsica Download View details  


-- ***********************************************************************

--   BSDL file for design MXL

--   Created by Synopsys Version 2000.11-SP2-2 (Jul 11, 2001)

--   Designer: r58071
--   Company:  Motorola Electronics Pte Ltd

--   Date: Wed Jun  5 20:24:22 2002

-- ***********************************************************************


 entity corsica is
   
-- This section identifies the default device package selected.
   
   generic (PHYSICAL_PIN_MAP: string:= "BGA");
   
-- This section declares all the ports in the design.
   
   port ( 
          AVDD1_124_pad                  : linkage  bit;
          AVSS1_146_pad                  : linkage  bit;
          NVDD1_109_pad                  : linkage  bit;
          NVDD1_117_pad                  : linkage  bit;
          NVDD1_17_pad                   : linkage  bit;
          NVDD1_1_pad                    : linkage  bit;
          NVDD1_25_pad                   : linkage  bit;
          NVDD1_35_pad                   : linkage  bit;
          NVDD1_43_pad                   : linkage  bit;
          NVDD1_51_pad                   : linkage  bit;
          NVDD1_59_pad                   : linkage  bit;
          NVDD1_67_pad                   : linkage  bit;
          NVDD1_75_pad                   : linkage  bit;
          NVDD1_85_pad                   : linkage  bit;
          NVDD1_91_pad                   : linkage  bit;
          NVDD1_99_pad                   : linkage  bit;
          NVDD1_9_pad                    : linkage  bit;
          NVDD2_147_pad                  : linkage  bit;
          NVDD2_161_pad                  : linkage  bit;
          NVDD2_177_pad                  : linkage  bit;
          NVDD2_190_pad                  : linkage  bit;
          NVDD3_205_pad                  : linkage  bit;
          NVDD4_224_pad                  : linkage  bit;
          NVDD4_240_pad                  : linkage  bit;
          NVSS1_106_pad                  : linkage  bit;
          NVSS1_116_pad                  : linkage  bit;
          NVSS1_123_pad                  : linkage  bit;
          NVSS1_16_pad                   : linkage  bit;
          NVSS1_24_pad                   : linkage  bit;
          NVSS1_32_pad                   : linkage  bit;
          NVSS1_42_pad                   : linkage  bit;
          NVSS1_50_pad                   : linkage  bit;
          NVSS1_58_pad                   : linkage  bit;
          NVSS1_66_pad                   : linkage  bit;
          NVSS1_74_pad                   : linkage  bit;
          NVSS1_82_pad                   : linkage  bit;
          NVSS1_8_pad                    : linkage  bit;
          NVSS1_90_pad                   : linkage  bit;
          NVSS1_98_pad                   : linkage  bit;
          NVSS2_160_pad                  : linkage  bit;
          NVSS2_176_pad                  : linkage  bit;
          NVSS2_189_pad                  : linkage  bit;
          NVSS2_202_pad                  : linkage  bit;
          NVSS3_221_pad                  : linkage  bit;
          NVSS4_237_pad                  : linkage  bit;
          NVSS4_253_pad                  : linkage  bit;
          QVDD1_107_pad                  : linkage  bit;
          QVDD1_222_pad                  : linkage  bit;
          QVDD1_238_pad                  : linkage  bit;
          QVDD1_33_pad                   : linkage  bit;
          QVDD1_83_pad                   : linkage  bit;
          QVDD2_125_pad                  : linkage  bit;
          QVDD2_132_pad                  : linkage  bit;
          QVDD2_137_pad                  : linkage  bit;
          QVDD3_175_pad                  : linkage  bit;
          QVDD4_203_pad                  : linkage  bit;
          QVSS1_108_pad                  : linkage  bit;
          QVSS1_223_pad                  : linkage  bit;
          QVSS1_239_pad                  : linkage  bit;
          QVSS1_34_pad                   : linkage  bit;
          QVSS1_84_pad                   : linkage  bit;
          QVSS2_126_pad                  : linkage  bit;
          QVSS2_130_pad                  : linkage  bit;
          QVSS2_134_pad                  : linkage  bit;
          QVSS2_136_pad                  : linkage  bit;
          QVSS3_174_pad                  : linkage  bit;
          QVSS4_204_pad                  : linkage  bit;
          big_endian_141_pad             : in       bit;
          boot0_145_pad                  : in       bit;
          boot1_144_pad                  : in       bit;
          boot2_143_pad                  : in       bit;
          boot3_142_pad                  : in       bit;
          extal16m_129_pad               : linkage  bit;
          extal32k_133_pad               : linkage  bit;
          por_140_pad                    : in       bit;
          reset_in_b_138_pad             : in       bit;
          tck_150_pad                    : in       bit;
          tdi_151_pad                    : in       bit;
          tms_149_pad                    : in       bit;
          tristate_128_pad               : in       bit;
          trst_b_127_pad                 : in       bit;
          xtal16m_131_pad                : linkage  bit;
          xtal32k_135_pad                : linkage  bit;
          a0_pa21_78_pad                 : inout    bit;
          a16_dbg9_pa24_22_pad           : inout    bit;
          a17_dbg8_pa25_20_pad           : inout    bit;
          a18_dbg7_pa26_18_pad           : inout    bit;
          a19_dbg6_pa27_14_pad           : inout    bit;
          a20_dbg5_pa28_12_pad           : inout    bit;
          a21_dbg4_pa29_10_pad           : inout    bit;
          a22_dbg3_pa30_6_pad            : inout    bit;
          a23_dbg2_pa31_4_pad            : inout    bit;
          a24_dbg1_pa0_2_pad             : inout    bit;
          bclk_b_pa18_96_pad             : inout    bit;
          clk_ms2_pb12_248_pad           : inout    bit;
          cls_uart2_dco_pd8_199_pad      : inout    bit;
          cmd_ms1_pb13_247_pad           : inout    bit;
          contrast_pd11_196_pad          : inout    bit;
          cs4_b_pa22_77_pad              : inout    bit;
          cs5_b_pa23_73_pad              : inout    bit;
          csi_d0_pa4_166_pad             : inout    bit;
          csi_d1_pa5_165_pad             : inout    bit;
          csi_d2_pa6_164_pad             : inout    bit;
          csi_d3_pa7_163_pad             : inout    bit;
          csi_d4_pa8_162_pad             : inout    bit;
          csi_d5_pa9_159_pad             : inout    bit;
          csi_d6_pa10_158_pad            : inout    bit;
          csi_d7_pa11_157_pad            : inout    bit;
          csi_hsync_pa13_155_pad         : inout    bit;
          csi_mclk_pa3_167_pad           : inout    bit;
          csi_pixclk_pa14_154_pad        : inout    bit;
          csi_vsync_pa12_156_pad         : inout    bit;
          d0_105_pad                     : inout    bit;
          d10_61_pad                     : inout    bit;
          d11_57_pad                     : inout    bit;
          d12_55_pad                     : inout    bit;
          d13_53_pad                     : inout    bit;
          d14_49_pad                     : inout    bit;
          d15_47_pad                     : inout    bit;
          d16_45_pad                     : inout    bit;
          d17_41_pad                     : inout    bit;
          d18_39_pad                     : inout    bit;
          d19_37_pad                     : inout    bit;
          d1_101_pad                     : inout    bit;
          d20_31_pad                     : inout    bit;
          d21_29_pad                     : inout    bit;
          d22_27_pad                     : inout    bit;
          d23_23_pad                     : inout    bit;
          d24_21_pad                     : inout    bit;
          d25_19_pad                     : inout    bit;
          d26_15_pad                     : inout    bit;
          d27_13_pad                     : inout    bit;
          d28_11_pad                     : inout    bit;
          d29_7_pad                      : inout    bit;
          d2_97_pad                      : inout    bit;
          d30_5_pad                      : inout    bit;
          d31_3_pad                      : inout    bit;
          d3_95_pad                      : inout    bit;
          d4_93_pad                      : inout    bit;
          d5_89_pad                      : inout    bit;
          d6_80_pad                      : inout    bit;
          d7_76_pad                      : inout    bit;
          d8_70_pad                      : inout    bit;
          d9_64_pad                      : inout    bit;
          dat0_pb8_252_pad               : inout    bit;
          dat1_pb9_251_pad               : inout    bit;
          dat2_pb10_250_pad              : inout    bit;
          dat3_ms3_pb11_249_pad          : inout    bit;
          dqm0_113_pad                   : inout    bit;
          dqm1_112_pad                   : inout    bit;
          dqm2_111_pad                   : inout    bit;
          dqm3_110_pad                   : inout    bit;
          ecb_b_pa20_92_pad              : inout    bit;
          hsync_pd13_194_pad             : inout    bit;
          i2c_clk_pa16_152_pad           : inout    bit;
          i2c_data_pa15_153_pad          : inout    bit;
          lba_b_pa19_94_pad              : inout    bit;
          ld0_pd15_192_pad               : inout    bit;
          ld10_pd25_180_pad              : inout    bit;
          ld11_pd26_179_pad              : inout    bit;
          ld12_pd27_178_pad              : inout    bit;
          ld13_pd28_173_pad              : inout    bit;
          ld14_pd29_172_pad              : inout    bit;
          ld15_pd30_171_pad              : inout    bit;
          ld1_pd16_191_pad               : inout    bit;
          ld2_pd17_188_pad               : inout    bit;
          ld3_pd18_187_pad               : inout    bit;
          ld4_pd19_186_pad               : inout    bit;
          ld5_pd20_185_pad               : inout    bit;
          ld6_pd21_184_pad               : inout    bit;
          ld7_pd22_183_pad               : inout    bit;
          ld8_pd23_182_pad               : inout    bit;
          ld9_pd24_181_pad               : inout    bit;
          lsclk_pd6_201_pad              : inout    bit;
          miso_pc16_207_pad              : inout    bit;
          mosi_pc17_206_pad              : inout    bit;
          oe_acd_pd12_195_pad            : inout    bit;
          pa17_100_pad                   : inout    bit;
          ps_uart2_ri_pd9_198_pad        : inout    bit;
          pwmo_pa2_168_pad               : inout    bit;
          rev_uart2_dtr_pd7_200_pad      : inout    bit;
          sclk_pc14_209_pad              : inout    bit;
          sdclk_86_pad                   : linkage  bit;
          spi_rdy_pc13_210_pad           : inout    bit;
          spl_spr_uart2_dsr_pd10_197_pad : inout    bit;
          ss_pc15_208_pad                : inout    bit;
          ssi0_rxclk_pc4_219_pad         : inout    bit;
          ssi0_rxdat_pc5_218_pad         : inout    bit;
          ssi0_rxfs_pc3_220_pad          : inout    bit;
          ssi0_txclk_pc8_215_pad         : inout    bit;
          ssi0_txdat_pc6_217_pad         : inout    bit;
          ssi0_txfs_pc7_216_pad          : inout    bit;
          ssi1_rxclk_pb15_245_pad        : inout    bit;
          ssi1_rxdat_pb16_244_pad        : inout    bit;
          ssi1_rxfs_pb14_246_pad         : inout    bit;
          ssi1_txclk_pb19_241_pad        : inout    bit;
          ssi1_txdat_pb17_243_pad        : inout    bit;
          ssi1_txfs_pb18_242_pad         : inout    bit;
          tin_pa1_169_pad                : inout    bit;
          tout2_pd31_170_pad             : inout    bit;
          uart1_cts_pc9_214_pad          : inout    bit;
          uart1_rts_pc10_213_pad         : inout    bit;
          uart1_rxd_pc12_211_pad         : inout    bit;
          uart1_txd_pc11_212_pad         : inout    bit;
          uart2_cts_pb28_228_pad         : inout    bit;
          uart2_rts_pb29_227_pad         : inout    bit;
          uart2_rxd_pb31_225_pad         : inout    bit;
          uart2_txd_pb30_226_pad         : inout    bit;
          usbd_afe_pb20_236_pad          : inout    bit;
          usbd_rcv_pb22_234_pad          : inout    bit;
          usbd_roe_pb21_235_pad          : inout    bit;
          usbd_suspnd_pb23_233_pad       : inout    bit;
          usbd_vm_treqb_pb25_231_pad     : inout    bit;
          usbd_vmo_pb27_229_pad          : inout    bit;
          usbd_vp_tack_pb24_232_pad      : inout    bit;
          usbd_vpo_treqa_pb26_230_pad    : inout    bit;
          vsync_pd14_193_pad             : inout    bit;
          a10_40_pad                     : out      bit;
          a11_38_pad                     : out      bit;
          a12_36_pad                     : out      bit;
          a13_30_pad                     : out      bit;
          a14_28_pad                     : out      bit;
          a15_26_pad                     : out      bit;
          a1_72_pad                      : out      bit;
          a2_68_pad                      : out      bit;
          a3_62_pad                      : out      bit;
          a4_56_pad                      : out      bit;
          a5_54_pad                      : out      bit;
          a6_52_pad                      : out      bit;
          a7_48_pad                      : out      bit;
          a8_46_pad                      : out      bit;
          a9_44_pad                      : out      bit;
          cas_b_115_pad                  : out      bit;
          clko_122_pad                   : out      bit;
          cs0_b_88_pad                   : out      bit;
          cs1_b_87_pad                   : out      bit;
          cs2_b_csd0_81_pad              : out      bit;
          cs3_b_csd1_79_pad              : out      bit;
          eb0_b_60_pad                   : out      bit;
          eb1_b_63_pad                   : out      bit;
          eb2_b_65_pad                   : out      bit;
          eb3_b_69_pad                   : out      bit;
          ma10_104_pad                   : out      bit;
          ma11_103_pad                   : out      bit;
          oe_b_71_pad                    : out      bit;
          ras_b_114_pad                  : out      bit;
          reset_out_b_139_pad            : out      bit;
          resetsf_b_121_pad              : out      bit;
          rw_b_102_pad                   : out      bit;
          sdcke0_119_pad                 : out      bit;
          sdcke1_120_pad                 : out      bit;
          sdwe_b_118_pad                 : out      bit;
          tdo_b_148_pad                  : out      bit
   );
   
   use STD_1149_1_1994.all;
   
   attribute COMPONENT_CONFORMANCE of corsica: entity is "STD_1149_1_1993";
   
   attribute PIN_MAP of corsica: entity is PHYSICAL_PIN_MAP;
   
-- This section specifies the pin map for each port. This information
-- is extracted from the port-to-pin map file that was read in using
-- the "read_pin_map" command.
   
     constant BGA: PIN_MAP_STRING := 
        "AVDD1_124_pad                  : A124," &
        "AVSS1_146_pad                  : A146," &
        "NVDD1_109_pad                  : A109," &
        "NVDD1_117_pad                  : A117," &
        "NVDD1_17_pad                   : A17," &
        "NVDD1_1_pad                    : A1," &
        "NVDD1_25_pad                   : A25," &
        "NVDD1_35_pad                   : A35," &
        "NVDD1_43_pad                   : A43," &
        "NVDD1_51_pad                   : A51," &
        "NVDD1_59_pad                   : A59," &
        "NVDD1_67_pad                   : A67," &
        "NVDD1_75_pad                   : A75," &
        "NVDD1_85_pad                   : A85," &
        "NVDD1_91_pad                   : A91," &
        "NVDD1_99_pad                   : A99," &
        "NVDD1_9_pad                    : A9," &
        "NVDD2_147_pad                  : A147," &
        "NVDD2_161_pad                  : A161," &
        "NVDD2_177_pad                  : A177," &
        "NVDD2_190_pad                  : A190," &
        "NVDD3_205_pad                  : A205," &
        "NVDD4_224_pad                  : A224," &
        "NVDD4_240_pad                  : A240," &
        "NVSS1_106_pad                  : A106," &
        "NVSS1_116_pad                  : A116," &
        "NVSS1_123_pad                  : A123," &
        "NVSS1_16_pad                   : A16," &
        "NVSS1_24_pad                   : A24," &
        "NVSS1_32_pad                   : A32," &
        "NVSS1_42_pad                   : A42," &
        "NVSS1_50_pad                   : A50," &
        "NVSS1_58_pad                   : A58," &
        "NVSS1_66_pad                   : A66," &
        "NVSS1_74_pad                   : A74," &
        "NVSS1_82_pad                   : A82," &
        "NVSS1_8_pad                    : A8," &
        "NVSS1_90_pad                   : A90," &
        "NVSS1_98_pad                   : A98," &
        "NVSS2_160_pad                  : A160," &
        "NVSS2_176_pad                  : A176," &
        "NVSS2_189_pad                  : A189," &
        "NVSS2_202_pad                  : A202," &
        "NVSS3_221_pad                  : A221," &
        "NVSS4_237_pad                  : A237," &
        "NVSS4_253_pad                  : A253," &
        "QVDD1_107_pad                  : A107," &
        "QVDD1_222_pad                  : A222," &
        "QVDD1_238_pad                  : A238," &
        "QVDD1_33_pad                   : A33," &
        "QVDD1_83_pad                   : A83," &
        "QVDD2_125_pad                  : A125," &
        "QVDD2_132_pad                  : A132," &
        "QVDD2_137_pad                  : A137," &
        "QVDD3_175_pad                  : A175," &
        "QVDD4_203_pad                  : A203," &
        "QVSS1_108_pad                  : A108," &
        "QVSS1_223_pad                  : A223," &
        "QVSS1_239_pad                  : A239," &
        "QVSS1_34_pad                   : A34," &
        "QVSS1_84_pad                   : A84," &
        "QVSS2_126_pad                  : A126," &
        "QVSS2_130_pad                  : A130," &
        "QVSS2_134_pad                  : A134," &
        "QVSS2_136_pad                  : A136," &
        "QVSS3_174_pad                  : A174," &
        "QVSS4_204_pad                  : A204," &
        "big_endian_141_pad             : A141," &
        "boot0_145_pad                  : A145," &
        "boot1_144_pad                  : A144," &
        "boot2_143_pad                  : A143," &
        "boot3_142_pad                  : A142," &
        "extal16m_129_pad               : A129," &
        "extal32k_133_pad               : A133," &
        "por_140_pad                    : A140," &
        "reset_in_b_138_pad             : A138," &
        "tck_150_pad                    : A150," &
        "tdi_151_pad                    : A151," &
        "tms_149_pad                    : A149," &
        "tristate_128_pad               : A128," &
        "trst_b_127_pad                 : A127," &
        "xtal16m_131_pad                : A131," &
        "xtal32k_135_pad                : A135," &
        "a0_pa21_78_pad                 : A78," &
        "a16_dbg9_pa24_22_pad           : A22," &
        "a17_dbg8_pa25_20_pad           : A20," &
        "a18_dbg7_pa26_18_pad           : A18," &
        "a19_dbg6_pa27_14_pad           : A14," &
        "a20_dbg5_pa28_12_pad           : A12," &
        "a21_dbg4_pa29_10_pad           : A10," &
        "a22_dbg3_pa30_6_pad            : A6," &
        "a23_dbg2_pa31_4_pad            : A4," &
        "a24_dbg1_pa0_2_pad             : A2," &
        "bclk_b_pa18_96_pad             : A96," &
        "clk_ms2_pb12_248_pad           : A248," &
        "cls_uart2_dco_pd8_199_pad      : A199," &
        "cmd_ms1_pb13_247_pad           : A247," &
        "contrast_pd11_196_pad          : A196," &
        "cs4_b_pa22_77_pad              : A77," &
        "cs5_b_pa23_73_pad              : A73," &
        "csi_d0_pa4_166_pad             : A166," &
        "csi_d1_pa5_165_pad             : A165," &
        "csi_d2_pa6_164_pad             : A164," &
        "csi_d3_pa7_163_pad             : A163," &
        "csi_d4_pa8_162_pad             : A162," &
        "csi_d5_pa9_159_pad             : A159," &
        "csi_d6_pa10_158_pad            : A158," &
        "csi_d7_pa11_157_pad            : A157," &
        "csi_hsync_pa13_155_pad         : A155," &
        "csi_mclk_pa3_167_pad           : A167," &
        "csi_pixclk_pa14_154_pad        : A154," &
        "csi_vsync_pa12_156_pad         : A156," &
        "d0_105_pad                     : A105," &
        "d10_61_pad                     : A61," &
        "d11_57_pad                     : A57," &
        "d12_55_pad                     : A55," &
        "d13_53_pad                     : A53," &
        "d14_49_pad                     : A49," &
        "d15_47_pad                     : A47," &
        "d16_45_pad                     : A45," &
        "d17_41_pad                     : A41," &
        "d18_39_pad                     : A39," &
        "d19_37_pad                     : A37," &
        "d1_101_pad                     : A101," &
        "d20_31_pad                     : A31," &
        "d21_29_pad                     : A29," &
        "d22_27_pad                     : A27," &
        "d23_23_pad                     : A23," &
        "d24_21_pad                     : A21," &
        "d25_19_pad                     : A19," &
        "d26_15_pad                     : A15," &
        "d27_13_pad                     : A13," &
        "d28_11_pad                     : A11," &
        "d29_7_pad                      : A7," &
        "d2_97_pad                      : A97," &
        "d30_5_pad                      : A5," &
        "d31_3_pad                      : A3," &
        "d3_95_pad                      : A95," &
        "d4_93_pad                      : A93," &
        "d5_89_pad                      : A89," &
        "d6_80_pad                      : A80," &
        "d7_76_pad                      : A76," &
        "d8_70_pad                      : A70," &
        "d9_64_pad                      : A64," &
        "dat0_pb8_252_pad               : A252," &
        "dat1_pb9_251_pad               : A251," &
        "dat2_pb10_250_pad              : A250," &
        "dat3_ms3_pb11_249_pad          : A249," &
        "dqm0_113_pad                   : A113," &
        "dqm1_112_pad                   : A112," &
        "dqm2_111_pad                   : A111," &
        "dqm3_110_pad                   : A110," &
        "ecb_b_pa20_92_pad              : A92," &
        "hsync_pd13_194_pad             : A194," &
        "i2c_clk_pa16_152_pad           : A152," &
        "i2c_data_pa15_153_pad          : A153," &
        "lba_b_pa19_94_pad              : A94," &
        "ld0_pd15_192_pad               : A192," &
        "ld10_pd25_180_pad              : A180," &
        "ld11_pd26_179_pad              : A179," &
        "ld12_pd27_178_pad              : A178," &
        "ld13_pd28_173_pad              : A173," &
        "ld14_pd29_172_pad              : A172," &
        "ld15_pd30_171_pad              : A171," &
        "ld1_pd16_191_pad               : A191," &
        "ld2_pd17_188_pad               : A188," &
        "ld3_pd18_187_pad               : A187," &
        "ld4_pd19_186_pad               : A186," &
        "ld5_pd20_185_pad               : A185," &
        "ld6_pd21_184_pad               : A184," &
        "ld7_pd22_183_pad               : A183," &
        "ld8_pd23_182_pad               : A182," &
        "ld9_pd24_181_pad               : A181," &
        "lsclk_pd6_201_pad              : A201," &
        "miso_pc16_207_pad              : A207," &
        "mosi_pc17_206_pad              : A206," &
        "oe_acd_pd12_195_pad            : A195," &
        "pa17_100_pad                   : A100," &
        "ps_uart2_ri_pd9_198_pad        : A198," &
        "pwmo_pa2_168_pad               : A168," &
        "rev_uart2_dtr_pd7_200_pad      : A200," &
        "sclk_pc14_209_pad              : A209," &
        "sdclk_86_pad                   : A86," &
        "spi_rdy_pc13_210_pad           : A210," &
        "spl_spr_uart2_dsr_pd10_197_pad : A197," &
        "ss_pc15_208_pad                : A208," &
        "ssi0_rxclk_pc4_219_pad         : A219," &
        "ssi0_rxdat_pc5_218_pad         : A218," &
        "ssi0_rxfs_pc3_220_pad          : A220," &
        "ssi0_txclk_pc8_215_pad         : A215," &
        "ssi0_txdat_pc6_217_pad         : A217," &
        "ssi0_txfs_pc7_216_pad          : A216," &
        "ssi1_rxclk_pb15_245_pad        : A245," &
        "ssi1_rxdat_pb16_244_pad        : A244," &
        "ssi1_rxfs_pb14_246_pad         : A246," &
        "ssi1_txclk_pb19_241_pad        : A241," &
        "ssi1_txdat_pb17_243_pad        : A243," &
        "ssi1_txfs_pb18_242_pad         : A242," &
        "tin_pa1_169_pad                : A169," &
        "tout2_pd31_170_pad             : A170," &
        "uart1_cts_pc9_214_pad          : A214," &
        "uart1_rts_pc10_213_pad         : A213," &
        "uart1_rxd_pc12_211_pad         : A211," &
        "uart1_txd_pc11_212_pad         : A212," &
        "uart2_cts_pb28_228_pad         : A228," &
        "uart2_rts_pb29_227_pad         : A227," &
        "uart2_rxd_pb31_225_pad         : A225," &
        "uart2_txd_pb30_226_pad         : A226," &
        "usbd_afe_pb20_236_pad          : A236," &
        "usbd_rcv_pb22_234_pad          : A234," &
        "usbd_roe_pb21_235_pad          : A235," &
        "usbd_suspnd_pb23_233_pad       : A233," &
        "usbd_vm_treqb_pb25_231_pad     : A231," &
        "usbd_vmo_pb27_229_pad          : A229," &
        "usbd_vp_tack_pb24_232_pad      : A232," &
        "usbd_vpo_treqa_pb26_230_pad    : A230," &
        "vsync_pd14_193_pad             : A193," &
        "a10_40_pad                     : A40," &
        "a11_38_pad                     : A38," &
        "a12_36_pad                     : A36," &
        "a13_30_pad                     : A30," &
        "a14_28_pad                     : A28," &
        "a15_26_pad                     : A26," &
        "a1_72_pad                      : A72," &
        "a2_68_pad                      : A68," &
        "a3_62_pad                      : A62," &
        "a4_56_pad                      : A56," &
        "a5_54_pad                      : A54," &
        "a6_52_pad                      : A52," &
        "a7_48_pad                      : A48," &
        "a8_46_pad                      : A46," &
        "a9_44_pad                      : A44," &
        "cas_b_115_pad                  : A115," &
        "clko_122_pad                   : A122," &
        "cs0_b_88_pad                   : A88," &
        "cs1_b_87_pad                   : A87," &
        "cs2_b_csd0_81_pad              : A81," &
        "cs3_b_csd1_79_pad              : A79," &
        "eb0_b_60_pad                   : A60," &
        "eb1_b_63_pad                   : A63," &
        "eb2_b_65_pad                   : A65," &
        "eb3_b_69_pad                   : A69," &
        "ma10_104_pad                   : A104," &
        "ma11_103_pad                   : A103," &
        "oe_b_71_pad                    : A71," &
        "ras_b_114_pad                  : A114," &
        "reset_out_b_139_pad            : A139," &
        "resetsf_b_121_pad              : A121," &
        "rw_b_102_pad                   : A102," &
        "sdcke0_119_pad                 : A119," &
        "sdcke1_120_pad                 : A120," &
        "sdwe_b_118_pad                 : A118," &
        "tdo_b_148_pad                  : A148";


   
-- This section specifies the TAP ports.
-- For the TAP TCK port, the parameters in the brackets are:
--        First Field : Maximum  TCK frequency.
--        Second Field: Allowable states TCK may be stopped in.
   
   attribute TAP_SCAN_CLOCK of tck_150_pad   : signal is (2.000000e+07, BOTH);
   attribute TAP_SCAN_IN    of tdi_151_pad   : signal is true;
   attribute TAP_SCAN_MODE  of tms_149_pad   : signal is true;
   attribute TAP_SCAN_OUT   of tdo_b_148_pad : signal is true;
   attribute TAP_SCAN_RESET of trst_b_127_pad: signal is true;

-- set_bsd_compliance 1 boot3_142_pad
-- set_bsd_compliance 1 boot2_143_pad
-- set_bsd_compliance 1 boot1_144_pad
-- set_bsd_compliance 1 boot0_145_pad
-- set_bsd_compliance 0 tristate_128_pad

   attribute COMPLIANCE_PATTERNS of corsica: entity is
     "(boot3_142_pad, boot2_143_pad, boot1_144_pad, boot0_145_pad, tristate_128_pad) (11110)";

   
-- Specifies the number of bits in the instruction register.
   
   attribute INSTRUCTION_LENGTH of corsica: entity is 3;
   
-- Specifies the boundary-scan instructions implemented in the
-- design and their opcodes.
   
   attribute INSTRUCTION_OPCODE of corsica: entity is 
     "BYPASS (111)," &
     "EXTEST (000)," &
     "SAMPLE (010)," &
     "CLAMP  (011)," &
     "HIGHZ  (100)," &
     "IDCODE (001)";
   
-- Specifies the bit pattern that is loaded into the instruction
-- register when the TAP controller passes through the Capture-IR
-- state. The standard mandates that the two LSBs must be "01".
-- The remaining bits are design specific.
   
   attribute INSTRUCTION_CAPTURE of corsica: entity is "001";
   
-- Specifies the bit pattern that is loaded into the DEVICE_ID
-- register during the IDCODE instruction when the TAP controller
-- passes through the Capture-DR state.
   
   attribute IDCODE_REGISTER of corsica: entity is 
     "0000" &                  -- 4-bit version number
     "0100110101001100" &      -- 16-bit part number
     "00000001110" &           -- 11-bit identity of the manufacturer
     "1";                      -- Required by IEEE Std 1149.1
   
-- This section specifies the test data register placed between TDI
-- and TDO for each implemented instruction.
   
   attribute REGISTER_ACCESS of corsica: entity is 
        "BYPASS    (BYPASS, CLAMP, HIGHZ)," &
        "BOUNDARY  (EXTEST, SAMPLE)," &
        "DEVICE_ID (IDCODE)";
   
-- Specifies the length of the boundary scan register.
   
   attribute BOUNDARY_LENGTH of corsica: entity is 339;
   
-- The following list specifies the characteristics of each cell
-- in the boundary scan register from TDI to TDO.
-- The following is a description of the label fields:
--      num     : Is the cell number.
--      cell    : Is the cell type as defined by the standard.
--      port    : Is the design port name. Control cells do not
--                have a port name.
--      function: Is the function of the cell as defined by the
--                standard. Is one of input, output2, output3,
--                bidir, control or controlr.
--      safe    : Specifies the value that the BSR cell should be
--                loaded with for safe operation when the software
--                might otherwise choose a random value.
--      ccell   : The control cell number. Specifies the control
--                cell that drives the output enable for this port.
--      disval  : Specifies the value that is loaded into the
--                control cell to disable the output enable for
--                the corresponding port.
--      rslt    : Resulting state. Shows the state of the driver
--                when it is disabled.


   
   attribute BOUNDARY_REGISTER of corsica: entity is 
--    
--    num   cell   port                            function      safe  [ccell  disval  rslt]
--    
     "338  (BC_2,  *,                              control,      " &
     "0),                        " &
     "337  (BC_7,  a24_dbg1_pa0_2_pad,             bidir,        X,    " &
     "338,    0,      Z)," &
     "336  (BC_2,  *,                              control,      " &
     "0),                        " &
     "335  (BC_7,  d31_3_pad,                      bidir,        X,    " &
     "336,    0,      PULL1)," &
     "334  (BC_2,  *,                              control,      " &
     "0),                        " &
     "333  (BC_7,  a23_dbg2_pa31_4_pad,            bidir,        X,    " &
     "334,    0,      Z)," &
     "332  (BC_2,  *,                              control,      " &
     "0),                        " &
     "331  (BC_7,  d30_5_pad,                      bidir,        X,    " &
     "332,    0,      PULL1)," &
     "330  (BC_2,  *,                              control,      " &
     "0),                        " &
     "329  (BC_7,  a22_dbg3_pa30_6_pad,            bidir,        X,    " &
     "330,    0,      Z)," &
     "328  (BC_2,  *,                              control,      " &
     "0),                        " &
     "327  (BC_7,  d29_7_pad,                      bidir,        X,    " &
     "328,    0,      PULL1)," &
     "326  (BC_2,  *,                              control,      " &
     "0),                        " &
     "325  (BC_7,  a21_dbg4_pa29_10_pad,           bidir,        X,    " &
     "326,    0,      Z)," &
     "324  (BC_2,  *,                              control,      " &
     "0),                        " &
     "323  (BC_7,  d28_11_pad,                     bidir,        X,    " &
     "324,    0,      PULL1)," &
     "322  (BC_2,  *,                              control,      " &
     "0),                        " &
     "321  (BC_7,  a20_dbg5_pa28_12_pad,           bidir,        X,    " &
     "322,    0,      Z)," &
     "320  (BC_2,  *,                              control,      " &
     "0),                        " &
     "319  (BC_7,  d27_13_pad,                     bidir,        X,    " &
     "320,    0,      PULL1)," &
     "318  (BC_2,  *,                              control,      " &
     "0),                        " &
     "317  (BC_7,  a19_dbg6_pa27_14_pad,           bidir,        X,    " &
     "318,    0,      Z)," &
     "316  (BC_2,  *,                              control,      " &
     "0),                        " &
     "315  (BC_7,  d26_15_pad,                     bidir,        X,    " &
     "316,    0,      PULL1)," &
     "314  (BC_2,  *,                              control,      " &
     "0),                        " &
     "313  (BC_7,  a18_dbg7_pa26_18_pad,           bidir,        X,    " &
     "314,    0,      Z)," &
     "312  (BC_2,  *,                              control,      " &
     "0),                        " &
     "311  (BC_7,  d25_19_pad,                     bidir,        X,    " &
     "312,    0,      PULL1)," &
     "310  (BC_2,  *,                              control,      " &
     "0),                        " &
     "309  (BC_7,  a17_dbg8_pa25_20_pad,           bidir,        X,    " &
     "310,    0,      Z)," &
     "308  (BC_2,  *,                              control,      " &
     "0),                        " &
     "307  (BC_7,  d24_21_pad,                     bidir,        X,    " &
     "308,    0,      PULL1)," &
     "306  (BC_2,  *,                              control,      " &
     "0),                        " &
     "305  (BC_7,  a16_dbg9_pa24_22_pad,           bidir,        X,    " &
     "306,    0,      Z)," &
     "304  (BC_2,  *,                              control,      " &
     "0),                        " &
     "303  (BC_7,  d23_23_pad,                     bidir,        X,    " &
     "304,    0,      PULL1)," &
     "302  (BC_2,  *,                              control,      " &
     "0),                        " &
     "301  (BC_1,  a15_26_pad,                     output3,      X,    " &
     "302,    0,      Z)," &
     "300  (BC_2,  *,                              control,      " &
     "0),                        " &
     "299  (BC_7,  d22_27_pad,                     bidir,        X,    " &
     "300,    0,      PULL1)," &
     "298  (BC_2,  *,                              control,      " &
     "0),                        " &
     "297  (BC_1,  a14_28_pad,                     output3,      X,    " &
     "298,    0,      Z)," &
     "296  (BC_2,  *,                              control,      " &
     "0),                        " &
     "295  (BC_7,  d21_29_pad,                     bidir,        X,    " &
     "296,    0,      PULL1)," &
     "294  (BC_2,  *,                              control,      " &
     "0),                        " &
     "293  (BC_1,  a13_30_pad,                     output3,      X,    " &
     "294,    0,      Z)," &
     "292  (BC_2,  *,                              control,      " &
     "0),                        " &
     "291  (BC_7,  d20_31_pad,                     bidir,        X,    " &
     "292,    0,      PULL1)," &
     "290  (BC_2,  *,                              control,      " &
     "0),                        " &
     "289  (BC_1,  a12_36_pad,                     output3,      X,    " &
     "290,    0,      Z)," &
     "288  (BC_2,  *,                              control,      " &
     "0),                        " &
     "287  (BC_7,  d19_37_pad,                     bidir,        X,    " &
     "288,    0,      PULL1)," &
     "286  (BC_2,  *,                              control,      " &
     "0),                        " &
     "285  (BC_1,  a11_38_pad,                     output3,      X,    " &
     "286,    0,      Z)," &
     "284  (BC_2,  *,                              control,      " &
     "0),                        " &
     "283  (BC_7,  d18_39_pad,                     bidir,        X,    " &
     "284,    0,      PULL1)," &
     "282  (BC_2,  *,                              control,      " &
     "0),                        " &
     "281  (BC_1,  a10_40_pad,                     output3,      X,    " &
     "282,    0,      Z)," &
     "280  (BC_2,  *,                              control,      " &
     "0),                        " &
     "279  (BC_7,  d17_41_pad,                     bidir,        X,    " &
     "280,    0,      PULL1)," &
     "278  (BC_2,  *,                              control,      " &
     "0),                        " &
     "277  (BC_1,  a9_44_pad,                      output3,      X,    " &
     "278,    0,      Z)," &
     "276  (BC_2,  *,                              control,      " &
     "0),                        " &
     "275  (BC_7,  d16_45_pad,                     bidir,        X,    " &
     "276,    0,      PULL1)," &
     "274  (BC_2,  *,                              control,      " &
     "0),                        " &
     "273  (BC_1,  a8_46_pad,                      output3,      X,    " &
     "274,    0,      Z)," &
     "272  (BC_2,  *,                              control,      " &
     "0),                        " &
     "271  (BC_7,  d15_47_pad,                     bidir,        X,    " &
     "272,    0,      PULL1)," &
     "270  (BC_2,  *,                              control,      " &
     "0),                        " &
     "269  (BC_1,  a7_48_pad,                      output3,      X,    " &
     "270,    0,      Z)," &
     "268  (BC_2,  *,                              control,      " &
     "0),                        " &
     "267  (BC_7,  d14_49_pad,                     bidir,        X,    " &
     "268,    0,      PULL1)," &
     "266  (BC_2,  *,                              control,      " &
     "0),                        " &
     "265  (BC_1,  a6_52_pad,                      output3,      X,    " &
     "266,    0,      Z)," &
     "264  (BC_2,  *,                              control,      " &
     "0),                        " &
     "263  (BC_7,  d13_53_pad,                     bidir,        X,    " &
     "264,    0,      PULL1)," &
     "262  (BC_2,  *,                              control,      " &
     "0),                        " &
     "261  (BC_1,  a5_54_pad,                      output3,      X,    " &
     "262,    0,      Z)," &
     "260  (BC_2,  *,                              control,      " &
     "0),                        " &
     "259  (BC_7,  d12_55_pad,                     bidir,        X,    " &
     "260,    0,      PULL1)," &
     "258  (BC_2,  *,                              control,      " &
     "0),                        " &
     "257  (BC_1,  a4_56_pad,                      output3,      X,    " &
     "258,    0,      Z)," &
     "256  (BC_2,  *,                              control,      " &
     "0),                        " &
     "255  (BC_7,  d11_57_pad,                     bidir,        X,    " &
     "256,    0,      PULL1)," &
     "254  (BC_2,  *,                              control,      " &
     "0),                        " &
     "253  (BC_1,  eb0_b_60_pad,                   output3,      X,    " &
     "254,    0,      Z)," &
     "252  (BC_2,  *,                              control,      " &
     "0),                        " &
     "251  (BC_7,  d10_61_pad,                     bidir,        X,    " &
     "252,    0,      PULL1)," &
     "250  (BC_2,  *,                              control,      " &
     "0),                        " &
     "249  (BC_1,  a3_62_pad,                      output3,      X,    " &
     "250,    0,      Z)," &
     "248  (BC_2,  *,                              control,      " &
     "0),                        " &
     "247  (BC_1,  eb1_b_63_pad,                   output3,      X,    " &
     "248,    0,      Z)," &
     "246  (BC_2,  *,                              control,      " &
     "0),                        " &
     "245  (BC_7,  d9_64_pad,                      bidir,        X,    " &
     "246,    0,      PULL1)," &
     "244  (BC_2,  *,                              control,      " &
     "0),                        " &
     "243  (BC_1,  eb2_b_65_pad,                   output3,      X,    " &
     "244,    0,      Z)," &
     "242  (BC_2,  *,                              control,      " &
     "0),                        " &
     "241  (BC_1,  a2_68_pad,                      output3,      X,    " &
     "242,    0,      Z)," &
     "240  (BC_2,  *,                              control,      " &
     "0),                        " &
     "239  (BC_1,  eb3_b_69_pad,                   output3,      X,    " &
     "240,    0,      Z)," &
     "238  (BC_2,  *,                              control,      " &
     "0),                        " &
     "237  (BC_7,  d8_70_pad,                      bidir,        X,    " &
     "238,    0,      PULL1)," &
     "236  (BC_2,  *,                              control,      " &
     "0),                        " &
     "235  (BC_1,  oe_b_71_pad,                    output3,      X,    " &
     "236,    0,      Z)," &
     "234  (BC_2,  *,                              control,      " &
     "0),                        " &
     "233  (BC_1,  a1_72_pad,                      output3,      X,    " &
     "234,    0,      Z)," &
     "232  (BC_2,  *,                              control,      " &
     "0),                        " &
     "231  (BC_7,  cs5_b_pa23_73_pad,              bidir,        X,    " &
     "232,    0,      PULL1)," &
     "230  (BC_2,  *,                              control,      " &
     "0),                        " &
     "229  (BC_7,  d7_76_pad,                      bidir,        X,    " &
     "230,    0,      PULL1)," &
     "228  (BC_2,  *,                              control,      " &
     "0),                        " &
     "227  (BC_7,  cs4_b_pa22_77_pad,              bidir,        X,    " &
     "228,    0,      PULL1)," &
     "226  (BC_2,  *,                              control,      " &
     "0),                        " &
     "225  (BC_7,  a0_pa21_78_pad,                 bidir,        X,    " &
     "226,    0,      Z)," &
     "224  (BC_2,  *,                              control,      " &
     "0),                        " &
     "223  (BC_1,  cs3_b_csd1_79_pad,              output3,      X,    " &
     "224,    0,      Z)," &
     "222  (BC_2,  *,                              control,      " &
     "0),                        " &
     "221  (BC_7,  d6_80_pad,                      bidir,        X,    " &
     "222,    0,      PULL1)," &
     "220  (BC_2,  *,                              control,      " &
     "0),                        " &
     "219  (BC_1,  cs2_b_csd0_81_pad,              output3,      X,    " &
     "220,    0,      Z)," &
     "218  (BC_2,  *,                              control,      " &
     "0),                        " &
     "217  (BC_1,  cs1_b_87_pad,                   output3,      X,    " &
     "218,    0,      Z)," &
     "216  (BC_2,  *,                              control,      " &
     "0),                        " &
     "215  (BC_1,  cs0_b_88_pad,                   output3,      X,    " &
     "216,    0,      Z)," &
     "214  (BC_2,  *,                              control,      " &
     "0),                        " &
     "213  (BC_7,  d5_89_pad,                      bidir,        X,    " &
     "214,    0,      PULL1)," &
     "212  (BC_2,  *,                              control,      " &
     "0),                        " &
     "211  (BC_7,  ecb_b_pa20_92_pad,              bidir,        X,    " &
     "212,    0,      PULL1)," &
     "210  (BC_2,  *,                              control,      " &
     "0),                        " &
     "209  (BC_7,  d4_93_pad,                      bidir,        X,    " &
     "210,    0,      PULL1)," &
     "208  (BC_2,  *,                              control,      " &
     "0),                        " &
     "207  (BC_7,  lba_b_pa19_94_pad,              bidir,        X,    " &
     "208,    0,      Z)," &
     "206  (BC_2,  *,                              control,      " &
     "0),                        " &
     "205  (BC_7,  d3_95_pad,                      bidir,        X,    " &
     "206,    0,      PULL1)," &
     "204  (BC_2,  *,                              control,      " &
     "0),                        " &
     "203  (BC_7,  bclk_b_pa18_96_pad,             bidir,        X,    " &
     "204,    0,      Z)," &
     "202  (BC_2,  *,                              control,      " &
     "0),                        " &
     "201  (BC_7,  d2_97_pad,                      bidir,        X,    " &
     "202,    0,      PULL1)," &
     "200  (BC_2,  *,                              control,      " &
     "0),                        " &
     "199  (BC_7,  pa17_100_pad,                   bidir,        X,    " &
     "200,    0,      PULL1)," &
     "198  (BC_2,  *,                              control,      " &
     "0),                        " &
     "197  (BC_7,  d1_101_pad,                     bidir,        X,    " &
     "198,    0,      PULL1)," &
     "196  (BC_2,  *,                              control,      " &
     "0),                        " &
     "195  (BC_1,  rw_b_102_pad,                   output3,      X,    " &
     "196,    0,      Z)," &
     "194  (BC_2,  *,                              control,      " &
     "0),                        " &
     "193  (BC_1,  ma11_103_pad,                   output3,      X,    " &
     "194,    0,      Z)," &
     "192  (BC_2,  *,                              control,      " &
     "0),                        " &
     "191  (BC_1,  ma10_104_pad,                   output3,      X,    " &
     "192,    0,      Z)," &
     "190  (BC_2,  *,                              control,      " &
     "0),                        " &
     "189  (BC_7,  d0_105_pad,                     bidir,        X,    " &
     "190,    0,      PULL1)," &
     "188  (BC_2,  *,                              control,      " &
     "0),                        " &
     "187  (BC_7,  dqm3_110_pad,                   bidir,        X,    " &
     "188,    0,      Z)," &
     "186  (BC_2,  *,                              control,      " &
     "0),                        " &
     "185  (BC_7,  dqm2_111_pad,                   bidir,        X,    " &
     "186,    0,      Z)," &
     "184  (BC_2,  *,                              control,      " &
     "0),                        " &
     "183  (BC_7,  dqm1_112_pad,                   bidir,        X,    " &
     "184,    0,      Z)," &
     "182  (BC_2,  *,                              control,      " &
     "0),                        " &
     "181  (BC_7,  dqm0_113_pad,                   bidir,        X,    " &
     "182,    0,      Z)," &
     "180  (BC_2,  *,                              control,      " &
     "0),                        " &
     "179  (BC_1,  ras_b_114_pad,                  output3,      X,    " &
     "180,    0,      Z)," &
     "178  (BC_2,  *,                              control,      " &
     "0),                        " &
     "177  (BC_1,  cas_b_115_pad,                  output3,      X,    " &
     "178,    0,      Z)," &
     "176  (BC_2,  *,                              control,      " &
     "0),                        " &
     "175  (BC_1,  sdwe_b_118_pad,                 output3,      X,    " &
     "176,    0,      Z)," &
     "174  (BC_2,  *,                              control,      " &
     "0),                        " &
     "173  (BC_1,  sdcke0_119_pad,                 output3,      X,    " &
     "174,    0,      Z)," &
     "172  (BC_2,  *,                              control,      " &
     "0),                        " &
     "171  (BC_1,  sdcke1_120_pad,                 output3,      X,    " &
     "172,    0,      Z)," &
     "170  (BC_2,  *,                              control,      " &
     "0),                        " &
     "169  (BC_1,  resetsf_b_121_pad,              output3,      X,    " &
     "170,    0,      Z)," &
     "168  (BC_2,  *,                              control,      " &
     "0),                        " &
     "167  (BC_1,  clko_122_pad,                   output3,      X,    " &
     "168,    0,      Z)," &
     "166  (BC_2,  reset_in_b_138_pad,             input,        " &
     "X),                        " &
     "165  (BC_2,  *,                              control,      " &
     "0),                        " &
     "164  (BC_1,  reset_out_b_139_pad,            output3,      X,    " &
     "165,    0,      Z)," &
     "163  (BC_2,  por_140_pad,                    input,        " &
     "X),                        " &
     "162  (BC_2,  big_endian_141_pad,             input,        " &
     "X),                        " &
     "161  (BC_2,  *,                              control,      " &
     "0),                        " &
     "160  (BC_7,  i2c_clk_pa16_152_pad,           bidir,        X,    " &
     "161,    0,      PULL1)," &
     "159  (BC_2,  *,                              control,      " &
     "0),                        " &
     "158  (BC_7,  i2c_data_pa15_153_pad,          bidir,        X,    " &
     "159,    0,      PULL1)," &
     "157  (BC_2,  *,                              control,      " &
     "0),                        " &
     "156  (BC_7,  csi_pixclk_pa14_154_pad,        bidir,        X,    " &
     "157,    0,      PULL1)," &
     "155  (BC_2,  *,                              control,      " &
     "0),                        " &
     "154  (BC_7,  csi_hsync_pa13_155_pad,         bidir,        X,    " &
     "155,    0,      PULL1)," &
     "153  (BC_2,  *,                              control,      " &
     "0),                        " &
     "152  (BC_7,  csi_vsync_pa12_156_pad,         bidir,        X,    " &
     "153,    0,      PULL1)," &
     "151  (BC_2,  *,                              control,      " &
     "0),                        " &
     "150  (BC_7,  csi_d7_pa11_157_pad,            bidir,        X,    " &
     "151,    0,      PULL1)," &
     "149  (BC_2,  *,                              control,      " &
     "0),                        " &
     "148  (BC_7,  csi_d6_pa10_158_pad,            bidir,        X,    " &
     "149,    0,      PULL1)," &
     "147  (BC_2,  *,                              control,      " &
     "0),                        " &
     "146  (BC_7,  csi_d5_pa9_159_pad,             bidir,        X,    " &
     "147,    0,      PULL1)," &
     "145  (BC_2,  *,                              control,      " &
     "0),                        " &
     "144  (BC_7,  csi_d4_pa8_162_pad,             bidir,        X,    " &
     "145,    0,      PULL1)," &
     "143  (BC_2,  *,                              control,      " &
     "0),                        " &
     "142  (BC_7,  csi_d3_pa7_163_pad,             bidir,        X,    " &
     "143,    0,      PULL1)," &
     "141  (BC_2,  *,                              control,      " &
     "0),                        " &
     "140  (BC_7,  csi_d2_pa6_164_pad,             bidir,        X,    " &
     "141,    0,      PULL1)," &
     "139  (BC_2,  *,                              control,      " &
     "0),                        " &
     "138  (BC_7,  csi_d1_pa5_165_pad,             bidir,        X,    " &
     "139,    0,      PULL1)," &
     "137  (BC_2,  *,                              control,      " &
     "0),                        " &
     "136  (BC_7,  csi_d0_pa4_166_pad,             bidir,        X,    " &
     "137,    0,      PULL1)," &
     "135  (BC_2,  *,                              control,      " &
     "0),                        " &
     "134  (BC_7,  csi_mclk_pa3_167_pad,           bidir,        X,    " &
     "135,    0,      PULL1)," &
     "133  (BC_2,  *,                              control,      " &
     "0),                        " &
     "132  (BC_7,  pwmo_pa2_168_pad,               bidir,        X,    " &
     "133,    0,      PULL1)," &
     "131  (BC_2,  *,                              control,      " &
     "0),                        " &
     "130  (BC_7,  tin_pa1_169_pad,                bidir,        X,    " &
     "131,    0,      PULL1)," &
     "129  (BC_2,  *,                              control,      " &
     "0),                        " &
     "128  (BC_7,  tout2_pd31_170_pad,             bidir,        X,    " &
     "129,    0,      PULL1)," &
     "127  (BC_2,  *,                              control,      " &
     "0),                        " &
     "126  (BC_7,  ld15_pd30_171_pad,              bidir,        X,    " &
     "127,    0,      PULL1)," &
     "125  (BC_2,  *,                              control,      " &
     "0),                        " &
     "124  (BC_7,  ld14_pd29_172_pad,              bidir,        X,    " &
     "125,    0,      PULL1)," &
     "123  (BC_2,  *,                              control,      " &
     "0),                        " &
     "122  (BC_7,  ld13_pd28_173_pad,              bidir,        X,    " &
     "123,    0,      PULL1)," &
     "121  (BC_2,  *,                              control,      " &
     "0),                        " &
     "120  (BC_7,  ld12_pd27_178_pad,              bidir,        X,    " &
     "121,    0,      PULL1)," &
     "119  (BC_2,  *,                              control,      " &
     "0),                        " &
     "118  (BC_7,  ld11_pd26_179_pad,              bidir,        X,    " &
     "119,    0,      PULL1)," &
     "117  (BC_2,  *,                              control,      " &
     "0),                        " &
     "116  (BC_7,  ld10_pd25_180_pad,              bidir,        X,    " &
     "117,    0,      PULL1)," &
     "115  (BC_2,  *,                              control,      " &
     "0),                        " &
     "114  (BC_7,  ld9_pd24_181_pad,               bidir,        X,    " &
     "115,    0,      PULL1)," &
     "113  (BC_2,  *,                              control,      " &
     "0),                        " &
     "112  (BC_7,  ld8_pd23_182_pad,               bidir,        X,    " &
     "113,    0,      PULL1)," &
     "111  (BC_2,  *,                              control,      " &
     "0),                        " &
     "110  (BC_7,  ld7_pd22_183_pad,               bidir,        X,    " &
     "111,    0,      PULL1)," &
     "109  (BC_2,  *,                              control,      " &
     "0),                        " &
     "108  (BC_7,  ld6_pd21_184_pad,               bidir,        X,    " &
     "109,    0,      PULL1)," &
     "107  (BC_2,  *,                              control,      " &
     "0),                        " &
     "106  (BC_7,  ld5_pd20_185_pad,               bidir,        X,    " &
     "107,    0,      PULL1)," &
     "105  (BC_2,  *,                              control,      " &
     "0),                        " &
     "104  (BC_7,  ld4_pd19_186_pad,               bidir,        X,    " &
     "105,    0,      PULL1)," &
     "103  (BC_2,  *,                              control,      " &
     "0),                        " &
     "102  (BC_7,  ld3_pd18_187_pad,               bidir,        X,    " &
     "103,    0,      PULL1)," &
     "101  (BC_2,  *,                              control,      " &
     "0),                        " &
     "100  (BC_7,  ld2_pd17_188_pad,               bidir,        X,    " &
     "101,    0,      PULL1)," &
     "99   (BC_2,  *,                              control,      " &
     "0),                        " &
     "98   (BC_7,  ld1_pd16_191_pad,               bidir,        X,    " &
     "99,     0,      PULL1)," &
     "97   (BC_2,  *,                              control,      " &
     "0),                        " &
     "96   (BC_7,  ld0_pd15_192_pad,               bidir,        X,    " &
     "97,     0,      PULL1)," &
     "95   (BC_2,  *,                              control,      " &
     "0),                        " &
     "94   (BC_7,  vsync_pd14_193_pad,             bidir,        X,    " &
     "95,     0,      PULL1)," &
     "93   (BC_2,  *,                              control,      " &
     "0),                        " &
     "92   (BC_7,  hsync_pd13_194_pad,             bidir,        X,    " &
     "93,     0,      PULL1)," &
     "91   (BC_2,  *,                              control,      " &
     "0),                        " &
     "90   (BC_7,  oe_acd_pd12_195_pad,            bidir,        X,    " &
     "91,     0,      PULL1)," &
     "89   (BC_2,  *,                              control,      " &
     "0),                        " &
     "88   (BC_7,  contrast_pd11_196_pad,          bidir,        X,    " &
     "89,     0,      PULL1)," &
     "87   (BC_2,  *,                              control,      " &
     "0),                        " &
     "86   (BC_7,  spl_spr_uart2_dsr_pd10_197_pad, bidir,        X,    " &
     "87,     0,      PULL1)," &
     "85   (BC_2,  *,                              control,      " &
     "0),                        " &
     "84   (BC_7,  ps_uart2_ri_pd9_198_pad,        bidir,        X,    " &
     "85,     0,      PULL1)," &
     "83   (BC_2,  *,                              control,      " &
     "0),                        " &
     "82   (BC_7,  cls_uart2_dco_pd8_199_pad,      bidir,        X,    " &
     "83,     0,      PULL1)," &
     "81   (BC_2,  *,                              control,      " &
     "0),                        " &
     "80   (BC_7,  rev_uart2_dtr_pd7_200_pad,      bidir,        X,    " &
     "81,     0,      PULL1)," &
     "79   (BC_2,  *,                              control,      " &
     "0),                        " &
     "78   (BC_7,  lsclk_pd6_201_pad,              bidir,        X,    " &
     "79,     0,      PULL1)," &
     "77   (BC_2,  *,                              control,      " &
     "0),                        " &
     "76   (BC_7,  mosi_pc17_206_pad,              bidir,        X,    " &
     "77,     0,      Z)," &
     "75   (BC_2,  *,                              control,      " &
     "0),                        " &
     "74   (BC_7,  miso_pc16_207_pad,              bidir,        X,    " &
     "75,     0,      Z)," &
     "73   (BC_2,  *,                              control,      " &
     "0),                        " &
     "72   (BC_7,  ss_pc15_208_pad,                bidir,        X,    " &
     "73,     0,      PULL1)," &
     "71   (BC_2,  *,                              control,      " &
     "0),                        " &
     "70   (BC_7,  sclk_pc14_209_pad,              bidir,        X,    " &
     "71,     0,      PULL1)," &
     "69   (BC_2,  *,                              control,      " &
     "0),                        " &
     "68   (BC_7,  spi_rdy_pc13_210_pad,           bidir,        X,    " &
     "69,     0,      PULL1)," &
     "67   (BC_2,  *,                              control,      " &
     "0),                        " &
     "66   (BC_7,  uart1_rxd_pc12_211_pad,         bidir,        X,    " &
     "67,     0,      PULL1)," &
     "65   (BC_2,  *,                              control,      " &
     "0),                        " &
     "64   (BC_7,  uart1_txd_pc11_212_pad,         bidir,        X,    " &
     "65,     0,      PULL1)," &
     "63   (BC_2,  *,                              control,      " &
     "0),                        " &
     "62   (BC_7,  uart1_rts_pc10_213_pad,         bidir,        X,    " &
     "63,     0,      PULL1)," &
     "61   (BC_2,  *,                              control,      " &
     "0),                        " &
     "60   (BC_7,  uart1_cts_pc9_214_pad,          bidir,        X,    " &
     "61,     0,      PULL1)," &
     "59   (BC_2,  *,                              control,      " &
     "0),                        " &
     "58   (BC_7,  ssi0_txclk_pc8_215_pad,         bidir,        X,    " &
     "59,     0,      PULL1)," &
     "57   (BC_2,  *,                              control,      " &
     "0),                        " &
     "56   (BC_7,  ssi0_txfs_pc7_216_pad,          bidir,        X,    " &
     "57,     0,      PULL1)," &
     "55   (BC_2,  *,                              control,      " &
     "0),                        " &
     "54   (BC_7,  ssi0_txdat_pc6_217_pad,         bidir,        X,    " &
     "55,     0,      PULL1)," &
     "53   (BC_2,  *,                              control,      " &
     "0),                        " &
     "52   (BC_7,  ssi0_rxdat_pc5_218_pad,         bidir,        X,    " &
     "53,     0,      PULL1)," &
     "51   (BC_2,  *,                              control,      " &
     "0),                        " &
     "50   (BC_7,  ssi0_rxclk_pc4_219_pad,         bidir,        X,    " &
     "51,     0,      PULL1)," &
     "49   (BC_2,  *,                              control,      " &
     "0),                        " &
     "48   (BC_7,  ssi0_rxfs_pc3_220_pad,          bidir,        X,    " &
     "49,     0,      PULL1)," &
     "47   (BC_2,  *,                              control,      " &
     "0),                        " &
     "46   (BC_7,  uart2_rxd_pb31_225_pad,         bidir,        X,    " &
     "47,     0,      PULL1)," &
     "45   (BC_2,  *,                              control,      " &
     "0),                        " &
     "44   (BC_7,  uart2_txd_pb30_226_pad,         bidir,        X,    " &
     "45,     0,      PULL1)," &
     "43   (BC_2,  *,                              control,      " &
     "0),                        " &
     "42   (BC_7,  uart2_rts_pb29_227_pad,         bidir,        X,    " &
     "43,     0,      PULL1)," &
     "41   (BC_2,  *,                              control,      " &
     "0),                        " &
     "40   (BC_7,  uart2_cts_pb28_228_pad,         bidir,        X,    " &
     "41,     0,      PULL1)," &
     "39   (BC_2,  *,                              control,      " &
     "0),                        " &
     "38   (BC_7,  usbd_vmo_pb27_229_pad,          bidir,        X,    " &
     "39,     0,      PULL1)," &
     "37   (BC_2,  *,                              control,      " &
     "0),                        " &
     "36   (BC_7,  usbd_vpo_treqa_pb26_230_pad,    bidir,        X,    " &
     "37,     0,      PULL1)," &
     "35   (BC_2,  *,                              control,      " &
     "0),                        " &
     "34   (BC_7,  usbd_vm_treqb_pb25_231_pad,     bidir,        X,    " &
     "35,     0,      PULL1)," &
     "33   (BC_2,  *,                              control,      " &
     "0),                        " &
     "32   (BC_7,  usbd_vp_tack_pb24_232_pad,      bidir,        X,    " &
     "33,     0,      PULL1)," &
     "31   (BC_2,  *,                              control,      " &
     "0),                        " &
     "30   (BC_7,  usbd_suspnd_pb23_233_pad,       bidir,        X,    " &
     "31,     0,      PULL1)," &
     "29   (BC_2,  *,                              control,      " &
     "0),                        " &
     "28   (BC_7,  usbd_rcv_pb22_234_pad,          bidir,        X,    " &
     "29,     0,      PULL1)," &
     "27   (BC_2,  *,                              control,      " &
     "0),                        " &
     "26   (BC_7,  usbd_roe_pb21_235_pad,          bidir,        X,    " &
     "27,     0,      PULL1)," &
     "25   (BC_2,  *,                              control,      " &
     "0),                        " &
     "24   (BC_7,  usbd_afe_pb20_236_pad,          bidir,        X,    " &
     "25,     0,      PULL1)," &
     "23   (BC_2,  *,                              control,      " &
     "0),                        " &
     "22   (BC_7,  ssi1_txclk_pb19_241_pad,        bidir,        X,    " &
     "23,     0,      PULL1)," &
     "21   (BC_2,  *,                              control,      " &
     "0),                        " &
     "20   (BC_7,  ssi1_txfs_pb18_242_pad,         bidir,        X,    " &
     "21,     0,      PULL1)," &
     "19   (BC_2,  *,                              control,      " &
     "0),                        " &
     "18   (BC_7,  ssi1_txdat_pb17_243_pad,        bidir,        X,    " &
     "19,     0,      PULL1)," &
     "17   (BC_2,  *,                              control,      " &
     "0),                        " &
     "16   (BC_7,  ssi1_rxdat_pb16_244_pad,        bidir,        X,    " &
     "17,     0,      PULL1)," &
     "15   (BC_2,  *,                              control,      " &
     "0),                        " &
     "14   (BC_7,  ssi1_rxclk_pb15_245_pad,        bidir,        X,    " &
     "15,     0,      PULL1)," &
     "13   (BC_2,  *,                              control,      " &
     "0),                        " &
     "12   (BC_7,  ssi1_rxfs_pb14_246_pad,         bidir,        X,    " &
     "13,     0,      PULL1)," &
     "11   (BC_2,  *,                              control,      " &
     "0),                        " &
     "10   (BC_7,  cmd_ms1_pb13_247_pad,           bidir,        X,    " &
     "11,     0,      PULL1)," &
     "9    (BC_2,  *,                              control,      " &
     "0),                        " &
     "8    (BC_7,  clk_ms2_pb12_248_pad,           bidir,        X,    " &
     "9,      0,      PULL1)," &
     "7    (BC_2,  *,                              control,      " &
     "0),                        " &
     "6    (BC_7,  dat3_ms3_pb11_249_pad,          bidir,        X,    " &
     "7,      0,      PULL0)," &
     "5    (BC_2,  *,                              control,      " &
     "0),                        " &
     "4    (BC_7,  dat2_pb10_250_pad,              bidir,        X,    " &
     "5,      0,      PULL1)," &
     "3    (BC_2,  *,                              control,      " &
     "0),                        " &
     "2    (BC_7,  dat1_pb9_251_pad,               bidir,        X,    " &
     "3,      0,      PULL1)," &
     "1    (BC_2,  *,                              control,      " &
     "0),                        " &
     "0    (BC_7,  dat0_pb8_252_pad,               bidir,        X,    " &
     "1,      0,      PULL1)"; 
 
 end corsica;

This library contains 8972 BSDL files (for 7016 distinct entities) from 68 vendors
Last BSDL model (sam4s16b) was added on Dec 7, 2017 14:26
info@bsdl.info