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BSDL File: DRA74x75x_top Download View details  


----------------------------------------------------------------------
--  DRA74x75x Boundary Scan  
----------------------------------------------------------------------
--  Supported Devices: DRA74x75x Revision 1.0                           --
--                     Derived from parent device BSDL file         --
----------------------------------------------------------------------
--  Created by    : Texas Instruments Incorporated                  --
--  BSDL Revision : 1.1                                             --
--                                                                  --
--  BSDL Status   : Preliminary                                     --
--  Package       : 23x23                                           --
--  Date Created  : 03 September 2013                               --
--                                                                  --
----------------------------------------------------------------------
--                                                                  --
--                          IMPORTANT NOTICE
--  Texas Instruments Incorporated (TI) reserves the right to make
--  changes to its products or to discontinue any semiconductor
--  product or service without notice, and advises its customers to
--  obtain the latest version of the relevant information to
--  verify, before placing orders, that the information being
--  relied on is current.
--  TI warrants performance of its semiconductor products and
--  related software to the specifications applicable at the time
--  of sale in accordance with TI's standard warranty. Testing and
--  other quality control techniques are utilized to the extent TI
--  deems necessary to support this warranty. Specific testing of
--  all parameters of each device is not necessarily performed,
--  except those mandated by government requirements.
--
--  Certain applications using semiconductor devices may involve
--  potential risks of death, personal injury, or severe property
--  or environmental damage ("Critical Applications").
--    TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED,
--    AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN
--    LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHER
--    CRITICAL APPLICATIONS.
--  Inclusion of TI products in such applications is understood
--  to be fully at the risk of the customer.  Use of TI products
--  in such applications requires the written approval of an
--  appropriate TI officer. Questions concerning potential risk
--  applications should be directed to TI through a local SC sales
--  office.
--  In order to minimize risks associated with the customer's
--  applications, adequate design and operating safeguards should
--  be provided by the
--  customer to minimize inherent or procedural hazards.

--  TI assumes no liability for applications assistance, customer
--  product design, software performance, or infringement of
--  patents or services described herein.  Nor does TI warrant or
--  represent that any license, either express or implied, is
--  granted under any patent right, copyright, mask work right, or
--  other intellectual property right of TI covering or relating
--  to any combination, machine, or process in which such
--  semiconductor products or services might be or are used.
--            Copyright (c) 2001, Texas Instruments Incorporated
-------------------------------------------------------------------


 entity DRA74x75x_top is 

     generic(PHYSICAL_PIN_MAP : string := "DW");


PORT (
-- ddr1_strben0: INOUT bit;
-- ddr1_strben1: INOUT bit;
-- ddr1_strben2: INOUT bit;
-- ddr1_strben3: INOUT bit;
-- ddr1_strben_ecc: INOUT bit;
-- ddr1_odt1: INOUT bit;
-- ddr1_csn1: INOUT bit;
-- ddr2_strben0: INOUT bit;
-- ddr2_strben1: INOUT bit;
-- ddr2_strben2: INOUT bit;
-- ddr2_strben3: INOUT bit;
-- ddr2_odt1: INOUT bit;
	ddr1_csn0: INOUT bit;
	ddr1_cke: INOUT bit;
	ddr1_ck: INOUT bit;
	ddr1_nck: INOUT bit;
	ddr1_odt0: INOUT bit;
	ddr1_casn: INOUT bit;
	ddr1_rasn: INOUT bit;
	ddr1_wen: INOUT bit;
	ddr1_rst: INOUT bit;
	ddr1_ba0: INOUT bit;
	ddr1_ba1: INOUT bit;
	ddr1_ba2: INOUT bit;
	ddr1_a0: INOUT bit;
	ddr1_a1: INOUT bit;
	ddr1_a2: INOUT bit;
	ddr1_a3: INOUT bit;
	ddr1_a4: INOUT bit;
	ddr1_a5: INOUT bit;
	ddr1_a6: INOUT bit;
	ddr1_a7: INOUT bit;
	ddr1_a8: INOUT bit;
	ddr1_a9: INOUT bit;
	ddr1_a10: INOUT bit;
	ddr1_a11: INOUT bit;
	ddr1_a12: INOUT bit;
	ddr1_a13: INOUT bit;
	ddr1_a14: INOUT bit;
	ddr1_a15: INOUT bit;
	ddr1_d0: INOUT bit;
	ddr1_d1: INOUT bit;
	ddr1_d2: INOUT bit;
	ddr1_d3: INOUT bit;
	ddr1_d4: INOUT bit;
	ddr1_d5: INOUT bit;
	ddr1_d6: INOUT bit;
	ddr1_d7: INOUT bit;
	ddr1_d8: INOUT bit;
	ddr1_d9: INOUT bit;
	ddr1_d10: INOUT bit;
	ddr1_d11: INOUT bit;
	ddr1_d12: INOUT bit;
	ddr1_d13: INOUT bit;
	ddr1_d14: INOUT bit;
	ddr1_d15: INOUT bit;
	ddr1_d16: INOUT bit;
	ddr1_d17: INOUT bit;
	ddr1_d18: INOUT bit;
	ddr1_d19: INOUT bit;
	ddr1_d20: INOUT bit;
	ddr1_d21: INOUT bit;
	ddr1_d22: INOUT bit;
	ddr1_d23: INOUT bit;
	ddr1_d24: INOUT bit;
	ddr1_d25: INOUT bit;
	ddr1_d26: INOUT bit;
	ddr1_d27: INOUT bit;
	ddr1_d28: INOUT bit;
	ddr1_d29: INOUT bit;
	ddr1_d30: INOUT bit;
	ddr1_d31: INOUT bit;
	ddr1_ecc_d0: INOUT bit;
	ddr1_ecc_d1: INOUT bit;
	ddr1_ecc_d2: INOUT bit;
	ddr1_ecc_d3: INOUT bit;
	ddr1_ecc_d4: INOUT bit;
	ddr1_ecc_d5: INOUT bit;
	ddr1_ecc_d6: INOUT bit;
	ddr1_ecc_d7: INOUT bit;
	ddr1_dqm0: INOUT bit;
	ddr1_dqm1: INOUT bit;
	ddr1_dqm2: INOUT bit;
	ddr1_dqm3: INOUT bit;
	ddr1_dqm_ecc: INOUT bit;
	ddr1_dqs0: INOUT bit;
	ddr1_dqsn0: INOUT bit;
	ddr1_dqs1: INOUT bit;
	ddr1_dqsn1: INOUT bit;
	ddr1_dqs2: INOUT bit;
	ddr1_dqsn2: INOUT bit;
	ddr1_dqs3: INOUT bit;
	ddr1_dqsn3: INOUT bit;
	ddr1_dqs_ecc: INOUT bit;
	ddr1_dqsn_ecc: INOUT bit;
	ddr1_vref0: linkage bit;
	ddr2_csn0: INOUT bit;
--	ddr2_csn1: INOUT bit;
	ddr2_cke: INOUT bit;
	ddr2_ck: INOUT bit;
	ddr2_nck: INOUT bit;
	ddr2_odt0: INOUT bit;
	ddr2_casn: INOUT bit;
	ddr2_rasn: INOUT bit;
	ddr2_wen: INOUT bit;
	ddr2_rst: INOUT bit;
	ddr2_ba0: INOUT bit;
	ddr2_ba1: INOUT bit;
	ddr2_ba2: INOUT bit;
	ddr2_a0: INOUT bit;
	ddr2_a1: INOUT bit;
	ddr2_a2: INOUT bit;
	ddr2_a3: INOUT bit;
	ddr2_a4: INOUT bit;
	ddr2_a5: INOUT bit;
	ddr2_a6: INOUT bit;
	ddr2_a7: INOUT bit;
	ddr2_a8: INOUT bit;
	ddr2_a9: INOUT bit;
	ddr2_a10: INOUT bit;
	ddr2_a11: INOUT bit;
	ddr2_a12: INOUT bit;
	ddr2_a13: INOUT bit;
	ddr2_a14: INOUT bit;
	ddr2_a15: INOUT bit;
	ddr2_d0: INOUT bit;
	ddr2_d1: INOUT bit;
	ddr2_d2: INOUT bit;
	ddr2_d3: INOUT bit;
	ddr2_d4: INOUT bit;
	ddr2_d5: INOUT bit;
	ddr2_d6: INOUT bit;
	ddr2_d7: INOUT bit;
	ddr2_d8: INOUT bit;
	ddr2_d9: INOUT bit;
	ddr2_d10: INOUT bit;
	ddr2_d11: INOUT bit;
	ddr2_d12: INOUT bit;
	ddr2_d13: INOUT bit;
	ddr2_d14: INOUT bit;
	ddr2_d15: INOUT bit;
	ddr2_d16: INOUT bit;
	ddr2_d17: INOUT bit;
	ddr2_d18: INOUT bit;
	ddr2_d19: INOUT bit;
	ddr2_d20: INOUT bit;
	ddr2_d21: INOUT bit;
	ddr2_d22: INOUT bit;
	ddr2_d23: INOUT bit;
	ddr2_d24: INOUT bit;
	ddr2_d25: INOUT bit;
	ddr2_d26: INOUT bit;
	ddr2_d27: INOUT bit;
	ddr2_d28: INOUT bit;
	ddr2_d29: INOUT bit;
	ddr2_d30: INOUT bit;
	ddr2_d31: INOUT bit;
	ddr2_dqm0: INOUT bit;
	ddr2_dqm1: INOUT bit;
	ddr2_dqm2: INOUT bit;
	ddr2_dqm3: INOUT bit;
	ddr2_dqs0: INOUT bit;
	ddr2_dqsn0: INOUT bit;
	ddr2_dqs1: INOUT bit;
	ddr2_dqsn1: INOUT bit;
	ddr2_dqs2: INOUT bit;
	ddr2_dqsn2: INOUT bit;
	ddr2_dqs3: INOUT bit;
	ddr2_dqsn3: INOUT bit;
	ddr2_vref0: linkage bit;
	gpmc_ad0: INOUT bit;
	gpmc_ad1: INOUT bit;
	gpmc_ad2: INOUT bit;
	gpmc_ad3: INOUT bit;
	gpmc_ad4: INOUT bit;
	gpmc_ad5: INOUT bit;
	gpmc_ad6: INOUT bit;
	gpmc_ad7: INOUT bit;
	gpmc_ad8: INOUT bit;
	gpmc_ad9: INOUT bit;
	gpmc_ad10: INOUT bit;
	gpmc_ad11: INOUT bit;
	gpmc_ad12: INOUT bit;
	gpmc_ad13: INOUT bit;
	gpmc_ad14: INOUT bit;
	gpmc_ad15: INOUT bit;
	gpmc_a0: INOUT bit;
	gpmc_a1: INOUT bit;
	gpmc_a2: INOUT bit;
	gpmc_a3: INOUT bit;
	gpmc_a4: INOUT bit;
	gpmc_a5: INOUT bit;
	gpmc_a6: INOUT bit;
	gpmc_a7: INOUT bit;
	gpmc_a8: INOUT bit;
	gpmc_a9: INOUT bit;
	gpmc_a10: INOUT bit;
	gpmc_a11: INOUT bit;
	gpmc_a12: INOUT bit;
	gpmc_a13: INOUT bit;
	gpmc_a14: INOUT bit;
	gpmc_a15: INOUT bit;
	gpmc_a16: INOUT bit;
	gpmc_a17: INOUT bit;
	gpmc_a18: INOUT bit;
	gpmc_a19: INOUT bit;
	gpmc_a20: INOUT bit;
	gpmc_a21: INOUT bit;
	gpmc_a22: INOUT bit;
	gpmc_a23: INOUT bit;
	gpmc_a24: INOUT bit;
	gpmc_a25: INOUT bit;
	gpmc_a26: INOUT bit;
	gpmc_a27: INOUT bit;
	gpmc_cs1: INOUT bit;
	gpmc_cs0: INOUT bit;
	gpmc_cs2: INOUT bit;
	gpmc_cs3: INOUT bit;
	gpmc_clk: INOUT bit;
	gpmc_advn_ale: INOUT bit;
	gpmc_oen_ren: INOUT bit;
	gpmc_wen: INOUT bit;
	gpmc_ben0: INOUT bit;
	gpmc_ben1: INOUT bit;
	gpmc_wait0: INOUT bit;
	vin1a_clk0: INOUT bit;
	vin1b_clk1: INOUT bit;
	vin1a_de0: INOUT bit;
	vin1a_fld0: INOUT bit;
	vin1a_hsync0: INOUT bit;
	vin1a_vsync0: INOUT bit;
	vin1a_d0: INOUT bit;
	vin1a_d1: INOUT bit;
	vin1a_d2: INOUT bit;
	vin1a_d3: INOUT bit;
	vin1a_d4: INOUT bit;
	vin1a_d5: INOUT bit;
	vin1a_d6: INOUT bit;
	vin1a_d7: INOUT bit;
	vin1a_d8: INOUT bit;
	vin1a_d9: INOUT bit;
	vin1a_d10: INOUT bit;
	vin1a_d11: INOUT bit;
	vin1a_d12: INOUT bit;
	vin1a_d13: INOUT bit;
	vin1a_d14: INOUT bit;
	vin1a_d15: INOUT bit;
	vin1a_d16: INOUT bit;
	vin1a_d17: INOUT bit;
	vin1a_d18: INOUT bit;
	vin1a_d19: INOUT bit;
	vin1a_d20: INOUT bit;
	vin1a_d21: INOUT bit;
	vin1a_d22: INOUT bit;
	vin1a_d23: INOUT bit;
	vin2a_clk0: INOUT bit;
	vin2a_de0: INOUT bit;
	vin2a_fld0: INOUT bit;
	vin2a_hsync0: INOUT bit;
	vin2a_vsync0: INOUT bit;
	vin2a_d0: INOUT bit;
	vin2a_d1: INOUT bit;
	vin2a_d2: INOUT bit;
	vin2a_d3: INOUT bit;
	vin2a_d4: INOUT bit;
	vin2a_d5: INOUT bit;
	vin2a_d6: INOUT bit;
	vin2a_d7: INOUT bit;
	vin2a_d8: INOUT bit;
	vin2a_d9: INOUT bit;
	vin2a_d10: INOUT bit;
	vin2a_d11: INOUT bit;
	vin2a_d12: INOUT bit;
	vin2a_d13: INOUT bit;
	vin2a_d14: INOUT bit;
	vin2a_d15: INOUT bit;
	vin2a_d16: INOUT bit;
	vin2a_d17: INOUT bit;
	vin2a_d18: INOUT bit;
	vin2a_d19: INOUT bit;
	vin2a_d20: INOUT bit;
	vin2a_d21: INOUT bit;
	vin2a_d22: INOUT bit;
	vin2a_d23: INOUT bit;
	vout1_clk: INOUT bit;
	vout1_de: INOUT bit;
	vout1_fld: INOUT bit;
	vout1_hsync: INOUT bit;
	vout1_vsync: INOUT bit;
	vout1_d0: INOUT bit;
	vout1_d1: INOUT bit;
	vout1_d2: INOUT bit;
	vout1_d3: INOUT bit;
	vout1_d4: INOUT bit;
	vout1_d5: INOUT bit;
	vout1_d6: INOUT bit;
	vout1_d7: INOUT bit;
	vout1_d8: INOUT bit;
	vout1_d9: INOUT bit;
	vout1_d10: INOUT bit;
	vout1_d11: INOUT bit;
	vout1_d12: INOUT bit;
	vout1_d13: INOUT bit;
	vout1_d14: INOUT bit;
	vout1_d15: INOUT bit;
	vout1_d16: INOUT bit;
	vout1_d17: INOUT bit;
	vout1_d18: INOUT bit;
	vout1_d19: INOUT bit;
	vout1_d20: INOUT bit;
	vout1_d21: INOUT bit;
	vout1_d22: INOUT bit;
	vout1_d23: INOUT bit;
	hdmi1_data2x: linkage bit;
	hdmi1_data2y: linkage bit;
	hdmi1_data1x: linkage bit;
	hdmi1_data1y: linkage bit;
	hdmi1_data0x: linkage bit;
	hdmi1_data0y: linkage bit;
	hdmi1_clockx: linkage bit;
	hdmi1_clocky: linkage bit;
	mdio_mclk: INOUT bit;
	mdio_d: INOUT bit;
	RMII_MHZ_50_CLK: INOUT bit;
	uart3_rxd: INOUT bit;
	uart3_txd: INOUT bit;
	rgmii0_txc: INOUT bit;
	rgmii0_txctl: INOUT bit;
	rgmii0_txd3: INOUT bit;
	rgmii0_txd2: INOUT bit;
	rgmii0_txd1: INOUT bit;
	rgmii0_txd0: INOUT bit;
	rgmii0_rxc: INOUT bit;
	rgmii0_rxctl: INOUT bit;
	rgmii0_rxd3: INOUT bit;
	rgmii0_rxd2: INOUT bit;
	rgmii0_rxd1: INOUT bit;
	rgmii0_rxd0: INOUT bit;
	usb1_dp: linkage bit;
	usb1_dm: linkage bit;
	usb1_drvvbus: INOUT bit;
	usb_rxn0: linkage bit;
	usb_rxp0: linkage bit;
	usb_txn0: linkage bit;
	usb_txp0: linkage bit;
	usb2_dp: linkage bit;
	usb2_dm: linkage bit;
	usb2_drvvbus: INOUT bit;
	pcie_rxn0: linkage bit;
	pcie_rxp0: linkage bit;
	pcie_txn0: linkage bit;
	pcie_txp0: linkage bit;
	pcie_rxn1: linkage bit;
	pcie_rxp1: linkage bit;
	pcie_txn1: linkage bit;
	pcie_txp1: linkage bit;
	ljcb_clkp: linkage bit;
	ljcb_clkn: linkage bit;
	sata1_rxn0: linkage bit;
	sata1_rxp0: linkage bit;
	sata1_txn0: linkage bit;
	sata1_txp0: linkage bit;
	gpio6_14: INOUT bit;
	gpio6_15: INOUT bit;
	gpio6_16: INOUT bit;
	mlbp_sig_p: INOUT bit;
	mlbp_sig_n: INOUT bit;
	mlbp_dat_p: INOUT bit;
	mlbp_dat_n: INOUT bit;
	mlbp_clk_p: linkage bit;
	mlbp_clk_n: linkage bit;
	xref_clk0: INOUT bit;
	xref_clk1: INOUT bit;
	xref_clk2: INOUT bit;
	xref_clk3: INOUT bit;
	mcasp1_aclkx: INOUT bit;
	mcasp1_fsx: INOUT bit;
	mcasp1_aclkr: INOUT bit;
	mcasp1_fsr: INOUT bit;
	mcasp1_axr0: INOUT bit;
	mcasp1_axr1: INOUT bit;
	mcasp1_axr2: INOUT bit;
	mcasp1_axr3: INOUT bit;
	mcasp1_axr4: INOUT bit;
	mcasp1_axr5: INOUT bit;
	mcasp1_axr6: INOUT bit;
	mcasp1_axr7: INOUT bit;
	mcasp1_axr8: INOUT bit;
	mcasp1_axr9: INOUT bit;
	mcasp1_axr10: INOUT bit;
	mcasp1_axr11: INOUT bit;
	mcasp1_axr12: INOUT bit;
	mcasp1_axr13: INOUT bit;
	mcasp1_axr14: INOUT bit;
	mcasp1_axr15: INOUT bit;
	mcasp2_aclkx: INOUT bit;
	mcasp2_fsx: INOUT bit;
	mcasp2_aclkr: INOUT bit;
	mcasp2_fsr: INOUT bit;
	mcasp2_axr0: INOUT bit;
	mcasp2_axr1: INOUT bit;
	mcasp2_axr2: INOUT bit;
	mcasp2_axr3: INOUT bit;
	mcasp2_axr4: INOUT bit;
	mcasp2_axr5: INOUT bit;
	mcasp2_axr6: INOUT bit;
	mcasp2_axr7: INOUT bit;
	mcasp3_aclkx: INOUT bit;
	mcasp3_fsx: INOUT bit;
	mcasp3_axr0: INOUT bit;
	mcasp3_axr1: INOUT bit;
	mcasp4_aclkx: INOUT bit;
	mcasp4_fsx: INOUT bit;
	mcasp4_axr0: INOUT bit;
	mcasp4_axr1: INOUT bit;
	mcasp5_aclkx: INOUT bit;
	mcasp5_fsx: INOUT bit;
	mcasp5_axr0: INOUT bit;
	mcasp5_axr1: INOUT bit;
	mmc1_clk: INOUT bit;
	mmc1_cmd: INOUT bit;
	mmc1_dat0: INOUT bit;
	mmc1_dat1: INOUT bit;
	mmc1_dat2: INOUT bit;
	mmc1_dat3: INOUT bit;
	mmc1_sdcd: INOUT bit;
	mmc1_sdwp: INOUT bit;
	mmc1_bias: linkage bit;
	gpio6_10: INOUT bit;
	gpio6_11: INOUT bit;
	mmc3_clk: INOUT bit;
	mmc3_cmd: INOUT bit;
	mmc3_dat0: INOUT bit;
	mmc3_dat1: INOUT bit;
	mmc3_dat2: INOUT bit;
	mmc3_dat3: INOUT bit;
	mmc3_dat4: INOUT bit;
	mmc3_dat5: INOUT bit;
	mmc3_dat6: INOUT bit;
	mmc3_dat7: INOUT bit;
	spi1_sclk: INOUT bit;
	spi1_d1: INOUT bit;
	spi1_d0: INOUT bit;
	spi1_cs0: INOUT bit;
	spi1_cs1: INOUT bit;
	spi1_cs2: INOUT bit;
	spi1_cs3: INOUT bit;
	spi2_sclk: INOUT bit;
	spi2_d1: INOUT bit;
	spi2_d0: INOUT bit;
	spi2_cs0: INOUT bit;
	dcan1_tx: INOUT bit;
	dcan1_rx: INOUT bit;
	uart1_rxd: INOUT bit;
	uart1_txd: INOUT bit;
	uart1_ctsn: INOUT bit;
	uart1_rtsn: INOUT bit;
	uart2_rxd: INOUT bit;
	uart2_txd: INOUT bit;
	uart2_ctsn: INOUT bit;
	uart2_rtsn: INOUT bit;
	i2c1_sda: INOUT bit;
	i2c1_scl: INOUT bit;
	i2c2_sda: INOUT bit;
	i2c2_scl: INOUT bit;
	Wakeup0: linkage bit;
	Wakeup1: linkage bit;
	Wakeup2: linkage bit;
	Wakeup3: linkage bit;
	on_off: linkage bit;
	rtc_porz: linkage bit;
	rtc_osc_xo: linkage bit;
	rtc_osc_xi_clkin32: linkage bit;
	rtc_iso: linkage bit;
	tms: IN bit;
	tdi: IN bit;
	tdo: OUT bit;
	tclk: IN bit;
	trstn: IN bit;
	rtck: INOUT bit;
	emu0: INOUT bit;
	emu1: INOUT bit;
	resetn: INOUT bit;
	porz: IN bit;
	nmin: IN bit;
	rstoutn: INOUT bit;
	xi_osc0: linkage bit;
	xo_osc0: linkage bit;
	xi_osc1: linkage bit;
	xo_osc1: linkage bit;
	atestv: linkage bit;
        iforce: linkage bit;
        vsense: linkage bit;

    cap_vddram_core5    : linkage  bit;
    cap_vddram_core3    : linkage  bit;
    cap_vbbldo_gpu      : linkage  bit;
    cap_vddram_gpu      : linkage  bit;
    cap_vddram_iva      : linkage  bit;
    cap_vbbldo_iva      : linkage  bit;
    cap_vddram_core4    : linkage  bit;
    cap_vddram_core1    : linkage  bit;
    cap_vddram_mpu2     : linkage  bit;
    cap_vddram_mpu1     : linkage  bit;
    cap_vbbldo_dspeve   : linkage  bit;
    cap_vddram_core2    : linkage  bit;
    cap_vbbldo_mpu      : linkage  bit;
    cap_vddram_dspeve1  : linkage  bit;
    cap_vddram_dspeve2  : linkage  bit;

    vdd			:  linkage  bit_vector(22 downto 0);
    vdd_dspeve		:  linkage  bit_vector(11 downto 0);
    vdd_gpu		:  linkage  bit_vector(7 downto 0);
    vdd_iva		:  linkage  bit_vector(3 downto 0);
    vdd_mpu		:  linkage  bit_vector(15 downto 0);
    vdd_rtc		:  linkage  bit;
    vdda_abe_per	:  linkage  bit;
    vdda_ddr		:  linkage  bit;
    vdda_debug		:  linkage  bit;
    vdda_dsp_eve	:  linkage  bit;
    vdda_gmac_core	:  linkage  bit;
    vdda_gpu		:  linkage  bit;
    vdda_hdmi		:  linkage  bit;
    vdda_iva		:  linkage  bit;
    vdda_mpu		:  linkage  bit;
    vdda_osc		:  linkage  bit_vector(1 downto 0);
    vdda_pcie		:  linkage  bit;
    vdda_pcie0		:  linkage  bit;
    vdda_pcie1		:  linkage  bit;
    vdda_rtc		:  linkage  bit;
    vdda_sata		:  linkage  bit;
    vdda_usb1		:  linkage  bit;
    vdda_usb2		:  linkage  bit;
    vdda_usb3		:  linkage  bit;
    vdda_video		:  linkage  bit;
    vdda33v_usb1	:  linkage  bit;
    vdda33v_usb2	:  linkage  bit;
    vdds_ddr1		:  linkage  bit_vector(12 downto 0);
    vdds_ddr2		:  linkage  bit_vector(12 downto 0);
    vdds_mlbp		:  linkage  bit_vector(1 downto 0);
    vdds18v		:  linkage  bit_vector(11 downto 0);
    vdds18v_ddr1	:  linkage  bit_vector(3 downto 0);
    vdds18v_ddr2	:  linkage  bit_vector(4 downto 0);
    vddshv1		:  linkage  bit_vector(5 downto 0);
    vddshv10		:  linkage  bit_vector(6 downto 0);
    vddshv11		:  linkage  bit_vector(1 downto 0);
    vddshv2		:  linkage  bit_vector(4 downto 0);
    vddshv3		:  linkage  bit_vector(9 downto 0);
    vddshv4		:  linkage  bit;
    vddshv5		:  linkage  bit;
    vddshv6		:  linkage  bit_vector(3 downto 0);
    vddshv7		:  linkage  bit_vector(1 downto 0);
    vddshv8		:  linkage  bit_vector(1 downto 0);
    vddshv9		:  linkage  bit_vector(2 downto 0);
    vpp			:  linkage  bit;
    vss			:  linkage  bit_vector(74 downto 0);
    vssa_hdmi		:  linkage  bit_vector(1 downto 0);
    vssa_osc0		:  linkage  bit;
    vssa_osc1		:  linkage  bit;
    vssa_pcie		:  linkage  bit_vector(1 downto 0);
    vssa_sata		:  linkage  bit;
    vssa_usb		:  linkage  bit_vector(1 downto 0);
    vssa_usb3		:  linkage  bit;
    vssa_video		:  linkage  bit

 );

    use STD_1149_1_2001.all; 
    attribute COMPONENT_CONFORMANCE of DRA74x75x_top : entity is 
"STD_1149_1_2001"; 
    attribute PIN_MAP of DRA74x75x_top : entity is PHYSICAL_PIN_MAP; 
    constant DW : PIN_MAP_STRING :=   

     "atestv:			Y10 , " &
     "dcan1_rx:			G19 , " &
     "dcan1_tx:			G20 , " &
     "ddr1_a0:			AD20 , " &
     "ddr1_a1:			AC19 , " &
     "ddr1_a10:			AD21 , " &
     "ddr1_a11:			AD22 , " &
     "ddr1_a12:			AC21 , " &
     "ddr1_a13:			AF18 , " &
     "ddr1_a14:			AE17 , " &
     "ddr1_a15:			AD18 , " &
     "ddr1_a2:			AC20 , " &
     "ddr1_a3:			AB19 , " &
     "ddr1_a4:			AF21 , " &
     "ddr1_a5:			AH22 , " &
     "ddr1_a6:			AG23 , " &
     "ddr1_a7:			AE21 , " &
     "ddr1_a8:			AF22 , " &
     "ddr1_a9:			AE22 , " &
     "ddr1_ba0:			AF17 , " &
     "ddr1_ba1:			AE18 , " &
     "ddr1_ba2:			AB18 , " &
     "ddr1_casn:			AC18 , " &
     "ddr1_ck:			AG24 , " &
     "ddr1_cke:			AG22 , " &
     "ddr1_csn0:			AH23 , " &
     "ddr1_d0:			AF25 , " &
     "ddr1_d1:			AF26 , " &
     "ddr1_d10:			AG27 , " &
     "ddr1_d11:			AF28 , " &
     "ddr1_d12:			AE26 , " &
     "ddr1_d13:			AC25 , " &
     "ddr1_d14:			AC24 , " &
     "ddr1_d15:			AD25 , " &
     "ddr1_d16:			V20 , " &
     "ddr1_d17:			W20 , " &
     "ddr1_d18:			AB28 , " &
     "ddr1_d19:			AC28 , " &
     "ddr1_d2:			AG26 , " &
     "ddr1_d20:			AC27 , " &
     "ddr1_d21:			Y19 , " &
     "ddr1_d22:			AB27 , " &
     "ddr1_d23:			Y20 , " &
     "ddr1_d24:			AA23 , " &
     "ddr1_d25:			Y22 , " &
     "ddr1_d26:			Y23 , " &
     "ddr1_d27:			AA24 , " &
     "ddr1_d28:			Y24 , " &
     "ddr1_d29:			AA26 , " &
     "ddr1_d3:			AH26 , " &
     "ddr1_d30:			AA25 , " &
     "ddr1_d31:			AA28 , " &
     "ddr1_d4:			AF24 , " &
     "ddr1_d5:			AE24 , " &
     "ddr1_d6:			AF23 , " &
     "ddr1_d7:			AE23 , " &
     "ddr1_d8:			AC23 , " &
     "ddr1_d9:			AF27 , " &
     "ddr1_dqm_ecc:			V26 , " &
     "ddr1_dqm0:			AD23 , " &
     "ddr1_dqm1:			AB23 , " &
     "ddr1_dqm2:			AC26 , " &
     "ddr1_dqm3:			AA27 , " &
     "ddr1_dqs_ecc:			V27 , " &
     "ddr1_dqs0:			AH25 , " &
     "ddr1_dqs1:			AE27 , " &
     "ddr1_dqs2:			AD27 , " &
     "ddr1_dqs3:			Y28 , " &
     "ddr1_dqsn_ecc:			V28 , " &
     "ddr1_dqsn0:			AG25 , " &
     "ddr1_dqsn1:			AE28 , " &
     "ddr1_dqsn2:			AD28 , " &
     "ddr1_dqsn3:			Y27 , " &
     "ddr1_ecc_d0:			W22 , " &
     "ddr1_ecc_d1:			V23 , " &
     "ddr1_ecc_d2:			W19 , " &
     "ddr1_ecc_d3:			W23 , " &
     "ddr1_ecc_d4:			Y25 , " &
     "ddr1_ecc_d5:			V24 , " &
     "ddr1_ecc_d6:			V25 , " &
     "ddr1_ecc_d7:			Y26 , " &
     "ddr1_nck:			AH24 , " &
     "ddr1_odt0:			AE20 , " &
     "ddr1_rasn:			AF20 , " &
     "ddr1_rst:			AG21 , " &
     "ddr1_vref0:			Y18 , " &
     "ddr1_wen:			AH21 , " &
     "ddr2_a0:			R25 , " &
     "ddr2_a1:			R26 , " &
     "ddr2_a10:			N23 , " &
     "ddr2_a11:			P26 , " &
     "ddr2_a12:			N28 , " &
     "ddr2_a13:			T22 , " &
     "ddr2_a14:			R22 , " &
     "ddr2_a15:			U22 , " &
     "ddr2_a2:			R28 , " &
     "ddr2_a3:			R27 , " &
     "ddr2_a4:			P23 , " &
     "ddr2_a5:			P22 , " &
     "ddr2_a6:			P25 , " &
     "ddr2_a7:			N20 , " &
     "ddr2_a8:			P27 , " &
     "ddr2_a9:			N27 , " &
     "ddr2_ba0:			U23 , " &
     "ddr2_ba1:			U27 , " &
     "ddr2_ba2:			U26 , " &
     "ddr2_casn:			U28 , " &
     "ddr2_ck:			T28 , " &
     "ddr2_cke:			U24 , " &
     "ddr2_csn0:			P24 , " &
     "ddr2_d0:			E26 , " &
     "ddr2_d1:			G25 , " &
     "ddr2_d10:			H24 , " &
     "ddr2_d11:			H26 , " &
     "ddr2_d12:			G26 , " &
     "ddr2_d13:			J25 , " &
     "ddr2_d14:			J26 , " &
     "ddr2_d15:			J24 , " &
     "ddr2_d16:			L22 , " &
     "ddr2_d17:			K20 , " &
     "ddr2_d18:			K21 , " &
     "ddr2_d19:			L23 , " &
     "ddr2_d2:			F25 , " &
     "ddr2_d20:			L24 , " &
     "ddr2_d21:			J23 , " &
     "ddr2_d22:			K22 , " &
     "ddr2_d23:			J20 , " &
     "ddr2_d24:			L27 , " &
     "ddr2_d25:			L26 , " &
     "ddr2_d26:			L25 , " &
     "ddr2_d27:			L28 , " &
     "ddr2_d28:			M23 , " &
     "ddr2_d29:			M24 , " &
     "ddr2_d3:			F24 , " &
     "ddr2_d30:			M25 , " &
     "ddr2_d31:			M26 , " &
     "ddr2_d4:			F26 , " &
     "ddr2_d5:			F27 , " &
     "ddr2_d6:			E27 , " &
     "ddr2_d7:			E28 , " &
     "ddr2_d8:			H23 , " &
     "ddr2_d9:			H25 , " &
     "ddr2_dqm0:			F28 , " &
     "ddr2_dqm1:			G24 , " &
     "ddr2_dqm2:			K23 , " &
     "ddr2_dqm3:			M22 , " &
     "ddr2_dqs0:			G28 , " &
     "ddr2_dqs1:			H27 , " &
     "ddr2_dqs2:			K27 , " &
     "ddr2_dqs3:			M28 , " &
     "ddr2_dqsn0:			G27 , " &
     "ddr2_dqsn1:			H28 , " &
     "ddr2_dqsn2:			K28 , " &
     "ddr2_dqsn3:			M27 , " &
     "ddr2_nck:			T27 , " &
     "ddr2_odt0:			R23 , " &
     "ddr2_rasn:			T23 , " &
     "ddr2_rst:			R24 , " &
     "ddr2_vref0:			N22 , " &
     "ddr2_wen:			U25 , " &
     "emu0:			G21 , " &
     "emu1:			D24 , " &
     "gpio6_10:			AC5 , " &
     "gpio6_11:			AB4 , " &
     "gpio6_14:			E21 , " &
     "gpio6_15:			F20 , " &
     "gpio6_16:			F21 , " &
     "gpmc_a0:			R6 , " &
     "gpmc_a1:			T9 , " &
     "gpmc_a10:			N9 , " &
     "gpmc_a11:			P9 , " &
     "gpmc_a12:			P4 , " &
     "gpmc_a13:			R3 , " &
     "gpmc_a14:			T2 , " &
     "gpmc_a15:			U2 , " &
     "gpmc_a16:			U1 , " &
     "gpmc_a17:			P3 , " &
     "gpmc_a18:			R2 , " &
     "gpmc_a19:			K7 , " &
     "gpmc_a2:			T6 , " &
     "gpmc_a20:			M7 , " &
     "gpmc_a21:			J5 , " &
     "gpmc_a22:			K6 , " &
     "gpmc_a23:			J7 , " &
     "gpmc_a24:			J4 , " &
     "gpmc_a25:			J6 , " &
     "gpmc_a26:			H4 , " &
     "gpmc_a27:			H5 , " &
     "gpmc_a3:			T7 , " &
     "gpmc_a4:			P6 , " &
     "gpmc_a5:			R9 , " &
     "gpmc_a6:			R5 , " &
     "gpmc_a7:			P5 , " &
     "gpmc_a8:			N7 , " &
     "gpmc_a9:			R4 , " &
     "gpmc_ad0:			M6 , " &
     "gpmc_ad1:			M2 , " &
     "gpmc_ad10:			J1 , " &
     "gpmc_ad11:			J2 , " &
     "gpmc_ad12:			H1 , " &
     "gpmc_ad13:			J3 , " &
     "gpmc_ad14:			H2 , " &
     "gpmc_ad15:			H3 , " &
     "gpmc_ad2:			L5 , " &
     "gpmc_ad3:			M1 , " &
     "gpmc_ad4:			L6 , " &
     "gpmc_ad5:			L4 , " &
     "gpmc_ad6:			L3 , " &
     "gpmc_ad7:			L2 , " &
     "gpmc_ad8:			L1 , " &
     "gpmc_ad9:			K2 , " &
     "gpmc_advn_ale:			N1 , " &
     "gpmc_ben0:			N6 , " &
     "gpmc_ben1:			M4 , " &
     "gpmc_clk:			P7 , " &
     "gpmc_cs0:			T1 , " &
     "gpmc_cs1:			H6 , " &
     "gpmc_cs2:			P2 , " &
     "gpmc_cs3:			P1 , " &
     "gpmc_oen_ren:			M5 , " &
     "gpmc_wait0:			N2 , " &
     "gpmc_wen:			M3 , " &
     "hdmi1_clockx:			AG16 , " &
     "hdmi1_clocky:			AH16 , " &
     "hdmi1_data0x:			AG17 , " &
     "hdmi1_data0y:			AH17 , " &
     "hdmi1_data1x:			AG18 , " &
     "hdmi1_data1y:			AH18 , " &
     "hdmi1_data2x:			AG19 , " &
     "hdmi1_data2y:			AH19 , " &
     "i2c1_scl:			C20 , " &
     "i2c1_sda:			C21 , " &
     "i2c2_scl:			F17 , " &
     "i2c2_sda:			C25 , " &
     "iforce:			A27 , " &
     "ljcb_clkn:			AH15 , " &
     "ljcb_clkp:			AG15 , " &
     "mcasp1_aclkr:			B14 , " &
     "mcasp1_aclkx:			C14 , " &
     "mcasp1_axr0:			G12 , " &
     "mcasp1_axr1:			F12 , " &
     "mcasp1_axr10:			B13 , " &
     "mcasp1_axr11:			A12 , " &
     "mcasp1_axr12:			E14 , " &
     "mcasp1_axr13:			A13 , " &
     "mcasp1_axr14:			G14 , " &
     "mcasp1_axr15:			F14 , " &
     "mcasp1_axr2:			G13 , " &
     "mcasp1_axr3:			J11 , " &
     "mcasp1_axr4:			E12 , " &
     "mcasp1_axr5:			F13 , " &
     "mcasp1_axr6:			C12 , " &
     "mcasp1_axr7:			D12 , " &
     "mcasp1_axr8:			B12 , " &
     "mcasp1_axr9:			A11 , " &
     "mcasp1_fsr:			J14 , " &
     "mcasp1_fsx:			D14 , " &
     "mcasp2_aclkr:			E15 , " &
     "mcasp2_aclkx:			A19 , " &
     "mcasp2_axr0:			B15 , " &
     "mcasp2_axr1:			A15 , " &
     "mcasp2_axr2:			C15 , " &
     "mcasp2_axr3:			A16 , " &
     "mcasp2_axr4:			D15 , " &
     "mcasp2_axr5:			B16 , " &
     "mcasp2_axr6:			B17 , " &
     "mcasp2_axr7:			A17 , " &
     "mcasp2_fsr:			A20 , " &
     "mcasp2_fsx:			A18 , " &
     "mcasp3_aclkx:			B18 , " &
     "mcasp3_axr0:			B19 , " &
     "mcasp3_axr1:			C17 , " &
     "mcasp3_fsx:			F15 , " &
     "mcasp4_aclkx:			C18 , " &
     "mcasp4_axr0:			G16 , " &
     "mcasp4_axr1:			D17 , " &
     "mcasp4_fsx:			A21 , " &
     "mcasp5_aclkx:			AA3 , " &
     "mcasp5_axr0:			AB3 , " &
     "mcasp5_axr1:			AA4 , " &
     "mcasp5_fsx:			AB9 , " &
     "mdio_d:			U4 , " &
     "mdio_mclk:			V1 , " &
     "mlbp_clk_n:			AB2 , " &
     "mlbp_clk_p:			AB1 , " &
     "mlbp_dat_n:			AA2 , " &
     "mlbp_dat_p:			AA1 , " &
     "mlbp_sig_n:			AC2 , " &
     "mlbp_sig_p:			AC1 , " &
     "mmc1_bias:			Y5 , " &
     "mmc1_clk:			W6 , " &
     "mmc1_cmd:			Y6 , " &
     "mmc1_dat0:			AA6 , " &
     "mmc1_dat1:			Y4 , " &
     "mmc1_dat2:			AA5 , " &
     "mmc1_dat3:			Y3 , " &
     "mmc1_sdcd:			W7 , " &
     "mmc1_sdwp:			Y9 , " &
     "mmc3_clk:			AD4 , " &
     "mmc3_cmd:			AC4 , " &
     "mmc3_dat0:			AC7 , " &
     "mmc3_dat1:			AC6 , " &
     "mmc3_dat2:			AC9 , " &
     "mmc3_dat3:			AC3 , " &
     "mmc3_dat4:			AC8 , " &
     "mmc3_dat5:			AD6 , " &
     "mmc3_dat6:			AB8 , " &
     "mmc3_dat7:			AB5 , " &
     "nmin:			D21 , " &
     "on_off:			Y11 , " &
     "pcie_rxn0:			AG13 , " &
     "pcie_rxn1:			AG11 , " &
     "pcie_rxp0:			AH13 , " &
     "pcie_rxp1:			AH11 , " &
     "pcie_txn0:			AG14 , " &
     "pcie_txn1:			AG12 , " &
     "pcie_txp0:			AH14 , " &
     "pcie_txp1:			AH12 , " &
     "porz:			F22 , " &
     "resetn:			E23 , " &
     "rgmii0_rxc:			U5 , " &
     "rgmii0_rxctl:			V5 , " &
     "rgmii0_rxd0:			W2 , " &
     "rgmii0_rxd1:			Y2 , " &
     "rgmii0_rxd2:			V3 , " &
     "rgmii0_rxd3:			V4 , " &
     "rgmii0_txc:			W9 , " &
     "rgmii0_txctl:			V9 , " &
     "rgmii0_txd0:			U6 , " &
     "rgmii0_txd1:			V6 , " &
     "rgmii0_txd2:			U7 , " &
     "rgmii0_txd3:			V7 , " &
     "RMII_MHZ_50_CLK:			U3 , " &
     "rstoutn:			F23 , " &
     "rtc_iso:			AF14 , " &
     "rtc_osc_xi_clkin32:			AE14 , " &
     "rtc_osc_xo:			AD14 , " &
     "rtc_porz:			AB17 , " &
     "rtck:			E18 , " &
     "sata1_rxn0:			AH9 , " &
     "sata1_rxp0:			AG9 , " &
     "sata1_txn0:			AG10 , " &
     "sata1_txp0:			AH10 , " &
     "spi1_cs0:			A24 , " &
     "spi1_cs1:			A22 , " &
     "spi1_cs2:			B21 , " &
     "spi1_cs3:			B20 , " &
     "spi1_d0:			B25 , " &
     "spi1_d1:			F16 , " &
     "spi1_sclk:			A25 , " &
     "spi2_cs0:			B24 , " &
     "spi2_d0:			G17 , " &
     "spi2_d1:			B22 , " &
     "spi2_sclk:			A26 , " &
     "tclk:			E20 , " &
     "tdi:			D23 , " &
     "tdo:			F19 , " &
     "tms:			F18 , " &
     "trstn:			D20 , " &
     "uart1_ctsn:			E25 , " &
     "uart1_rtsn:			C27 , " &
     "uart1_rxd:			B27 , " &
     "uart1_txd:			C26 , " &
     "uart2_ctsn:			D27 , " &
     "uart2_rtsn:			C28 , " &
     "uart2_rxd:			D28 , " &
     "uart2_txd:			D26 , " &
     "uart3_rxd:			V2 , " &
     "uart3_txd:			Y1 , " &
     "usb_rxn0:			AF12 , " &
     "usb_rxp0:			AE12 , " &
     "usb_txn0:			AC11 , " &
     "usb_txp0:			AD11 , " &
     "usb1_dm:			AC12 , " &
     "usb1_dp:			AD12 , " &
     "usb1_drvvbus:			AB10 , " &
     "usb2_dm:			AF11 , " &
     "usb2_dp:			AE11 , " &
     "usb2_drvvbus:			AC10 , " &
     "vin1a_clk0:			AG8 , " &
     "vin1a_d0:			AE8 , " &
     "vin1a_d1:			AD8 , " &
     "vin1a_d10:			AG3 , " &
     "vin1a_d11:			AG5 , " &
     "vin1a_d12:			AF2 , " &
     "vin1a_d13:			AF6 , " &
     "vin1a_d14:			AF3 , " &
     "vin1a_d15:			AF4 , " &
     "vin1a_d16:			AF1 , " &
     "vin1a_d17:			AE3 , " &
     "vin1a_d18:			AE5 , " &
     "vin1a_d19:			AE1 , " &
     "vin1a_d2:			AG7 , " &
     "vin1a_d20:			AE2 , " &
     "vin1a_d21:			AE6 , " &
     "vin1a_d22:			AD2 , " &
     "vin1a_d23:			AD3 , " &
     "vin1a_d3:			AH6 , " &
     "vin1a_d4:			AH3 , " &
     "vin1a_d5:			AH5 , " &
     "vin1a_d6:			AG6 , " &
     "vin1a_d7:			AH4 , " &
     "vin1a_d8:			AG4 , " &
     "vin1a_d9:			AG2 , " &
     "vin1a_de0:			AD9 , " &
     "vin1a_fld0:			AF9 , " &
     "vin1a_hsync0:			AE9 , " &
     "vin1a_vsync0:			AF8 , " &
     "vin1b_clk1:			AH7 , " &
     "vin2a_clk0:			E1 , " &
     "vin2a_d0:			F2 , " &
     "vin2a_d1:			F3 , " &
     "vin2a_d10:			D3 , " &
     "vin2a_d11:			F6 , " &
     "vin2a_d12:			D5 , " &
     "vin2a_d13:			C2 , " &
     "vin2a_d14:			C3 , " &
     "vin2a_d15:			C4 , " &
     "vin2a_d16:			B2 , " &
     "vin2a_d17:			D6 , " &
     "vin2a_d18:			C5 , " &
     "vin2a_d19:			A3 , " &
     "vin2a_d2:			D1 , " &
     "vin2a_d20:			B3 , " &
     "vin2a_d21:			B4 , " &
     "vin2a_d22:			B5 , " &
     "vin2a_d23:			A4 , " &
     "vin2a_d3:			E2 , " &
     "vin2a_d4:			D2 , " &
     "vin2a_d5:			F4 , " &
     "vin2a_d6:			C1 , " &
     "vin2a_d7:			E4 , " &
     "vin2a_d8:			F5 , " &
     "vin2a_d9:			E6 , " &
     "vin2a_de0:			G2 , " &
     "vin2a_fld0:			H7 , " &
     "vin2a_hsync0:			G1 , " &
     "vin2a_vsync0:			G6 , " &
     "vout1_clk:			D11 , " &
     "vout1_d0:			F11 , " &
     "vout1_d1:			G10 , " &
     "vout1_d10:			D7 , " &
     "vout1_d11:			D8 , " &
     "vout1_d12:			A5 , " &
     "vout1_d13:			C6 , " &
     "vout1_d14:			C8 , " &
     "vout1_d15:			C7 , " &
     "vout1_d16:			B7 , " &
     "vout1_d17:			B8 , " &
     "vout1_d18:			A7 , " &
     "vout1_d19:			A8 , " &
     "vout1_d2:			F10 , " &
     "vout1_d20:			C9 , " &
     "vout1_d21:			A9 , " &
     "vout1_d22:			B9 , " &
     "vout1_d23:			A10 , " &
     "vout1_d3:			G11 , " &
     "vout1_d4:			E9 , " &
     "vout1_d5:			F9 , " &
     "vout1_d6:			F8 , " &
     "vout1_d7:			E7 , " &
     "vout1_d8:			E8 , " &
     "vout1_d9:			D9 , " &
     "vout1_de:			B10 , " &
     "vout1_fld:			B11 , " &
     "vout1_hsync:			C11 , " &
     "vout1_vsync:			E11 , " &
     "vsense:			B28 , " &
     "Wakeup0:			AD17 , " &
     "Wakeup1:			AC17 , " &
     "Wakeup2:			AB16 , " &
     "Wakeup3:			AC16 , " &
     "xi_osc0:			AE15 , " &
     "xi_osc1:			AC15 , " &
     "xo_osc0:			AD15 , " &
     "xo_osc1:			AC13 , " &
     "xref_clk0:			D18 , " &
     "xref_clk1:			E17 , " &
     "xref_clk2:			B26 , " &
     "xref_clk3:			C23 , " &


    "cap_vddram_core5           : Y16 , " &
    "cap_vddram_core3           : Y15 , " &
    "cap_vbbldo_gpu             : Y14 , " &
    "cap_vddram_gpu             : Y13 , " &
    "cap_vddram_iva             : T20 , " &
    "cap_vbbldo_iva             : R20 , " &
    "cap_vddram_core4           : P19 , " &
    "cap_vddram_core1           : L9 , " &
    "cap_vddram_mpu2            : K19 , " &
    "cap_vddram_mpu1            : K16 , " &
    "cap_vbbldo_dspeve          : K9 , " &
    "cap_vddram_core2           : J19 , " &
    "cap_vbbldo_mpu             : J16 , " &
    "cap_vddram_dspeve1         : J10 , " &
    "cap_vddram_dspeve2         : J9 , " &


     "vdd			:  (H13,H14,J17,J18,L7,L8,N10,N13,P11,P12,P13,R11,R16,R19,T13,T16,T19,U8,U9,U13,U16,V8,V16) , " &
     "vdd_dspeve		:  (J13,K10,K11,K12,K13,L10,L11,L12,M10,M11,M12,M13) , " &
     "vdd_gpu			:  (U11,U12,V10,V11,V14,W10,W11,W13) , " &
     "vdd_iva			:  (U18,U19,V18,V19) , " &
     "vdd_mpu			:  (K17,K18,L15,L16,L17,L18,L19,M15,M16,M17,M18,N17,N18,P17,P18,R18) , " &
     "vdd_rtc			:  AB15 , " &
     "vdda_abe_per		:  M14 , " &
     "vdda_ddr			:  P16 , " &
     "vdda_debug		:  N11 , " &
     "vdda_dsp_eve		:  N12 , " &
     "vdda_gmac_core		:  P15 , " &
     "vdda_gpu			:  R14 , " &
     "vdda_hdmi			:  Y17 , " &
     "vdda_iva			:  R17 , " &
     "vdda_mpu			:  N16 , " &
     "vdda_osc			:  (AD16,AE16) , " &
     "vdda_pcie			:  W14 , " &
     "vdda_pcie0		:  AA17 , " &
     "vdda_pcie1		:  AA16 , " &
     "vdda_rtc			:  AB13 , " &
     "vdda_sata			:  V13 , " &
     "vdda_usb1			:  AA13 , " &
     "vdda_usb2			:  AB12 , " &
     "vdda_usb3			:  W12 , " &
     "vdda_video		:  P14 , " &
     "vdda33v_usb1		:  AA12 , " &
     "vdda33v_usb2		:  Y12 , " &
     "vdds_ddr1			:  (W16,W27,AA21,AA22,AB21,AB22,AB24,AB25,AC22,AD26,AG20,AG28,AH27) , " &
     "vdds_ddr2			:  (E24,G22,G23,H20,H21,H22,J27,L20,L21,M20,M21,T24,T25) , " &
     "vdds_mlbp			:  (Y7,AA7) , " &
     "vdds18v			:  (G18,H17,M8,M9,N8,P8,R8,T8,V21,V22,W17,W18) , " &
     "vdds18v_ddr1		:  (W21,Y21,AA18,AA19) , " &
     "vdds18v_ddr2		:  (J21,J22,N21,P20,P21) , " &
     "vddshv1			:  (E3,E5,G4,G5,H8,H9) , " &
     "vddshv10			:  (N4,N5,P10,R7,R10,T4,T5) , " &
     "vddshv11			:  (J8,K8) , " &
     "vddshv2			:  (B6,D10,E10,H10,H11) , " &
     "vddshv3			:  (B23,D16,D22,E16,E22,G15,H15,H16,H18,H19) , " &
     "vddshv4			:  C24 , " &
     "vddshv5			:  V12 , " &
     "vddshv6			:  (AD5,AD7,AE7,AF5) , " &
     "vddshv7			:  (AB6,AB7) , " &
     "vddshv8			:  (W8,Y8) , " &
     "vddshv9			:  (U10,W4,W5) , " &

     "vpp			:  K14 , " &

     "vss			:  (A1,A2,A6,A14,A23,A28,B1,D13,D19,E13,E19,F1,F7,G7,G8,G9,H12,J12,J15,J28,K1,K4,K5,K15,K24,K25,L13,L14,M19,N14,N15,N19,N24,N25,P28,R1,R12,R13,R15,R21,T10,T11,T12,T14,T15,T17,T18,T21,U15,U17,U20,U21,V15,V17,W1,W15,W24,W25,W28,AA8,AA9,AA10,AA14,AA15,AA20,AB14,AB20,AD1,AD24,AG1,AH1,AH2,AH8,AH20,AH28) , " &
     "vssa_hdmi			:  (AD19,AE19) , " &
     "vssa_osc0			:  AF15 , " &
     "vssa_osc1			:  AC14 , " &
     "vssa_pcie			:  (AD13,AE13) , " &
     "vssa_sata			:  AE10 , " &
     "vssa_usb			:  (AA11,AB11) , " &
     "vssa_usb3			:  AD10 , " &
     "vssa_video		:  U14 " ;


      attribute PORT_GROUPING of DRA74x75x_top : entity is
      "Differential_Voltage  ( (mlbp_dat_p,mlbp_dat_n)," &
      "(mlbp_sig_p,mlbp_sig_n))" ;
--	"(ddr1_dqs1,ddr1_dqsn1)," &
--	"(ddr1_dqs2,ddr1_dqsn2)," &
--	"(ddr1_dqs3,ddr1_dqsn3)," &
--	"(ddr1_dqs_ecc,ddr1_dqsn_ecc)," &
--	"(ddr2_dqs0,ddr2_dqsn0)," &
--	"(ddr2_dqs1,ddr2_dqsn1)," &
--	"(ddr2_dqs2,ddr2_dqsn2)," &
--	"(ddr2_dqs3,ddr2_dqsn3))" ;
    attribute TAP_SCAN_IN of tdi : signal is true; 
    attribute TAP_SCAN_MODE of tms : signal is true; 
    attribute TAP_SCAN_OUT of tdo : signal is true; 
    attribute TAP_SCAN_CLOCK of tclk : signal is (5.00000000e+06, BOTH); 

    attribute TAP_SCAN_RESET of trstn : signal is true; 

    attribute COMPLIANCE_PATTERNS of DRA74x75x_top : entity is
        "( " &
--        "    emu0, " &
--        "    emu1) " &
--        "    trstn, " &
        "    porz) " &
        "    (1)";

   attribute INSTRUCTION_LENGTH of DRA74x75x_top : entity is 6; 
    attribute INSTRUCTION_OPCODE of DRA74x75x_top : entity is 
      "extest (011000),"  & 
      "idcode (000100),"  & 
      "bypass (111111),"  & 
      "sample (011011),"  & 
      "preload (011100),"  &
      "intest (011001), " & 
      "extest_pulse(100100),"	      &
      "extest_train(100101),"	      &
      "ir_opc_bypass_rsv00(000000),"  &
      "ir_opc_bypass_rsv01(000001),"  &
      "ir_opc_router(000010),"        &
      "ir_opc_bypass_rsv02(000011),"  &
      "ir_opc_icepidcode(000101),"    &
      "ir_opc_bypass_rsv03(000110),"  &
      "ir_opc_conpub(000111),"        &
      "ir_opc_chipspinid(001000),"    &
      "ir_opc_condbypass48(001001),"  &
      "ir_opc_condbypass49(001010),"  &
      "ir_opc_condbypass50(001011),"  &
      "ir_opc_condbypass51(001100),"  &
      "ir_opc_condbypass52(001101),"  &
      "ir_opc_condbypass53(001110),"  &
      "ir_opc_condbypass54(001111),"  &
      "ir_opc_condbypass00(010000),"  &
      "ir_opc_condbypass01(010001),"  &
      "ir_opc_condbypass02(010010),"  &
      "ir_opc_condbypass03(010011),"  &
      "ir_opc_condbypass04(010100),"  &
      "ir_opc_condbypass05(010101),"  &
      "ir_opc_condbypass06(010110),"  &
      "ir_opc_condbypass07(010111),"  &
      "ir_opc_condbypass10(011010),"  &
      "ir_opc_condbypass13(011101),"  &
      "ir_opc_condbypass14(011110),"  &
      "ir_opc_condbypass15(011111),"  &
      "ir_opc_condbypass16(100000),"  &
      "ir_opc_condbypass17(100001),"  &
      "ir_opc_condbypass18(100010),"  &
      "ir_opc_condbypass19(100011),"  &
      "ir_opc_condbypass22(100110),"  &
      "ir_opc_condbypass23(100111),"  &
      "ir_opc_condbypass24(101000),"  &
      "ir_opc_condbypass25(101001),"  &
      "ir_opc_condbypass26(101010),"  &
      "ir_opc_condbypass27(101011),"  &
      "ir_opc_condbypass28(101100),"  &
      "ir_opc_condbypass29(101101),"  &
      "ir_opc_condbypass30(101110),"  &
      "ir_opc_condbypass31(101111),"  &
      "ir_opc_condbypass32(110000),"  &
      "ir_opc_condbypass33(110001),"  &
      "ir_opc_condbypass34(110010),"  &
      "ir_opc_condbypass35(110011),"  &
      "ir_opc_condbypass36(110100),"  &
      "ir_opc_condbypass37(110101),"  &
      "ir_opc_condbypass38(110110),"  &
      "ir_opc_condbypass39(110111),"  &
      "ir_opc_condbypass40(111000),"  &
      "ir_opc_condbypass41(111001),"  &
      "ir_opc_condbypass42(111010),"  &
      "ir_opc_condbypass43(111011),"  &
      "ir_opc_condbypass44(111100),"  &
      "ir_opc_condbypass45(111101),"  &
      "ir_opc_condbypass46(111110)" ; 
       

    attribute INSTRUCTION_CAPTURE of DRA74x75x_top : entity is "000001"; 

    attribute INSTRUCTION_PRIVATE of DRA74x75x_top : entity is 
                "extest_train,"  &
                "extest_pulse,"  &
                "ir_opc_bypass_rsv00,"  &
                "ir_opc_bypass_rsv01,"  &
                "ir_opc_router,"        &
                "ir_opc_bypass_rsv02,"  &
                "ir_opc_icepidcode,"    &
                "ir_opc_bypass_rsv03,"  &
                "ir_opc_conpub,"        &
                "ir_opc_chipspinid,"    &
                "ir_opc_condbypass48,"  &
                "ir_opc_condbypass49,"  &
                "ir_opc_condbypass50,"  &
                "ir_opc_condbypass51,"  &
                "ir_opc_condbypass52,"  &
                "ir_opc_condbypass53,"  &
                "ir_opc_condbypass54,"  &
                "ir_opc_condbypass00,"  &
                "ir_opc_condbypass01,"  &
                "ir_opc_condbypass02,"  &
                "ir_opc_condbypass03,"  &
                "ir_opc_condbypass04,"  &
                "ir_opc_condbypass05,"  &
                "ir_opc_condbypass06,"  &
                "ir_opc_condbypass07,"  &
                "ir_opc_condbypass10,"  &
                "ir_opc_condbypass13,"  &
                "ir_opc_condbypass14,"  &
                "ir_opc_condbypass15,"  &
                "ir_opc_condbypass16,"  &
                "ir_opc_condbypass17,"  &
                "ir_opc_condbypass18,"  &
                "ir_opc_condbypass19,"  &
                "ir_opc_condbypass22,"  &
                "ir_opc_condbypass23,"  &
                "ir_opc_condbypass24,"  &
                "ir_opc_condbypass25,"  &
                "ir_opc_condbypass26,"  &
                "ir_opc_condbypass27,"  &
                "ir_opc_condbypass28,"  &
                "ir_opc_condbypass29,"  &
                "ir_opc_condbypass30,"  &
                "ir_opc_condbypass31,"  &
                "ir_opc_condbypass32,"  &
                "ir_opc_condbypass33,"  &
                "ir_opc_condbypass34,"  &
                "ir_opc_condbypass35,"  &
                "ir_opc_condbypass36,"  &
                "ir_opc_condbypass37,"  &
                "ir_opc_condbypass38,"  &
                "ir_opc_condbypass39,"  &
                "ir_opc_condbypass40,"  &
                "ir_opc_condbypass41,"  &
                "ir_opc_condbypass42,"  &
                "ir_opc_condbypass43,"  &
                "ir_opc_condbypass44,"  &
                "ir_opc_condbypass45,"  &
                "ir_opc_condbypass46";
  
    attribute INSTRUCTION_CAPTURE of DRA74x75x_top : entity is "000001"; 

-----------------
-- Device ID Code
-----------------

	attribute IDCODE_REGISTER of DRA74x75x_top : entity is
	-- version, part number, manufacturer code of ti, lsb
	"0000" &
	"1011100110010000" &
	"00000010111" &
	"1";


    attribute REGISTER_ACCESS of DRA74x75x_top : entity is 
        "BOUNDARY (extest,sample,preload, intest), " & 
        "BYPASS (bypass)"; 

    attribute BOUNDARY_LENGTH of DRA74x75x_top : entity is 1500;
    attribute BOUNDARY_REGISTER of DRA74x75x_top : entity is
------------------------------------------------------------------------ 
--     CELL    CELL       PIN            CELL     SAFE  CNTRL DIS  DIS 
--      #      NAME ,     NAME          ,TYPE    ,VALU ,CELL ,ABLE,VAL 
------------------------------------------------------------------------
"0   (bc_1, rstoutn,	output3, X, 1, 1, Z)," &
"1   (bc_1, *,	control, 1)," &
"2   (bc_1, rstoutn,	input, X)," &
"3   (bc_1, *,	internal, 0)," &
"4   (bc_1, *,	internal, 0)," &
"5   (bc_1, nmin,	input, X)," &
"6   (bc_1, resetn,	output3, X, 7, 1, Z)," &
"7   (bc_1, *,	control, 1)," &
"8   (bc_1, resetn,	input, X)," &
"9   (bc_1, emu1,	output3, X, 10, 1, Z)," &
"10   (bc_1, *,	control, 1)," &
"11   (bc_1, emu1,	input, X)," &
"12   (bc_1, emu0,	output3, X, 13, 1, Z)," &
"13   (bc_1, *,	control, 1)," &
"14   (bc_1, emu0,	input, X)," &
"15   (bc_1, rtck,	output3, X, 16, 1, Z)," &
"16   (bc_1, *,	control, 1)," &
"17   (bc_1, rtck,	input, X)," &
"18   (bc_1, i2c2_scl,	output2, 1, 18, 1, weak1)," &
"19   (bc_1, *,	internal, 0)," &
"20   (bc_1, i2c2_scl,	input, X)," &
"21   (bc_1, i2c2_sda,	output2, 1, 21, 1, weak1)," &
"22   (bc_1, *,	internal, 0)," &
"23   (bc_1, i2c2_sda,	input, X)," &
"24   (bc_1, i2c1_scl,	output2, 1, 24, 1, weak1)," &
"25   (bc_1, *,	internal, 0)," &
"26   (bc_1, i2c1_scl,	input, X)," &
"27   (bc_1, i2c1_sda,	output2, 1, 27, 1, weak1)," &
"28   (bc_1, *,	internal, 0)," &
"29   (bc_1, i2c1_sda,	input, X)," &
"30   (bc_1, uart2_rtsn,	output3, X, 31, 1, Z)," &
"31   (bc_1, *,	control, 1)," &
"32   (bc_1, uart2_rtsn,	input, X)," &
"33   (bc_1, uart2_ctsn,	output3, X, 34, 1, Z)," &
"34   (bc_1, *,	control, 1)," &
"35   (bc_1, uart2_ctsn,	input, X)," &
"36   (bc_1, uart2_txd,	output3, X, 37, 1, Z)," &
"37   (bc_1, *,	control, 1)," &
"38   (bc_1, uart2_txd,	input, X)," &
"39   (bc_1, uart2_rxd,	output3, X, 40, 1, Z)," &
"40   (bc_1, *,	control, 1)," &
"41   (bc_1, uart2_rxd,	input, X)," &
"42   (bc_1, uart1_rtsn,	output3, X, 43, 1, Z)," &
"43   (bc_1, *,	control, 1)," &
"44   (bc_1, uart1_rtsn,	input, X)," &
"45   (bc_1, uart1_ctsn,	output3, X, 46, 1, Z)," &
"46   (bc_1, *,	control, 1)," &
"47   (bc_1, uart1_ctsn,	input, X)," &
"48   (bc_1, uart1_txd,	output3, X, 49, 1, Z)," &
"49   (bc_1, *,	control, 1)," &
"50   (bc_1, uart1_txd,	input, X)," &
"51   (bc_1, uart1_rxd,	output3, X, 52, 1, Z)," &
"52   (bc_1, *,	control, 1)," &
"53   (bc_1, uart1_rxd,	input, X)," &
"54   (bc_1, dcan1_rx,	output3, X, 55, 1, Z)," &
"55   (bc_1, *,	control, 1)," &
"56   (bc_1, dcan1_rx,	input, X)," &
"57   (bc_1, dcan1_tx,	output3, X, 58, 1, Z)," &
"58   (bc_1, *,	control, 1)," &
"59   (bc_1, dcan1_tx,	input, X)," &
"60   (bc_1, spi2_cs0,	output3, X, 61, 1, Z)," &
"61   (bc_1, *,	control, 1)," &
"62   (bc_1, spi2_cs0,	input, X)," &
"63   (bc_1, spi2_d0,	output3, X, 64, 1, Z)," &
"64   (bc_1, *,	control, 1)," &
"65   (bc_1, spi2_d0,	input, X)," &
"66   (bc_1, spi2_d1,	output3, X, 67, 1, Z)," &
"67   (bc_1, *,	control, 1)," &
"68   (bc_1, spi2_d1,	input, X)," &
"69   (bc_1, spi2_sclk,	output3, X, 70, 1, Z)," &
"70   (bc_1, *,	control, 1)," &
"71   (bc_1, spi2_sclk,	input, X)," &
"72   (bc_1, spi1_cs3,	output3, X, 73, 1, Z)," &
"73   (bc_1, *,	control, 1)," &
"74   (bc_1, spi1_cs3,	input, X)," &
"75   (bc_1, spi1_cs2,	output3, X, 76, 1, Z)," &
"76   (bc_1, *,	control, 1)," &
"77   (bc_1, spi1_cs2,	input, X)," &
"78   (bc_1, spi1_cs1,	output3, X, 79, 1, Z)," &
"79   (bc_1, *,	control, 1)," &
"80   (bc_1, spi1_cs1,	input, X)," &
"81   (bc_1, spi1_cs0,	output3, X, 82, 1, Z)," &
"82   (bc_1, *,	control, 1)," &
"83   (bc_1, spi1_cs0,	input, X)," &
"84   (bc_1, spi1_d0,	output3, X, 85, 1, Z)," &
"85   (bc_1, *,	control, 1)," &
"86   (bc_1, spi1_d0,	input, X)," &
"87   (bc_1, spi1_d1,	output3, X, 88, 1, Z)," &
"88   (bc_1, *,	control, 1)," &
"89   (bc_1, spi1_d1,	input, X)," &
"90   (bc_1, spi1_sclk,	output3, X, 91, 1, Z)," &
"91   (bc_1, *,	control, 1)," &
"92   (bc_1, spi1_sclk,	input, X)," &
"93   (bc_1, mmc3_dat7,	output3, X, 94, 1, Z)," &
"94   (bc_1, *,	control, 1)," &
"95   (bc_1, mmc3_dat7,	input, X)," &
"96   (bc_1, mmc3_dat6,	output3, X, 97, 1, Z)," &
"97   (bc_1, *,	control, 1)," &
"98   (bc_1, mmc3_dat6,	input, X)," &
"99   (bc_1, mmc3_dat5,	output3, X, 100, 1, Z)," &
"100   (bc_1, *,	control, 1)," &
"101   (bc_1, mmc3_dat5,	input, X)," &
"102   (bc_1, mmc3_dat4,	output3, X, 103, 1, Z)," &
"103   (bc_1, *,	control, 1)," &
"104   (bc_1, mmc3_dat4,	input, X)," &
"105   (bc_1, mmc3_dat3,	output3, X, 106, 1, Z)," &
"106   (bc_1, *,	control, 1)," &
"107   (bc_1, mmc3_dat3,	input, X)," &
"108   (bc_1, mmc3_dat2,	output3, X, 109, 1, Z)," &
"109   (bc_1, *,	control, 1)," &
"110   (bc_1, mmc3_dat2,	input, X)," &
"111   (bc_1, mmc3_dat1,	output3, X, 112, 1, Z)," &
"112   (bc_1, *,	control, 1)," &
"113   (bc_1, mmc3_dat1,	input, X)," &
"114   (bc_1, mmc3_dat0,	output3, X, 115, 1, Z)," &
"115   (bc_1, *,	control, 1)," &
"116   (bc_1, mmc3_dat0,	input, X)," &
"117   (bc_1, mmc3_cmd,	output3, X, 118, 1, Z)," &
"118   (bc_1, *,	control, 1)," &
"119   (bc_1, mmc3_cmd,	input, X)," &
"120   (bc_1, mmc3_clk,	output3, X, 121, 1, Z)," &
"121   (bc_1, *,	control, 1)," &
"122   (bc_1, mmc3_clk,	input, X)," &
"123   (bc_1, gpio6_11,	output3, X, 124, 1, Z)," &
"124   (bc_1, *,	control, 1)," &
"125   (bc_1, gpio6_11,	input, X)," &
"126   (bc_1, gpio6_10,	output3, X, 127, 1, Z)," &
"127   (bc_1, *,	control, 1)," &
"128   (bc_1, gpio6_10,	input, X)," &
"129   (bc_1, mmc1_sdwp,	output3, X, 130, 1, Z)," &
"130   (bc_1, *,	control, 1)," &
"131   (bc_1, mmc1_sdwp,	input, X)," &
"132   (bc_1, mmc1_sdcd,	output3, X, 133, 1, Z)," &
"133   (bc_1, *,	control, 1)," &
"134   (bc_1, mmc1_sdcd,	input, X)," &
"135   (bc_1, mmc1_dat3,	output3, X, 136, 1, Z)," &
"136   (bc_1, *,	control, 1)," &
"137   (bc_1, mmc1_dat3,	input, X)," &
"138   (bc_1, mmc1_dat2,	output3, X, 139, 1, Z)," &
"139   (bc_1, *,	control, 1)," &
"140   (bc_1, mmc1_dat2,	input, X)," &
"141   (bc_1, mmc1_dat1,	output3, X, 142, 1, Z)," &
"142   (bc_1, *,	control, 1)," &
"143   (bc_1, mmc1_dat1,	input, X)," &
"144   (bc_1, mmc1_dat0,	output3, X, 145, 1, Z)," &
"145   (bc_1, *,	control, 1)," &
"146   (bc_1, mmc1_dat0,	input, X)," &
"147   (bc_1, mmc1_cmd,	output3, X, 148, 1, Z)," &
"148   (bc_1, *,	control, 1)," &
"149   (bc_1, mmc1_cmd,	input, X)," &
"150   (bc_1, mmc1_clk,	output3, X, 151, 1, Z)," &
"151   (bc_1, *,	control, 1)," &
"152   (bc_1, mmc1_clk,	input, X)," &
"153   (bc_1, mcasp5_axr1,	output3, X, 154, 1, Z)," &
"154   (bc_1, *,	control, 1)," &
"155   (bc_1, mcasp5_axr1,	input, X)," &
"156   (bc_1, mcasp5_axr0,	output3, X, 157, 1, Z)," &
"157   (bc_1, *,	control, 1)," &
"158   (bc_1, mcasp5_axr0,	input, X)," &
"159   (bc_1, mcasp5_fsx,	output3, X, 160, 1, Z)," &
"160   (bc_1, *,	control, 1)," &
"161   (bc_1, mcasp5_fsx,	input, X)," &
"162   (bc_1, mcasp5_aclkx,	output3, X, 163, 1, Z)," &
"163   (bc_1, *,	control, 1)," &
"164   (bc_1, mcasp5_aclkx,	input, X)," &
"165   (bc_1, mcasp4_axr1,	output3, X, 166, 1, Z)," &
"166   (bc_1, *,	control, 1)," &
"167   (bc_1, mcasp4_axr1,	input, X)," &
"168   (bc_1, mcasp4_axr0,	output3, X, 169, 1, Z)," &
"169   (bc_1, *,	control, 1)," &
"170   (bc_1, mcasp4_axr0,	input, X)," &
"171   (bc_1, mcasp4_fsx,	output3, X, 172, 1, Z)," &
"172   (bc_1, *,	control, 1)," &
"173   (bc_1, mcasp4_fsx,	input, X)," &
"174   (bc_1, mcasp4_aclkx,	output3, X, 175, 1, Z)," &
"175   (bc_1, *,	control, 1)," &
"176   (bc_1, mcasp4_aclkx,	input, X)," &
"177   (bc_1, mcasp3_axr1,	output3, X, 178, 1, Z)," &
"178   (bc_1, *,	control, 1)," &
"179   (bc_1, mcasp3_axr1,	input, X)," &
"180   (bc_1, mcasp3_axr0,	output3, X, 181, 1, Z)," &
"181   (bc_1, *,	control, 1)," &
"182   (bc_1, mcasp3_axr0,	input, X)," &
"183   (bc_1, mcasp3_fsx,	output3, X, 184, 1, Z)," &
"184   (bc_1, *,	control, 1)," &
"185   (bc_1, mcasp3_fsx,	input, X)," &
"186   (bc_1, mcasp3_aclkx,	output3, X, 187, 1, Z)," &
"187   (bc_1, *,	control, 1)," &
"188   (bc_1, mcasp3_aclkx,	input, X)," &
"189   (bc_1, mcasp2_axr7,	output3, X, 190, 1, Z)," &
"190   (bc_1, *,	control, 1)," &
"191   (bc_1, mcasp2_axr7,	input, X)," &
"192   (bc_1, mcasp2_axr6,	output3, X, 193, 1, Z)," &
"193   (bc_1, *,	control, 1)," &
"194   (bc_1, mcasp2_axr6,	input, X)," &
"195   (bc_1, mcasp2_axr5,	output3, X, 196, 1, Z)," &
"196   (bc_1, *,	control, 1)," &
"197   (bc_1, mcasp2_axr5,	input, X)," &
"198   (bc_1, mcasp2_axr4,	output3, X, 199, 1, Z)," &
"199   (bc_1, *,	control, 1)," &
"200   (bc_1, mcasp2_axr4,	input, X)," &
"201   (bc_1, mcasp2_axr3,	output3, X, 202, 1, Z)," &
"202   (bc_1, *,	control, 1)," &
"203   (bc_1, mcasp2_axr3,	input, X)," &
"204   (bc_1, mcasp2_axr2,	output3, X, 205, 1, Z)," &
"205   (bc_1, *,	control, 1)," &
"206   (bc_1, mcasp2_axr2,	input, X)," &
"207   (bc_1, mcasp2_axr1,	output3, X, 208, 1, Z)," &
"208   (bc_1, *,	control, 1)," &
"209   (bc_1, mcasp2_axr1,	input, X)," &
"210   (bc_1, mcasp2_axr0,	output3, X, 211, 1, Z)," &
"211   (bc_1, *,	control, 1)," &
"212   (bc_1, mcasp2_axr0,	input, X)," &
"213   (bc_1, mcasp2_fsr,	output3, X, 214, 1, Z)," &
"214   (bc_1, *,	control, 1)," &
"215   (bc_1, mcasp2_fsr,	input, X)," &
"216   (bc_1, mcasp2_aclkr,	output3, X, 217, 1, Z)," &
"217   (bc_1, *,	control, 1)," &
"218   (bc_1, mcasp2_aclkr,	input, X)," &
"219   (bc_1, mcasp2_fsx,	output3, X, 220, 1, Z)," &
"220   (bc_1, *,	control, 1)," &
"221   (bc_1, mcasp2_fsx,	input, X)," &
"222   (bc_1, mcasp2_aclkx,	output3, X, 223, 1, Z)," &
"223   (bc_1, *,	control, 1)," &
"224   (bc_1, mcasp2_aclkx,	input, X)," &
"225   (bc_1, mcasp1_axr15,	output3, X, 226, 1, Z)," &
"226   (bc_1, *,	control, 1)," &
"227   (bc_1, mcasp1_axr15,	input, X)," &
"228   (bc_1, mcasp1_axr14,	output3, X, 229, 1, Z)," &
"229   (bc_1, *,	control, 1)," &
"230   (bc_1, mcasp1_axr14,	input, X)," &
"231   (bc_1, mcasp1_axr13,	output3, X, 232, 1, Z)," &
"232   (bc_1, *,	control, 1)," &
"233   (bc_1, mcasp1_axr13,	input, X)," &
"234   (bc_1, mcasp1_axr12,	output3, X, 235, 1, Z)," &
"235   (bc_1, *,	control, 1)," &
"236   (bc_1, mcasp1_axr12,	input, X)," &
"237   (bc_1, mcasp1_axr11,	output3, X, 238, 1, Z)," &
"238   (bc_1, *,	control, 1)," &
"239   (bc_1, mcasp1_axr11,	input, X)," &
"240   (bc_1, mcasp1_axr10,	output3, X, 241, 1, Z)," &
"241   (bc_1, *,	control, 1)," &
"242   (bc_1, mcasp1_axr10,	input, X)," &
"243   (bc_1, mcasp1_axr9,	output3, X, 244, 1, Z)," &
"244   (bc_1, *,	control, 1)," &
"245   (bc_1, mcasp1_axr9,	input, X)," &
"246   (bc_1, mcasp1_axr8,	output3, X, 247, 1, Z)," &
"247   (bc_1, *,	control, 1)," &
"248   (bc_1, mcasp1_axr8,	input, X)," &
"249   (bc_1, mcasp1_axr7,	output3, X, 250, 1, Z)," &
"250   (bc_1, *,	control, 1)," &
"251   (bc_1, mcasp1_axr7,	input, X)," &
"252   (bc_1, mcasp1_axr6,	output3, X, 253, 1, Z)," &
"253   (bc_1, *,	control, 1)," &
"254   (bc_1, mcasp1_axr6,	input, X)," &
"255   (bc_1, mcasp1_axr5,	output3, X, 256, 1, Z)," &
"256   (bc_1, *,	control, 1)," &
"257   (bc_1, mcasp1_axr5,	input, X)," &
"258   (bc_1, mcasp1_axr4,	output3, X, 259, 1, Z)," &
"259   (bc_1, *,	control, 1)," &
"260   (bc_1, mcasp1_axr4,	input, X)," &
"261   (bc_1, mcasp1_axr3,	output3, X, 262, 1, Z)," &
"262   (bc_1, *,	control, 1)," &
"263   (bc_1, mcasp1_axr3,	input, X)," &
"264   (bc_1, mcasp1_axr2,	output3, X, 265, 1, Z)," &
"265   (bc_1, *,	control, 1)," &
"266   (bc_1, mcasp1_axr2,	input, X)," &
"267   (bc_1, mcasp1_axr1,	output3, X, 268, 1, Z)," &
"268   (bc_1, *,	control, 1)," &
"269   (bc_1, mcasp1_axr1,	input, X)," &
"270   (bc_1, mcasp1_axr0,	output3, X, 271, 1, Z)," &
"271   (bc_1, *,	control, 1)," &
"272   (bc_1, mcasp1_axr0,	input, X)," &
"273   (bc_1, mcasp1_fsr,	output3, X, 274, 1, Z)," &
"274   (bc_1, *,	control, 1)," &
"275   (bc_1, mcasp1_fsr,	input, X)," &
"276   (bc_1, mcasp1_aclkr,	output3, X, 277, 1, Z)," &
"277   (bc_1, *,	control, 1)," &
"278   (bc_1, mcasp1_aclkr,	input, X)," &
"279   (bc_1, mcasp1_fsx,	output3, X, 280, 1, Z)," &
"280   (bc_1, *,	control, 1)," &
"281   (bc_1, mcasp1_fsx,	input, X)," &
"282   (bc_1, mcasp1_aclkx,	output3, X, 283, 1, Z)," &
"283   (bc_1, *,	control, 1)," &
"284   (bc_1, mcasp1_aclkx,	input, X)," &
"285   (bc_1, xref_clk3,	output3, X, 286, 1, Z)," &
"286   (bc_1, *,	control, 1)," &
"287   (bc_1, xref_clk3,	input, X)," &
"288   (bc_1, xref_clk2,	output3, X, 289, 1, Z)," &
"289   (bc_1, *,	control, 1)," &
"290   (bc_1, xref_clk2,	input, X)," &
"291   (bc_1, xref_clk1,	output3, X, 292, 1, Z)," &
"292   (bc_1, *,	control, 1)," &
"293   (bc_1, xref_clk1,	input, X)," &
"294   (bc_1, xref_clk0,	output3, X, 295, 1, Z)," &
"295   (bc_1, *,	control, 1)," &
"296   (bc_1, xref_clk0,	input, X)," &
"297   (bc_1, *,	internal, 0)," &
"298   (bc_1, *,	internal, 0)," &
"299   (bc_1, *,	internal, 0)," &
"300   (bc_1, mlbp_dat_p,	output3, X, 301, 1, Z)," &
"301   (bc_1, *,	control, 1)," &
"302   (bc_1, mlbp_dat_p,	input, X)," &
"303   (bc_1, *,	internal, 0)," &
"304   (bc_1, *,	internal, 0)," &
"305   (bc_1, *,	internal, 0)," &
"306   (bc_1, mlbp_sig_p,	output3, X, 307, 1, Z)," &
"307   (bc_1, *,	control, 1)," &
"308   (bc_1, mlbp_sig_p,	input, X)," &
"309   (bc_1, gpio6_16,	output3, X, 310, 1, Z)," &
"310   (bc_1, *,	control, 1)," &
"311   (bc_1, gpio6_16,	input, X)," &
"312   (bc_1, gpio6_15,	output3, X, 313, 1, Z)," &
"313   (bc_1, *,	control, 1)," &
"314   (bc_1, gpio6_15,	input, X)," &
"315   (bc_1, gpio6_14,	output3, X, 316, 1, Z)," &
"316   (bc_1, *,	control, 1)," &
"317   (bc_1, gpio6_14,	input, X)," &
"318   (bc_1, usb2_drvvbus,	output3, X, 319, 1, Z)," &
"319   (bc_1, *,	control, 1)," &
"320   (bc_1, usb2_drvvbus,	input, X)," &
"321   (bc_1, usb1_drvvbus,	output3, X, 322, 1, Z)," &
"322   (bc_1, *,	control, 1)," &
"323   (bc_1, usb1_drvvbus,	input, X)," &
"324   (bc_1, rgmii0_rxd0,	output3, X, 325, 1, Z)," &
"325   (bc_1, *,	control, 1)," &
"326   (bc_1, rgmii0_rxd0,	input, X)," &
"327   (bc_1, rgmii0_rxd1,	output3, X, 328, 1, Z)," &
"328   (bc_1, *,	control, 1)," &
"329   (bc_1, rgmii0_rxd1,	input, X)," &
"330   (bc_1, rgmii0_rxd2,	output3, X, 331, 1, Z)," &
"331   (bc_1, *,	control, 1)," &
"332   (bc_1, rgmii0_rxd2,	input, X)," &
"333   (bc_1, rgmii0_rxd3,	output3, X, 334, 1, Z)," &
"334   (bc_1, *,	control, 1)," &
"335   (bc_1, rgmii0_rxd3,	input, X)," &
"336   (bc_1, rgmii0_rxctl,	output3, X, 337, 1, Z)," &
"337   (bc_1, *,	control, 1)," &
"338   (bc_1, rgmii0_rxctl,	input, X)," &
"339   (bc_1, rgmii0_rxc,	output3, X, 340, 1, Z)," &
"340   (bc_1, *,	control, 1)," &
"341   (bc_1, rgmii0_rxc,	input, X)," &
"342   (bc_1, rgmii0_txd0,	output3, X, 343, 1, Z)," &
"343   (bc_1, *,	control, 1)," &
"344   (bc_1, rgmii0_txd0,	input, X)," &
"345   (bc_1, rgmii0_txd1,	output3, X, 346, 1, Z)," &
"346   (bc_1, *,	control, 1)," &
"347   (bc_1, rgmii0_txd1,	input, X)," &
"348   (bc_1, rgmii0_txd2,	output3, X, 349, 1, Z)," &
"349   (bc_1, *,	control, 1)," &
"350   (bc_1, rgmii0_txd2,	input, X)," &
"351   (bc_1, rgmii0_txd3,	output3, X, 352, 1, Z)," &
"352   (bc_1, *,	control, 1)," &
"353   (bc_1, rgmii0_txd3,	input, X)," &
"354   (bc_1, rgmii0_txctl,	output3, X, 355, 1, Z)," &
"355   (bc_1, *,	control, 1)," &
"356   (bc_1, rgmii0_txctl,	input, X)," &
"357   (bc_1, rgmii0_txc,	output3, X, 358, 1, Z)," &
"358   (bc_1, *,	control, 1)," &
"359   (bc_1, rgmii0_txc,	input, X)," &
"360   (bc_1, uart3_txd,	output3, X, 361, 1, Z)," &
"361   (bc_1, *,	control, 1)," &
"362   (bc_1, uart3_txd,	input, X)," &
"363   (bc_1, uart3_rxd,	output3, X, 364, 1, Z)," &
"364   (bc_1, *,	control, 1)," &
"365   (bc_1, uart3_rxd,	input, X)," &
"366   (bc_1, RMII_MHZ_50_CLK,	output3, X, 367, 1, Z)," &
"367   (bc_1, *,	control, 1)," &
"368   (bc_1, RMII_MHZ_50_CLK,	input, X)," &
"369   (bc_1, mdio_d,	output3, X, 370, 1, Z)," &
"370   (bc_1, *,	control, 1)," &
"371   (bc_1, mdio_d,	input, X)," &
"372   (bc_1, mdio_mclk,	output3, X, 373, 1, Z)," &
"373   (bc_1, *,	control, 1)," &
"374   (bc_1, mdio_mclk,	input, X)," &
"375   (bc_1, vout1_d23,	output3, X, 376, 1, Z)," &
"376   (bc_1, *,	control, 1)," &
"377   (bc_1, vout1_d23,	input, X)," &
"378   (bc_1, vout1_d22,	output3, X, 379, 1, Z)," &
"379   (bc_1, *,	control, 1)," &
"380   (bc_1, vout1_d22,	input, X)," &
"381   (bc_1, vout1_d21,	output3, X, 382, 1, Z)," &
"382   (bc_1, *,	control, 1)," &
"383   (bc_1, vout1_d21,	input, X)," &
"384   (bc_1, vout1_d20,	output3, X, 385, 1, Z)," &
"385   (bc_1, *,	control, 1)," &
"386   (bc_1, vout1_d20,	input, X)," &
"387   (bc_1, vout1_d19,	output3, X, 388, 1, Z)," &
"388   (bc_1, *,	control, 1)," &
"389   (bc_1, vout1_d19,	input, X)," &
"390   (bc_1, vout1_d18,	output3, X, 391, 1, Z)," &
"391   (bc_1, *,	control, 1)," &
"392   (bc_1, vout1_d18,	input, X)," &
"393   (bc_1, vout1_d17,	output3, X, 394, 1, Z)," &
"394   (bc_1, *,	control, 1)," &
"395   (bc_1, vout1_d17,	input, X)," &
"396   (bc_1, vout1_d16,	output3, X, 397, 1, Z)," &
"397   (bc_1, *,	control, 1)," &
"398   (bc_1, vout1_d16,	input, X)," &
"399   (bc_1, vout1_d15,	output3, X, 400, 1, Z)," &
"400   (bc_1, *,	control, 1)," &
"401   (bc_1, vout1_d15,	input, X)," &
"402   (bc_1, vout1_d14,	output3, X, 403, 1, Z)," &
"403   (bc_1, *,	control, 1)," &
"404   (bc_1, vout1_d14,	input, X)," &
"405   (bc_1, vout1_d13,	output3, X, 406, 1, Z)," &
"406   (bc_1, *,	control, 1)," &
"407   (bc_1, vout1_d13,	input, X)," &
"408   (bc_1, vout1_d12,	output3, X, 409, 1, Z)," &
"409   (bc_1, *,	control, 1)," &
"410   (bc_1, vout1_d12,	input, X)," &
"411   (bc_1, vout1_d11,	output3, X, 412, 1, Z)," &
"412   (bc_1, *,	control, 1)," &
"413   (bc_1, vout1_d11,	input, X)," &
"414   (bc_1, vout1_d10,	output3, X, 415, 1, Z)," &
"415   (bc_1, *,	control, 1)," &
"416   (bc_1, vout1_d10,	input, X)," &
"417   (bc_1, vout1_d9,	output3, X, 418, 1, Z)," &
"418   (bc_1, *,	control, 1)," &
"419   (bc_1, vout1_d9,	input, X)," &
"420   (bc_1, vout1_d8,	output3, X, 421, 1, Z)," &
"421   (bc_1, *,	control, 1)," &
"422   (bc_1, vout1_d8,	input, X)," &
"423   (bc_1, vout1_d7,	output3, X, 424, 1, Z)," &
"424   (bc_1, *,	control, 1)," &
"425   (bc_1, vout1_d7,	input, X)," &
"426   (bc_1, vout1_d6,	output3, X, 427, 1, Z)," &
"427   (bc_1, *,	control, 1)," &
"428   (bc_1, vout1_d6,	input, X)," &
"429   (bc_1, vout1_d5,	output3, X, 430, 1, Z)," &
"430   (bc_1, *,	control, 1)," &
"431   (bc_1, vout1_d5,	input, X)," &
"432   (bc_1, vout1_d4,	output3, X, 433, 1, Z)," &
"433   (bc_1, *,	control, 1)," &
"434   (bc_1, vout1_d4,	input, X)," &
"435   (bc_1, vout1_d3,	output3, X, 436, 1, Z)," &
"436   (bc_1, *,	control, 1)," &
"437   (bc_1, vout1_d3,	input, X)," &
"438   (bc_1, vout1_d2,	output3, X, 439, 1, Z)," &
"439   (bc_1, *,	control, 1)," &
"440   (bc_1, vout1_d2,	input, X)," &
"441   (bc_1, vout1_d1,	output3, X, 442, 1, Z)," &
"442   (bc_1, *,	control, 1)," &
"443   (bc_1, vout1_d1,	input, X)," &
"444   (bc_1, vout1_d0,	output3, X, 445, 1, Z)," &
"445   (bc_1, *,	control, 1)," &
"446   (bc_1, vout1_d0,	input, X)," &
"447   (bc_1, vout1_vsync,	output3, X, 448, 1, Z)," &
"448   (bc_1, *,	control, 1)," &
"449   (bc_1, vout1_vsync,	input, X)," &
"450   (bc_1, vout1_hsync,	output3, X, 451, 1, Z)," &
"451   (bc_1, *,	control, 1)," &
"452   (bc_1, vout1_hsync,	input, X)," &
"453   (bc_1, vout1_fld,	output3, X, 454, 1, Z)," &
"454   (bc_1, *,	control, 1)," &
"455   (bc_1, vout1_fld,	input, X)," &
"456   (bc_1, vout1_de,	output3, X, 457, 1, Z)," &
"457   (bc_1, *,	control, 1)," &
"458   (bc_1, vout1_de,	input, X)," &
"459   (bc_1, vout1_clk,	output3, X, 460, 1, Z)," &
"460   (bc_1, *,	control, 1)," &
"461   (bc_1, vout1_clk,	input, X)," &
"462   (bc_1, vin2a_d23,	output3, X, 463, 1, Z)," &
"463   (bc_1, *,	control, 1)," &
"464   (bc_1, vin2a_d23,	input, X)," &
"465   (bc_1, vin2a_d22,	output3, X, 466, 1, Z)," &
"466   (bc_1, *,	control, 1)," &
"467   (bc_1, vin2a_d22,	input, X)," &
"468   (bc_1, vin2a_d21,	output3, X, 469, 1, Z)," &
"469   (bc_1, *,	control, 1)," &
"470   (bc_1, vin2a_d21,	input, X)," &
"471   (bc_1, vin2a_d20,	output3, X, 472, 1, Z)," &
"472   (bc_1, *,	control, 1)," &
"473   (bc_1, vin2a_d20,	input, X)," &
"474   (bc_1, vin2a_d19,	output3, X, 475, 1, Z)," &
"475   (bc_1, *,	control, 1)," &
"476   (bc_1, vin2a_d19,	input, X)," &
"477   (bc_1, vin2a_d18,	output3, X, 478, 1, Z)," &
"478   (bc_1, *,	control, 1)," &
"479   (bc_1, vin2a_d18,	input, X)," &
"480   (bc_1, vin2a_d17,	output3, X, 481, 1, Z)," &
"481   (bc_1, *,	control, 1)," &
"482   (bc_1, vin2a_d17,	input, X)," &
"483   (bc_1, vin2a_d16,	output3, X, 484, 1, Z)," &
"484   (bc_1, *,	control, 1)," &
"485   (bc_1, vin2a_d16,	input, X)," &
"486   (bc_1, vin2a_d15,	output3, X, 487, 1, Z)," &
"487   (bc_1, *,	control, 1)," &
"488   (bc_1, vin2a_d15,	input, X)," &
"489   (bc_1, vin2a_d14,	output3, X, 490, 1, Z)," &
"490   (bc_1, *,	control, 1)," &
"491   (bc_1, vin2a_d14,	input, X)," &
"492   (bc_1, vin2a_d13,	output3, X, 493, 1, Z)," &
"493   (bc_1, *,	control, 1)," &
"494   (bc_1, vin2a_d13,	input, X)," &
"495   (bc_1, vin2a_d12,	output3, X, 496, 1, Z)," &
"496   (bc_1, *,	control, 1)," &
"497   (bc_1, vin2a_d12,	input, X)," &
"498   (bc_1, vin2a_d11,	output3, X, 499, 1, Z)," &
"499  (bc_1, *,	control, 1)," &
"500    (bc_1, vin2a_d11,	input, X)," &
"501   (bc_1, vin2a_d10,	output3, X, 502, 1, Z)," &
"502   (bc_1, *,	control, 1)," &
"503   (bc_1, vin2a_d10,	input, X)," &
"504   (bc_1, vin2a_d9,	output3, X, 505, 1, Z)," &
"505   (bc_1, *,	control, 1)," &
"506   (bc_1, vin2a_d9,	input, X)," &
"507   (bc_1, vin2a_d8,	output3, X, 508, 1, Z)," &
"508   (bc_1, *,	control, 1)," &
"509   (bc_1, vin2a_d8,	input, X)," &
"510   (bc_1, vin2a_d7,	output3, X, 511, 1, Z)," &
"511   (bc_1, *,	control, 1)," &
"512   (bc_1, vin2a_d7,	input, X)," &
"513   (bc_1, vin2a_d6,	output3, X, 514, 1, Z)," &
"514   (bc_1, *,	control, 1)," &
"515   (bc_1, vin2a_d6,	input, X)," &
"516   (bc_1, vin2a_d5,	output3, X, 517, 1, Z)," &
"517   (bc_1, *,	control, 1)," &
"518   (bc_1, vin2a_d5,	input, X)," &
"519   (bc_1, vin2a_d4,	output3, X, 520, 1, Z)," &
"520   (bc_1, *,	control, 1)," &
"521   (bc_1, vin2a_d4,	input, X)," &
"522   (bc_1, vin2a_d3,	output3, X, 523, 1, Z)," &
"523   (bc_1, *,	control, 1)," &
"524   (bc_1, vin2a_d3,	input, X)," &
"525   (bc_1, vin2a_d2,	output3, X, 526, 1, Z)," &
"526   (bc_1, *,	control, 1)," &
"527   (bc_1, vin2a_d2,	input, X)," &
"528   (bc_1, vin2a_d1,	output3, X, 529, 1, Z)," &
"529   (bc_1, *,	control, 1)," &
"530   (bc_1, vin2a_d1,	input, X)," &
"531   (bc_1, vin2a_d0,	output3, X, 532, 1, Z)," &
"532   (bc_1, *,	control, 1)," &
"533   (bc_1, vin2a_d0,	input, X)," &
"534   (bc_1, vin2a_vsync0,	output3, X, 535, 1, Z)," &
"535   (bc_1, *,	control, 1)," &
"536   (bc_1, vin2a_vsync0,	input, X)," &
"537   (bc_1, vin2a_hsync0,	output3, X, 538, 1, Z)," &
"538   (bc_1, *,	control, 1)," &
"539   (bc_1, vin2a_hsync0,	input, X)," &
"540   (bc_1, vin2a_fld0,	output3, X, 541, 1, Z)," &
"541   (bc_1, *,	control, 1)," &
"542   (bc_1, vin2a_fld0,	input, X)," &
"543   (bc_1, vin2a_de0,	output3, X, 544, 1, Z)," &
"544   (bc_1, *,	control, 1)," &
"545   (bc_1, vin2a_de0,	input, X)," &
"546   (bc_1, vin2a_clk0,	output3, X, 547, 1, Z)," &
"547   (bc_1, *,	control, 1)," &
"548   (bc_1, vin2a_clk0,	input, X)," &
"549   (bc_1, vin1a_d23,	output3, X, 550, 1, Z)," &
"550   (bc_1, *,	control, 1)," &
"551   (bc_1, vin1a_d23,	input, X)," &
"552   (bc_1, vin1a_d22,	output3, X, 553, 1, Z)," &
"553   (bc_1, *,	control, 1)," &
"554   (bc_1, vin1a_d22,	input, X)," &
"555   (bc_1, vin1a_d21,	output3, X, 556, 1, Z)," &
"556   (bc_1, *,	control, 1)," &
"557   (bc_1, vin1a_d21,	input, X)," &
"558   (bc_1, vin1a_d20,	output3, X, 559, 1, Z)," &
"559   (bc_1, *,	control, 1)," &
"560   (bc_1, vin1a_d20,	input, X)," &
"561   (bc_1, vin1a_d19,	output3, X, 562, 1, Z)," &
"562   (bc_1, *,	control, 1)," &
"563   (bc_1, vin1a_d19,	input, X)," &
"564   (bc_1, vin1a_d18,	output3, X, 565, 1, Z)," &
"565   (bc_1, *,	control, 1)," &
"566   (bc_1, vin1a_d18,	input, X)," &
"567   (bc_1, vin1a_d17,	output3, X, 568, 1, Z)," &
"568   (bc_1, *,	control, 1)," &
"569   (bc_1, vin1a_d17,	input, X)," &
"570   (bc_1, vin1a_d16,	output3, X, 571, 1, Z)," &
"571   (bc_1, *,	control, 1)," &
"572   (bc_1, vin1a_d16,	input, X)," &
"573   (bc_1, vin1a_d15,	output3, X, 574, 1, Z)," &
"574   (bc_1, *,	control, 1)," &
"575   (bc_1, vin1a_d15,	input, X)," &
"576   (bc_1, vin1a_d14,	output3, X, 577, 1, Z)," &
"577   (bc_1, *,	control, 1)," &
"578   (bc_1, vin1a_d14,	input, X)," &
"579   (bc_1, vin1a_d13,	output3, X, 580, 1, Z)," &
"580   (bc_1, *,	control, 1)," &
"581   (bc_1, vin1a_d13,	input, X)," &
"582   (bc_1, vin1a_d12,	output3, X, 583, 1, Z)," &
"583   (bc_1, *,	control, 1)," &
"584   (bc_1, vin1a_d12,	input, X)," &
"585   (bc_1, vin1a_d11,	output3, X, 586, 1, Z)," &
"586   (bc_1, *,	control, 1)," &
"587   (bc_1, vin1a_d11,	input, X)," &
"588   (bc_1, vin1a_d10,	output3, X, 589, 1, Z)," &
"589   (bc_1, *,	control, 1)," &
"590   (bc_1, vin1a_d10,	input, X)," &
"591   (bc_1, vin1a_d9,	output3, X, 592, 1, Z)," &
"592   (bc_1, *,	control, 1)," &
"593   (bc_1, vin1a_d9,	input, X)," &
"594   (bc_1, vin1a_d8,	output3, X, 595, 1, Z)," &
"595   (bc_1, *,	control, 1)," &
"596   (bc_1, vin1a_d8,	input, X)," &
"597   (bc_1, vin1a_d7,	output3, X, 598, 1, Z)," &
"598   (bc_1, *,	control, 1)," &
"599   (bc_1, vin1a_d7,	input, X)," &
"600   (bc_1, vin1a_d6,	output3, X, 601, 1, Z)," &
"601   (bc_1, *,	control, 1)," &
"602   (bc_1, vin1a_d6,	input, X)," &
"603   (bc_1, vin1a_d5,	output3, X, 604, 1, Z)," &
"604   (bc_1, *,	control, 1)," &
"605   (bc_1, vin1a_d5,	input, X)," &
"606   (bc_1, vin1a_d4,	output3, X, 607, 1, Z)," &
"607   (bc_1, *,	control, 1)," &
"608   (bc_1, vin1a_d4,	input, X)," &
"609   (bc_1, vin1a_d3,	output3, X, 610, 1, Z)," &
"610   (bc_1, *,	control, 1)," &
"611   (bc_1, vin1a_d3,	input, X)," &
"612   (bc_1, vin1a_d2,	output3, X, 613, 1, Z)," &
"613   (bc_1, *,	control, 1)," &
"614   (bc_1, vin1a_d2,	input, X)," &
"615   (bc_1, vin1a_d1,	output3, X, 616, 1, Z)," &
"616   (bc_1, *,	control, 1)," &
"617   (bc_1, vin1a_d1,	input, X)," &
"618   (bc_1, vin1a_d0,	output3, X, 619, 1, Z)," &
"619   (bc_1, *,	control, 1)," &
"620   (bc_1, vin1a_d0,	input, X)," &
"621   (bc_1, vin1a_vsync0,	output3, X, 622, 1, Z)," &
"622   (bc_1, *,	control, 1)," &
"623   (bc_1, vin1a_vsync0,	input, X)," &
"624   (bc_1, vin1a_hsync0,	output3, X, 625, 1, Z)," &
"625   (bc_1, *,	control, 1)," &
"626   (bc_1, vin1a_hsync0,	input, X)," &
"627   (bc_1, vin1a_fld0,	output3, X, 628, 1, Z)," &
"628   (bc_1, *,	control, 1)," &
"629   (bc_1, vin1a_fld0,	input, X)," &
"630   (bc_1, vin1a_de0,	output3, X, 631, 1, Z)," &
"631   (bc_1, *,	control, 1)," &
"632   (bc_1, vin1a_de0,	input, X)," &
"633   (bc_1, vin1b_clk1,	output3, X, 634, 1, Z)," &
"634   (bc_1, *,	control, 1)," &
"635   (bc_1, vin1b_clk1,	input, X)," &
"636   (bc_1, vin1a_clk0,	output3, X, 637, 1, Z)," &
"637   (bc_1, *,	control, 1)," &
"638   (bc_1, vin1a_clk0,	input, X)," &
"639   (bc_1, gpmc_wait0,	output3, X, 640, 1, Z)," &
"640   (bc_1, *,	control, 1)," &
"641   (bc_1, gpmc_wait0,	input, X)," &
"642   (bc_1, gpmc_ben1,	output3, X, 643, 1, Z)," &
"643   (bc_1, *,	control, 1)," &
"644   (bc_1, gpmc_ben1,	input, X)," &
"645   (bc_1, gpmc_ben0,	output3, X, 646, 1, Z)," &
"646   (bc_1, *,	control, 1)," &
"647   (bc_1, gpmc_ben0,	input, X)," &
"648   (bc_1, gpmc_wen,	output3, X, 649, 1, Z)," &
"649   (bc_1, *,	control, 1)," &
"650   (bc_1, gpmc_wen,	input, X)," &
"651   (bc_1, gpmc_oen_ren,	output3, X, 652, 1, Z)," &
"652   (bc_1, *,	control, 1)," &
"653   (bc_1, gpmc_oen_ren,	input, X)," &
"654   (bc_1, gpmc_advn_ale,	output3, X, 655, 1, Z)," &
"655   (bc_1, *,	control, 1)," &
"656   (bc_1, gpmc_advn_ale,	input, X)," &
"657   (bc_1, gpmc_clk,	output3, X, 658, 1, Z)," &
"658   (bc_1, *,	control, 1)," &
"659   (bc_1, gpmc_clk,	input, X)," &
"660   (bc_1, gpmc_cs3,	output3, X, 661, 1, Z)," &
"661   (bc_1, *,	control, 1)," &
"662   (bc_1, gpmc_cs3,	input, X)," &
"663   (bc_1, gpmc_cs2,	output3, X, 664, 1, Z)," &
"664   (bc_1, *,	control, 1)," &
"665   (bc_1, gpmc_cs2,	input, X)," &
"666   (bc_1, gpmc_cs0,	output3, X, 667, 1, Z)," &
"667   (bc_1, *,	control, 1)," &
"668   (bc_1, gpmc_cs0,	input, X)," &
"669   (bc_1, gpmc_cs1,	output3, X, 670, 1, Z)," &
"670   (bc_1, *,	control, 1)," &
"671   (bc_1, gpmc_cs1,	input, X)," &
"672   (bc_1, gpmc_a27,	output3, X, 673, 1, Z)," &
"673   (bc_1, *,	control, 1)," &
"674   (bc_1, gpmc_a27,	input, X)," &
"675   (bc_1, gpmc_a26,	output3, X, 676, 1, Z)," &
"676   (bc_1, *,	control, 1)," &
"677   (bc_1, gpmc_a26,	input, X)," &
"678   (bc_1, gpmc_a25,	output3, X, 679, 1, Z)," &
"679   (bc_1, *,	control, 1)," &
"680   (bc_1, gpmc_a25,	input, X)," &
"681   (bc_1, gpmc_a24,	output3, X, 682, 1, Z)," &
"682   (bc_1, *,	control, 1)," &
"683   (bc_1, gpmc_a24,	input, X)," &
"684   (bc_1, gpmc_a23,	output3, X, 685, 1, Z)," &
"685   (bc_1, *,	control, 1)," &
"686   (bc_1, gpmc_a23,	input, X)," &
"687   (bc_1, gpmc_a22,	output3, X, 688, 1, Z)," &
"688   (bc_1, *,	control, 1)," &
"689   (bc_1, gpmc_a22,	input, X)," &
"690   (bc_1, gpmc_a21,	output3, X, 691, 1, Z)," &
"691   (bc_1, *,	control, 1)," &
"692   (bc_1, gpmc_a21,	input, X)," &
"693   (bc_1, gpmc_a20,	output3, X, 694, 1, Z)," &
"694   (bc_1, *,	control, 1)," &
"695   (bc_1, gpmc_a20,	input, X)," &
"696   (bc_1, gpmc_a19,	output3, X, 697, 1, Z)," &
"697   (bc_1, *,	control, 1)," &
"698   (bc_1, gpmc_a19,	input, X)," &
"699   (bc_1, gpmc_a18,	output3, X, 700, 1, Z)," &
"700   (bc_1, *,	control, 1)," &
"701   (bc_1, gpmc_a18,	input, X)," &
"702   (bc_1, gpmc_a17,	output3, X, 703, 1, Z)," &
"703   (bc_1, *,	control, 1)," &
"704   (bc_1, gpmc_a17,	input, X)," &
"705   (bc_1, gpmc_a16,	output3, X, 706, 1, Z)," &
"706   (bc_1, *,	control, 1)," &
"707   (bc_1, gpmc_a16,	input, X)," &
"708   (bc_1, gpmc_a15,	output3, X, 709, 1, Z)," &
"709   (bc_1, *,	control, 1)," &
"710   (bc_1, gpmc_a15,	input, X)," &
"711   (bc_1, gpmc_a14,	output3, X, 712, 1, Z)," &
"712   (bc_1, *,	control, 1)," &
"713   (bc_1, gpmc_a14,	input, X)," &
"714   (bc_1, gpmc_a13,	output3, X, 715, 1, Z)," &
"715   (bc_1, *,	control, 1)," &
"716   (bc_1, gpmc_a13,	input, X)," &
"717   (bc_1, gpmc_a12,	output3, X, 718, 1, Z)," &
"718   (bc_1, *,	control, 1)," &
"719   (bc_1, gpmc_a12,	input, X)," &
"720   (bc_1, gpmc_a11,	output3, X, 721, 1, Z)," &
"721   (bc_1, *,	control, 1)," &
"722   (bc_1, gpmc_a11,	input, X)," &
"723   (bc_1, gpmc_a10,	output3, X, 724, 1, Z)," &
"724   (bc_1, *,	control, 1)," &
"725   (bc_1, gpmc_a10,	input, X)," &
"726   (bc_1, gpmc_a9,	output3, X, 727, 1, Z)," &
"727   (bc_1, *,	control, 1)," &
"728   (bc_1, gpmc_a9,	input, X)," &
"729   (bc_1, gpmc_a8,	output3, X, 730, 1, Z)," &
"730   (bc_1, *,	control, 1)," &
"731   (bc_1, gpmc_a8,	input, X)," &
"732   (bc_1, gpmc_a7,	output3, X, 733, 1, Z)," &
"733   (bc_1, *,	control, 1)," &
"734   (bc_1, gpmc_a7,	input, X)," &
"735   (bc_1, gpmc_a6,	output3, X, 736, 1, Z)," &
"736   (bc_1, *,	control, 1)," &
"737   (bc_1, gpmc_a6,	input, X)," &
"738   (bc_1, gpmc_a5,	output3, X, 739, 1, Z)," &
"739   (bc_1, *,	control, 1)," &
"740   (bc_1, gpmc_a5,	input, X)," &
"741   (bc_1, gpmc_a4,	output3, X, 742, 1, Z)," &
"742   (bc_1, *,	control, 1)," &
"743   (bc_1, gpmc_a4,	input, X)," &
"744   (bc_1, gpmc_a3,	output3, X, 745, 1, Z)," &
"745   (bc_1, *,	control, 1)," &
"746   (bc_1, gpmc_a3,	input, X)," &
"747   (bc_1, gpmc_a2,	output3, X, 748, 1, Z)," &
"748   (bc_1, *,	control, 1)," &
"749   (bc_1, gpmc_a2,	input, X)," &
"750   (bc_1, gpmc_a1,	output3, X, 751, 1, Z)," &
"751   (bc_1, *,	control, 1)," &
"752   (bc_1, gpmc_a1,	input, X)," &
"753   (bc_1, gpmc_a0,	output3, X, 754, 1, Z)," &
"754   (bc_1, *,	control, 1)," &
"755   (bc_1, gpmc_a0,	input, X)," &
"756   (bc_1, gpmc_ad15,	output3, X, 757, 1, Z)," &
"757   (bc_1, *,	control, 1)," &
"758   (bc_1, gpmc_ad15,	input, X)," &
"759   (bc_1, gpmc_ad14,	output3, X, 760, 1, Z)," &
"760   (bc_1, *,	control, 1)," &
"761   (bc_1, gpmc_ad14,	input, X)," &
"762   (bc_1, gpmc_ad13,	output3, X, 763, 1, Z)," &
"763   (bc_1, *,	control, 1)," &
"764   (bc_1, gpmc_ad13,	input, X)," &
"765   (bc_1, gpmc_ad12,	output3, X, 766, 1, Z)," &
"766   (bc_1, *,	control, 1)," &
"767   (bc_1, gpmc_ad12,	input, X)," &
"768   (bc_1, gpmc_ad11,	output3, X, 769, 1, Z)," &
"769   (bc_1, *,	control, 1)," &
"770   (bc_1, gpmc_ad11,	input, X)," &
"771   (bc_1, gpmc_ad10,	output3, X, 772, 1, Z)," &
"772   (bc_1, *,	control, 1)," &
"773   (bc_1, gpmc_ad10,	input, X)," &
"774   (bc_1, gpmc_ad9,	output3, X, 775, 1, Z)," &
"775   (bc_1, *,	control, 1)," &
"776   (bc_1, gpmc_ad9,	input, X)," &
"777   (bc_1, gpmc_ad8,	output3, X, 778, 1, Z)," &
"778   (bc_1, *,	control, 1)," &
"779   (bc_1, gpmc_ad8,	input, X)," &
"780   (bc_1, gpmc_ad7,	output3, X, 781, 1, Z)," &
"781   (bc_1, *,	control, 1)," &
"782   (bc_1, gpmc_ad7,	input, X)," &
"783   (bc_1, gpmc_ad6,	output3, X, 784, 1, Z)," &
"784   (bc_1, *,	control, 1)," &
"785   (bc_1, gpmc_ad6,	input, X)," &
"786   (bc_1, gpmc_ad5,	output3, X, 787, 1, Z)," &
"787   (bc_1, *,	control, 1)," &
"788   (bc_1, gpmc_ad5,	input, X)," &
"789   (bc_1, gpmc_ad4,	output3, X, 790, 1, Z)," &
"790   (bc_1, *,	control, 1)," &
"791   (bc_1, gpmc_ad4,	input, X)," &
"792   (bc_1, gpmc_ad3,	output3, X, 793, 1, Z)," &
"793   (bc_1, *,	control, 1)," &
"794   (bc_1, gpmc_ad3,	input, X)," &
"795   (bc_1, gpmc_ad2,	output3, X, 796, 1, Z)," &
"796   (bc_1, *,	control, 1)," &
"797   (bc_1, gpmc_ad2,	input, X)," &
"798   (bc_1, gpmc_ad1,	output3, X, 799, 1, Z)," &
"799   (bc_1, *,	control, 1)," &
"800   (bc_1, gpmc_ad1,	input, X)," &
"801   (bc_1, gpmc_ad0,	output3, X, 802, 1, Z)," &
"802   (bc_1, *,	control, 1)," &
"803   (bc_1, gpmc_ad0,	input, X)," &
"804   (bc_1, ddr2_wen,	output3, X, 805, 1, Z)," &
"805   (bc_1, *,	control, 1)," &
"806   (bc_1, ddr2_wen,	input, X)," &
"807   (bc_1, ddr2_csn0,	output3, X, 808, 1, Z)," &
"808   (bc_1, *,	control, 1)," &
"809   (bc_1, ddr2_csn0,	input, X)," &
"810   (bc_1, *,	internal, 0)," &
"811   (bc_1, *,	internal, 0)," &
"812   (bc_1, *,	internal, 0)," &
"813   (bc_1, *,	internal, 0)," &
"814   (bc_1, *,	internal, 0)," &
"815   (bc_1, *,	internal, 0)," &
"816   (bc_1, ddr2_nck,	output3, X, 817, 1, Z)," &
"817   (bc_1, *,	control, 1)," &
"818   (bc_1, ddr2_nck,	input, X)," &
"819   (bc_1, *,	internal, 0)," &
"820   (bc_1, *,	internal, 0)," &
"821   (bc_1, *,	internal, 0)," &
"822   (bc_1, *,	internal, 0)," &
"823   (bc_1, *,	internal, 0)," &
"824   (bc_1, *,	internal, 0)," &
"825   (bc_1, ddr2_ck,	output3, X, 826, 1, Z)," &
"826   (bc_1, *,	control, 1)," &
"827   (bc_1, ddr2_ck,	input, X)," &
"828   (bc_1, *,	internal, 0)," &
"829   (bc_1, *,	internal, 0)," &
"830   (bc_1, *,	internal, 0)," &
"831   (bc_1, *,	internal, 0)," &
"832   (bc_1, *,	internal, 0)," &
"833   (bc_1, *,	internal, 0)," &
"834   (bc_1, *,	internal, 0)," &
"835   (bc_1, *,	internal, 0)," &
"836   (bc_1, *,	internal, 0)," &
"837   (bc_1, *,	internal, 0)," &
"838   (bc_1, *,	internal, 0)," &
"839   (bc_1, *,	internal, 0)," &
"840   (bc_1, *,	internal, 0)," &
"841   (bc_1, *,	internal, 0)," &
"842   (bc_1, *,	internal, 0)," &
"843   (bc_1, *,	internal, 0)," &
"844   (bc_1, *,	internal, 0)," &
"845   (bc_1, *,	internal, 0)," &
"846   (bc_1, *,	internal, 0)," &
"847   (bc_1, *,	internal, 0)," &
"848   (bc_1, *,	internal, 0)," &
"849   (bc_1, *,	internal, 0)," &
"850   (bc_1, *,	internal, 0)," &
"851   (bc_1, *,	internal, 0)," &
"852   (bc_1, *,	internal, 0)," &
"853   (bc_1, *,	internal, 0)," &
"854   (bc_1, *,	internal, 0)," &
"855   (bc_1, *,	internal, 0)," &
"856   (bc_1, *,	internal, 0)," &
"857   (bc_1, *,	internal, 0)," &
"858   (bc_1, *,	internal, 0)," &
"859   (bc_1, *,	internal, 0)," &
"860   (bc_1, *,	internal, 0)," &
"861   (bc_1, *,	internal, 0)," &
"862   (bc_1, *,	internal, 0)," &
"863   (bc_1, *,	internal, 0)," &
"864   (bc_1, *,	internal, 0)," &
"865   (bc_1, *,	internal, 0)," &
"866   (bc_1, *,	internal, 0)," &
"867   (bc_1, *,	internal, 0)," &
"868   (bc_1, *,	internal, 0)," &
"869   (bc_1, *,	internal, 0)," &
"870   (bc_1, *,	internal, 0)," &
"871   (bc_1, *,	internal, 0)," &
"872   (bc_1, *,	internal, 0)," &
"873   (bc_1, *,	internal, 0)," &
"874   (bc_1, *,	internal, 0)," &
"875   (bc_1, *,	internal, 0)," &
"876   (bc_1, *,	internal, 0)," &
"877   (bc_1, *,	internal, 0)," &
"878   (bc_1, *,	internal, 0)," &
"879   (bc_1, *,	internal, 0)," &
"880   (bc_1, *,	internal, 0)," &
"881   (bc_1, *,	internal, 0)," &
"882   (bc_1, *,	internal, 0)," &
"883   (bc_1, *,	internal, 0)," &
"884   (bc_1, *,	internal, 0)," &
"885   (bc_1, ddr2_odt0,	output3, X, 886, 1, Z)," &
"886   (bc_1, *,	control, 1)," &
"887   (bc_1, ddr2_odt0,	input, X)," &
"888   (bc_1, *,	internal, 0)," &
"889   (bc_1, *,	internal, 0)," &
"890   (bc_1, *,	internal, 0)," &
"891   (bc_1, ddr2_rst,	output3, X, 892, 1, Z)," &
"892   (bc_1, *,	control, 1)," &
"893   (bc_1, ddr2_rst,	input, X)," &
"894   (bc_1, ddr2_rasn,	output3, X, 895, 1, Z)," &
"895   (bc_1, *,	control, 1)," &
"896   (bc_1, ddr2_rasn,	input, X)," &
"897   (bc_1, ddr2_casn,	output3, X, 898, 1, Z)," &
"898   (bc_1, *,	control, 1)," &
"899   (bc_1, ddr2_casn,	input, X)," &
"900   (bc_1, *,	internal, 0)," &
"901   (bc_1, *,	internal, 0)," &
"902   (bc_1, *,	internal, 0)," &
"903   (bc_1, *,	internal, 0)," &
"904   (bc_1, *,	internal, 0)," &
"905   (bc_1, *,	internal, 0)," &
"906   (bc_1, ddr2_ba2,	output3, X, 907, 1, Z)," &
"907   (bc_1, *,	control, 1)," &
"908   (bc_1, ddr2_ba2,	input, X)," &
"909   (bc_1, ddr2_ba1,	output3, X, 910, 1, Z)," &
"910   (bc_1, *,	control, 1)," &
"911   (bc_1, ddr2_ba1,	input, X)," &
"912   (bc_1, ddr2_ba0,	output3, X, 913, 1, Z)," &
"913   (bc_1, *,	control, 1)," &
"914   (bc_1, ddr2_ba0,	input, X)," &
"915   (bc_1, ddr2_a15,	output3, X, 916, 1, Z)," &
"916   (bc_1, *,	control, 1)," &
"917   (bc_1, ddr2_a15,	input, X)," &
"918   (bc_1, ddr2_a14,	output3, X, 919, 1, Z)," &
"919   (bc_1, *,	control, 1)," &
"920   (bc_1, ddr2_a14,	input, X)," &
"921   (bc_1, ddr2_a13,	output3, X, 922, 1, Z)," &
"922   (bc_1, *,	control, 1)," &
"923   (bc_1, ddr2_a13,	input, X)," &
"924   (bc_1, *,	internal, 0)," &
"925   (bc_1, *,	internal, 0)," &
"926   (bc_1, *,	internal, 0)," &
"927   (bc_1, ddr2_a12,	output3, X, 928, 1, Z)," &
"928   (bc_1, *,	control, 1)," &
"929   (bc_1, ddr2_a12,	input, X)," &
"930   (bc_1, ddr2_a11,	output3, X, 931, 1, Z)," &
"931   (bc_1, *,	control, 1)," &
"932   (bc_1, ddr2_a11,	input, X)," &
"933   (bc_1, ddr2_a10,	output3, X, 934, 1, Z)," &
"934   (bc_1, *,	control, 1)," &
"935   (bc_1, ddr2_a10,	input, X)," &
"936   (bc_1, ddr2_a9,	output3, X, 937, 1, Z)," &
"937   (bc_1, *,	control, 1)," &
"938   (bc_1, ddr2_a9,	input, X)," &
"939   (bc_1, ddr2_a8,	output3, X, 940, 1, Z)," &
"940   (bc_1, *,	control, 1)," &
"941   (bc_1, ddr2_a8,	input, X)," &
"942   (bc_1, ddr2_a7,	output3, X, 943, 1, Z)," &
"943   (bc_1, *,	control, 1)," &
"944   (bc_1, ddr2_a7,	input, X)," &
"945   (bc_1, ddr2_a6,	output3, X, 946, 1, Z)," &
"946   (bc_1, *,	control, 1)," &
"947   (bc_1, ddr2_a6,	input, X)," &
"948   (bc_1, *,	internal, 0)," &
"949   (bc_1, *,	internal, 0)," &
"950   (bc_1, *,	internal, 0)," &
"951   (bc_1, ddr2_cke,	output3, X, 952, 1, Z)," &
"952   (bc_1, *,	control, 1)," &
"953   (bc_1, ddr2_cke,	input, X)," &
"954   (bc_1, ddr2_a5,	output3, X, 955, 1, Z)," &
"955   (bc_1, *,	control, 1)," &
"956   (bc_1, ddr2_a5,	input, X)," &
"957   (bc_1, ddr2_a4,	output3, X, 958, 1, Z)," &
"958   (bc_1, *,	control, 1)," &
"959   (bc_1, ddr2_a4,	input, X)," &
"960   (bc_1, ddr2_a3,	output3, X, 961, 1, Z)," &
"961   (bc_1, *,	control, 1)," &
"962   (bc_1, ddr2_a3,	input, X)," &
"963   (bc_1, ddr2_a2,	output3, X, 964, 1, Z)," &
"964   (bc_1, *,	control, 1)," &
"965   (bc_1, ddr2_a2,	input, X)," &
"966   (bc_1, ddr2_a1,	output3, X, 967, 1, Z)," &
"967   (bc_1, *,	control, 1)," &
"968   (bc_1, ddr2_a1,	input, X)," &
"969   (bc_1, ddr2_a0,	output3, X, 970, 1, Z)," &
"970   (bc_1, *,	control, 1)," &
"971   (bc_1, ddr2_a0,	input, X)," &
"972   (bc_1, *,	internal, 0)," &
"973   (bc_1, *,	internal, 0)," &
"974   (bc_1, *,	internal, 0)," &
"975   (bc_1, ddr2_dqm3,	output3, X, 976, 1, Z)," &
"976   (bc_1, *,	control, 1)," &
"977   (bc_1, ddr2_dqm3,	input, X)," &
"978   (bc_1, ddr2_dqm2,	output3, X, 979, 1, Z)," &
"979   (bc_1, *,	control, 1)," &
"980   (bc_1, ddr2_dqm2,	input, X)," &
"981   (bc_1, ddr2_dqm1,	output3, X, 982, 1, Z)," &
"982   (bc_1, *,	control, 1)," &
"983   (bc_1, ddr2_dqm1,	input, X)," &
"984   (bc_1, ddr2_dqm0,	output3, X, 985, 1, Z)," &
"985   (bc_1, *,	control, 1)," &
"986   (bc_1, ddr2_dqm0,	input, X)," &
"987   (bc_1, *,	internal, 0)," &
"988   (bc_1, *,	internal, 0)," &
"989   (bc_1, *,	internal, 0)," &
"990   (bc_1, ddr2_dqsn3,	output3, X, 991, 1, Z)," &
"991   (bc_1, *,	control, 1)," &
"992   (bc_1, ddr2_dqsn3,	input, X)," &
"993   (bc_1, ddr2_dqsn2,	output3, X, 994, 1, Z)," &
"994   (bc_1, *,	control, 1)," &
"995   (bc_1, ddr2_dqsn2,	input, X)," &
"996   (bc_1, ddr2_dqsn1,	output3, X, 997, 1, Z)," &
"997   (bc_1, *,	control, 1)," &
"998   (bc_1, ddr2_dqsn1,	input, X)," &
"999   (bc_1, ddr2_dqsn0,	output3, X, 1000, 1, Z)," &
"1000   (bc_1, *,	control, 1)," &
"1001   (bc_1, ddr2_dqsn0,	input, X)," &
"1002   (bc_1, *,	internal, 0)," &
"1003   (bc_1, *,	internal, 0)," &
"1004   (bc_1, *,	internal, 0)," &
"1005   (bc_1, ddr2_dqs3,	output3, X, 1006, 1, Z)," &
"1006   (bc_1, *,	control, 1)," &
"1007   (bc_1, ddr2_dqs3,	input, X)," &
"1008   (bc_1, ddr2_dqs2,	output3, X, 1009, 1, Z)," &
"1009   (bc_1, *,	control, 1)," &
"1010   (bc_1, ddr2_dqs2,	input, X)," &
"1011   (bc_1, ddr2_dqs1,	output3, X, 1012, 1, Z)," &
"1012   (bc_1, *,	control, 1)," &
"1013   (bc_1, ddr2_dqs1,	input, X)," &
"1014   (bc_1, ddr2_dqs0,	output3, X, 1015, 1, Z)," &
"1015   (bc_1, *,	control, 1)," &
"1016   (bc_1, ddr2_dqs0,	input, X)," &
"1017   (bc_1, *,	internal, 0)," &
"1018   (bc_1, *,	internal, 0)," &
"1019   (bc_1, *,	internal, 0)," &
"1020   (bc_1, *,	internal, 0)," &
"1021   (bc_1, *,	internal, 0)," &
"1022   (bc_1, *,	internal, 0)," &
"1023   (bc_1, *,	internal, 0)," &
"1024   (bc_1, *,	internal, 0)," &
"1025   (bc_1, *,	internal, 0)," &
"1026   (bc_1, *,	internal, 0)," &
"1027   (bc_1, *,	internal, 0)," &
"1028   (bc_1, *,	internal, 0)," &
"1029   (bc_1, *,	internal, 0)," &
"1030   (bc_1, *,	internal, 0)," &
"1031   (bc_1, *,	internal, 0)," &
"1032   (bc_1, *,	internal, 0)," &
"1033   (bc_1, *,	internal, 0)," &
"1034   (bc_1, *,	internal, 0)," &
"1035   (bc_1, *,	internal, 0)," &
"1036   (bc_1, *,	internal, 0)," &
"1037   (bc_1, *,	internal, 0)," &
"1038   (bc_1, *,	internal, 0)," &
"1039   (bc_1, *,	internal, 0)," &
"1040   (bc_1, *,	internal, 0)," &
"1041   (bc_1, ddr2_d31,	output3, X, 1042, 1, Z)," &
"1042   (bc_1, *,	control, 1)," &
"1043   (bc_1, ddr2_d31,	input, X)," &
"1044   (bc_1, ddr2_d30,	output3, X, 1045, 1, Z)," &
"1045   (bc_1, *,	control, 1)," &
"1046   (bc_1, ddr2_d30,	input, X)," &
"1047   (bc_1, ddr2_d29,	output3, X, 1048, 1, Z)," &
"1048   (bc_1, *,	control, 1)," &
"1049   (bc_1, ddr2_d29,	input, X)," &
"1050   (bc_1, ddr2_d28,	output3, X, 1051, 1, Z)," &
"1051   (bc_1, *,	control, 1)," &
"1052   (bc_1, ddr2_d28,	input, X)," &
"1053   (bc_1, ddr2_d27,	output3, X, 1054, 1, Z)," &
"1054   (bc_1, *,	control, 1)," &
"1055   (bc_1, ddr2_d27,	input, X)," &
"1056   (bc_1, ddr2_d26,	output3, X, 1057, 1, Z)," &
"1057   (bc_1, *,	control, 1)," &
"1058   (bc_1, ddr2_d26,	input, X)," &
"1059   (bc_1, ddr2_d25,	output3, X, 1060, 1, Z)," &
"1060   (bc_1, *,	control, 1)," &
"1061   (bc_1, ddr2_d25,	input, X)," &
"1062   (bc_1, ddr2_d24,	output3, X, 1063, 1, Z)," &
"1063   (bc_1, *,	control, 1)," &
"1064   (bc_1, ddr2_d24,	input, X)," &
"1065   (bc_1, ddr2_d23,	output3, X, 1066, 1, Z)," &
"1066   (bc_1, *,	control, 1)," &
"1067   (bc_1, ddr2_d23,	input, X)," &
"1068   (bc_1, ddr2_d22,	output3, X, 1069, 1, Z)," &
"1069   (bc_1, *,	control, 1)," &
"1070   (bc_1, ddr2_d22,	input, X)," &
"1071   (bc_1, ddr2_d21,	output3, X, 1072, 1, Z)," &
"1072   (bc_1, *,	control, 1)," &
"1073   (bc_1, ddr2_d21,	input, X)," &
"1074   (bc_1, ddr2_d20,	output3, X, 1075, 1, Z)," &
"1075   (bc_1, *,	control, 1)," &
"1076   (bc_1, ddr2_d20,	input, X)," &
"1077   (bc_1, ddr2_d19,	output3, X, 1078, 1, Z)," &
"1078   (bc_1, *,	control, 1)," &
"1079   (bc_1, ddr2_d19,	input, X)," &
"1080   (bc_1, ddr2_d18,	output3, X, 1081, 1, Z)," &
"1081   (bc_1, *,	control, 1)," &
"1082   (bc_1, ddr2_d18,	input, X)," &
"1083   (bc_1, ddr2_d17,	output3, X, 1084, 1, Z)," &
"1084   (bc_1, *,	control, 1)," &
"1085   (bc_1, ddr2_d17,	input, X)," &
"1086   (bc_1, ddr2_d16,	output3, X, 1087, 1, Z)," &
"1087   (bc_1, *,	control, 1)," &
"1088   (bc_1, ddr2_d16,	input, X)," &
"1089   (bc_1, ddr2_d15,	output3, X, 1090, 1, Z)," &
"1090   (bc_1, *,	control, 1)," &
"1091   (bc_1, ddr2_d15,	input, X)," &
"1092   (bc_1, ddr2_d14,	output3, X, 1093, 1, Z)," &
"1093   (bc_1, *,	control, 1)," &
"1094   (bc_1, ddr2_d14,	input, X)," &
"1095   (bc_1, ddr2_d13,	output3, X, 1096, 1, Z)," &
"1096   (bc_1, *,	control, 1)," &
"1097   (bc_1, ddr2_d13,	input, X)," &
"1098   (bc_1, ddr2_d12,	output3, X, 1099, 1, Z)," &
"1099   (bc_1, *,	control, 1)," &
"1100   (bc_1, ddr2_d12,	input, X)," &
"1101   (bc_1, ddr2_d11,	output3, X, 1102, 1, Z)," &
"1102   (bc_1, *,	control, 1)," &
"1103   (bc_1, ddr2_d11,	input, X)," &
"1104   (bc_1, ddr2_d10,	output3, X, 1105, 1, Z)," &
"1105   (bc_1, *,	control, 1)," &
"1106   (bc_1, ddr2_d10,	input, X)," &
"1107   (bc_1, ddr2_d9,	output3, X, 1108, 1, Z)," &
"1108   (bc_1, *,	control, 1)," &
"1109   (bc_1, ddr2_d9,	input, X)," &
"1110   (bc_1, ddr2_d8,	output3, X, 1111, 1, Z)," &
"1111   (bc_1, *,	control, 1)," &
"1112   (bc_1, ddr2_d8,	input, X)," &
"1113   (bc_1, ddr2_d7,	output3, X, 1114, 1, Z)," &
"1114   (bc_1, *,	control, 1)," &
"1115   (bc_1, ddr2_d7,	input, X)," &
"1116   (bc_1, ddr2_d6,	output3, X, 1117, 1, Z)," &
"1117   (bc_1, *,	control, 1)," &
"1118   (bc_1, ddr2_d6,	input, X)," &
"1119   (bc_1, ddr2_d5,	output3, X, 1120, 1, Z)," &
"1120   (bc_1, *,	control, 1)," &
"1121   (bc_1, ddr2_d5,	input, X)," &
"1122   (bc_1, ddr2_d4,	output3, X, 1123, 1, Z)," &
"1123   (bc_1, *,	control, 1)," &
"1124   (bc_1, ddr2_d4,	input, X)," &
"1125   (bc_1, ddr2_d3,	output3, X, 1126, 1, Z)," &
"1126   (bc_1, *,	control, 1)," &
"1127   (bc_1, ddr2_d3,	input, X)," &
"1128   (bc_1, ddr2_d2,	output3, X, 1129, 1, Z)," &
"1129   (bc_1, *,	control, 1)," &
"1130   (bc_1, ddr2_d2,	input, X)," &
"1131   (bc_1, ddr2_d1,	output3, X, 1132, 1, Z)," &
"1132   (bc_1, *,	control, 1)," &
"1133   (bc_1, ddr2_d1,	input, X)," &
"1134   (bc_1, ddr2_d0,	output3, X, 1135, 1, Z)," &
"1135   (bc_1, *,	control, 1)," &
"1136   (bc_1, ddr2_d0,	input, X)," &
"1137   (bc_1, *,	internal, 0)," &
"1138   (bc_1, *,	internal, 0)," &
"1139   (bc_1, *,	internal, 0)," &
"1140   (bc_1, *,	internal, 0)," &
"1141   (bc_1, *,	internal, 0)," &
"1142   (bc_1, *,	internal, 0)," &
"1143   (bc_1, *,	internal, 0)," &
"1144   (bc_1, *,	internal, 0)," &
"1145   (bc_1, *, 	internal, 0)," &
"1146   (bc_1, *, 	internal, 0)," &
"1147   (bc_1, *,	internal, 0)," &
"1148   (bc_1, *, 	internal, 0)," &
"1149   (bc_1, *, 	internal, 0)," &
"1150   (bc_1, *,	internal, 0)," &
"1151   (bc_1, *, 	internal, 0)," &
"1152   (bc_1, ddr1_wen,	output3, X, 1153, 1, Z)," &
"1153   (bc_1, *,	control, 1)," &
"1154   (bc_1, ddr1_wen,	input, X)," &
"1155   (bc_1, ddr1_csn0,	output3, X, 1156, 1, Z)," &
"1156   (bc_1, *,	control, 1)," &
"1157   (bc_1, ddr1_csn0,	input, X)," &
"1158   (bc_1, *,	internal, 0)," &
"1159   (bc_1, *,	internal, 0)," &
"1160   (bc_1, *,	internal, 0)," &
"1161   (bc_1, *,	internal, 0)," &
"1162   (bc_1, *,	internal, 0)," &
"1163   (bc_1, *,	internal, 0)," &
"1164   (bc_1, ddr1_nck,	output3, X, 1165, 1, Z)," &
"1165   (bc_1, *,	control, 1)," &
"1166   (bc_1, ddr1_nck,	input, X)," &
"1167   (bc_1, *,	internal, 0)," &
"1168   (bc_1, *,	internal, 0)," &
"1169   (bc_1, *,	internal, 0)," &
"1170   (bc_1, *,	internal, 0)," &
"1171   (bc_1, *,	internal, 0)," &
"1172   (bc_1, *,	internal, 0)," &
"1173   (bc_1, ddr1_ck,	output3, X, 1174, 1, Z)," &
"1174   (bc_1, *,	control, 1)," &
"1175   (bc_1, ddr1_ck,	input, X)," &
"1176   (bc_1, *,	internal, 0)," &
"1177   (bc_1, *,	internal, 0)," &
"1178   (bc_1, *,	internal, 0)," &
"1179   (bc_1, *,	internal, 0)," &
"1180   (bc_1, *,	internal, 0)," &
"1181   (bc_1, *,	internal, 0)," &
"1182   (bc_1, *,	internal, 0)," &
"1183   (bc_1, *,	internal, 0)," &
"1184   (bc_1, *,	internal, 0)," &
"1185   (bc_1, *,	internal, 0)," &
"1186   (bc_1, *,	internal, 0)," &
"1187   (bc_1, *,	internal, 0)," &
"1188   (bc_1, *,	internal, 0)," &
"1189   (bc_1, *,	internal, 0)," &
"1190   (bc_1, *,	internal, 0)," &
"1191   (bc_1, *,	internal, 0)," &
"1192   (bc_1, *,	internal, 0)," &
"1193   (bc_1, *,	internal, 0)," &
"1194   (bc_1, *,	internal, 0)," &
"1195   (bc_1, *,	internal, 0)," &
"1196   (bc_1, *,	internal, 0)," &
"1197   (bc_1, *,	internal, 0)," &
"1198   (bc_1, *,	internal, 0)," &
"1199   (bc_1, *,	internal, 0)," &
"1200   (bc_1, *,	internal, 0)," &
"1201   (bc_1, *,	internal, 0)," &
"1202   (bc_1, *,	internal, 0)," &
"1203   (bc_1, *,	internal, 0)," &
"1204   (bc_1, *,	internal, 0)," &
"1205   (bc_1, *,	internal, 0)," &
"1206   (bc_1, *,	internal, 0)," &
"1207   (bc_1, *,	internal, 0)," &
"1208   (bc_1, *,	internal, 0)," &
"1209   (bc_1, *,	internal, 0)," &
"1210   (bc_1, *,	internal, 0)," &
"1211   (bc_1, *,	internal, 0)," &
"1212   (bc_1, *,	internal, 0)," &
"1213   (bc_1, *,	internal, 0)," &
"1214   (bc_1, *,	internal, 0)," &
"1215   (bc_1, *,	internal, 0)," &
"1216   (bc_1, *,	internal, 0)," &
"1217   (bc_1, *,	internal, 0)," &
"1218   (bc_1, *,	internal, 0)," &
"1219   (bc_1, *,	internal, 0)," &
"1220   (bc_1, *,	internal, 0)," &
"1221   (bc_1, *,	internal, 0)," &
"1222   (bc_1, *,	internal, 0)," &
"1223   (bc_1, *,	internal, 0)," &
"1224   (bc_1, *,	internal, 0)," &
"1225   (bc_1, *,	internal, 0)," &
"1226   (bc_1, *,	internal, 0)," &
"1227   (bc_1, *,	internal, 0)," &
"1228   (bc_1, *,	internal, 0)," &
"1229   (bc_1, *,	internal, 0)," &
"1230   (bc_1, *,	internal, 0)," &
"1231   (bc_1, *,	internal, 0)," &
"1232   (bc_1, *,	internal, 0)," &
"1233   (bc_1, ddr1_odt0,	output3, X, 1234, 1, Z)," &
"1234   (bc_1, *,	control, 1)," &
"1235   (bc_1, ddr1_odt0,	input, X)," &
"1236   (bc_1, *,	internal, 0)," &
"1237   (bc_1, *,	internal, 0)," &
"1238   (bc_1, *,	internal, 0)," &
"1239   (bc_1, ddr1_rst,	output3, X, 1240, 1, Z)," &
"1240   (bc_1, *,	control, 1)," &
"1241   (bc_1, ddr1_rst,	input, X)," &
"1242   (bc_1, ddr1_rasn,	output3, X, 1243, 1, Z)," &
"1243   (bc_1, *,	control, 1)," &
"1244   (bc_1, ddr1_rasn,	input, X)," &
"1245   (bc_1, ddr1_casn,	output3, X, 1246, 1, Z)," &
"1246   (bc_1, *,	control, 1)," &
"1247   (bc_1, ddr1_casn,	input, X)," &
"1248   (bc_1, *,	internal, 0)," &
"1249   (bc_1, *,	internal, 0)," &
"1250   (bc_1, *,	internal, 0)," &
"1251   (bc_1, *,	internal, 0)," &
"1252   (bc_1, *,	internal, 0)," &
"1253   (bc_1, *,	internal, 0)," &
"1254   (bc_1, ddr1_ba2,	output3, X, 1255, 1, Z)," &
"1255   (bc_1, *,	control, 1)," &
"1256   (bc_1, ddr1_ba2,	input, X)," &
"1257   (bc_1, ddr1_ba1,	output3, X, 1258, 1, Z)," &
"1258   (bc_1, *,	control, 1)," &
"1259   (bc_1, ddr1_ba1,	input, X)," &
"1260   (bc_1, ddr1_ba0,	output3, X, 1261, 1, Z)," &
"1261   (bc_1, *,	control, 1)," &
"1262   (bc_1, ddr1_ba0,	input, X)," &
"1263   (bc_1, ddr1_a15,	output3, X, 1264, 1, Z)," &
"1264   (bc_1, *,	control, 1)," &
"1265   (bc_1, ddr1_a15,	input, X)," &
"1266   (bc_1, ddr1_a14,	output3, X, 1267, 1, Z)," &
"1267   (bc_1, *,	control, 1)," &
"1268   (bc_1, ddr1_a14,	input, X)," &
"1269   (bc_1, ddr1_a13,	output3, X, 1270, 1, Z)," &
"1270   (bc_1, *,	control, 1)," &
"1271   (bc_1, ddr1_a13,	input, X)," &
"1272   (bc_1, *,	internal, 0)," &
"1273   (bc_1, *,	internal, 0)," &
"1274   (bc_1, *,	internal, 0)," &
"1275   (bc_1, ddr1_a12,	output3, X, 1276, 1, Z)," &
"1276   (bc_1, *,	control, 1)," &
"1277   (bc_1, ddr1_a12,	input, X)," &
"1278   (bc_1, ddr1_a11,	output3, X, 1279, 1, Z)," &
"1279   (bc_1, *,	control, 1)," &
"1280   (bc_1, ddr1_a11,	input, X)," &
"1281   (bc_1, ddr1_a10,	output3, X, 1282, 1, Z)," &
"1282   (bc_1, *,	control, 1)," &
"1283   (bc_1, ddr1_a10,	input, X)," &
"1284   (bc_1, ddr1_a9,	output3, X, 1285, 1, Z)," &
"1285   (bc_1, *,	control, 1)," &
"1286   (bc_1, ddr1_a9,	input, X)," &
"1287   (bc_1, ddr1_a8,	output3, X, 1288, 1, Z)," &
"1288   (bc_1, *,	control, 1)," &
"1289   (bc_1, ddr1_a8,	input, X)," &
"1290   (bc_1, ddr1_a7,	output3, X, 1291, 1, Z)," &
"1291   (bc_1, *,	control, 1)," &
"1292   (bc_1, ddr1_a7,	input, X)," &
"1293   (bc_1, ddr1_a6,	output3, X, 1294, 1, Z)," &
"1294   (bc_1, *,	control, 1)," &
"1295   (bc_1, ddr1_a6,	input, X)," &
"1296   (bc_1, *,	internal, 0)," &
"1297   (bc_1, *,	internal, 0)," &
"1298   (bc_1, *,	internal, 0)," &
"1299   (bc_1, ddr1_cke,	output3, X, 1300, 1, Z)," &
"1300   (bc_1, *,	control, 1)," &
"1301   (bc_1, ddr1_cke,	input, X)," &
"1302   (bc_1, ddr1_a5,	output3, X, 1303, 1, Z)," &
"1303   (bc_1, *,	control, 1)," &
"1304   (bc_1, ddr1_a5,	input, X)," &
"1305   (bc_1, ddr1_a4,	output3, X, 1306, 1, Z)," &
"1306   (bc_1, *,	control, 1)," &
"1307   (bc_1, ddr1_a4,	input, X)," &
"1308   (bc_1, ddr1_a3,	output3, X, 1309, 1, Z)," &
"1309   (bc_1, *,	control, 1)," &
"1310   (bc_1, ddr1_a3,	input, X)," &
"1311   (bc_1, ddr1_a2,	output3, X, 1312, 1, Z)," &
"1312   (bc_1, *,	control, 1)," &
"1313   (bc_1, ddr1_a2,	input, X)," &
"1314   (bc_1, ddr1_a1,	output3, X, 1315, 1, Z)," &
"1315   (bc_1, *,	control, 1)," &
"1316   (bc_1, ddr1_a1,	input, X)," &
"1317   (bc_1, ddr1_a0,	output3, X, 1318, 1, Z)," &
"1318   (bc_1, *,	control, 1)," &
"1319   (bc_1, ddr1_a0,	input, X)," &
"1320   (bc_1, ddr1_dqm_ecc,	output3, X, 1321, 1, Z)," &
"1321   (bc_1, *,	control, 1)," &
"1322   (bc_1, ddr1_dqm_ecc,	input, X)," &
"1323   (bc_1, ddr1_dqm3,	output3, X, 1324, 1, Z)," &
"1324   (bc_1, *,	control, 1)," &
"1325   (bc_1, ddr1_dqm3,	input, X)," &
"1326   (bc_1, ddr1_dqm2,	output3, X, 1327, 1, Z)," &
"1327   (bc_1, *,	control, 1)," &
"1328   (bc_1, ddr1_dqm2,	input, X)," &
"1329   (bc_1, ddr1_dqm1,	output3, X, 1330, 1, Z)," &
"1330   (bc_1, *,	control, 1)," &
"1331   (bc_1, ddr1_dqm1,	input, X)," &
"1332   (bc_1, ddr1_dqm0,	output3, X, 1333, 1, Z)," &
"1333   (bc_1, *,	control, 1)," &
"1334   (bc_1, ddr1_dqm0,	input, X)," &
"1335   (bc_1, ddr1_dqsn_ecc,	output3, X, 1336, 1, Z)," &
"1336   (bc_1, *,	control, 1)," &
"1337   (bc_1, ddr1_dqsn_ecc,	input, X)," &
"1338   (bc_1, ddr1_dqsn3,	output3, X, 1339, 1, Z)," &
"1339   (bc_1, *,	control, 1)," &
"1340   (bc_1, ddr1_dqsn3,	input, X)," &
"1341   (bc_1, ddr1_dqsn2,	output3, X, 1342, 1, Z)," &
"1342   (bc_1, *,	control, 1)," &
"1343   (bc_1, ddr1_dqsn2,	input, X)," &
"1344   (bc_1, ddr1_dqsn1,	output3, X, 1345, 1, Z)," &
"1345   (bc_1, *,	control, 1)," &
"1346   (bc_1, ddr1_dqsn1,	input, X)," &
"1347   (bc_1, ddr1_dqsn0,	output3, X, 1348, 1, Z)," &
"1348   (bc_1, *,	control, 1)," &
"1349   (bc_1, ddr1_dqsn0,	input, X)," &
"1350   (bc_1, ddr1_dqs_ecc,	output3, X, 1351, 1, Z)," &
"1351   (bc_1, *,	control, 1)," &
"1352   (bc_1, ddr1_dqs_ecc,	input, X)," &
"1353   (bc_1, ddr1_dqs3,	output3, X, 1354, 1, Z)," &
"1354   (bc_1, *,	control, 1)," &
"1355   (bc_1, ddr1_dqs3,	input, X)," &
"1356   (bc_1, ddr1_dqs2,	output3, X, 1357, 1, Z)," &
"1357   (bc_1, *,	control, 1)," &
"1358   (bc_1, ddr1_dqs2,	input, X)," &
"1359   (bc_1, ddr1_dqs1,	output3, X, 1360, 1, Z)," &
"1360   (bc_1, *,	control, 1)," &
"1361   (bc_1, ddr1_dqs1,	input, X)," &
"1362   (bc_1, ddr1_dqs0,	output3, X, 1363, 1, Z)," &
"1363   (bc_1, *,	control, 1)," &
"1364   (bc_1, ddr1_dqs0,	input, X)," &
"1365   (bc_1, ddr1_ecc_d7,	output3, X, 1366, 1, Z)," &
"1366   (bc_1, *,	control, 1)," &
"1367   (bc_1, ddr1_ecc_d7,	input, X)," &
"1368   (bc_1, ddr1_ecc_d6,	output3, X, 1369, 1, Z)," &
"1369   (bc_1, *,	control, 1)," &
"1370   (bc_1, ddr1_ecc_d6,	input, X)," &
"1371   (bc_1, ddr1_ecc_d5,	output3, X, 1372, 1, Z)," &
"1372   (bc_1, *,	control, 1)," &
"1373   (bc_1, ddr1_ecc_d5,	input, X)," &
"1374   (bc_1, ddr1_ecc_d4,	output3, X, 1375, 1, Z)," &
"1375   (bc_1, *,	control, 1)," &
"1376   (bc_1, ddr1_ecc_d4,	input, X)," &
"1377   (bc_1, ddr1_ecc_d3,	output3, X, 1378, 1, Z)," &
"1378   (bc_1, *,	control, 1)," &
"1379   (bc_1, ddr1_ecc_d3,	input, X)," &
"1380   (bc_1, ddr1_ecc_d2,	output3, X, 1381, 1, Z)," &
"1381   (bc_1, *,	control, 1)," &
"1382   (bc_1, ddr1_ecc_d2,	input, X)," &
"1383   (bc_1, ddr1_ecc_d1,	output3, X, 1384, 1, Z)," &
"1384   (bc_1, *,	control, 1)," &
"1385   (bc_1, ddr1_ecc_d1,	input, X)," &
"1386   (bc_1, ddr1_ecc_d0,	output3, X, 1387, 1, Z)," &
"1387   (bc_1, *,	control, 1)," &
"1388   (bc_1, ddr1_ecc_d0,	input, X)," &
"1389   (bc_1, ddr1_d31,	output3, X, 1390, 1, Z)," &
"1390   (bc_1, *,	control, 1)," &
"1391   (bc_1, ddr1_d31,	input, X)," &
"1392   (bc_1, ddr1_d30,	output3, X, 1393, 1, Z)," &
"1393   (bc_1, *,	control, 1)," &
"1394   (bc_1, ddr1_d30,	input, X)," &
"1395   (bc_1, ddr1_d29,	output3, X, 1396, 1, Z)," &
"1396   (bc_1, *,	control, 1)," &
"1397   (bc_1, ddr1_d29,	input, X)," &
"1398   (bc_1, ddr1_d28,	output3, X, 1399, 1, Z)," &
"1399   (bc_1, *,		control, 1)," &
"1400   (bc_1, ddr1_d28,	input, X)," &
"1401   (bc_1, ddr1_d27,	output3, X, 1402, 1, Z)," &
"1402   (bc_1, *,	control, 1)," &
"1403   (bc_1, ddr1_d27,	input, X)," &
"1404   (bc_1, ddr1_d26,	output3, X, 1405, 1, Z)," &
"1405   (bc_1, *,	control, 1)," &
"1406   (bc_1, ddr1_d26,	input, X)," &
"1407   (bc_1, ddr1_d25,	output3, X, 1408, 1, Z)," &
"1408   (bc_1, *,	control, 1)," &
"1409   (bc_1, ddr1_d25,	input, X)," &
"1410   (bc_1, ddr1_d24,	output3, X, 1411, 1, Z)," &
"1411   (bc_1, *,	control, 1)," &
"1412   (bc_1, ddr1_d24,	input, X)," &
"1413   (bc_1, ddr1_d23,	output3, X, 1414, 1, Z)," &
"1414   (bc_1, *,	control, 1)," &
"1415   (bc_1, ddr1_d23,	input, X)," &
"1416   (bc_1, ddr1_d22,	output3, X, 1417, 1, Z)," &
"1417   (bc_1, *,	control, 1)," &
"1418   (bc_1, ddr1_d22,	input, X)," &
"1419   (bc_1, ddr1_d21,	output3, X, 1420, 1, Z)," &
"1420   (bc_1, *,	control, 1)," &
"1421   (bc_1, ddr1_d21,	input, X)," &
"1422   (bc_1, ddr1_d20,	output3, X, 1423, 1, Z)," &
"1423   (bc_1, *,	control, 1)," &
"1424   (bc_1, ddr1_d20,	input, X)," &
"1425   (bc_1, ddr1_d19,	output3, X, 1426, 1, Z)," &
"1426   (bc_1, *,	control, 1)," &
"1427   (bc_1, ddr1_d19,	input, X)," &
"1428   (bc_1, ddr1_d18,	output3, X, 1429, 1, Z)," &
"1429   (bc_1, *,	control, 1)," &
"1430   (bc_1, ddr1_d18,	input, X)," &
"1431   (bc_1, ddr1_d17,	output3, X, 1432, 1, Z)," &
"1432   (bc_1, *,	control, 1)," &
"1433   (bc_1, ddr1_d17,	input, X)," &
"1434   (bc_1, ddr1_d16,	output3, X, 1435, 1, Z)," &
"1435   (bc_1, *,	control, 1)," &
"1436   (bc_1, ddr1_d16,	input, X)," &
"1437   (bc_1, ddr1_d15,	output3, X, 1438, 1, Z)," &
"1438   (bc_1, *,	control, 1)," &
"1439   (bc_1, ddr1_d15,	input, X)," &
"1440   (bc_1, ddr1_d14,	output3, X, 1441, 1, Z)," &
"1441   (bc_1, *,	control, 1)," &
"1442   (bc_1, ddr1_d14,	input, X)," &
"1443   (bc_1, ddr1_d13,	output3, X, 1444, 1, Z)," &
"1444   (bc_1, *,	control, 1)," &
"1445   (bc_1, ddr1_d13,	input, X)," &
"1446   (bc_1, ddr1_d12,	output3, X, 1447, 1, Z)," &
"1447   (bc_1, *,	control, 1)," &
"1448   (bc_1, ddr1_d12,	input, X)," &
"1449   (bc_1, ddr1_d11,	output3, X, 1450, 1, Z)," &
"1450   (bc_1, *,	control, 1)," &
"1451   (bc_1, ddr1_d11,	input, X)," &
"1452   (bc_1, ddr1_d10,	output3, X, 1453, 1, Z)," &
"1453   (bc_1, *,	control, 1)," &
"1454   (bc_1, ddr1_d10,	input, X)," &
"1455   (bc_1, ddr1_d9,	output3, X, 1456, 1, Z)," &
"1456   (bc_1, *,	control, 1)," &
"1457   (bc_1, ddr1_d9,	input, X)," &
"1458   (bc_1, ddr1_d8,	output3, X, 1459, 1, Z)," &
"1459   (bc_1, *,	control, 1)," &
"1460   (bc_1, ddr1_d8,	input, X)," &
"1461   (bc_1, ddr1_d7,	output3, X, 1462, 1, Z)," &
"1462   (bc_1, *,	control, 1)," &
"1463   (bc_1, ddr1_d7,	input, X)," &
"1464   (bc_1, ddr1_d6,	output3, X, 1465, 1, Z)," &
"1465   (bc_1, *,	control, 1)," &
"1466   (bc_1, ddr1_d6,	input, X)," &
"1467   (bc_1, ddr1_d5,	output3, X, 1468, 1, Z)," &
"1468   (bc_1, *,	control, 1)," &
"1469   (bc_1, ddr1_d5,	input, X)," &
"1470   (bc_1, ddr1_d4,	output3, X, 1471, 1, Z)," &
"1471   (bc_1, *,	control, 1)," &
"1472   (bc_1, ddr1_d4,	input, X)," &
"1473   (bc_1, ddr1_d3,	output3, X, 1474, 1, Z)," &
"1474   (bc_1, *,	control, 1)," &
"1475   (bc_1, ddr1_d3,	input, X)," &
"1476   (bc_1, ddr1_d2,	output3, X, 1477, 1, Z)," &
"1477   (bc_1, *,	control, 1)," &
"1478   (bc_1, ddr1_d2,	input, X)," &
"1479   (bc_1, ddr1_d1,	output3, X, 1480, 1, Z)," &
"1480   (bc_1, *,	control, 1)," &
"1481   (bc_1, ddr1_d1,	input, X)," &
"1482   (bc_1, ddr1_d0,	output3, X, 1483, 1, Z)," &
"1483   (bc_1, *,	control, 1)," &
"1484   (bc_1, ddr1_d0,	input, X)," &
"1485   (bc_1, *, internal, 0)," &
"1486   (bc_1, *, internal, 0)," &
"1487   (bc_1, *, internal, 0)," &
"1488   (bc_1, *, internal, 0)," &
"1489   (bc_1, *,	internal, 0)," &
"1490   (bc_1, *, internal, 0)," &
"1491   (bc_1, *, internal, 0)," &
"1492   (bc_1, *,	internal, 0)," &
"1493   (bc_1, *, internal, 0)," &
"1494   (bc_1, *, internal, 0)," &
"1495   (bc_1, *,	internal, 0)," &
"1496   (bc_1, *, internal, 0)," &
"1497   (bc_1, *, internal, 0)," &
"1498   (bc_1, *,	internal, 0)," &
"1499   (bc_1, *, internal, 0)" ;

 end DRA74x75x_top ;

This library contains 9294 BSDL files (for 7280 distinct entities) from 69 vendors
Last BSDL model (PEX8112AA_FBGA_r1) was added on Jan 4, 2018 22:50
info@bsdl.info