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BSDL File: PM5395 Download View details  


--  BSDL file for:  PMC-Sierra PM5395
--                  CRSU-4x2488
--
-- Since there are no physical changes made to the boundary scan chain, 
-- this version of the BSDL is not electrically tested.  
--
--  
--------------------------------------------------------------------------------
--
--  BSDL Revision: 1.1
--  Date: July 19, 2002
--
--  Notes:
--
--  (1) The following differential inputs are not part of the boundary scan
--  register and are declared as linkage bits.
--  Signal REFCLK_P__00  Pin AE32
--  Signal REFCLK_P__01  Pin AM22
--  Signal REFCLK_P__02  Pin AM8
--  Signal REFCLK_P__03  Pin Y3
--  Signal REFCLK_N__00  Pin AF32
--  Signal REFCLK_N__01  Pin AM21
--  Signal REFCLK_N__02  Pin AM7
--  Signal REFCLK_N__03  Pin W3
--  Signal RXD_P__00  Pin Y34
--  Signal RXD_P__01  Pin AP27
--  Signal RXD_P__02  Pin AP13
--  Signal RXD_P__03  Pin AE1
--  Signal RXD_N__00  Pin AA34
--  Signal RXD_N__01  Pin AP26
--  Signal RXD_N__02  Pin AP12
--  Signal RXD_N__03  Pin AD1
--
--  (2) The following differential outputs are not part of the boundary scan
--  register and are declared as linkage bits.
--  Signal TXD_P__00  Pin AD34
--  Signal TXD_P__01  Pin AP23
--  Signal TXD_P__02  Pin AP9
--  Signal TXD_P__03  Pin AA1
--  Signal TXD_N__00  Pin AC34
--  Signal TXD_N__01  Pin AP24
--  Signal TXD_N__02  Pin AP10
--  Signal TXD_N__03  Pin AB1
--
--  (3) Signal INTB is an open-drain output in normal operation.  In boundary
--  scan mode it is actually an output that outputs a "hard 1" instead of a
--  "weak 1".  Therefore, it is declared an output below.
--
-- --------------------------------------------------------------------------------

entity PM5395 is
        generic(PHYSICAL_PIN_MAP : string := "UBGA_580");

port (
     REFCLK_P            : linkage  bit_vector(3 downto 0);     -- See note (1)
     REFCLK_N            : linkage  bit_vector(3 downto 0);     -- See note (1)
     RXD_P               : linkage  bit_vector(3 downto 0);     -- See note (1)
     RXD_N               : linkage  bit_vector(3 downto 0);     -- See note (1)
     TXD_P               : linkage  bit_vector(3 downto 0);     -- See note (2)
     TXD_N               : linkage  bit_vector(3 downto 0);     -- See note (2)
     SD                  : in       bit_vector(3 downto 0);
     TXENB               : out      bit_vector(3 downto 0);
     NC_SLSI             : linkage  bit;
     RCLK                : out      bit_vector(3 downto 0);
     TCLK                : out      bit_vector(3 downto 0);
     SALM                : out      bit_vector(3 downto 0);
     RXDATA0_P           : buffer   bit_vector(3 downto 0);
     RXDATA0_N           : buffer   bit_vector(3 downto 0);
     RXCLK0_P            : buffer   bit;
     RXCLK0_N            : buffer   bit;
     RXDATA1_P           : buffer   bit_vector(3 downto 0);
     RXDATA1_N           : buffer   bit_vector(3 downto 0);
     RXCLK1_P            : buffer   bit;
     RXCLK1_N            : buffer   bit;
     RXDATA2_P           : buffer   bit_vector(3 downto 0);
     RXDATA2_N           : buffer   bit_vector(3 downto 0);
     RXCLK2_P            : buffer   bit;
     RXCLK2_N            : buffer   bit;
     RXDATA3_P           : buffer   bit_vector(3 downto 0);
     RXDATA3_N           : buffer   bit_vector(3 downto 0);
     RXCLK3_P            : buffer   bit;
     RXCLK3_N            : buffer   bit;
     TXCLK_SRC0_P        : buffer   bit;
     TXCLK_SRC0_N        : buffer   bit;
     TXCLK0_P            : in       bit;
     TXCLK0_N            : in       bit;
     TXDATA0_P           : in       bit_vector(3 downto 0);
     TXDATA0_N           : in       bit_vector(3 downto 0);
     TXCLK_SRC1_P        : buffer   bit;
     TXCLK_SRC1_N        : buffer   bit;
     TXCLK1_P            : in       bit;
     TXCLK1_N            : in       bit;
     TXDATA1_P           : in       bit_vector(3 downto 0);
     TXDATA1_N           : in       bit_vector(3 downto 0);
     TXCLK_SRC2_P        : buffer   bit;
     TXCLK_SRC2_N        : buffer   bit;
     TXCLK2_P            : in       bit;
     TXCLK2_N            : in       bit;
     TXDATA2_P           : in       bit_vector(3 downto 0);
     TXDATA2_N           : in       bit_vector(3 downto 0);
     TXCLK_SRC3_P        : buffer   bit;
     TXCLK_SRC3_N        : buffer   bit;
     TXCLK3_P            : in       bit;
     TXCLK3_N            : in       bit;
     TXDATA3_P           : in       bit_vector(3 downto 0);
     TXDATA3_N           : in       bit_vector(3 downto 0);
     SYNC_ERR            : out      bit_vector(3 downto 0);
     PHASE_INIT          : in       bit_vector(3 downto 0);
     PHASE_ERR           : out      bit_vector(3 downto 0);
     CSB                 : in       bit;
     RDB                 : in       bit;
     WRB                 : in       bit;
     D                   : inout    bit_vector(15 downto 0);
     A13                 : in       bit;
     A                   : in       bit_vector(12 downto 0);
     RSTB                : in       bit;
     ALE                 : in       bit;
     INTB                : out      bit;
     TCK                 : in       bit;
     TMS                 : in       bit;
     TDI                 : in       bit;
     TDO                 : out      bit;
     TRSTB               : in       bit;
     VSS_A               : linkage  bit_vector(1 to 10);
     C0                  : linkage  bit_vector(3 downto 0);
     C1                  : linkage  bit_vector(3 downto 0);
     NC_OUT              : linkage  bit_vector(1 to 8);
     VSS_IN              : linkage  bit_vector(1 to 4);
     RES                 : linkage  bit;
     RESK                : linkage  bit;
     QAVD                : linkage  bit_vector(1 to 4);
     AVDH_CRU_0          : linkage  bit_vector(1 to 6);
     AVDH_CRU_1          : linkage  bit_vector(1 to 6);
     AVDH_CRU_2          : linkage  bit_vector(1 to 6);
     AVDH_CRU_3          : linkage  bit_vector(1 to 6);
     AVDH_TX_0           : linkage  bit_vector(1 to 3);
     AVDH_TX_1           : linkage  bit_vector(1 to 3);
     AVDH_TX_2           : linkage  bit_vector(1 to 3);
     AVDH_TX_3           : linkage  bit_vector(1 to 3);
     AVDH_CSU_0          : linkage  bit_vector(1 to 4);
     AVDH_CSU_1          : linkage  bit_vector(1 to 4);
     AVDH_CSU_2          : linkage  bit_vector(1 to 4);
     AVDH_CSU_3          : linkage  bit_vector(1 to 4);
     AVDH_OIFM           : linkage  bit_vector(1 to 13);
     AVDL_0              : linkage  bit_vector(1 to 9);
     AVDL_1              : linkage  bit_vector(1 to 8);
     AVDL_2              : linkage  bit_vector(1 to 9);
     AVDL_3              : linkage  bit_vector(1 to 9);
     AVDL_OIFM           : linkage  bit_vector(1 to 16);
     VDDO                : linkage  bit_vector(1 to 33);
     VDDI                : linkage  bit_vector(1 to 23);
     VSS                 : linkage  bit_vector(1 to 186));

use STD_1149_1_1994.all;

attribute COMPONENT_CONFORMANCE of PM5395: entity is "STD_1149_1_1993";

attribute PIN_MAP of PM5395 : entity is PHYSICAL_PIN_MAP;

constant UBGA_580 : PIN_MAP_STRING :=
    "REFCLK_P            : (Y3,AM8,AM22,AE32)," &
    "REFCLK_N            : (W3,AM7,AM21,AF32)," &
    "RXD_P               : (AE1,AP13,AP27,Y34)," &
    "RXD_N               : (AD1,AP12,AP26,AA34)," &
    "TXD_P               : (AA1,AP9,AP23,AD34)," &
    "TXD_N               : (AB1,AP10,AP24,AC34)," &
    "SD                  : (AM17,AL17,AK17,AP17)," &
    "TXENB               : (AM16,AL16,AN16,AP16)," &
    "NC_SLSI             :  G4," &
    "RCLK                : (K2,L5,L3,L2)," &
    "TCLK                : (M5,M4,M3,M1)," &
    "SALM                : (N5,N4,N2,P4)," &
    "RXDATA0_P           : (D26,A26,A27,D28)," &
    "RXDATA0_N           : (C26,B26,B27,C28)," &
    "RXCLK0_P            :  D27," &
    "RXCLK0_N            :  C27," &
    "RXDATA1_P           : (D23,A23,A24,D25)," &
    "RXDATA1_N           : (C23,B23,B24,C25)," &
    "RXCLK1_P            :  D24," &
    "RXCLK1_N            :  C24," &
    "RXDATA2_P           : (D20,A20,A21,D22)," &
    "RXDATA2_N           : (C20,B20,B21,C22)," &
    "RXCLK2_P            :  D21," &
    "RXCLK2_N            :  C21," &
    "RXDATA3_P           : (D17,A17,A18,D19)," &
    "RXDATA3_N           : (C17,B17,B18,C19)," &
    "RXCLK3_P            :  D18," &
    "RXCLK3_N            :  C18," &
    "TXCLK_SRC0_P        :  A25," &
    "TXCLK_SRC0_N        :  B25," &
    "TXCLK0_P            :  D14," &
    "TXCLK0_N            :  C14," &
    "TXDATA0_P           : (D13,A13,A14,D15)," &
    "TXDATA0_N           : (C13,B13,B14,C15)," &
    "TXCLK_SRC1_P        :  A22," &
    "TXCLK_SRC1_N        :  B22," &
    "TXCLK1_P            :  A11," &
    "TXCLK1_N            :  B11," &
    "TXDATA1_P           : (A10,D11,D12,A12)," &
    "TXDATA1_N           : (B10,C11,C12,B12)," &
    "TXCLK_SRC2_P        :  A19," &
    "TXCLK_SRC2_N        :  B19," &
    "TXCLK2_P            :  D9," &
    "TXCLK2_N            :  C9," &
    "TXDATA2_P           : (D8,A8,A9,D10)," &
    "TXDATA2_N           : (C8,B8,B9,C10)," &
    "TXCLK_SRC3_P        :  C16," &
    "TXCLK_SRC3_N        :  D16," &
    "TXCLK3_P            :  A6," &
    "TXCLK3_N            :  B6," &
    "TXDATA3_P           : (C5,D6,D7,A7)," &
    "TXDATA3_N           : (D5,C6,C7,B7)," &
    "SYNC_ERR            : (G3,G2,G1,H4)," &
    "PHASE_INIT          : (H3,H1,J5,J4)," &
    "PHASE_ERR           : (J2,J1,K4,K3)," &
    "CSB                 :  L33," &
    "RDB                 :  L31," &
    "WRB                 :  L32," &
    "D                   : (G34,G33,G32,H34,H33,H30,H32,J34,J33,J31," &
                           "J32,K34,K33,K31,K32,L34)," &
    "A13                 :  R31," &
    "A                   : (R33,P32,P31,P30,P33,P34,N32,N31,N33," &
                           "N34,M31,M30,M33)," &
    "RSTB                :  R32," &
    "ALE                 :  M34," &
    "INTB                :  T34," &
    "TCK                 :  P3," &
    "TMS                 :  P2," &
    "TDI                 :  R5," &
    "TDO                 :  R4," &
    "TRSTB               :  R2," &
    "VSS_A               : (D29,C29,AF2,AF3,AN14,AM14,AN28,AM28,W33,W32)," &
    "C0                  : (AG1,AP15,AP29,V34)," &
    "C1                  : (AG2,AN15,AN29,V33)," &
    "NC_OUT              : (T5,AN18,AP19,T33,T2,AM19,AL19,T31)," &
    "VSS_IN              : (T4,AM18,AN19,T30)," &
    "RES                 :  B30," &
    "RESK                :  C30," &
    "QAVD                : (AF4,AL14,AL28,W31)," &
    "AVDH_CRU_0          : (Y32,Y31,Y30,V32,V31,V30)," &
    "AVDH_CRU_1          : (AM27,AL27,AK27,AM29,AL29,AK29)," &
    "AVDH_CRU_2          : (AM13,AL13,AK13,AM15,AL15,AK15)," &
    "AVDH_CRU_3          : (AE5,AE4,AE3,AG4,AG3,AG5)," &
    "AVDH_TX_0           : (AB32,AB31,AB30)," &
    "AVDH_TX_1           : (AM25,AL25,AK25)," &
    "AVDH_TX_2           : (AM11,AL11,AK11)," &
    "AVDH_TX_3           : (AC5,AC4,AC3)," &
    "AVDH_CSU_0          : (AF31,AF30,AE31,AE30)," &
    "AVDH_CSU_1          : (AL21,AK21,AL22,AK22)," &
    "AVDH_CSU_2          : (AL7,AK7,AL8,AK8)," &
    "AVDH_CSU_3          : (W5,W4,Y5,Y4)," &
    "AVDH_OIFM           : (D30,E30,E27,E25,E23,E21,E19,E17,E14,E12," &
                           "E10,E8,E6)," &
    "AVDL_0              : (W30,AA30,AC30,AD30,AG34,AG33,AG32,AG31,AG30)," &
    "AVDL_1              : (AK28,AK26,AK24,AK23,AL20,AM20,AN20,AP20)," &
    "AVDL_2              : (AK14,AK12,AK10,AK9,AK6,AL6,AM6,AN6,AP6)," &
    "AVDL_3              : (AF5,AD5,AB5,AA5,V5,V4,V3,V2,V1)," &
    "AVDL_OIFM           : (A29,B29,E29,E28,E26,E24,E22,E20,E18,E16," &
                           "E15,E13,E11,E9,E7,E5)," &
    "VDDO                : (G31,H2,H31,K30,M32,R34,AP18,AN17,J3,H5," &
                           "G5,F1,F2,F3,F4,F5,P5,U1,U2,U3," &
                           "U4,U5,AK20,U30,U31,U32,U33,U34,F30," &
                           "F31,F32,F33,F34)," &
    "VDDI                : (G30,J30,L30,N30,R30,T32,AK19,AK18,AL18,AK16," &
                           "T3,R3,N3,M2,L4,K5,B15,A15,B16,AJ4," &
                           "AJ5,AH30,AH31)," &
    "VSS                 : (A1,B1,C1,D1,E1,A2,B2,C2,D2," &
                           "E2,K1,L1,N1,P1,R1,T1,W1,W2," &
                           "Y1,Y2,AA2,AA3,AA4,AB2,AB3,AB4,AC1," &
                           "AC2,AD2,AD3,AD4,AE2,AF1,AH1,AH2,AH3," &
                           "AH4,AH5,AJ1,AJ2,AJ3,AK1,AK2,AK3,AK4," &
                           "AK5,AL1,AL2,AL3,AL4,AL5,AM1,AM2,AM3," &
                           "AM4,AM5,AN1,AN2,AN3,AN4,AN5,AP1,AP2," &
                           "AP3,AP4,AP5,AN7,AP7,AN8,AP8,AL9,AM9," &
                           "AN9,AL10,AM10,AN10,AN11,AP11,AL12,AM12,AN12," &
                           "AN13,AP14,AN21,AP21,AN22,AP22,AL23,AM23,AN23," &
                           "AL24,AM24,AN24,AN25,AP25,AL26,AM26,AN26,AP30," &
                           "AP31,AP32,AP33,AP34,AN30,AN31,AN32,AN33,AN34," &
                           "AM30,AM31,AM32,AM33,AM34,AL30,AL31,AL32,AL33," &
                           "AL34,AK30,AK31,AK32,AK33,AK34,AJ30,AJ31,AJ32," &
                           "AJ33,AJ34,AH32,AH33,AH34,AF33,AF34,AE33,AE34," &
                           "AD31,AD32,AD33,AC31,AC32,AC33,AB33,AB34,AA31," &
                           "AA32,AA33,Y33,W34,E31,E32,E33,E34,D31," &
                           "D32,D33,D34,C31,C32,C33,C34,B31,B32," &
                           "B33,B34,A30,A31,A32,A33,A34,A28,B28," &
                           "A3,A4,A5,B3,B4,B5,C3,C4,D3," &
                           "D4,E3,E4,A16,AP28,AN27)";

attribute PORT_GROUPING of PM5395 : entity is "DIFFERENTIAL_VOLTAGE" &
 "((RXCLK0_P, RXCLK0_N)," &
  "(RXCLK1_P, RXCLK1_N)," &
  "(RXCLK2_P, RXCLK2_N)," &
  "(RXCLK3_P, RXCLK3_N)," &
  "(TXCLK0_P, TXCLK0_N)," &
  "(TXCLK1_P, TXCLK1_N)," &
  "(TXCLK2_P, TXCLK2_N)," &
  "(TXCLK3_P, TXCLK3_N)," &
  "(RXDATA0_P(0), RXDATA0_N(0))," &
  "(RXDATA0_P(1), RXDATA0_N(1))," &
  "(RXDATA0_P(2), RXDATA0_N(2))," &
  "(RXDATA0_P(3), RXDATA0_N(3))," &
  "(RXDATA1_P(0), RXDATA1_N(0))," &
  "(RXDATA1_P(1), RXDATA1_N(1))," &
  "(RXDATA1_P(2), RXDATA1_N(2))," &
  "(RXDATA1_P(3), RXDATA1_N(3))," &
  "(RXDATA2_P(0), RXDATA2_N(0))," &
  "(RXDATA2_P(1), RXDATA2_N(1))," &
  "(RXDATA2_P(2), RXDATA2_N(2))," &
  "(RXDATA2_P(3), RXDATA2_N(3))," &
  "(RXDATA3_P(0), RXDATA3_N(0))," &
  "(RXDATA3_P(1), RXDATA3_N(1))," &
  "(RXDATA3_P(2), RXDATA3_N(2))," &
  "(RXDATA3_P(3), RXDATA3_N(3))," &
  "(TXDATA0_P(0), TXDATA0_N(0))," &
  "(TXDATA0_P(1), TXDATA0_N(1))," &
  "(TXDATA0_P(2), TXDATA0_N(2))," &
  "(TXDATA0_P(3), TXDATA0_N(3))," &
  "(TXDATA1_P(0), TXDATA1_N(0))," &
  "(TXDATA1_P(1), TXDATA1_N(1))," &
  "(TXDATA1_P(2), TXDATA1_N(2))," &
  "(TXDATA1_P(3), TXDATA1_N(3))," &
  "(TXDATA2_P(0), TXDATA2_N(0))," &
  "(TXDATA2_P(1), TXDATA2_N(1))," &
  "(TXDATA2_P(2), TXDATA2_N(2))," &
  "(TXDATA2_P(3), TXDATA2_N(3))," &
  "(TXDATA3_P(0), TXDATA3_N(0))," &
  "(TXDATA3_P(1), TXDATA3_N(1))," &
  "(TXDATA3_P(2), TXDATA3_N(2))," &
  "(TXDATA3_P(3), TXDATA3_N(3))," &
  "(TXCLK_SRC0_P, TXCLK_SRC0_N)," &
  "(TXCLK_SRC1_P, TXCLK_SRC1_N)," &
  "(TXCLK_SRC2_P, TXCLK_SRC2_N)," &
  "(TXCLK_SRC3_P, TXCLK_SRC3_N))";

attribute TAP_SCAN_IN of      TDI : signal is true;
attribute TAP_SCAN_MODE of    TMS : signal is true;
attribute TAP_SCAN_OUT of     TDO : signal is true;
attribute TAP_SCAN_RESET of TRSTB : signal is true;
attribute TAP_SCAN_CLOCK of   TCK : signal is (4.0e6,BOTH);

attribute INSTRUCTION_LENGTH of PM5395 : entity is 3;

attribute INSTRUCTION_OPCODE of PM5395 : entity is
 "EXTEST (000)," &
 "SAMPLE (010)," &
 "IDCODE (001)," &
 "BYPASS (011,100,110,111)," &
 "STCTEST (101)";

attribute INSTRUCTION_CAPTURE of PM5395 : entity is "001";

attribute IDCODE_REGISTER of PM5395 : entity is
 "0001"              &    -- 4 bit version = 1H
 "0101001110010101"  &    -- 16 bit part number = 5395H
 "00001100110"       &    -- 11 bit manufacturer's code
 "1";                     -- mandatory LSB by the standard
                          -- manufacturer's code + LSB = 0CDH

attribute REGISTER_ACCESS of PM5395 : entity is "Boundary (STCTEST)";

attribute BOUNDARY_LENGTH of PM5395 : entity is 154;

attribute BOUNDARY_REGISTER of PM5395 : entity is
--num  cell    port                  function  safe  [ccell disval rslt]
"153  (BC_1,   *,                    control,  1)," &
"152  (BC_7,   D(15),                bidir,    X, 153,   1,   Z)," &
"151  (BC_1,   *,                    control,  1)," &
"150  (BC_7,   D(14),                bidir,    X, 151,   1,   Z)," &
"149  (BC_1,   *,                    control,  1)," &
"148  (BC_7,   D(13),                bidir,    X, 149,   1,   Z)," &
"147  (BC_1,   *,                    control,  1)," &
"146  (BC_7,   D(12),                bidir,    X, 147,   1,   Z)," &
"145  (BC_1,   *,                    control,  1)," &
"144  (BC_7,   D(11),                bidir,    X, 145,   1,   Z)," &
"143  (BC_1,   *,                    control,  1)," &
"142  (BC_7,   D(10),                bidir,    X, 143,   1,   Z)," &
"141  (BC_1,   *,                    control,  1)," &
"140  (BC_7,   D(9),                 bidir,    X, 141,   1,   Z)," &
"139  (BC_1,   *,                    control,  1)," &
"138  (BC_7,   D(8),                 bidir,    X, 139,   1,   Z)," &
"137  (BC_1,   *,                    control,  1)," &
"136  (BC_7,   D(7),                 bidir,    X, 137,   1,   Z)," &
"135  (BC_1,   *,                    control,  1)," &
"134  (BC_7,   D(6),                 bidir,    X, 135,   1,   Z)," &
"133  (BC_1,   *,                    control,  1)," &
"132  (BC_7,   D(5),                 bidir,    X, 133,   1,   Z)," &
"131  (BC_1,   *,                    control,  1)," &
"130  (BC_7,   D(4),                 bidir,    X, 131,   1,   Z)," &
"129  (BC_1,   *,                    control,  1)," &
"128  (BC_7,   D(3),                 bidir,    X, 129,   1,   Z)," &
"127  (BC_1,   *,                    control,  1)," &
"126  (BC_7,   D(2),                 bidir,    X, 127,   1,   Z)," &
"125  (BC_1,   *,                    control,  1)," &
"124  (BC_7,   D(1),                 bidir,    X, 125,   1,   Z)," &
"123  (BC_1,   *,                    control,  1)," &
"122  (BC_7,   D(0),                 bidir,    X, 123,   1,   Z)," &
"121  (BC_4,   CSB,                  input,    X)," &
"120  (BC_4,   RDB,                  input,    X)," &
"119  (BC_4,   WRB,                  input,    X)," &
"118  (BC_4,   ALE,                  input,    X)," &
"117  (BC_4,   A(0),                 input,    X)," &
"116  (BC_4,   A(1),                 input,    X)," &
"115  (BC_4,   A(2),                 input,    X)," &
"114  (BC_4,   A(3),                 input,    X)," &
"113  (BC_4,   A(4),                 input,    X)," &
"112  (BC_4,   A(5),                 input,    X)," &
"111  (BC_4,   A(6),                 input,    X)," &
"110  (BC_4,   A(7),                 input,    X)," &
"109  (BC_4,   A(8),                 input,    X)," &
"108  (BC_4,   A(9),                 input,    X)," &
"107  (BC_4,   A(10),                input,    X)," &
"106  (BC_4,   A(11),                input,    X)," &
"105  (BC_4,   A(12),                input,    X)," &
"104  (BC_4,   A13,                  input,    X)," &
"103  (BC_4,   RSTB,                 input,    X)," &
"102  (BC_1,   *,                    control,  1)," &
"101  (BC_1,   INTB,                 output3,  X, 102,   1,   Z)," &
"100  (BC_4,   SD(0),                input,    X)," &
"99   (BC_4,   SD(1),                input,    X)," &
"98   (BC_4,   SD(2),                input,    X)," &
"97   (BC_4,   SD(3),                input,    X)," &
"96   (BC_1,   *,                    control,  1)," &
"95   (BC_1,   TXENB(0),             output3,  X, 96,    1,   Z)," &
"94   (BC_1,   *,                    control,  1)," &
"93   (BC_1,   TXENB(1),             output3,  X, 94,    1,   Z)," &
"92   (BC_1,   *,                    control,  1)," &
"91   (BC_1,   TXENB(2),             output3,  X, 92,    1,   Z)," &
"90   (BC_1,   *,                    control,  1)," &
"89   (BC_1,   TXENB(3),             output3,  X, 90,    1,   Z)," &
"88   (BC_1,   *,                    control,  1)," &
"87   (BC_1,   SALM(0),              output3,  X, 88,    1,   Z)," &
"86   (BC_1,   *,                    control,  1)," &
"85   (BC_1,   SALM(1),              output3,  X, 86,    1,   Z)," &
"84   (BC_1,   *,                    control,  1)," &
"83   (BC_1,   SALM(2),              output3,  X, 84,    1,   Z)," &
"82   (BC_1,   *,                    control,  1)," &
"81   (BC_1,   SALM(3),              output3,  X, 82,    1,   Z)," &
"80   (BC_1,   *,                    control,  1)," &
"79   (BC_1,   TCLK(0),              output3,  X, 80,    1,   Z)," &
"78   (BC_1,   *,                    control,  1)," &
"77   (BC_1,   TCLK(1),              output3,  X, 78,    1,   Z)," &
"76   (BC_1,   *,                    control,  1)," &
"75   (BC_1,   TCLK(2),              output3,  X, 76,    1,   Z)," &
"74   (BC_1,   *,                    control,  1)," &
"73   (BC_1,   TCLK(3),              output3,  X, 74,    1,   Z)," &
"72   (BC_1,   *,                    control,  1)," &
"71   (BC_1,   RCLK(0),              output3,  X, 72,    1,   Z)," &
"70   (BC_1,   *,                    control,  1)," &
"69   (BC_1,   RCLK(1),              output3,  X, 70,    1,   Z)," &
"68   (BC_1,   *,                    control,  1)," &
"67   (BC_1,   RCLK(2),              output3,  X, 68,    1,   Z)," &
"66   (BC_1,   *,                    control,  1)," &
"65   (BC_1,   RCLK(3),              output3,  X, 66,    1,   Z)," &
"64   (BC_1,   *,                    control,  1)," &
"63   (BC_1,   PHASE_ERR(0),         output3,  X, 64,    1,   Z)," &
"62   (BC_1,   *,                    control,  1)," &
"61   (BC_1,   PHASE_ERR(1),         output3,  X, 62,    1,   Z)," &
"60   (BC_1,   *,                    control,  1)," &
"59   (BC_1,   PHASE_ERR(2),         output3,  X, 60,    1,   Z)," &
"58   (BC_1,   *,                    control,  1)," &
"57   (BC_1,   PHASE_ERR(3),         output3,  X, 58,    1,   Z)," &
"56   (BC_4,   PHASE_INIT(0),        input,    X)," &
"55   (BC_4,   PHASE_INIT(1),        input,    X)," &
"54   (BC_4,   PHASE_INIT(2),        input,    X)," &
"53   (BC_4,   PHASE_INIT(3),        input,    X)," &
"52   (BC_1,   *,                    control,  1)," &
"51   (BC_1,   SYNC_ERR(0),          output3,  X, 52,    1,   Z)," &
"50   (BC_1,   *,                    control,  1)," &
"49   (BC_1,   SYNC_ERR(1),          output3,  X, 50,    1,   Z)," &
"48   (BC_1,   *,                    control,  1)," &
"47   (BC_1,   SYNC_ERR(2),          output3,  X, 48,    1,   Z)," &
"46   (BC_1,   *,                    control,  1)," &
"45   (BC_1,   SYNC_ERR(3),          output3,  X, 46,    1,   Z)," &
"44   (BC_4,   *,                    internal, X)," &
"43   (BC_4,   TXDATA3_P(3),         input,    X)," &
"42   (BC_4,   TXDATA3_P(2),         input,    X)," &
"41   (BC_4,   TXCLK3_P,             input,    X)," &
"40   (BC_4,   TXDATA3_P(1),         input,    X)," &
"39   (BC_4,   TXDATA3_P(0),         input,    X)," &
"38   (BC_4,   TXDATA2_P(3),         input,    X)," &
"37   (BC_4,   TXDATA2_P(2),         input,    X)," &
"36   (BC_4,   TXCLK2_P,             input,    X)," &
"35   (BC_4,   TXDATA2_P(1),         input,    X)," &
"34   (BC_4,   TXDATA2_P(0),         input,    X)," &
"33   (BC_4,   TXDATA1_P(3),         input,    X)," &
"32   (BC_4,   TXDATA1_P(2),         input,    X)," &
"31   (BC_4,   TXCLK1_P,             input,    X)," &
"30   (BC_4,   TXDATA1_P(1),         input,    X)," &
"29   (BC_4,   TXDATA1_P(0),         input,    X)," &
"28   (BC_4,   TXDATA0_P(3),         input,    X)," &
"27   (BC_4,   TXDATA0_P(2),         input,    X)," &
"26   (BC_4,   TXCLK0_P,             input,    X)," &
"25   (BC_4,   TXDATA0_P(1),         input,    X)," &
"24   (BC_4,   TXDATA0_P(0),         input,    X)," &
"23   (BC_1,   TXCLK_SRC3_P,         output2,  X)," &
"22   (BC_1,   RXDATA3_P(3),         output2,  X)," &
"21   (BC_1,   RXDATA3_P(2),         output2,  X)," &
"20   (BC_1,   RXCLK3_P,             output2,  X)," &
"19   (BC_1,   RXDATA3_P(1),         output2,  X)," &
"18   (BC_1,   RXDATA3_P(0),         output2,  X)," &
"17   (BC_1,   TXCLK_SRC2_P,         output2,  X)," &
"16   (BC_1,   RXDATA2_P(3),         output2,  X)," &
"15   (BC_1,   RXDATA2_P(2),         output2,  X)," &
"14   (BC_1,   RXCLK2_P,             output2,  X)," &
"13   (BC_1,   RXDATA2_P(1),         output2,  X)," &
"12   (BC_1,   RXDATA2_P(0),         output2,  X)," &
"11   (BC_1,   TXCLK_SRC1_P,         output2,  X)," &
"10   (BC_1,   RXDATA1_P(3),         output2,  X)," &
"9    (BC_1,   RXDATA1_P(2),         output2,  X)," &
"8    (BC_1,   RXCLK1_P,             output2,  X)," &
"7    (BC_1,   RXDATA1_P(1),         output2,  X)," &
"6    (BC_1,   RXDATA1_P(0),         output2,  X)," &
"5    (BC_1,   TXCLK_SRC0_P,         output2,  X)," &
"4    (BC_1,   RXDATA0_P(3),         output2,  X)," &
"3    (BC_1,   RXDATA0_P(2),         output2,  X)," &
"2    (BC_1,   RXCLK0_P,             output2,  X)," &
"1    (BC_1,   RXDATA0_P(1),         output2,  X)," &
"0    (BC_1,   RXDATA0_P(0),         output2,  X)";

end PM5395;


This library contains 8972 BSDL files (for 7016 distinct entities) from 68 vendors
Last BSDL model (sam4s16b) was added on Dec 7, 2017 14:26
info@bsdl.info