BSDL Files Library for JTAG
The only free public library that contains thousands of BSDL (Boundary Scan Description Language) models to use with BS/JTAG tools

Quick Instruments - a new way for board- and system-level test
BSDL File: CX28250 Download View details  


---------------------------------------------------------------------------
-- Boundary Scan Description Language (IEEE 1149.1b)
-- BSDL for Device CX28250
-- BSDL File Created by 'topgen' revision 3.8
-- (c) 1998,1999 Conexant Systems Inc.
---------------------------------------------------------------------------

entity CX28250 is  generic (PHYSICAL_PIN_MAP : string := "BGA_156");

  port (
    STATOUT_PIN_0           : out      bit;
    M_INT_N_PIN             : out      bit;
    M_W_R_N_RD_N_PIN        : in       bit;
    M_CS_N_PIN              : in       bit;
    M_AS_N_WR_N_PIN         : in       bit;
    VDDO_1                  : linkage  bit;
    VDDO_2                  : linkage  bit;
    VSSO_1                  : linkage  bit;
    VSSO_2                  : linkage  bit;
    VSSO_3                  : linkage  bit;
    M_ADDR_PIN_6            : in       bit;
    M_ADDR_PIN_5            : in       bit;
    M_ADDR_PIN_1            : in       bit;
    M_ADDR_PIN_2            : in       bit;
    M_ADDR_PIN_4            : in       bit;
    M_ADDR_PIN_3            : in       bit;
    M_ADDR_PIN_0            : in       bit;
    VSS_1                   : linkage  bit;
    VSS_2                   : linkage  bit;
    VSS_3                   : linkage  bit;
    M_DATA_PIN_7            : inout    bit;
    M_DATA_PIN_6            : inout    bit;
    M_DATA_PIN_5            : inout    bit;
    M_RDY_PIN               : out      bit;
    M_DATA_PIN_4            : inout    bit;
    VDD_1                   : linkage  bit;
    VDDO_3                  : linkage  bit;
    M_DATA_PIN_3            : inout    bit;
    M_DATA_PIN_2            : inout    bit;
    M_DATA_PIN_0            : inout    bit;
    M_SYNCMODE_PIN          : in       bit;
    M_DATA_PIN_1            : inout    bit;
    VSSO_4                  : linkage  bit;
    LTXCLKINN               : linkage  bit;
    LTXCLKINP               : linkage  bit;
    O_IN_PIN                : in       bit;
    O_OUT_PIN               : out      bit;
    M_CLK_PIN               : in       bit;
    S_XMT_FRAME_REF_PIN     : out      bit;
    HARDWARE_RST_N_PIN      : in       bit;
    J_TDI_PIN               : in       bit;
    S_RCV_FRAME_REF_PIN     : out      bit;
    J_TRST_N_PIN            : in       bit;
    O_CLK_PIN               : in       bit;
    XMT_HDLC_DATA_PIN       : in       bit;
    J_TCK_PIN               : in       bit;
    J_TDO_PIN               : out      bit;
    J_TMS_PIN               : in       bit;
    AVDD_SYN_VCO1           : linkage  bit;
    AVDD_SYN_VCO2           : linkage  bit;
    AVSS_SYN_VCO1           : linkage  bit;
    AVSS_SYN_VCO2           : linkage  bit;
    RXPLLCLK                : linkage  bit;
    AVDD_SYN_CORE           : linkage  bit;
    AVSS_SYN_CORE1          : linkage  bit;
    AVSS_SYN_CORE2          : linkage  bit;
    LTXPFP                  : linkage  bit;
    LTXPFN                  : linkage  bit;
    LTXCLKN                 : linkage  bit;
    SPARE_L7                : linkage  bit;
    LTXCLKP                 : linkage  bit;
    AVSS_CLK                : linkage  bit;
    AVSS_DATA               : linkage  bit;
    LTXDATAN                : linkage  bit;
    LTXDATAP                : linkage  bit;
    LSIGDET                 : linkage  bit;
    AVDD_VCO1               : linkage  bit;
    AVDD_VCO2               : linkage  bit;
    AVSS_VCO1               : linkage  bit;
    LRXDATAN                : linkage  bit;
    LRXDATAP                : linkage  bit;
    LRXPFN                  : linkage  bit;
    LRXPFP                  : linkage  bit;
    VGG                     : linkage  bit;
    U_XMT_ADDR_PIN_0        : in       bit;
    U_XMT_ADDR_PIN_2        : in       bit;
    U_XMT_ADDR_PIN_3        : in       bit;
    U_XMT_ADDR_PIN_1        : in       bit;
    U_XMT_ADDR_PIN_4        : in       bit;
    SPARE_N14               : linkage  bit;
    SPARE_L11               : linkage  bit;
    LRXCLKP                 : linkage  bit;
    LRXCLKN                 : linkage  bit;
    SPARE_M13               : linkage  bit;
    U_XMT_DATA_PIN_0        : in       bit;
    U_XMT_DATA_PIN_7        : in       bit;
    U_XMT_DATA_PIN_6        : in       bit;
    U_XMT_DATA_PIN_1        : in       bit;
    U_XMT_DATA_PIN_3        : in       bit;
    VDDO_4                  : linkage  bit;
    VSSO_5                  : linkage  bit;
    U_XMT_DATA_PIN_10       : in       bit;
    U_XMT_DATA_PIN_2        : in       bit;
    SPARE_H12               : linkage  bit;
    SPARE_G11               : linkage  bit;
    U_XMT_DATA_PIN_4        : in       bit;
    U_XMT_DATA_PIN_8        : in       bit;
    U_XMT_DATA_PIN_5        : in       bit;
    U_XMT_DATA_PIN_9        : in       bit;
    U_XMT_DATA_PIN_12       : in       bit;
    U_XMT_DATA_PIN_13       : in       bit;
    U_XMT_DATA_PIN_14       : in       bit;
    U_XMT_DATA_PIN_11       : in       bit;
    U_XMT_DATA_PIN_15       : in       bit;
    U_XMT_PRTY_PIN          : in       bit;
    INS_PTH_AIS_PIN         : in       bit;
    PFOUT_PIN               : out      bit;
    U_XMT_SOC_PIN           : in       bit;
    U_XMT_CLK_PIN           : in       bit;
    U_XMT_ENB_N_PIN         : in       bit;
    U_XMT_CLAV_PIN          : out      bit;
    VSSO_6                  : linkage  bit;
    VDDO_5                  : linkage  bit;
    U_RCV_CLK_PIN           : in       bit;
    U_RCV_SOC_PIN           : out      bit;
    U_RCV_ENB_N_PIN         : in       bit;
    LFOUT_PIN               : out      bit;
    U_RCV_CLAV_PIN          : out      bit;
    INS_LN_AIS_PIN          : in       bit;
    U_RCV_DATA_PIN_0        : out      bit;
    U_RCV_DATA_PIN_1        : out      bit;
    U_RCV_DATA_PIN_2        : out      bit;
    VSS_4                   : linkage  bit;
    U_RCV_DATA_PIN_4        : out      bit;
    U_RCV_DATA_PIN_3        : out      bit;
    U_RCV_DATA_PIN_5        : out      bit;
    U_RCV_DATA_PIN_6        : out      bit;
    VDD_2                   : linkage  bit;
    VDDO_6                  : linkage  bit;
    U_RCV_DATA_PIN_10       : out      bit;
    U_RCV_DATA_PIN_9        : out      bit;
    U_RCV_DATA_PIN_7        : out      bit;
    U_RCV_DATA_PIN_8        : out      bit;
    U_RCV_DATA_PIN_11       : out      bit;
    VSSO_7                  : linkage  bit;
    VDDO_7                  : linkage  bit;
    VDDO_8                  : linkage  bit;
    U_RCV_DATA_PIN_12       : out      bit;
    U_RCV_DATA_PIN_13       : out      bit;
    U_RCV_DATA_PIN_14       : out      bit;
    SPARE_D7                : linkage  bit;
    U_RCV_DATA_PIN_15       : out      bit;
    U_RCV_PRTY_PIN          : out      bit;
    VSS_5                   : linkage  bit;
    U_RCV_ADDR_PIN_0        : in       bit;
    U_RCV_ADDR_PIN_1        : in       bit;
    U_RCV_ADDR_PIN_2        : in       bit;
    U_RCV_ADDR_PIN_3        : in       bit;
    U_RCV_ADDR_PIN_4        : in       bit;
    STATOUT_PIN_7           : out      bit;
    STATOUT_PIN_4           : out      bit;
    STATOUT_PIN_5           : out      bit;
    STATOUT_PIN_1           : out      bit;
    STATOUT_PIN_2           : out      bit;
    STATOUT_PIN_6           : out      bit;
    STATOUT_PIN_3           : out      bit
  );

  -- Libraries 
  -- bcad won't recognize the reference to the work library.
  -- use work.STD_1149_1_1994.all;
  use STD_1149_1_1994.all;

  attribute COMPONENT_CONFORMANCE of CX28250 : entity is
    "STD_1149_1_1993";

  attribute PIN_MAP of CX28250 : entity is PHYSICAL_PIN_MAP;

  constant BGA_156: PIN_MAP_STRING :=
    "STATOUT_PIN_0           : B2," &
    "M_INT_N_PIN             : B1," &
    "M_W_R_N_RD_N_PIN        : C2," &
    "M_CS_N_PIN              : C1," &
    "M_AS_N_WR_N_PIN         : D2," &
    "VDDO_1                  : D3," &
    "VDDO_2                  : D1," &
    "VSSO_1                  : D4," &
    "VSSO_2                  : E2," &
    "VSSO_3                  : E1," &
    "M_ADDR_PIN_6            : E3," &
    "M_ADDR_PIN_5            : E4," &
    "M_ADDR_PIN_1            : F4," &
    "M_ADDR_PIN_2            : F3," &
    "M_ADDR_PIN_4            : F2," &
    "M_ADDR_PIN_3            : F1," &
    "M_ADDR_PIN_0            : G2," &
    "VSS_1                   : G1," &
    "VSS_2                   : G4," &
    "VSS_3                   : H3," &
    "M_DATA_PIN_7            : G3," &
    "M_DATA_PIN_6            : H1," &
    "M_DATA_PIN_5            : H2," &
    "M_RDY_PIN               : H4," &
    "M_DATA_PIN_4            : J1," &
    "VDD_1                   : J3," &
    "VDDO_3                  : J2," &
    "M_DATA_PIN_3            : J4," &
    "M_DATA_PIN_2            : K1," &
    "M_DATA_PIN_0            : K2," &
    "M_SYNCMODE_PIN          : M1," &
    "M_DATA_PIN_1            : K3," &
    "VSSO_4                  : L1," &
    "LTXCLKINN               : L2," &
    "LTXCLKINP               : K4," &
    "O_IN_PIN                : M2," &
    "O_OUT_PIN               : N1," &
    "M_CLK_PIN               : L3," &
    "S_XMT_FRAME_REF_PIN     : N2," &
    "HARDWARE_RST_N_PIN      : M3," &
    "J_TDI_PIN               : L4," &
    "S_RCV_FRAME_REF_PIN     : P2," &
    "J_TRST_N_PIN            : M4," &
    "O_CLK_PIN               : N3," &
    "XMT_HDLC_DATA_PIN       : P3," &
    "J_TCK_PIN               : N4," &
    "J_TDO_PIN               : N5," &
    "J_TMS_PIN               : P4," &
    "AVDD_SYN_VCO1           : L5," &
    "AVDD_SYN_VCO2           : M5," &
    "AVSS_SYN_VCO1           : N6," &
    "AVSS_SYN_VCO2           : P6," &
    "RXPLLCLK                : P5," &
    "AVDD_SYN_CORE           : M7," &
    "AVSS_SYN_CORE1          : N7," &
    "AVSS_SYN_CORE2          : N10," &
    "LTXPFP                  : M6," &
    "LTXPFN                  : L6," &
    "LTXCLKN                 : P7," &
    "SPARE_L7                : L7," &
    "LTXCLKP                 : M8," &
    "AVSS_CLK                : L8," &
    "AVSS_DATA               : M11," &
    "LTXDATAN                : P8," &
    "LTXDATAP                : N8," &
    "LSIGDET                 : L9," &
    "AVDD_VCO1               : M9," &
    "AVDD_VCO2               : N9," &
    "AVSS_VCO1               : P9," &
    "LRXDATAN                : P10," &
    "LRXDATAP                : M10," &
    "LRXPFN                  : L10," &
    "LRXPFP                  : P11," &
    "VGG                     : N11," &
    "U_XMT_ADDR_PIN_0        : P12," &
    "U_XMT_ADDR_PIN_2        : N12," &
    "U_XMT_ADDR_PIN_3        : P13," &
    "U_XMT_ADDR_PIN_1        : M12," &
    "U_XMT_ADDR_PIN_4        : N13," &
    "SPARE_N14               : N14," &
    "SPARE_L11               : L11," &
    "LRXCLKP                 : L12," &
    "LRXCLKN                 : K12," &
    "SPARE_M13               : M13," &
    "U_XMT_DATA_PIN_0        : M14," &
    "U_XMT_DATA_PIN_7        : J11," &
    "U_XMT_DATA_PIN_6        : J12," &
    "U_XMT_DATA_PIN_1        : L13," &
    "U_XMT_DATA_PIN_3        : K13," &
    "VDDO_4                  : K11," &
    "VSSO_5                  : J13," &
    "U_XMT_DATA_PIN_10       : H11," &
    "U_XMT_DATA_PIN_2        : L14," &
    "SPARE_H12               : H12," &
    "SPARE_G11               : G11," &
    "U_XMT_DATA_PIN_4        : K14," &
    "U_XMT_DATA_PIN_8        : H13," &
    "U_XMT_DATA_PIN_5        : J14," &
    "U_XMT_DATA_PIN_9        : H14," &
    "U_XMT_DATA_PIN_12       : G14," &
    "U_XMT_DATA_PIN_13       : G13," &
    "U_XMT_DATA_PIN_14       : F14," &
    "U_XMT_DATA_PIN_11       : G12," &
    "U_XMT_DATA_PIN_15       : F13," &
    "U_XMT_PRTY_PIN          : E14," &
    "INS_PTH_AIS_PIN         : F11," &
    "PFOUT_PIN               : F12," &
    "U_XMT_SOC_PIN           : E13," &
    "U_XMT_CLK_PIN           : D14," &
    "U_XMT_ENB_N_PIN         : E11," &
    "U_XMT_CLAV_PIN          : E12," &
    "VSSO_6                  : D12," &
    "VDDO_5                  : D13," &
    "U_RCV_CLK_PIN           : C14," &
    "U_RCV_SOC_PIN           : B14," &
    "U_RCV_ENB_N_PIN         : C13," &
    "LFOUT_PIN               : B13," &
    "U_RCV_CLAV_PIN          : C12," &
    "INS_LN_AIS_PIN          : A13," &
    "U_RCV_DATA_PIN_0        : B12," &
    "U_RCV_DATA_PIN_1        : A12," &
    "U_RCV_DATA_PIN_2        : B11," &
    "VSS_4                   : C11," &
    "U_RCV_DATA_PIN_4        : D11," &
    "U_RCV_DATA_PIN_3        : A11," &
    "U_RCV_DATA_PIN_5        : B10," &
    "U_RCV_DATA_PIN_6        : A10," &
    "VDD_2                   : C10," &
    "VDDO_6                  : D10," &
    "U_RCV_DATA_PIN_10       : D9," &
    "U_RCV_DATA_PIN_9        : C9," &
    "U_RCV_DATA_PIN_7        : B9," &
    "U_RCV_DATA_PIN_8        : A9," &
    "U_RCV_DATA_PIN_11       : B8," &
    "VSSO_7                  : A8," &
    "VDDO_7                  : D8," &
    "VDDO_8                  : C7," &
    "U_RCV_DATA_PIN_12       : C8," &
    "U_RCV_DATA_PIN_13       : A7," &
    "U_RCV_DATA_PIN_14       : B7," &
    "SPARE_D7                : D7," &
    "U_RCV_DATA_PIN_15       : A6," &
    "U_RCV_PRTY_PIN          : C6," &
    "VSS_5                   : B6," &
    "U_RCV_ADDR_PIN_0        : D6," &
    "U_RCV_ADDR_PIN_1        : A5," &
    "U_RCV_ADDR_PIN_2        : C5," &
    "U_RCV_ADDR_PIN_3        : B5," &
    "U_RCV_ADDR_PIN_4        : D5," &
    "STATOUT_PIN_7           : A4," &
    "STATOUT_PIN_4           : A3," &
    "STATOUT_PIN_5           : B4," &
    "STATOUT_PIN_1           : A2," &
    "STATOUT_PIN_2           : B3," &
    "STATOUT_PIN_6           : C4," &
    "STATOUT_PIN_3           : C3";

  -- TAP Port Name Attributes
  attribute TAP_SCAN_IN    of j_tdi_pin : signal is true;
  attribute TAP_SCAN_OUT   of j_tdo_pin : signal is true;
  attribute TAP_SCAN_MODE  of j_tms_pin : signal is true;
  attribute TAP_SCAN_CLOCK of j_tck_pin : signal is (1.0e+07, BOTH);
  attribute TAP_SCAN_RESET of j_trst_n_pin : signal is true;

  -- Instruction Register Attributes
  attribute INSTRUCTION_LENGTH of CX28250 : entity is 3;

  attribute INSTRUCTION_OPCODE of CX28250 : entity is
    "BYPASS    (111)," &
    "SAMPLE    (001)," &
    "EXTEST    (000)," &
    "HIGHZ     (100)," &
    "IDCODE    (110)";

  attribute INSTRUCTION_CAPTURE of CX28250 : entity is "001";

  attribute IDCODE_REGISTER of CX28250 : entity is
    "0100" &              -- Version
    "1000001001010000" &  -- Part Number
    "00000010011" &       -- Manufacturer's ID
    "1";

  attribute REGISTER_ACCESS of CX28250 : entity is
    "BYPASS    (BYPASS, HIGHZ)," &
    "BOUNDARY  (EXTEST, SAMPLE)," &
    "DEVICE_ID (IDCODE)";

  -- Boundary Register Attributes
  attribute BOUNDARY_LENGTH of CX28250 : entity is 107;

  attribute BOUNDARY_REGISTER of CX28250 : entity is
  -- num   cell   port                 function  safe  ccell  dsval  rslt
    "0    (BC_1,  STATOUT_PIN_3  ,      output3,    X,   105,    1,     Z)," &
    "1    (BC_1,  STATOUT_PIN_6  ,      output3,    X,   105,    1,     Z)," &
    "2    (BC_1,  STATOUT_PIN_2  ,      output3,    X,   105,    1,     Z)," &
    "3    (BC_1,  STATOUT_PIN_1  ,      output3,    X,   105,    1,     Z)," &
    "4    (BC_1,  STATOUT_PIN_5  ,      output3,    X,   105,    1,     Z)," &
    "5    (BC_1,  STATOUT_PIN_4  ,      output3,    X,   105,    1,     Z)," &
    "6    (BC_1,  STATOUT_PIN_7  ,      output3,    X,   105,    1,     Z)," &
    "7    (BC_4,  U_RCV_ADDR_PIN_4,        input,    X)," &
    "8    (BC_4,  U_RCV_ADDR_PIN_3,        input,    X)," &
    "9    (BC_4,  U_RCV_ADDR_PIN_2,        input,    X)," &
    "10   (BC_4,  U_RCV_ADDR_PIN_1,        input,    X)," &
    "11   (BC_4,  U_RCV_ADDR_PIN_0,        input,    X)," &
    "12   (BC_1,  U_RCV_PRTY_PIN ,      output3,    X,    28,    1,     Z)," &
    "13   (BC_1,  U_RCV_DATA_PIN_15,      output3,    X,    28,    1,     Z)," &
    "14   (BC_1,  U_RCV_DATA_PIN_14,      output3,    X,    36,    1,     Z)," &
    "15   (BC_1,  U_RCV_DATA_PIN_13,      output3,    X,    36,    1,     Z)," &
    "16   (BC_1,  U_RCV_DATA_PIN_12,      output3,    X,    36,    1,     Z)," &
    "17   (BC_1,  U_RCV_DATA_PIN_11,      output3,    X,    28,    1,     Z)," &
    "18   (BC_1,  U_RCV_DATA_PIN_8,      output3,    X,    36,    1,     Z)," &
    "19   (BC_1,  U_RCV_DATA_PIN_7,      output3,    X,    36,    1,     Z)," &
    "20   (BC_1,  U_RCV_DATA_PIN_9,      output3,    X,    36,    1,     Z)," &
    "21   (BC_1,  U_RCV_DATA_PIN_10,      output3,    X,    28,    1,     Z)," &
    "22   (BC_1,  U_RCV_DATA_PIN_6,      output3,    X,    28,    1,     Z)," &
    "23   (BC_1,  U_RCV_DATA_PIN_5,      output3,    X,    28,    1,     Z)," &
    "24   (BC_1,  U_RCV_DATA_PIN_3,      output3,    X,    36,    1,     Z)," &
    "25   (BC_1,  U_RCV_DATA_PIN_4,      output3,    X,    36,    1,     Z)," &
    "26   (BC_1,  U_RCV_DATA_PIN_2,      output3,    X,    36,    1,     Z)," &
    "27   (BC_1,  U_RCV_DATA_PIN_1,      output3,    X,    28,    1,     Z)," &
    "28   (BC_1,  *              ,      control,    1)," &
    "29   (BC_1,  U_RCV_DATA_PIN_0,      output3,    X,    28,    1,     Z)," &
    "30   (BC_4,  INS_LN_AIS_PIN ,        input,    X)," &
    "31   (BC_1,  *              ,      control,    1)," &
    "32   (BC_1,  U_RCV_CLAV_PIN ,      output3,    X,    31,    1,     Z)," &
    "33   (BC_1,  *              ,      control,    1)," &
    "34   (BC_1,  LFOUT_PIN      ,      output3,    X,    33,    1,     Z)," &
    "35   (BC_4,  U_RCV_ENB_N_PIN,        input,    X)," &
    "36   (BC_1,  *              ,      control,    1)," &
    "37   (BC_1,  U_RCV_SOC_PIN  ,      output3,    X,    36,    1,     Z)," &
    "38   (BC_4,  U_RCV_CLK_PIN  ,        input,    X)," &
    "39   (BC_1,  *              ,      control,    1)," &
    "40   (BC_1,  U_XMT_CLAV_PIN ,      output3,    X,    39,    1,     Z)," &
    "41   (BC_4,  U_XMT_ENB_N_PIN,        input,    X)," &
    "42   (BC_4,  U_XMT_CLK_PIN  ,        input,    X)," &
    "43   (BC_4,  U_XMT_SOC_PIN  ,        input,    X)," &
    "44   (BC_1,  *              ,      control,    1)," &
    "45   (BC_1,  PFOUT_PIN      ,      output3,    X,    44,    1,     Z)," &
    "46   (BC_4,  INS_PTH_AIS_PIN,        input,    X)," &
    "47   (BC_4,  U_XMT_PRTY_PIN ,        input,    X)," &
    "48   (BC_4,  U_XMT_DATA_PIN_15,        input,    X)," &
    "49   (BC_4,  U_XMT_DATA_PIN_11,        input,    X)," &
    "50   (BC_4,  U_XMT_DATA_PIN_14,        input,    X)," &
    "51   (BC_4,  U_XMT_DATA_PIN_13,        input,    X)," &
    "52   (BC_4,  U_XMT_DATA_PIN_12,        input,    X)," &
    "53   (BC_4,  U_XMT_DATA_PIN_9,        input,    X)," &
    "54   (BC_4,  U_XMT_DATA_PIN_5,        input,    X)," &
    "55   (BC_4,  U_XMT_DATA_PIN_8,        input,    X)," &
    "56   (BC_4,  U_XMT_DATA_PIN_4,        input,    X)," &
    "57   (BC_4,  U_XMT_DATA_PIN_2,        input,    X)," &
    "58   (BC_4,  U_XMT_DATA_PIN_10,        input,    X)," &
    "59   (BC_4,  U_XMT_DATA_PIN_3,        input,    X)," &
    "60   (BC_4,  U_XMT_DATA_PIN_1,        input,    X)," &
    "61   (BC_4,  U_XMT_DATA_PIN_6,        input,    X)," &
    "62   (BC_4,  U_XMT_DATA_PIN_7,        input,    X)," &
    "63   (BC_4,  U_XMT_DATA_PIN_0,        input,    X)," &
    "64   (BC_4,  U_XMT_ADDR_PIN_4,        input,    X)," &
    "65   (BC_4,  U_XMT_ADDR_PIN_1,        input,    X)," &
    "66   (BC_4,  U_XMT_ADDR_PIN_3,        input,    X)," &
    "67   (BC_4,  U_XMT_ADDR_PIN_2,        input,    X)," &
    "68   (BC_4,  U_XMT_ADDR_PIN_0,        input,    X)," &
    "69   (BC_4,  XMT_HDLC_DATA_PIN,        input,    X)," &
    "70   (BC_4,  O_CLK_PIN      ,        input,    X)," &
    "71   (BC_1,  *              ,      control,    1)," &
    "72   (BC_1,  S_RCV_FRAME_REF_PIN,      output3,    X,    71,    1,     Z)," &
    "73   (BC_4,  HARDWARE_RST_N_PIN,        input,    X)," &
    "74   (BC_1,  *              ,      control,    1)," &
    "75   (BC_1,  S_XMT_FRAME_REF_PIN,      output3,    X,    74,    1,     Z)," &
    "76   (BC_4,  M_CLK_PIN      ,        input,    X)," &
    "77   (BC_1,  *              ,      control,    1)," &
    "78   (BC_1,  O_OUT_PIN      ,      output3,    X,    77,    1,     Z)," &
    "79   (BC_4,  O_IN_PIN       ,        input,    X)," &
    "80   (BC_1,  *              ,      control,    1)," &
    "81   (BC_7,  M_DATA_PIN_1   ,        bidir,    X,    80,    1,     Z)," &
    "82   (BC_4,  M_SYNCMODE_PIN ,        input,    X)," &
    "83   (BC_7,  M_DATA_PIN_0   ,        bidir,    X,    80,    1,     Z)," &
    "84   (BC_1,  *              ,      control,    1)," &
    "85   (BC_7,  M_DATA_PIN_2   ,        bidir,    X,    84,    1,     Z)," &
    "86   (BC_7,  M_DATA_PIN_3   ,        bidir,    X,    84,    1,     Z)," &
    "87   (BC_7,  M_DATA_PIN_4   ,        bidir,    X,    80,    1,     Z)," &
    "88   (BC_1,  *              ,      control,    1)," &
    "89   (BC_1,  M_RDY_PIN      ,      output3,    X,    88,    1,     Z)," &
    "90   (BC_7,  M_DATA_PIN_5   ,        bidir,    X,    80,    1,     Z)," &
    "91   (BC_7,  M_DATA_PIN_6   ,        bidir,    X,    84,    1,     Z)," &
    "92   (BC_7,  M_DATA_PIN_7   ,        bidir,    X,    84,    1,     Z)," &
    "93   (BC_4,  M_ADDR_PIN_0   ,        input,    X)," &
    "94   (BC_4,  M_ADDR_PIN_3   ,        input,    X)," &
    "95   (BC_4,  M_ADDR_PIN_4   ,        input,    X)," &
    "96   (BC_4,  M_ADDR_PIN_2   ,        input,    X)," &
    "97   (BC_4,  M_ADDR_PIN_1   ,        input,    X)," &
    "98   (BC_4,  M_ADDR_PIN_5   ,        input,    X)," &
    "99   (BC_4,  M_ADDR_PIN_6   ,        input,    X)," &
    "100  (BC_4,  M_AS_N_WR_N_PIN,        input,    X)," &
    "101  (BC_4,  M_CS_N_PIN     ,        input,    X)," &
    "102  (BC_4,  M_W_R_N_RD_N_PIN,        input,    X)," &
    "103  (BC_1,  *              ,      control,    1)," &
    "104  (BC_1,  M_INT_N_PIN    ,      output3,    X,   103,    1,     Z)," &
    "105  (BC_1,  *              ,      control,    1)," &
    "106  (BC_1,  STATOUT_PIN_0  ,      output3,    X,   105,    1,     Z)";

end CX28250;

This library contains 8973 BSDL files (for 7017 distinct entities) from 69 vendors
Last BSDL model (MB86R12) was added on Dec 16, 2017 16:38
info@bsdl.info