-- ------------------------------------------------------------------------------
--
-- File Name : DS3170_BSDL
-- Created by Synopsys Version 2000.11 (Nov 27, 2000)
--
-- Company : Dallas Semiconductor/Maxim
-- Documentation : DS3170 datasheet
-- BSDL Revision : 1.0
-- Date : 6/7/2005
--
-- Device : DS3170
-- Package : 100-pin BGA
--
-- IMPORTANT NOTICE
-- Dallas Semiconductor customers are advised to obtain the latest version of
-- device specifications before relying on any published information contained
-- herein. Dallas Semiconductor assumes no responsibility or liability arising
-- out of the application of any information described herein.
--
-- IMPORTANT NOTICE ABOUT THE REVISION
--
-- Dallas Semiconductor customers are advised to check the revision of the
-- device they will be using. All the codes for the device revisions are
-- herein this BSDL file.
--
-- The characters "/", "(", ")" and "*" have been removed from signal names for
-- compatibility with BSDL file format.
--
-- ------------------------------------------------------------------------------
entity ds3170 is
-- This section identifies the default device package selected.
generic (PHYSICAL_PIN_MAP: string:= "bga100");
-- This section declares all the ports in the design.
port (
HIZ_N : in bit;
JTCLK : in bit;
JTDI : in bit;
JTMS : in bit;
JTRST_N : in bit;
REFCLK : in bit;
RLCLK : in bit;
RST_N : in bit;
TCLKI : in bit;
TEST_N : in bit;
ALE : inout bit;
CS_N : inout bit;
INT_N : inout bit;
MODE : inout bit;
RCLKO : inout bit;
RDY_N : inout bit;
RD_N : inout bit;
RNEG : inout bit;
ROH : inout bit;
ROHCLK : inout bit;
ROHSOF : inout bit;
RPOS : inout bit;
RSER : inout bit;
RSOFO : inout bit;
SPI : inout bit;
TCLKO : inout bit;
TLCLK : inout bit;
TNEG : inout bit;
TOH : inout bit;
TOHCLK : inout bit;
TOHEN : inout bit;
TOHSOF : inout bit;
TPOS : inout bit;
TSER : inout bit;
TSOFI : inout bit;
TSOFO : inout bit;
WIDTH : inout bit;
WR_N : inout bit;
A : inout bit_vector (0 to 8);
D : inout bit_vector (0 to 15);
GPIO : inout bit_vector (1 to 8);
JTDO : out bit;
UNUSED1 : linkage bit;
RXN : linkage bit;
RXP : linkage bit;
TXN : linkage bit_vector (1 to 2);
TXP : linkage bit_vector (1 to 2);
UNUSED2 : linkage bit;
VDD_CLAD : linkage bit;
VDD_JA : linkage bit;
VDD_RX : linkage bit;
VDD_TX : linkage bit;
VSS_CLAD : linkage bit;
VSS_JA : linkage bit;
VSS_RX : linkage bit;
VSS_TX : linkage bit;
VDD : linkage bit_vector (1 to 6);
VSS : linkage bit_vector (1 to 6)
);
use STD_1149_1_1994.all;
attribute COMPONENT_CONFORMANCE of ds3170: entity is "STD_1149_1_1993";
attribute PIN_MAP of ds3170: entity is PHYSICAL_PIN_MAP;
-- This section specifies the pin map for each port. This information
-- is extracted from the port-to-pin map file that was read in using
-- the "read_pin_map" command.
constant bga100: PIN_MAP_STRING :=
"HIZ_N : B4," &
"JTCLK : A5," &
"JTDI : C4," &
"JTMS : B3," &
"JTRST_N : E5," &
"REFCLK : H1," &
"RLCLK : A8," &
"RST_N : E6," &
"TCLKI : C10," &
"TEST_N : F5," &
"ALE : G4," &
"CS_N : A1," &
"INT_N : D8," &
"MODE : F3," &
"RCLKO : A6," &
"RDY_N : J1," &
"RD_N : B2," &
"RNEG : F9," &
"ROH : B6," &
"ROHCLK : C9," &
"ROHSOF : F8," &
"RPOS : F10," &
"RSER : C6," &
"RSOFO : B8," &
"SPI : C3," &
"TCLKO : B9," &
"TLCLK : B7," &
"TNEG : D9," &
"TOH : C7," &
"TOHCLK : D7," &
"TOHEN : E10," &
"TOHSOF : G9," &
"TPOS : E9," &
"TSER : B10," &
"TSOFI : A9," &
"TSOFO : C8," &
"WIDTH : H2," &
"WR_N : C2," &
"A : (K5, J2, K2, H3, J3, K3, H4, J4, H5)," &
"D : (J5, K9, J6, H6, K7, J7, H7, K8, J8, G6, J9, J10, H8, H9" &
", H10, G8)," &
"GPIO : (E8, E7, F7, G7, F6, G5, D3, D4)," &
"JTDO : D5," &
"UNUSED1 : G2," &
"RXN : A3," &
"RXP : A4," &
"TXN : (F1, F2)," &
"TXP : (E1, E2)," &
"UNUSED2 : D6," &
"VDD_CLAD : G3," &
"VDD_JA : E3," &
"VDD_RX : C5," &
"VDD_TX : F4," &
"VSS_CLAD : G1," &
"VSS_JA : D2," &
"VSS_RX : B5," &
"VSS_TX : E4," &
"VDD : (B1, D1, K4, K10, D10, A7)," &
"VSS : (C1, K1, K6, G10, A10, A2)";
-- This section specifies the TAP ports.
-- For the TAP TCK port, the parameters in the brackets are:
-- First Field : Maximum TCK frequency.
-- Second Field: Allowable states TCK may be stopped in.
attribute TAP_SCAN_CLOCK of JTCLK : signal is (10.0e6, BOTH);
attribute TAP_SCAN_IN of JTDI : signal is true;
attribute TAP_SCAN_MODE of JTMS : signal is true;
attribute TAP_SCAN_OUT of JTDO : signal is true;
attribute TAP_SCAN_RESET of JTRST_N: signal is true;
-- Specifies the number of bits in the instruction register.
attribute INSTRUCTION_LENGTH of ds3170: entity is 3;
-- Specifies the boundary-scan instructions implemented in the
-- design and their opcodes.
attribute INSTRUCTION_OPCODE of ds3170: entity is
"BYPASS (111)," &
"EXTEST (000)," &
"SAMPLE (010)," &
"CLAMP (011)," &
"HIGHZ (100)," &
"USER1 (101)," &
"USER2 (110)," &
"IDCODE (001)";
-- Specifies the bit pattern that is loaded into the instruction
-- register when the TAP controller passes through the Capture-IR
-- state. The standard mandates that the two LSBs must be "01".
-- The remaining bits are design specific.
attribute INSTRUCTION_CAPTURE of ds3170: entity is "001";
-- Specifies the bit pattern that is loaded into the DEVICE_ID
-- register during the IDCODE instruction when the TAP controller
-- passes through the Capture-DR state.
attribute IDCODE_REGISTER of ds3170: entity is
"0000" & -- 4-bit version number
"0000000001001111" & -- 16-bit part number
"00010100001" & -- 11-bit identity of the manufacturer
"1"; -- Required by IEEE Std 1149.1
-- This section specifies the test data register placed between TDI
-- and TDO for each implemented instruction.
attribute REGISTER_ACCESS of ds3170: entity is
"BYPASS (BYPASS, CLAMP, HIGHZ, USER1, USER2)," &
"BOUNDARY (EXTEST, SAMPLE)," &
"DEVICE_ID (IDCODE)";
-- Specifies the length of the boundary scan register.
attribute BOUNDARY_LENGTH of ds3170: entity is 195;
-- The following list specifies the characteristics of each cell
-- in the boundary scan register from TDI to TDO.
-- The following is a description of the label fields:
-- num : Is the cell number.
-- cell : Is the cell type as defined by the standard.
-- port : Is the design port name. Control cells do not
-- have a port name.
-- function: Is the function of the cell as defined by the
-- standard. Is one of input, output2, output3,
-- bidir, control or controlr.
-- safe : Specifies the value that the BSR cell should be
-- loaded with for safe operation when the software
-- might otherwise choose a random value.
-- ccell : The control cell number. Specifies the control
-- cell that drives the output enable for this port.
-- disval : Specifies the value that is loaded into the
-- control cell to disable the output enable for
-- the corresponding port.
-- rslt : Resulting state. Shows the state of the driver
-- when it is disabled.
attribute BOUNDARY_REGISTER of ds3170: entity is
--
-- num cell port function safe [ccell disval rslt]
--
"194 (BC_4, CS_N, observe_only, X), " &
"193 (BC_2, CS_N, output3, X, 192, 1, Z), " &
"192 (BC_2, *, controlr, 1), " &
"191 (BC_4, RD_N, observe_only, X), " &
"190 (BC_2, RD_N, output3, X, 189, 1, Z), " &
"189 (BC_2, *, controlr, 1), " &
"188 (BC_4, SPI, observe_only, X), " &
"187 (BC_2, SPI, output3, X, 186, 1, Z), " &
"186 (BC_2, *, controlr, 1), " &
"185 (BC_4, WR_N, observe_only, X), " &
"184 (BC_2, WR_N, output3, X, 183, 1, Z), " &
"183 (BC_2, *, controlr, 1), " &
"182 (BC_4, GPIO(8), observe_only, X), " &
"181 (BC_2, GPIO(8), output3, X, 180, 1, Z), " &
"180 (BC_2, *, controlr, 1), " &
"179 (BC_4, GPIO(7), observe_only, X), " &
"178 (BC_2, GPIO(7), output3, X, 177, 1, Z), " &
"177 (BC_2, *, controlr, 1), " &
"176 (BC_4, MODE, observe_only, X), " &
"175 (BC_2, MODE, output3, X, 174, 1, Z), " &
"174 (BC_2, *, controlr, 1), " &
"173 (BC_0, *, internal, X), " &
"172 (BC_0, *, internal, X), " &
"171 (BC_0, *, internal, X), " &
"170 (BC_4, REFCLK, observe_only, X), " &
"169 (BC_4, WIDTH, observe_only, X), " &
"168 (BC_2, WIDTH, output3, X, 167, 1, Z), " &
"167 (BC_2, *, controlr, 1), " &
"166 (BC_4, TEST_N, observe_only, X), " &
"165 (BC_4, RDY_N, observe_only, X), " &
"164 (BC_2, RDY_N, output3, X, 163, 1, Z), " &
"163 (BC_2, *, controlr, 1), " &
"162 (BC_4, A(1), observe_only, X), " &
"161 (BC_2, A(1), output3, X, 160, 1, Z), " &
"160 (BC_2, *, controlr, 1), " &
"159 (BC_4, A(2), observe_only, X), " &
"158 (BC_2, A(2), output3, X, 157, 1, Z), " &
"157 (BC_2, *, controlr, 1), " &
"156 (BC_4, A(3), observe_only, X), " &
"155 (BC_2, A(3), output3, X, 154, 1, Z), " &
"154 (BC_2, *, controlr, 1), " &
"153 (BC_4, A(4), observe_only, X), " &
"152 (BC_2, A(4), output3, X, 151, 1, Z), " &
"151 (BC_2, *, controlr, 1), " &
"150 (BC_4, A(5), observe_only, X), " &
"149 (BC_2, A(5), output3, X, 148, 1, Z), " &
"148 (BC_2, *, controlr, 1), " &
"147 (BC_4, ALE, observe_only, X), " &
"146 (BC_2, ALE, output3, X, 145, 1, Z), " &
"145 (BC_2, *, controlr, 1), " &
"144 (BC_4, A(6), observe_only, X), " &
"143 (BC_2, A(6), output3, X, 142, 1, Z), " &
"142 (BC_2, *, controlr, 1), " &
"141 (BC_4, A(7), observe_only, X), " &
"140 (BC_2, A(7), output3, X, 139, 1, Z), " &
"139 (BC_2, *, controlr, 1), " &
"138 (BC_4, A(8), observe_only, X), " &
"137 (BC_2, A(8), output3, X, 136, 1, Z), " &
"136 (BC_2, *, controlr, 1), " &
"135 (BC_4, A(0), observe_only, X), " &
"134 (BC_2, A(0), output3, X, 133, 1, Z), " &
"133 (BC_2, *, controlr, 1), " &
"132 (BC_4, D(0), observe_only, X), " &
"131 (BC_2, D(0), output3, X, 130, 1, Z), " &
"130 (BC_2, *, controlr, 1), " &
"129 (BC_4, GPIO(6), observe_only, X), " &
"128 (BC_2, GPIO(6), output3, X, 127, 1, Z), " &
"127 (BC_2, *, controlr, 1), " &
"126 (BC_4, D(9), observe_only, X), " &
"125 (BC_2, D(9), output3, X, 124, 1, Z), " &
"124 (BC_2, *, controlr, 1), " &
"123 (BC_4, D(2), observe_only, X), " &
"122 (BC_2, D(2), output3, X, 121, 1, Z), " &
"121 (BC_2, *, controlr, 1), " &
"120 (BC_4, D(3), observe_only, X), " &
"119 (BC_2, D(3), output3, X, 118, 1, Z), " &
"118 (BC_2, *, controlr, 1), " &
"117 (BC_4, D(4), observe_only, X), " &
"116 (BC_2, D(4), output3, X, 115, 1, Z), " &
"115 (BC_2, *, controlr, 1), " &
"114 (BC_4, D(5), observe_only, X), " &
"113 (BC_2, D(5), output3, X, 112, 1, Z), " &
"112 (BC_2, *, controlr, 1), " &
"111 (BC_4, D(6), observe_only, X), " &
"110 (BC_2, D(6), output3, X, 109, 1, Z), " &
"109 (BC_2, *, controlr, 1), " &
"108 (BC_4, D(7), observe_only, X), " &
"107 (BC_2, D(7), output3, X, 106, 1, Z), " &
"106 (BC_2, *, controlr, 1), " &
"105 (BC_4, D(8), observe_only, X), " &
"104 (BC_2, D(8), output3, X, 103, 1, Z), " &
"103 (BC_2, *, controlr, 1), " &
"102 (BC_4, GPIO(5), observe_only, X), " &
"101 (BC_2, GPIO(5), output3, X, 100, 1, Z), " &
"100 (BC_2, *, controlr, 1), " &
"99 (BC_4, D(1), observe_only, X), " &
"98 (BC_2, D(1), output3, X, 97, 1, Z), " &
"97 (BC_2, *, controlr, 1), " &
"96 (BC_4, D(10), observe_only, X), " &
"95 (BC_2, D(10), output3, X, 94, 1, Z), " &
"94 (BC_2, *, controlr, 1), " &
"93 (BC_4, D(11), observe_only, X), " &
"92 (BC_2, D(11), output3, X, 91, 1, Z), " &
"91 (BC_2, *, controlr, 1), " &
"90 (BC_4, D(12), observe_only, X), " &
"89 (BC_2, D(12), output3, X, 88, 1, Z), " &
"88 (BC_2, *, controlr, 1), " &
"87 (BC_4, D(13), observe_only, X), " &
"86 (BC_2, D(13), output3, X, 85, 1, Z), " &
"85 (BC_2, *, controlr, 1), " &
"84 (BC_4, D(14), observe_only, X), " &
"83 (BC_2, D(14), output3, X, 82, 1, Z), " &
"82 (BC_2, *, controlr, 1), " &
"81 (BC_4, GPIO(4), observe_only, X), " &
"80 (BC_2, GPIO(4), output3, X, 79, 1, Z), " &
"79 (BC_2, *, controlr, 1), " &
"78 (BC_4, D(15), observe_only, X), " &
"77 (BC_2, D(15), output3, X, 76, 1, Z), " &
"76 (BC_2, *, controlr, 1), " &
"75 (BC_4, TOHSOF, observe_only, X), " &
"74 (BC_2, TOHSOF, output3, X, 73, 1, Z), " &
"73 (BC_2, *, controlr, 1), " &
"72 (BC_4, ROHSOF, observe_only, X), " &
"71 (BC_2, ROHSOF, output3, X, 70, 1, Z), " &
"70 (BC_2, *, controlr, 1), " &
"69 (BC_4, RPOS, observe_only, X), " &
"68 (BC_2, RPOS, output3, X, 67, 1, Z), " &
"67 (BC_2, *, controlr, 1), " &
"66 (BC_4, RNEG, observe_only, X), " &
"65 (BC_2, RNEG, output3, X, 64, 1, Z), " &
"64 (BC_2, *, controlr, 1), " &
"63 (BC_4, GPIO(3), observe_only, X), " &
"62 (BC_2, GPIO(3), output3, X, 61, 1, Z), " &
"61 (BC_2, *, controlr, 1), " &
"60 (BC_4, GPIO(2), observe_only, X), " &
"59 (BC_2, GPIO(2), output3, X, 58, 1, Z), " &
"58 (BC_2, *, controlr, 1), " &
"57 (BC_4, TOHEN, observe_only, X), " &
"56 (BC_2, TOHEN, output3, X, 55, 1, Z), " &
"55 (BC_2, *, controlr, 1), " &
"54 (BC_4, TPOS, observe_only, X), " &
"53 (BC_2, TPOS, output3, X, 52, 1, Z), " &
"52 (BC_2, *, controlr, 1), " &
"51 (BC_4, GPIO(1), observe_only, X), " &
"50 (BC_2, GPIO(1), output3, X, 49, 1, Z), " &
"49 (BC_2, *, controlr, 1), " &
"48 (BC_4, TNEG, observe_only, X), " &
"47 (BC_2, TNEG, output3, X, 46, 1, Z), " &
"46 (BC_2, *, controlr, 1), " &
"45 (BC_4, INT_N, observe_only, X), " &
"44 (BC_2, INT_N, output3, X, 43, 1, Z), " &
"43 (BC_2, *, controlr, 1), " &
"42 (BC_4, TCLKI, observe_only, X), " &
"41 (BC_4, ROHCLK, observe_only, X), " &
"40 (BC_2, ROHCLK, output3, X, 39, 1, Z), " &
"39 (BC_2, *, controlr, 1), " &
"38 (BC_4, RST_N, observe_only, X), " &
"37 (BC_4, TSER, observe_only, X), " &
"36 (BC_2, TSER, output3, X, 35, 1, Z), " &
"35 (BC_2, *, controlr, 1), " &
"34 (BC_4, TCLKO, observe_only, X), " &
"33 (BC_2, TCLKO, output3, X, 32, 1, Z), " &
"32 (BC_2, *, controlr, 1), " &
"31 (BC_4, TSOFI, observe_only, X), " &
"30 (BC_2, TSOFI, output3, X, 29, 1, Z), " &
"29 (BC_2, *, controlr, 1), " &
"28 (BC_4, TSOFO, observe_only, X), " &
"27 (BC_2, TSOFO, output3, X, 26, 1, Z), " &
"26 (BC_2, *, controlr, 1), " &
"25 (BC_4, RSOFO, observe_only, X), " &
"24 (BC_2, RSOFO, output3, X, 23, 1, Z), " &
"23 (BC_2, *, controlr, 1), " &
"22 (BC_4, RLCLK, observe_only, X), " &
"21 (BC_4, TOHCLK, observe_only, X), " &
"20 (BC_2, TOHCLK, output3, X, 19, 1, Z), " &
"19 (BC_2, *, controlr, 1), " &
"18 (BC_4, TOH, observe_only, X), " &
"17 (BC_2, TOH, output3, X, 16, 1, Z), " &
"16 (BC_2, *, controlr, 1), " &
"15 (BC_4, TLCLK, observe_only, X), " &
"14 (BC_2, TLCLK, output3, X, 13, 1, Z), " &
"13 (BC_2, *, controlr, 1), " &
"12 (BC_4, RSER, observe_only, X), " &
"11 (BC_2, RSER, output3, X, 10, 1, Z), " &
"10 (BC_2, *, controlr, 1), " &
"9 (BC_4, RCLKO, observe_only, X), " &
"8 (BC_2, RCLKO, output3, X, 7, 1, Z), " &
"7 (BC_2, *, controlr, 1), " &
"6 (BC_4, ROH, observe_only, X), " &
"5 (BC_2, ROH, output3, X, 4, 1, Z), " &
"4 (BC_2, *, controlr, 1), " &
"3 (BC_0, *, internal, X), " &
"2 (BC_0, *, internal, X), " &
"1 (BC_0, *, internal, X), " &
"0 (BC_4, HIZ_N, observe_only, X) ";
end ds3170;