BSDL Files Library for JTAG
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ChipVORX ISP IP for Ultra Fast Flash Programming
BSDL File: ISSI_DDR Download View details  


-------------------------------------------------------------------------------
--   BSDL for ISSI 72Mb DDR by SJJANG
--   ISSI
--   Copyright(c) 2004
--   Created on: Mon Nov 15 2007
--   V1.1 release : 11/20/07 A2,A10 assign to NC from VSS
--   V1.2 release : 04/09/10 Change name from "IS61DDRB22M36" to "IS61DDB22M36"
--   Model      : ISSI DDR
--   Parameter  x36 
--            x36  PHYSICAL_PIN_MAP 
--                 PHYS_BOUNDARY_SCAN 
--                 WORDSIZE = 36
-------------------------------------------------------------------------------
entity ISSI_DDR is
generic (PHYSICAL_PIN_MAP : string := "IS61DDB22M36"
           );
port (
     TDO : out bit;
     TMS : in bit;
     TDI : in bit;
     TCK : in bit;
     ZQ : in bit;
     VSS : linkage bit_vector(0 to 24);
     VDDQ : linkage bit_vector(0 to 15);
     VDD : linkage bit_vector(0 to 9);
     VREF : linkage bit_vector(0 to 1);
     BWN : in bit_vector(0 to 3);
     LDN : in bit;
     RWN : in bit;
     DQ : inout bit_vector(0 to 35);
     SA0 : in bit;
	 SA : in bit_vector(1 to 20);
     DOFFN : in bit;
     CQ : buffer bit;
     CQN : buffer bit;
     C : in bit;
     CN : in bit;
     K : in bit;
     KN : in bit;
     NC   :	  linkage bit_vector(0 to 36));
use STD_1149_1_2001.all ;
attribute COMPONENT_CONFORMANCE of ISSI_DDR: entity is "STD_1149_1_1993";
attribute PIN_MAP of ISSI_DDR : entity is PHYSICAL_PIN_MAP;
constant IS61DDB22M36 : PIN_MAP_STRING :=
                                "TDO:R1, " &
                                "TMS:R10, " &
                                "TDI:R11, " &
                                "TCK:R2, " &
                                "ZQ:H11, " &
                                "VSS:(C4, C8, D4, D5, D6, D7, D8, E5, " &
                                    " E6, E7, F6, G6, H6, J6, K6, L5, L6, L7, " &
                                    " M4, M5, M6, M7, M8, N4, N8), " &
                                "VDDQ: (E4, E8, F4, F8, G4, G8, H3, H4, H8, H9, " &
                                    " J4, J8, K4, K8, L4, L8), " &
                                "VDD: (F5, F7, G5, G7, H5, H7, J5, J7, K5, K7), " &
                                "VREF: (H2, H10), " &
                                "BWN: (B7,A7,A5,B5 ), " &
                                "LDN:A8, " &
                                "RWN:A4, " &
                                "DQ: ( P11, M11, L11, K11, J11, F11, E11, C11, B11          ,  " &        
		   "  P10, N11, M10, K10, J10, G11, E10, D11, C10          ,  " &
		   "  B3 , D3 , E3 , F3 , G3 , K3 , L3 , N3 , P3           ,  " &
		   "  B2 , C3 , D2 , F2 , G2 , J3 , L2 , M3 , N2 )         ,  " &
                                "SA0 : C6, "&
					  "SA: (A3, A9, B4, B8, C5, C7, N5, N6, N7, P4, P5,  " &
                                   " P7, P8, R3, R4, R5, R7, R8, R9, A10), " &
                                "DOFFN:H1, " &
                                "CQ:A11, " &
                                "CQN:A1, " &
                                "C:P6, " &
                                "CN:R6, " &
                                "K:B6, " &
                                "KN:A6, " &
                                "NC: ( A2, B1 , B9 , B10, C1 , C2 , C9 , D1 , D9 , D10, E1 ,  " &        
		    " E2 , E9 , F1 , F9 , F10, G1 , G9 , G10, J1 , J2 ,  " &
		    " J9 , K1 , K2 , K9 , L1 , L9 , L10, M1 , M2 , M9 ,  " &
		    " N1 , N9 , N10, P1 , P2 , P9 )                      " ;
attribute TAP_SCAN_IN of TDI: signal is true;
attribute TAP_SCAN_MODE of TMS: signal is true;
attribute TAP_SCAN_OUT of TDO: signal is true;
attribute TAP_SCAN_CLOCK of TCK: signal is (20.0e6, BOTH);
attribute INSTRUCTION_LENGTH of ISSI_DDR: entity is 3;
attribute INSTRUCTION_OPCODE of ISSI_DDR: entity is
"EXTEST   (000)," &
"IDCODE   (001)," &
"SAMPLEZ  (010)," &
"PRIVATE1 (011)," &
"SAMPLE   (100)," &
"PRELOAD  (100)," &
"PRIVATE2 (101)," &
"PRIVATE3 (110)," &
"BYPASS   (111)";
attribute INSTRUCTION_CAPTURE of ISSI_DDR: entity is "001";
attribute INSTRUCTION_PRIVATE of ISSI_DDR: entity is  
		"PRIVATE1 , PRIVATE2 , PRIVATE3";    

attribute IDCODE_REGISTER of ISSI_DDR: entity is
 "000" &                  -- Revision Number
 "00"  &                  -- Reserved
 "011" &                  -- def = 011 for 72Mb
 "0"   &                  -- Reserved
 "11"  &                  -- wx = 11 for x36, 10 for x18
 "0"   &                  -- Reserved
 "X"   &                  -- t = 1 for DLL, 0 for non-DLL, ��X��controlled by DOFFN
 "0"   &                  -- Reserved
 "0"   &                  -- q = 1 for QDB2, 0 for DDRII
 "0"   &                  -- Reserved
 "0"   &                  -- b = 1 for burst of 4, 0 for burst of 2
 "0"   &                  -- Reserved
 "0"   &                  -- s = 1 for separate I/0, 0 for common I/O
 "0"   &                  -- Reserved Part Configuration , 
 "00010100100" &          -- ISSI JEDEC Code
 "1";                     -- Required by IEEE Std 1149.1-1990

 attribute REGISTER_ACCESS of ISSI_DDR: entity is
 "BOUNDARY     (SAMPLEZ) ";
attribute BOUNDARY_LENGTH of ISSI_DDR: entity is 109;
attribute BOUNDARY_REGISTER of ISSI_DDR: entity is 
--num cell port      function safe [ccell disval rslt]
 "0   (BC_4, CN,     CLOCK, X)," &
 "1   (BC_4, C,      CLOCK, X)," &
 "2   (BC_4, SA(3),  INPUT, X)," &
 "3   (BC_4, SA(7),  INPUT, X)," &
 "4   (BC_4, SA(9), INPUT, X)," &
 "5   (BC_4, SA(6),  INPUT, X)," &
 "6   (BC_4, SA(5),  INPUT, X)," &
 "7   (BC_4, SA(8),  INPUT, X)," &
 "8   (BC_4, SA(4),  INPUT, X)," &
 "9   (BC_7, DQ(0),  BIDIR, X, 108, 0, Z)," &
 "10  (BC_7, DQ(9),  BIDIR, X, 108, 0, Z)," &
 "11  (BC_1, *,      INTERNAL, X)," &
 "12  (BC_1, *,      INTERNAL, X)," &
 "13    (BC_7,  DQ(11) ,     bidir,      X, 108, 0, Z)," &
 "14    (BC_7,  DQ(10) ,     bidir,      X, 108, 0, Z)," &
 "15  (BC_1, *,      INTERNAL, X)," &
 "16  (BC_1, *,      INTERNAL, X)," &
 "17    (BC_7,  DQ(2) ,     bidir,      X, 108, 0, Z)," &
 "18    (BC_7,  DQ(1) ,     bidir,      X, 108, 0, Z)," &
 "19  (BC_1, *,      INTERNAL, X)," &
 "20  (BC_1, *,      INTERNAL, X)," &
 "21    (BC_7,  DQ(3) ,     bidir,      X, 108, 0, Z)," &
 "22    (BC_7,  DQ(12) ,     bidir,      X, 108, 0, Z)," &
 "23  (BC_1, *,      INTERNAL, X)," &
 "24  (BC_1, *,      INTERNAL, X)," &
 "25    (BC_7,  DQ(13) ,     bidir,      X, 108, 0, Z)," &
 "26    (BC_7,  DQ(4) ,     bidir,      X, 108, 0, Z)," &
 "27  (BC_4, ZQ,     INPUT, X)," &
 "28  (BC_1, *,      INTERNAL, X)," &
 "29  (BC_1, *,      INTERNAL, X)," &
 "30    (BC_7,  DQ(5) ,     bidir,      X, 108, 0, Z)," &
 "31    (BC_7,  DQ(14) ,     bidir,      X, 108, 0, Z)," &
 "32  (BC_1, *,      INTERNAL, X)," &
 "33  (BC_1, *,      INTERNAL, X)," &
 "34    (BC_7,  DQ(6) ,     bidir,      X, 108, 0, Z)," &
 "35    (BC_7,  DQ(15) ,     bidir,      X, 108, 0, Z)," &
 "36  (BC_1, *,      INTERNAL, X)," &
 "37  (BC_1, *,      INTERNAL, X)," &
 "38    (BC_7,  DQ(17) ,     bidir,      X, 108, 0, Z)," &
 "39    (BC_7,  DQ(16) ,     bidir,      X, 108, 0, Z)," &
 "40  (BC_1, *,      INTERNAL, X)," &
 "41  (BC_1, *,      INTERNAL, X)," &
 "42    (BC_7,  DQ(8) ,     bidir,      X, 108, 0, Z)," &
 "43    (BC_7,  DQ(7) ,     bidir,      X, 108, 0, Z)," &
 "44  (BC_1, *,      INTERNAL, X)," &
 "45  (BC_1, *,      INTERNAL, X)," &
 "46  (BC_9, CQ,     output2, X)," &
 "47  (BC_4, SA(20), INPUT, X)," &
 "48  (BC_4, SA(18), INPUT, X)," &
 "49  (BC_4, SA(2),  INPUT, X)," &
 "50  (BC_4, SA(1),  INPUT, X)," &
 "51  (BC_4, SA0,  INPUT, X)," &
 "52  (BC_4, LDN,    INPUT, X)," &
 "53  (BC_4, BWN(1), INPUT, X)," &
 "54  (BC_4, BWN(0), INPUT, X)," &
 "55  (BC_4, K,      INPUT, X)," &
 "56  (BC_4, KN,     INPUT, X)," &
 "57  (BC_4, BWN(3), INPUT, X)," &
 "58  (BC_4, BWN(2), INPUT, X)," &
 "59  (BC_4, RWN,    INPUT, X)," &
 "60  (BC_4, SA(10), INPUT, X)," &
 "61  (BC_4, SA(11), INPUT, X)," &  --20_2
 "62  (BC_4, SA(19), INPUT, X)," &  --20_2
 "63  (BC_1, *,      INTERNAL, X)," &
 "64  (BC_9, CQN,    output2, X)," &
 "65    (BC_7,  DQ(27) ,     bidir,      X, 108, 0, Z)," &
 "66    (BC_7,  DQ(18) ,     bidir,      X, 108, 0, Z)," &
 "67  (BC_1, *,      INTERNAL, X)," &
 "68  (BC_1, *,      INTERNAL, X)," &
 "69  (BC_7, DQ(19), BIDIR, X, 108, 0, Z)," &
 "70  (BC_7, DQ(28), BIDIR, X, 108, 0, Z)," &
 "71  (BC_1, *,      INTERNAL, X)," &
 "72  (BC_1, *,      INTERNAL, X)," &
 "73  (BC_7, DQ(20), BIDIR, X, 108, 0, Z)," &
 "74  (BC_7, DQ(29), BIDIR, X, 108, 0, Z)," &
 "75  (BC_1, *,      INTERNAL, X)," &
 "76  (BC_1, *,      INTERNAL, X)," &
 "77  (BC_7, DQ(30), BIDIR, X, 108, 0, Z)," &
 "78  (BC_7, DQ(21), BIDIR, X, 108, 0, Z)," &
 "79  (BC_1, *,      INTERNAL, X)," &
 "80  (BC_1, *,      INTERNAL, X)," &
 "81  (BC_7, DQ(22), BIDIR, X, 108, 0, Z)," &
 "82  (BC_7, DQ(31), BIDIR, X, 108, 0, Z)," &
 "83  (BC_4, DOFFN,  INPUT, X)," &
 "84  (BC_1, *,      INTERNAL, X)," &
 "85  (BC_1, *,      INTERNAL, X)," &
 "86  (BC_7, DQ(23), BIDIR, X, 108, 0, Z)," &
 "87  (BC_7, DQ(32), BIDIR, X, 108, 0, Z)," &
 "88  (BC_1, *,      INTERNAL, X)," &
 "89  (BC_1, *,      INTERNAL, X)," &
 "90  (BC_7, DQ(33), BIDIR, X, 108, 0, Z)," &
 "91  (BC_7, DQ(24), BIDIR, X, 108, 0, Z)," &
 "92  (BC_1, *,      INTERNAL, X)," &
 "93  (BC_1, *,      INTERNAL, X)," &
 "94  (BC_7, DQ(25), BIDIR, X, 108, 0, Z)," &
 "95  (BC_7, DQ(34), BIDIR, X, 108, 0, Z)," &
 "96  (BC_1, *,      INTERNAL, X)," &
 "97  (BC_1, *,      INTERNAL, X)," &
 "98  (BC_7, DQ(26), BIDIR, X, 108, 0, Z)," &
 "99  (BC_7, DQ(35), BIDIR, X, 108, 0, Z)," &
 "100 (BC_1, *,      INTERNAL, X)," &
 "101 (BC_1, *,      INTERNAL, X)," &
 "102 (BC_4, SA(12), INPUT, X)," &
 "103 (BC_4, SA(13), INPUT, X)," &
 "104 (BC_4, SA(14), INPUT, X)," &
 "105 (BC_4, SA(16), INPUT, X)," &
 "106 (BC_4, SA(17), INPUT, X)," &
 "107 (BC_4, SA(15), INPUT, X)," &
 "108 (BC_1, *,      CONTROL, 0)";


attribute DESIGN_WARNING of ISSI_DDR: entity is 
          "The SRAM provides a limited set of JTAG functions to test the interconnection " &
          "between SRAM I/Os and printed circuit board traces or other components. There " &
          "is no multiplexer in the path from I/O pins to the RAM core.";
end ISSI_DDR ;

This library contains 8328 BSDL files (for 6555 distinct entities) from 67 vendors
Last BSDL model (IDT89HPES4T4G2_19X19_ZC) was added on Nov 23, 2017 23:58
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