-- BSDL listing from io_top_create.pl, Thu Dec 6 17:23:53 2012
--
-- pins not part of boundary scan are listed as type 'linkage'
entity LPC800 is
generic (PHYSICAL_PIN_MAP : string := "SO20");
port (
PIO0_17 : inout bit;
PIO0_13 : inout bit;
PIO0_12 : inout bit;
RESET_PIO0_5 : in bit;
PIO0_4_WAKEUP_TRST : in bit;
SWCLK_PIO0_3_TCK : in bit;
SWDIO_PIO0_2_TMS : in bit;
PIO0_11 : inout bit;
PIO0_10 : inout bit;
PIO0_16 : inout bit;
PIO0_15 : inout bit;
PIO0_1_ACMP_I2_CLKIN_TDI : in bit;
PIO0_9_XTALOUT : inout bit;
PIO0_8_XTALIN : inout bit;
VDD : linkage bit;
VSS : linkage bit;
PIO0_7 : inout bit;
PIO0_6_VDDCMP : inout bit;
PIO0_0_ACMP_I1_TDO : out bit;
PIO0_14 : inout bit
);
use STD_1149_1_2001.all;
attribute COMPONENT_CONFORMANCE of LPC800 : entity is "std_1149_1_2001";
attribute PIN_MAP of LPC800 : entity is PHYSICAL_PIN_MAP;
constant SO20 : PIN_MAP_STRING :=
"PIO0_17 : 1," &
"PIO0_13 : 2," &
"PIO0_12 : 3," &
"RESET_PIO0_5 : 4," &
"PIO0_4_WAKEUP_TRST : 5," &
"SWCLK_PIO0_3_TCK : 6," &
"SWDIO_PIO0_2_TMS : 7," &
"PIO0_11 : 8," &
"PIO0_10 : 9," &
"PIO0_16 : 10," &
"PIO0_15 : 11," &
"PIO0_1_ACMP_I2_CLKIN_TDI : 12," &
"PIO0_9_XTALOUT : 13," &
"PIO0_8_XTALIN : 14," &
"VDD : 15," &
"VSS : 16," &
"PIO0_7 : 17," &
"PIO0_6_VDDCMP : 18," &
"PIO0_0_ACMP_I1_TDO : 19," &
"PIO0_14 : 20";
-- *********************************************************************
-- * IEEE 1149.1 TAP PORTS *
-- *********************************************************************
-- This section specifies the TAP ports. For the TAP TCK port, the
-- parameters in the brackets are:
-- First Field : Maximum TCK frequency.
-- Second Field: Allowable states where TCK may be stopped.
attribute TAP_SCAN_CLOCK of SWCLK_PIO0_3_TCK : signal is (10.00e+06,BOTH);
attribute TAP_SCAN_IN of PIO0_1_ACMP_I2_CLKIN_TDI : signal is true;
attribute TAP_SCAN_MODE of SWDIO_PIO0_2_TMS : signal is true;
attribute TAP_SCAN_OUT of PIO0_0_ACMP_I1_TDO : signal is true;
attribute TAP_SCAN_RESET of PIO0_4_WAKEUP_TRST : signal is true;
-- Specifies the compliance enable patterns for the design. It lists a set of
-- design ports and the values that they should be set to, in order to enable
-- compliance to IEEE Std 1149.1
attribute COMPLIANCE_PATTERNS of LPC800: entity is
"(RESET_PIO0_5) (0)";
-- *********************************************************************
-- * INSTRUCTIONS AND REGISTER ACCESS *
-- *********************************************************************
attribute INSTRUCTION_LENGTH of LPC800 : entity is 5;
attribute INSTRUCTION_OPCODE of LPC800 : entity is
"extest (00000)," &
"sample (00001)," &
"preload (00001)," &
"highz (00010)," &
"clamp (00011)," &
"idcode (00100)," &
"resrvd (00101, 00110, 00111, 01000, 01001, 01010, 01011, 01100)," &
"bypass (11111)";
attribute INSTRUCTION_CAPTURE of LPC800 : entity is "00001";
attribute INSTRUCTION_PRIVATE of LPC800 : entity is "resrvd";
attribute IDCODE_REGISTER of LPC800 : entity is
"0100" & -- Version Number
"0000000000000000" & -- Part Number LPC812M101FD20 8121
"00000010101" & -- Manufacturer ID
"1"; -- Required by IEEE
attribute REGISTER_ACCESS of LPC800 : entity is
"BOUNDARY (extest, sample, preload), " &
"DEVICE_ID (idcode), " &
"BYPASS (highz, clamp, bypass)";
-- *********************************************************************
-- * BOUNDARY SCAN CELL INFORMATION *
-- *********************************************************************
attribute BOUNDARY_LENGTH of LPC800 : entity is 36;
attribute BOUNDARY_REGISTER of LPC800 : entity is
-- # cell name function safe control disable disable
-- type bit signal value result
" 35 (BC_4, PIO0_9_XTALOUT , INPUT, X ),"&
" 34 (BC_1, PIO0_9_XTALOUT , OUTPUT3, X, 33, 0, Z ),"&
" 33 (BC_1, * , CONTROL, 0 ),"&
" 32 (BC_4, PIO0_8_XTALIN , INPUT, X ),"&
" 31 (BC_1, PIO0_8_XTALIN , OUTPUT3, X, 30, 0, Z ),"&
" 30 (BC_1, * , CONTROL, 0 ),"&
" 29 (BC_4, PIO0_7 , INPUT, X ),"&
" 28 (BC_1, PIO0_7 , OUTPUT3, X, 27, 0, Z ),"&
" 27 (BC_1, * , CONTROL, 0 ),"&
" 26 (BC_4, PIO0_6_VDDCMP , INPUT, X ),"&
" 25 (BC_1, PIO0_6_VDDCMP , OUTPUT3, X, 24, 0, Z ),"&
" 24 (BC_1, * , CONTROL, 0 ),"&
" 23 (BC_4, PIO0_14 , INPUT, X ),"&
" 22 (BC_1, PIO0_14 , OUTPUT3, X, 21, 0, Z ),"&
" 21 (BC_1, * , CONTROL, 0 ),"&
" 20 (BC_4, PIO0_17 , INPUT, X ),"&
" 19 (BC_1, PIO0_17 , OUTPUT3, X, 18, 0, Z ),"&
" 18 (BC_1, * , CONTROL, 0 ),"&
" 17 (BC_4, PIO0_13 , INPUT, X ),"&
" 16 (BC_1, PIO0_13 , OUTPUT3, X, 15, 0, Z ),"&
" 15 (BC_1, * , CONTROL, 0 ),"&
" 14 (BC_4, PIO0_12 , INPUT, X ),"&
" 13 (BC_1, PIO0_12 , OUTPUT3, X, 12, 0, Z ),"&
" 12 (BC_1, * , CONTROL, 0 ),"&
" 11 (BC_4, PIO0_11 , INPUT, X ),"&
" 10 (BC_1, PIO0_11 , OUTPUT3, X, 9, 0, WEAK1 ),"&
" 9 (BC_1, * , CONTROL, 0 ),"&
" 8 (BC_4, PIO0_10 , INPUT, X ),"&
" 7 (BC_1, PIO0_10 , OUTPUT3, X, 6, 0, WEAK1 ),"&
" 6 (BC_1, * , CONTROL, 0 ),"&
" 5 (BC_4, PIO0_16 , INPUT, X ),"&
" 4 (BC_1, PIO0_16 , OUTPUT3, X, 3, 0, Z ),"&
" 3 (BC_1, * , CONTROL, 0 ),"&
" 2 (BC_4, PIO0_15 , INPUT, X ),"&
" 1 (BC_1, PIO0_15 , OUTPUT3, X, 0, 0, Z ),"&
" 0 (BC_1, * , CONTROL, 0 )";
end LPC800;