-- BSDL listing from io_top_create.pl, Fri Nov 10 15:11:18 2017
--
-- pins not part of boundary scan are listed as type 'linkage'
entity LPC804 is
generic (PHYSICAL_PIN_MAP : string := "TSSOP20");
port (
PIO0_17_AD9 : inout bit; -- PIO0_17_AD9
PIO0_13_AD10 : inout bit; -- PIO0_13_AD10
PIO0_12 : inout bit; -- PIO0_12
PIO0_5_nRESET : in bit; -- PIO0_5_nRESET
PIO0_4_JTAG_NTRST_AD11 : in bit; -- PIO0_4_JTAG_NTRST_AD11
PIO0_3_JTAG_TCK_SWCLK : in bit; -- PIO0_3_JTAG_TCK_SWCLK
PIO0_2_JTAG_TMS_SWDIO : in bit; -- PIO0_2_JTAG_TMS_SWDIO
PIO0_11_AD6_WKTCLKIN : inout bit; -- PIO0_11_AD6_WKTCLKIN
PIO0_10_AD7 : inout bit; -- PIO0_10_AD7
PIO0_15_AD8 : inout bit; -- PIO0_15_AD8
PIO0_1_CMPIN0B_AD0_JTAG_TDI_CLKIN : in bit; -- PIO0_1_CMPIN0B_AD0_JTAG_TDI_CLKIN
PIO0_9_AD4 : inout bit; -- PIO0_9_AD4
PIO0_8_AD5 : inout bit; -- PIO0_8_AD5
VDD : linkage bit; -- VDDIO1
VSS : linkage bit; -- VSSIO
PIO0_7_AD1_VDDCMP : inout bit; -- PIO0_7_AD1_VDDCMP
VREFP : linkage bit; -- VREFP_ADC
PIO0_0_CMPIN0A_JTAG_TDO : out bit; -- PIO0_0_CMPIN0A_JTAG_TDO
PIO0_14_AD2_CMPIN0C : inout bit; -- PIO0_14_AD2_CMPIN0C
PIO0_16_AD3_CMPIN0D : inout bit -- PIO0_16_AD3_CMPIN0D
);
use STD_1149_1_2001.all;
attribute COMPONENT_CONFORMANCE of LPC804 : entity is "std_1149_1_2001";
attribute PIN_MAP of LPC804 : entity is PHYSICAL_PIN_MAP;
constant TSSOP20 : PIN_MAP_STRING :=
"PIO0_17_AD9 : 2," &
"PIO0_13_AD10 : 3," &
"PIO0_12 : 4," &
"PIO0_5_nRESET : 5," &
"PIO0_4_JTAG_NTRST_AD11 : 6," &
"PIO0_3_JTAG_TCK_SWCLK : 7," &
"PIO0_2_JTAG_TMS_SWDIO : 8," &
"PIO0_11_AD6_WKTCLKIN : 9," &
"PIO0_10_AD7 : 10," &
"PIO0_15_AD8 : 11," &
"PIO0_1_CMPIN0B_AD0_JTAG_TDI_CLKIN : 12," &
"PIO0_9_AD4 : 13," &
"PIO0_8_AD5 : 14," &
"VDD : 15," &
"VSS : 16," &
"PIO0_7_AD1_VDDCMP : 17," &
"VREFP : 18," &
"PIO0_0_CMPIN0A_JTAG_TDO : 19," &
"PIO0_14_AD2_CMPIN0C : 20," &
"PIO0_16_AD3_CMPIN0D : 1";
-- *********************************************************************
-- * IEEE 1149.1 TAP PORTS *
-- *********************************************************************
-- This section specifies the TAP ports. For the TAP TCK port, the
-- parameters in the brackets are:
-- First Field : Maximum TCK frequency.
-- Second Field: Allowable states where TCK may be stopped.
attribute TAP_SCAN_CLOCK of PIO0_3_JTAG_TCK_SWCLK : signal is (10.00e+06,BOTH);
attribute TAP_SCAN_IN of PIO0_1_CMPIN0B_AD0_JTAG_TDI_CLKIN : signal is true;
attribute TAP_SCAN_MODE of PIO0_2_JTAG_TMS_SWDIO : signal is true;
attribute TAP_SCAN_OUT of PIO0_0_CMPIN0A_JTAG_TDO : signal is true;
attribute TAP_SCAN_RESET of PIO0_4_JTAG_NTRST_AD11 : signal is true;
-- Specifies the compliance enable patterns for the design. It lists a set of
-- design ports and the values that they should be set to, in order to enable
-- compliance to IEEE Std 1149.1
attribute COMPLIANCE_PATTERNS of LPC804: entity is
"(PIO0_5_nRESET) (0)";
-- *********************************************************************
-- * INSTRUCTIONS AND REGISTER ACCESS *
-- *********************************************************************
attribute INSTRUCTION_LENGTH of LPC804 : entity is 5;
attribute INSTRUCTION_OPCODE of LPC804 : entity is
"extest (00000)," &
"sample (00001)," &
"preload (00001)," &
"highz (00010)," &
"clamp (00011)," &
"idcode (00100)," &
"resrvd (00101, 00110, 00111, 01000, 01001, 01010, 01011, 01100)," &
"bypass (11111)";
attribute INSTRUCTION_CAPTURE of LPC804 : entity is "00001";
attribute INSTRUCTION_PRIVATE of LPC804 : entity is "resrvd";
attribute IDCODE_REGISTER of LPC804 : entity is
"xxxx" & -- Version Number
"0000000000000000" & -- Part Number 8041
"00000010101" & -- Manufacturer ID
"1"; -- Required by IEEE
attribute REGISTER_ACCESS of LPC804 : entity is
"BOUNDARY (extest, sample, preload), " &
"DEVICE_ID (idcode), " &
"BYPASS (highz, clamp, bypass)";
-- *********************************************************************
-- * BOUNDARY SCAN CELL INFORMATION *
-- *********************************************************************
attribute BOUNDARY_LENGTH of LPC804 : entity is 72;
attribute BOUNDARY_REGISTER of LPC804 : entity is
-- # cell name function safe control disable disable
-- type bit signal value result
" 71 (BC_4, PIO0_9_AD4 , INPUT, X ),"&
" 70 (BC_1, PIO0_9_AD4 , OUTPUT3, X, 69, 0, Z ),"&
" 69 (BC_1, * , CONTROL, 0 ),"&
" 68 (BC_4, PIO0_8_AD5 , INPUT, X ),"&
" 67 (BC_1, PIO0_8_AD5 , OUTPUT3, X, 66, 0, Z ),"&
" 66 (BC_1, * , CONTROL, 0 ),"&
" 65 (BC_0, * , INTERNAL, X ),"&
" 64 (BC_0, * , INTERNAL, X ),"&
" 63 (BC_0, * , INTERNAL, X ),"&
" 62 (BC_4, PIO0_7_AD1_VDDCMP , INPUT, X ),"&
" 61 (BC_1, PIO0_7_AD1_VDDCMP , OUTPUT3, X, 60, 0, Z ),"&
" 60 (BC_1, * , CONTROL, 0 ),"&
" 59 (BC_4, PIO0_14_AD2_CMPIN0C , INPUT, X ),"&
" 58 (BC_1, PIO0_14_AD2_CMPIN0C , OUTPUT3, X, 57, 0, Z ),"&
" 57 (BC_1, * , CONTROL, 0 ),"&
" 56 (BC_0, * , INTERNAL, X ),"&
" 55 (BC_0, * , INTERNAL, X ),"&
" 54 (BC_0, * , INTERNAL, X ),"&
" 53 (BC_0, * , INTERNAL, X ),"&
" 52 (BC_0, * , INTERNAL, X ),"&
" 51 (BC_0, * , INTERNAL, X ),"&
" 50 (BC_0, * , INTERNAL, X ),"&
" 49 (BC_0, * , INTERNAL, X ),"&
" 48 (BC_0, * , INTERNAL, X ),"&
" 47 (BC_0, * , INTERNAL, X ),"&
" 46 (BC_0, * , INTERNAL, X ),"&
" 45 (BC_0, * , INTERNAL, X ),"&
" 44 (BC_0, * , INTERNAL, X ),"&
" 43 (BC_0, * , INTERNAL, X ),"&
" 42 (BC_0, * , INTERNAL, X ),"&
" 41 (BC_0, * , INTERNAL, X ),"&
" 40 (BC_0, * , INTERNAL, X ),"&
" 39 (BC_0, * , INTERNAL, X ),"&
" 38 (BC_4, PIO0_16_AD3_CMPIN0D , INPUT, X ),"&
" 37 (BC_1, PIO0_16_AD3_CMPIN0D , OUTPUT3, X, 36, 0, Z ),"&
" 36 (BC_1, * , CONTROL, 0 ),"&
" 35 (BC_4, PIO0_17_AD9 , INPUT, X ),"&
" 34 (BC_1, PIO0_17_AD9 , OUTPUT3, X, 33, 0, Z ),"&
" 33 (BC_1, * , CONTROL, 0 ),"&
" 32 (BC_4, PIO0_13_AD10 , INPUT, X ),"&
" 31 (BC_1, PIO0_13_AD10 , OUTPUT3, X, 30, 0, Z ),"&
" 30 (BC_1, * , CONTROL, 0 ),"&
" 29 (BC_4, PIO0_12 , INPUT, X ),"&
" 28 (BC_1, PIO0_12 , OUTPUT3, X, 27, 0, Z ),"&
" 27 (BC_1, * , CONTROL, 0 ),"&
" 26 (BC_4, PIO0_11_AD6_WKTCLKIN , INPUT, X ),"&
" 25 (BC_1, PIO0_11_AD6_WKTCLKIN , OUTPUT3, X, 24, 0, Z ),"&
" 24 (BC_1, * , CONTROL, 0 ),"&
" 23 (BC_4, PIO0_10_AD7 , INPUT, X ),"&
" 22 (BC_1, PIO0_10_AD7 , OUTPUT3, X, 21, 0, Z ),"&
" 21 (BC_1, * , CONTROL, 0 ),"&
" 20 (BC_0, * , INTERNAL, X ),"&
" 19 (BC_0, * , INTERNAL, X ),"&
" 18 (BC_0, * , INTERNAL, X ),"&
" 17 (BC_0, * , INTERNAL, X ),"&
" 16 (BC_0, * , INTERNAL, X ),"&
" 15 (BC_0, * , INTERNAL, X ),"&
" 14 (BC_0, * , INTERNAL, X ),"&
" 13 (BC_0, * , INTERNAL, X ),"&
" 12 (BC_0, * , INTERNAL, X ),"&
" 11 (BC_0, * , INTERNAL, X ),"&
" 10 (BC_0, * , INTERNAL, X ),"&
" 9 (BC_0, * , INTERNAL, X ),"&
" 8 (BC_0, * , INTERNAL, X ),"&
" 7 (BC_0, * , INTERNAL, X ),"&
" 6 (BC_0, * , INTERNAL, X ),"&
" 5 (BC_0, * , INTERNAL, X ),"&
" 4 (BC_0, * , INTERNAL, X ),"&
" 3 (BC_0, * , INTERNAL, X ),"&
" 2 (BC_4, PIO0_15_AD8 , INPUT, X ),"&
" 1 (BC_1, PIO0_15_AD8 , OUTPUT3, X, 0, 0, Z ),"&
" 0 (BC_1, * , CONTROL, 0 )";
end LPC804;