BSDL Files Library for JTAG

The only free public library that contains thousands of BSDL (Boundary Scan Description Language) models to use with BScan/JTAG tools

BSDL model: STM32F1_LOW_DENSITY_QFPN36

-- ****************** (C) COPYRIGHT 2015 STMicroelectronics **************************
-- * File Name          : STM32F1_Low_density_QFPN36.bsd                             *
-- * Author             : STMicroelectronics www.st.com                              *
-- * Version            : V2.0                                                       *
-- * Date               : 01-September-2015                                          *
-- * Description        : Boundary Scan Description Language (BSDL) file for the     *
-- *                      STM32F1_Low_density_QFPN36 Microcontroller.                *
-- ***********************************************************************************
-- * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS     *
-- * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.*
-- * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,        *
-- * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE   *
-- * CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING         *
-- * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.                 *
-- ***********************************************************************************
-- * This BSDL file has been syntaxed checked and validated by:                      *                                                                                                                    
-- * GOEPEL SyntaxChecker Version 3.1.2                                              *
-- ***********************************************************************************
 entity STM32F1_Low_density_QFPN36 is
 
 -- This section identifies the default device package selected.
   
   generic (PHYSICAL_PIN_MAP: string:= "QFPN36_PACKAGE");
   
-- This section declares all the ports in the design.
   
   port ( 
	  BOOT0		: in 	bit;
	  JTDI		: in 	bit;
	  JTMS		: in 	bit;
	  JTCK		: in 	bit;
	  JTRST		: in 	bit;
	  JTDO		: out	bit;
	  OSC_IN_PD0	: inout    bit;
	  OSC_OUT_PD1	: inout    bit;
	  PA0		: inout	bit;
	  PA1		: inout	bit;
	  PA2		: inout	bit;
	  PA3		: inout	bit;
	  PA4		: inout	bit;
	  PA5		: inout	bit;
	  PA6		: inout	bit;
	  PA7		: inout	bit;
	  PA8		: inout	bit;
	  PA9		: inout	bit;
	  PA10		: inout	bit;
	  PA11		: inout	bit;
	  PA12		: inout	bit;
	  PB0		: inout	bit;
	  PB1		: inout	bit;
	  PB2		: inout	bit;
	  PB5		: inout	bit;
	  PB6		: inout	bit;
	  PB7		: inout	bit;
	  NRST		: in bit;	-- modification to add COMPLIANCE_PATTERNS
	  VDDA		: linkage bit;
	  VSSA		: linkage bit;
	  VDD		: linkage bit_vector(1 to 3);
	  VSS		: linkage bit_vector(1 to 3)

	);
	
	
   use STD_1149_1_2001.all;
   
   attribute COMPONENT_CONFORMANCE of STM32F1_Low_density_QFPN36: entity is "STD_1149_1_2001";
   
   attribute PIN_MAP of STM32F1_Low_density_QFPN36 : entity is PHYSICAL_PIN_MAP;
   
-- This section specifies the pin map for each port. This information is extracted from the 
-- port-to-pin map file that was read in using the "read_pin_map" command.
   
     constant QFPN36_PACKAGE: PIN_MAP_STRING :=
	  "BOOT0               : 35," &
	  "JTDI		: 29," &
	  "JTMS                : 25," &
	  "JTCK		: 28," &
	  "JTRST               : 31," &
	  "JTDO		: 30," &
	  "NRST		: 4," &
	  "OSC_IN_PD0	: 2," &
	  "OSC_OUT_PD1	: 3," &
	  "PA0		: 7," &
	  "PA1		: 8," &
	  "PA2		: 9," &
	  "PA3		: 10," &
	  "PA4		: 11," &
	  "PA5		: 12," &
	  "PA6		: 13," &
	  "PA7		: 14," &
	  "PA8		: 20," &
	  "PA9		: 21," &
	  "PA10		: 22," &
	  "PA11		: 23," &
	  "PA12		: 24," &
	  "PB0		: 15," &
	  "PB1		: 16," &
	  "PB2		: 17," &
	  "PB5		: 32," &
	  "PB6		: 33," &
	  "PB7		: 34," &
	  "VDDA		: 6," &
	  "VSSA		: 5," &
	  "VDD		: (19, 27, 1)," &
	  "VSS		: (18, 26, 36)" ;
	  
-- This section specifies the TAP ports. For the TAP TCK port, the parameters in the brackets are:
--        First Field : Maximum  TCK frequency.
--        Second Field: Allowable states TCK may be stopped in.
   
   attribute TAP_SCAN_CLOCK of JTCK  : signal is (10.0e6, BOTH);
   attribute TAP_SCAN_IN    of JTDI  : signal is true;
   attribute TAP_SCAN_MODE  of JTMS  : signal is true;
   attribute TAP_SCAN_OUT   of JTDO  : signal is true;
   attribute TAP_SCAN_RESET of JTRST : signal is true;
   
-- Specifies the compliance enable patterns for the design. It lists a set of 
-- design ports and the values that they should be set to, in order to enable 
-- compliance to IEEE Std 1149.1

   
   attribute COMPLIANCE_PATTERNS of STM32F1_Low_density_QFPN36: entity is 
        "(NRST) (0)";

   
-- Specifies the number of bits in the instruction register.

   attribute INSTRUCTION_LENGTH of STM32F1_Low_density_QFPN36: entity is 5;

-- Specifies the boundary-scan instructions implemented in the design and their opcodes.
   
   attribute INSTRUCTION_OPCODE of STM32F1_Low_density_QFPN36: entity is 
     "BYPASS  (11111)," &
     "EXTEST  (00000)," &
     "SAMPLE  (00010)," &
     "PRELOAD (00010)," &
     "IDCODE  (00001)";
   
-- Specifies the bit pattern that is loaded into the instruction register when the TAP controller 
-- passes through the Capture-IR state. The standard mandates that the two LSBs must be "01". The 
-- remaining bits are design specific.
   
   attribute INSTRUCTION_CAPTURE of STM32F1_Low_density_QFPN36: entity is "XXX01";

-- Specifies the bit pattern that is loaded into the DEVICE_ID register during the IDCODE 
-- instruction when the TAP controller passes through the Capture-DR state.
   
   attribute IDCODE_REGISTER of STM32F1_Low_density_QFPN36: entity is 
     "XXXX" &              -- 4-bit version number
     "0110010000010010" &  -- 16-bit part number -- 412
     "00000100000" &       -- 11-bit identity of the manufacturer
     "1";                  -- Required by IEEE Std 1149.1
 
 -- This section specifies the test data register placed between TDI and TDO for each implemented 
-- instruction.
   
  attribute REGISTER_ACCESS of STM32F1_Low_density_QFPN36: entity is 
       "BYPASS    (BYPASS)," &
       "BOUNDARY  (EXTEST, SAMPLE, PRELOAD)," &
       "DEVICE_ID (IDCODE)";

-- Specifies the length of the boundary scan register.
   
   attribute BOUNDARY_LENGTH of STM32F1_Low_density_QFPN36: entity is 139;
 
-- The following list specifies the characteristics of each cell in the boundary scan register from 
-- TDI to TDO. The following is a description of the label fields:
--      num     : Is the cell number.
--      cell    : Is the cell type as defined by the standard.
--      port    : Is the design port name. Control cells do not have a port name.
--      function: Is the function of the cell as defined by the standard. Is one of input, output2, 
--                output3, bidir, control or controlr.
--      safe    : Specifies the value that the BSR cell should be loaded with for safe operation 
--                when the software might otherwise choose a random value.
--      ccell   : The control cell number. Specifies the control cell that drives the output enable 
--                for this port.
--      disval  : Specifies the value that is loaded into the control cell to disable the output 
--                enable for the corresponding port.
--      rslt    : Resulting state. Shows the state of the driver when it is disabled.
   
   attribute BOUNDARY_REGISTER of STM32F1_Low_density_QFPN36: entity is 
--     
--    num	cell	port		function	safe  [ccell  disval  rslt]
--     
      "138     (BC_1,   *, internal, 0 ),"   &
      "137     (BC_1,   *, internal, 0 ),"   &
      "136     (BC_1,   *, internal, 0 ),"   &
      "135     (BC_1,   *, internal, 0 ),"   &
      "134     (BC_1,   *, internal, 0 ),"   &
      "133     (BC_1,   *, internal, 0 ),"   &
      "132     (BC_1,   *, internal, 0 ),"   &
      "131     (BC_1,   *, internal, 0 ),"   &
      "130     (BC_1,   *, internal, 0 ),"   &
      "129     (BC_1,  *,	       CONTROL,        1),        		       " &
      "128     (BC_1,  OSC_IN_PD0,         OUTPUT3,        X,      129,    1,      Z),     " &
      "127     (BC_4,  OSC_IN_PD0,         INPUT,	       X),        		       " &		    
      "126     (BC_1,  *,	       CONTROL,        1),        		       " &
      "125     (BC_1,  OSC_OUT_PD1,        OUTPUT3,        X,      126,    1,      Z),     " &
      "124     (BC_4,  OSC_OUT_PD1,        INPUT,	       X),        		       " &	   
      "123     (BC_1,   *, internal, 0 ),"   &
      "122     (BC_1,   *, internal, 0 ),"   &
      "121     (BC_1,   *, internal, 0 ),"   &
      "120     (BC_1,   *, internal, 0 ),"   &
      "119     (BC_1,   *, internal, 0 ),"   &
      "118     (BC_1,   *, internal, 0 ),"   &
      "117     (BC_1,   *, internal, 0 ),"   &
      "116     (BC_1,   *, internal, 0 ),"   &
      "115     (BC_1,   *, internal, 0 ),"   &
      "114     (BC_1,   *, internal, 0 ),"   &
      "113     (BC_1,   *, internal, 0 ),"   &
      "112     (BC_1,   *, internal, 0 ),"   &
      "111     (BC_1,  *,	       CONTROL,        1),        		       " &
      "110     (BC_1,  PA0,	       OUTPUT3,        X,      111,    1,      Z),     " &
      "109     (BC_4,  PA0,	       INPUT,	       X),        		       " &	    
      "108     (BC_1,  *,	       CONTROL,        1),        		       " &
      "107     (BC_1,  PA1,	       OUTPUT3,        X,      108,    1,      Z),     " &
      "106     (BC_4,  PA1,	       INPUT,	       X),        		       " &	    
      "105     (BC_1,  *,	       CONTROL,        1),        		       " &
      "104     (BC_1,  PA2,	       OUTPUT3,        X,      105,    1,      Z),     " &
      "103     (BC_4,  PA2,	       INPUT,	       X),        		       " &	    
      "102     (BC_1,  *,	       CONTROL,        1),        		       " &
      "101     (BC_1,  PA3,	       OUTPUT3,        X,      102,    1,      Z),     " &
      "100     (BC_4,  PA3,	       INPUT,	       X),        		       " &		  
      "99      (BC_1,  *,	       CONTROL,        1),        		       " &
      "98      (BC_1,  PA4,	       OUTPUT3,        X,      99,    1,      Z),     " &
      "97      (BC_4,  PA4,	       INPUT,	       X),       		      " &	 
      "96      (BC_1,  *,	       CONTROL,        1),       		      " &
      "95      (BC_1,  PA5,	       OUTPUT3,        X,      96,    1,      Z),     " &
      "94      (BC_4,  PA5,	       INPUT,	       X),       		      " &	 
      "93      (BC_1,  *,	       CONTROL,        1),       		      " &
      "92      (BC_1,  PA6,	       OUTPUT3,        X,      93,    1,      Z),     " &
      "91      (BC_4,  PA6,	       INPUT,	       X),       		      " &	 
      "90      (BC_1,  *,	       CONTROL,        1),       		      " &
      "89      (BC_1,  PA7,	       OUTPUT3,        X,      90,    1,      Z),     " &
      "88      (BC_4,  PA7,	       INPUT,	       X),       		      " &    
      "87      (BC_1,   *, internal, 0 ),"   &
      "86      (BC_1,   *, internal, 0 ),"   &
      "85      (BC_1,   *, internal, 0 ),"   &
      "84      (BC_1,   *, internal, 0 ),"   &
      "83      (BC_1,   *, internal, 0 ),"   &
      "82      (BC_1,   *, internal, 0 ),"   &
      "81      (BC_1,  *,	       CONTROL,        1),       		      " &
      "80      (BC_1,  PB0,	       OUTPUT3,        X,      81,    1,      Z),     " &
      "79      (BC_4,  PB0,	       INPUT,	       X),       		      " &    
      "78      (BC_1,  *,	       CONTROL,        1),       		      " &
      "77      (BC_1,  PB1,	       OUTPUT3,        X,      78,    1,      Z),     " &
      "76      (BC_4,  PB1,	       INPUT,	       X),       		      " &    
      "75      (BC_1,  *,	       CONTROL,        1),       		      " &
      "74      (BC_1,  PB2,	       OUTPUT3,        X,      75,    1,      Z),     " &
      "73      (BC_4,  PB2,	       INPUT,	       X),       		      " &      
      "72      (BC_1,   *, internal, 0 ),"   &
      "71      (BC_1,   *, internal, 0 ),"   &
      "70      (BC_1,   *, internal, 0 ),"   &   
      "69      (BC_1,   *, internal, 0 ),"   &
      "68      (BC_1,   *, internal, 0 ),"   &
      "67      (BC_1,   *, internal, 0 ),"   &
      "66      (BC_1,   *, internal, 0 ),"   &
      "65      (BC_1,   *, internal, 0 ),"   &
      "64      (BC_1,   *, internal, 0 ),"   &
      "63      (BC_1,   *, internal, 0 ),"   &
      "62      (BC_1,   *, internal, 0 ),"   &
      "61      (BC_1,   *, internal, 0 ),"   &  
      "60      (BC_1,   *, internal, 0 ),"   &
      "59      (BC_1,   *, internal, 0 ),"   &
      "58      (BC_1,   *, internal, 0 ),"   &  
      "57      (BC_1,   *, internal, 0 ),"   &
      "56      (BC_1,   *, internal, 0 ),"   &
      "55      (BC_1,   *, internal, 0 ),"   & 
      "54      (BC_1,   *, internal, 0 ),"   &
      "53      (BC_1,   *, internal, 0 ),"   &
      "52      (BC_1,   *, internal, 0 ),"   &
      "51      (BC_1,   *, internal, 0 ),"   &
      "50      (BC_1,   *, internal, 0 ),"   &
      "49      (BC_1,   *, internal, 0 ),"   &	    
      "48      (BC_1,   *, internal, 0 ),"   &
      "47      (BC_1,   *, internal, 0 ),"   &
      "46      (BC_1,   *, internal, 0 ),"   &
      "45      (BC_1,   *, internal, 0 ),"   &
      "44      (BC_1,   *, internal, 0 ),"   &
      "43      (BC_1,   *, internal, 0 ),"   &	    
      "42      (BC_1,  *,	       CONTROL,        1),       		       " &
      "41      (BC_1,  PA8,	       OUTPUT3,        X,      42,     1,      Z),     " &
      "40      (BC_4,  PA8,	       INPUT,	       X),       		       " &    
      "39      (BC_1,  *,	       CONTROL,        1),       		       " &
      "38      (BC_1,  PA9,	       OUTPUT3,        X,      39,     1,      Z),     " &
      "37      (BC_4,  PA9,	       INPUT,	       X),       		       " &		 
      "36      (BC_1,  *,	       CONTROL,        1),       		       " &
      "35      (BC_1,  PA10,	       OUTPUT3,        X,      36,     1,      Z),     " &
      "34      (BC_4,  PA10,	       INPUT,	       X),       		       " &    
      "33      (BC_1,  *,	       CONTROL,        1),       		       " &
      "32      (BC_1,  PA11,	       OUTPUT3,        X,      33,     1,      Z),     " &
      "31      (BC_4,  PA11,	       INPUT,	       X),       		       " &	    
      "30      (BC_1,  *,	       CONTROL,        1),       		       " &
      "29      (BC_1,  PA12,	       OUTPUT3,        X,      30,     1,      Z),     " &
      "28      (BC_4,  PA12,	       INPUT,	       X),       		       " &	    
      "27      (BC_1,   *, internal, 0 ),"   &
      "26      (BC_1,   *, internal, 0 ),"   &
      "25      (BC_1,   *, internal, 0 ),"   &   
      "24      (BC_1,   *, internal, 0 ),"   &
      "23      (BC_1,   *, internal, 0 ),"   &
      "22      (BC_1,   *, internal, 0 ),"   &    
      "21      (BC_1,   *, internal, 0 ),"   &
      "20      (BC_1,   *, internal, 0 ),"   &
      "19      (BC_1,   *, internal, 0 ),"   &      
      "18      (BC_1,   *, internal, 0 ),"   &
      "17      (BC_1,   *, internal, 0 ),"   &
      "16      (BC_1,   *, internal, 0 ),"   &
      "15      (BC_1,  *,	       CONTROL,        1),       		       " &
      "14      (BC_1,  PB5,	       OUTPUT3,        X,      15,     1,      Z),     " &
      "13      (BC_4,  PB5,	       INPUT,	       X),       		       " &	  
      "12      (BC_1,  *,	       CONTROL,        1),       		       " &
      "11      (BC_1,  PB6,	       OUTPUT3,        X,      12,     1,      Z),     " &
      "10      (BC_4,  PB6,	       INPUT,	       X),       		       " &	  
      "9       (BC_1,  *,	       CONTROL,        1),       		       " &
      "8       (BC_1,  PB7,	       OUTPUT3,        X,      9,     1,      Z),     " &
      "7       (BC_4,  PB7,	       INPUT,	       X),      		      " &		 
      "6       (BC_4,  BOOT0,	       INPUT,	       X),      		      " &
      "5       (BC_1,   *, internal, 0 ),"   &
      "4       (BC_1,   *, internal, 0 ),"   &
      "3       (BC_1,   *, internal, 0 ),"   &
      "2       (BC_1,   *, internal, 0 ),"   &
      "1       (BC_1,   *, internal, 0 ),"   &
      "0       (BC_1,   *, internal, 0 )";
		  
      attribute DESIGN_WARNING of STM32F1_Low_density_QFPN36: entity is
        "Device configuration can effect boundary scan behavior. " &
        "Keep the NRST pin low to ensure default boundary scan operation " &
        "as described in this file." ;            
      
end STM32F1_Low_density_QFPN36;   

-- ******************* (C) COPYRIGHT 2015 STMicroelectronics *****END OF FILE********