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BSDL File: mt9076 Download View details  



-- **********************************************************************
--
--  FILE :  mt9076_plcc.bsd
--  generated by Czeslaw Piasta as mt9076 on Wed Dec  4 12:52:27 EST 2002
--  using p.jtag.bsd rev 2.0 July 23, 2002
--
--  BSDL description for top level entity mt9076
--  Device : MT9076        Package : 68-pin PLCC
-- 
--  Number of BSC cells: 63
-- 
-- **********************************************************************
--
--                        IMPORTANT NOTICE
--
--  This information is for modeling purposes only, and is not guaranteed.
--
--  This information is provided "as is" without warranty of any kind.
--  It may contain technical inaccuracies or typographical errors.
--
--  ZARLINK and MT9076 are trademarks of ZARLINK Semiconductor. ZARLINK
--  products, marketed under trademarks, are protected under numerous US
--  and foreign patents and pending applications,  maskwork rights,  and
--  copyrights.
--
--  ZARLINK reserves the right to make changes to any products and 
--  services at any time without notice.  ZARLINK assumes no
--  responsibility or liability arising out of the application or use of
--  any information, product, or service described herein except as
--  expressly agreed to in writing by ZARLINK Corporation. ZARLINK 
--  customers are advised to obtain the latest version of device 
--  specifications before relying on any published information and before
--  placing orders for products or services.
--
--  *********************************************************************

--  ********************************************************************
--  Modification History:
--       Initial release:   Dec 1999
--
--               rev 1.0: June 2001
--          - added cells 50 & 53 for DSTO & CSTO control
--
--               rev 2.0:   Dec 2, 2002 (Cz.P.)
--          - added missing pins in a description
--          - added IRQ pin info, see NOTES
--          - removed TAP_SCAN_RESET attribute
--          - changed conformance to STD_1149_1_2001 from 1149_1_1990
--
--  ********************************************************************

--  ********************************************************************
--
--  SPECIAL NOTES
--
--    1. All instruction opcodes other than those defined in this file
--       should be considered PRIVATE.
--
--    2. Pins IC (18,62,63) are Internal Connects and they should be
--       connected to the VSS for normal operation.
--
--    3. Pin NC (48) is No Connect and it should be left open.
--
--    4. Pin IRQB (BS cell 47) is two-state (open collector) output
--       with safe & disable = 0. Note that Weak1 is the result of disable.
--       The BS cell data = 1 will produce active LOW on the output.
--
--    5. There is no TAP_SCAN_RESET attribute (no TRSTB), synchronous
--       reset only
--
--  ********************************************************************



entity mt9076 is

  generic(PHYSICAL_PIN_MAP : string := "PLCC_PACKAGE");

port (
      	AC: in bit_vector (0 to 4);
      	BSB_LS: in bit;
      	C4B: inout bit;
      	CSB: in bit;
      	CSTI: in bit;
      	CSTO: out bit;
      	D: inout bit_vector (0 to 7);
      	DSB: in bit;
      	DSTI: in bit;
      	DSTO: out bit;
      	EXCLK: buffer bit;
      	F0B: inout bit;
      	IC: linkage bit_vector (1 to 3);
      	INT_MOT: in bit;
      	IRQB: out bit;
      	LOS: buffer bit;
      	MS_FR: in bit;
      	NC: linkage bit;
     	OSC1: linkage bit;
      	OSC2: linkage bit;
      	RESETB: in bit;
      	RRING: linkage bit;
      	RTIP: linkage bit;
      	RWB: in bit;
      	RXDL: buffer bit;
      	RXDLCK: buffer bit;
      	RXFPB: buffer bit;
      	RXMFB: buffer bit;
      	TCK: in bit;
      	TDI: in bit;
      	TDO: out bit;
      	TMS: in bit;
      	TRING: linkage bit;
      	TRSTN: linkage bit;
      	TTIP: linkage bit;
      	TXA: buffer bit;
      	TXA0B: in bit;
      	TXB: buffer bit;
      	TXDL: in bit;
      	TXDLCK: buffer bit;
      	TXMFB: in bit;
      	GND: linkage bit_vector (1 to 7);
      	VDD: linkage bit_vector (1 to 7)
);

 

  use STD_1149_1_2001.all;

  attribute COMPONENT_CONFORMANCE of mt9076 : entity is
        "STD_1149_1_2001";

  attribute PIN_MAP of mt9076 : entity is PHYSICAL_PIN_MAP;
  constant PLCC_PACKAGE : PIN_MAP_STRING :=
  "AC               :(26       , " & -- AC[0]           
                     "27       , " & -- AC[1]           
                     "28       , " & -- AC[2]           
                     "29       , " & -- AC[3]           
                     "30      ), " & -- AC[4]           
  "BSB_LS           : 43       , " &  
  "C4B              : 45       , " &  
  "CSB              : 10       , " &  
  "CSTI             : 6        , " &  
  "CSTO             : 5        , " &  
  "D                :(13       , " & -- D[0]            
                     "14       , " & -- D[1]            
                     "15       , " & -- D[2]            
                     "16       , " & -- D[3]            
                     "21       , " & -- D[4]            
                     "22       , " & -- D[5]            
                     "23       , " & -- D[6]            
                     "24      ), " & -- D[7]            
  "DSB              : 9        , " &  
  "DSTI             : 8        , " &  
  "DSTO             : 7        , " &  
  "EXCLK            : 44       , " &  
  "F0B              : 46       , " &  
  "IC               :(18       , " & -- IC[1]           
                     "63       , " & -- IC[2]           
                     "62      ), " & -- IC[3]           
  "INT_MOT          : 19       , " &  
  "IRQB             : 12       , " &  
  "LOS              : 61       , " &  
  "MS_FR            : 66       , " &  
  "NC               : 48       , " &  
  "OSC1             : 1        , " &  
  "OSC2             : 2        , " &  
  "RESETB           : 11       , " &  
  "RRING            : 33       , " &  
  "RTIP             : 32       , " &  
  "RWB              : 25       , " &  
  "RXDL             : 40       , " &  
  "RXDLCK           : 39       , " &  
  "RXFPB            : 47       , " &  
  "RXMFB            : 42       , " &  
  "TCK              : 58       , " &  
  "TDI              : 55       , " &  
  "TDO              : 56       , " &  
  "TMS              : 57       , " &  
  "TRING            : 53       , " &  
  "TRSTN            : 59       , " &  
  "TTIP             : 52       , " &  
  "TXA              : 37       , " &  
  "TXA0B            : 60       , " &  
  "TXB              : 38       , " &  
  "TXDL             : 65       , " &  
  "TXDLCK           : 64       , " &  
  "TXMFB            : 41       , " &  
  "GND              :(36,   49,   68,   3,    17,   54,   31)," &
  "VDD              :(35,   50,   67,   4,    20,   51,   34)";
   
  attribute TAP_SCAN_IN    of TDI     : signal is true;
  attribute TAP_SCAN_MODE  of TMS     : signal is true;
  attribute TAP_SCAN_OUT   of TDO     : signal is true;
  attribute TAP_SCAN_CLOCK of TCK     : signal is (5.0e6,BOTH);

-- note that TRSTB is not available, synchronous reset only

  attribute INSTRUCTION_LENGTH of mt9076 : entity is 3;
  attribute INSTRUCTION_OPCODE of mt9076 : entity is
    "idcode  (001)," &
    "bypass  (111)," &
    "sample  (010)," &
    "extest  (000)," &
    "preload (010)"; 

  attribute INSTRUCTION_CAPTURE of mt9076 : entity is "x01";

  attribute IDCODE_REGISTER of mt9076 : entity is
        "0000" & 		-- version
        "1001000001110110" &    -- part number
        "00010100101" &		-- manufacturer id
        "1";

  attribute REGISTER_ACCESS of mt9076 : entity is
    "boundary (extest, sample, preload)," &
    "bypass (bypass)," &
    "device_id (idcode)" ;

 
  attribute BOUNDARY_LENGTH of mt9076 : entity is 63;
 
  attribute BOUNDARY_REGISTER of mt9076 : entity is

--       num      cell  port                    function       safe ccel  disval  rslt

	" 0     ( BC_1, RXFPB,                  output2,       X)                        ," &
	" 1     ( BC_1, *,                      control,       0)                        ," &
	" 2     ( BC_1, F0B,                    output3,       X,   1,     0,      Z)    ," &
	" 3     ( BC_4, F0B,                    input,         X)                        ," &
	" 4     ( BC_1, *,                      control,       0)                        ," &
	" 5     ( BC_1, C4B,                    output3,       X,   4,     0,      Z)    ," &
	" 6     ( BC_4, C4B,                    input,         X)                        ," &
	" 7     ( BC_1, EXCLK,                  output2,       X)                        ," &
	" 8     ( BC_4, BSB_LS,                 input,         X)                        ," &
	" 9     ( BC_1, RXMFB,                  output2,       X)                        ," &
	" 10    ( BC_4, TXMFB,                  input,         X)                        ," &
	" 11    ( BC_1, RXDL,                   output2,       X)                        ," &
	" 12    ( BC_1, RXDLCK,                 output2,       X)                        ," &
	" 13    ( BC_1, TXB,                    output2,       X)                        ," &
	" 14    ( BC_1, TXA,                    output2,       X)                        ," &
	" 15    ( BC_4, AC(4),                  input,         X)                        ," &
	" 16    ( BC_4, AC(3),                  input,         X)                        ," &
	" 17    ( BC_4, AC(2),                  input,         X)                        ," &
	" 18    ( BC_4, AC(1),                  input,         X)                        ," &
	" 19    ( BC_4, AC(0),                  input,         X)                        ," &
	" 20    ( BC_4, RWB,                    input,         X)                        ," &
	" 21    ( BC_1, *,                      control,       0)                        ," &
	" 22    ( BC_1, D(7),                   output3,       X,   21,    0,      Z)    ," &
	" 23    ( BC_4, D(7),                   input,         X)                        ," &
	" 24    ( BC_1, *,                      control,       0)                        ," &
	" 25    ( BC_1, D(6),                   output3,       X,   24,    0,      Z)    ," &
	" 26    ( BC_4, D(6),                   input,         X)                        ," &
	" 27    ( BC_1, *,                      control,       0)                        ," &
	" 28    ( BC_1, D(5),                   output3,       X,   27,    0,      Z)    ," &
	" 29    ( BC_4, D(5),                   input,         X)                        ," &
	" 30    ( BC_1, *,                      control,       0)                        ," &
	" 31    ( BC_1, D(4),                   output3,       X,   30,    0,      Z)    ," &
	" 32    ( BC_4, D(4),                   input,         X)                        ," &
	" 33    ( BC_4, INT_MOT,                input,         X)                        ," &
	" 34    ( BC_4, *,                      internal,      X)                        ," &
	" 35    ( BC_1, *,                      control,       0)                        ," &
	" 36    ( BC_1, D(3),                   output3,       X,   35,    0,      Z)    ," &
	" 37    ( BC_4, D(3),                   input,         X)                        ," &
	" 38    ( BC_1, *,                      control,       0)                        ," &
	" 39    ( BC_1, D(2),                   output3,       X,   38,    0,      Z)    ," &
	" 40    ( BC_4, D(2),                   input,         X)                        ," &
	" 41    ( BC_1, *,                      control,       0)                        ," &
	" 42    ( BC_1, D(1),                   output3,       X,   41,    0,      Z)    ," &
	" 43    ( BC_4, D(1),                   input,         X)                        ," &
	" 44    ( BC_1, *,                      control,       0)                        ," &
	" 45    ( BC_1, D(0),                   output3,       X,   44,    0,      Z)    ," &
	" 46    ( BC_4, D(0),                   input,         X)                        ," &
	" 47    ( BC_1, IRQB,                   output2,       0,   47,    0,      weak1)," &
	" 48    ( BC_4, RESETB,                 input,         X)                        ," &
	" 49    ( BC_4, CSB,                    input,         X)                        ," &
	" 50    ( BC_4, DSB,                    input,         X)                        ," &
	" 51    ( BC_4, DSTI,                   input,         X)                        ," &
	" 52    ( BC_1, *,                      control,       0)                        ," &
	" 53    ( BC_1, DSTO,                   output3,       X,   52,    0,      Z)    ," &
	" 54    ( BC_4, CSTI,                   input,         X)                        ," &
	" 55    ( BC_1, *,                      control,       0)                        ," &
	" 56    ( BC_1, CSTO,                   output3,       X,   55,    0,      Z)    ," &
	" 57    ( BC_4, MS_FR,                  input,         X)                        ," &
	" 58    ( BC_4, TXDL,                   input,         X)                        ," &
	" 59    ( BC_1, TXDLCK,                 output2,       X)                        ," &
	" 60    ( BC_4, *,                      internal,      X)                        ," &
	" 61    ( BC_1, LOS,                    output2,       X)                        ," &
	" 62    ( BC_4, TXA0B,                  input,         X)                        ";

end mt9076;

------------- end of BSDL description for the mt9076 ----------


This library contains 7815 BSDL files (for 6182 distinct entities) from 66 vendors
Last BSDL model (PIC24FJ64GA002) was added on Nov 10, 2017 08:41
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