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BSDL File: F751599 Download View details  


-- *****************************************************************************

--   BSDL file for design F751599

--   Created by Synopsys Version Y-2006.06 (May 25, 2006)

--   Designer: Glenn Haight
--   Company:  Texas Instruments

--   Date: Wed Jun 23 15:46:34 2010

-- *****************************************************************************


 entity F751599 is
   
-- This section identifies the default device package selected.
   
   generic (PHYSICAL_PIN_MAP: string:= "169ZGU");
   
-- This section declares all the ports in the design.
   
   port ( 
          CLK            : in       bit;
          CLKRUN_EN      : in       bit;
          EXT_ARB_EN     : in       bit;
          GRST_Z         : in       bit;
          INTA_Z         : in       bit;
          INTB_Z         : in       bit;
          INTC_Z         : in       bit;
          INTD_Z         : in       bit;
          JTAG_TCK       : in       bit;
          JTAG_TDI       : in       bit;
          JTAG_TMS       : in       bit;
          JTAG_TRSTZ     : in       bit;
          M66EN          : in       bit;
          PCLK66_SEL     : in       bit;
          PME_Z          : in       bit;
          POWER_GOOD     : in       bit;
          REFCLK_SEL     : in       bit;
          REQ0_Z         : in       bit;
          REQ1_Z         : in       bit;
          REQ2_Z         : in       bit;
          REQ3_Z         : in       bit;
          REQ4_Z         : in       bit;
          REQ5_Z         : in       bit;
          AD0            : inout    bit;
          AD1            : inout    bit;
          AD10           : inout    bit;
          AD11           : inout    bit;
          AD12           : inout    bit;
          AD13           : inout    bit;
          AD14           : inout    bit;
          AD15           : inout    bit;
          AD16           : inout    bit;
          AD17           : inout    bit;
          AD18           : inout    bit;
          AD19           : inout    bit;
          AD2            : inout    bit;
          AD20           : inout    bit;
          AD21           : inout    bit;
          AD22           : inout    bit;
          AD23           : inout    bit;
          AD24           : inout    bit;
          AD25           : inout    bit;
          AD26           : inout    bit;
          AD27           : inout    bit;
          AD28           : inout    bit;
          AD29           : inout    bit;
          AD3            : inout    bit;
          AD30           : inout    bit;
          AD31           : inout    bit;
          AD4            : inout    bit;
          AD5            : inout    bit;
          AD6            : inout    bit;
          AD7            : inout    bit;
          AD8            : inout    bit;
          AD9            : inout    bit;
          CBE0_Z         : inout    bit;
          CBE1_Z         : inout    bit;
          CBE2_Z         : inout    bit;
          CBE3_Z         : inout    bit;
          DEVSEL_Z       : inout    bit;
          FRAME_Z        : inout    bit;
          GPIO0          : inout    bit;
          GPIO1          : inout    bit;
          GPIO2          : inout    bit;
          GPIO3          : inout    bit;
          GPIO4          : inout    bit;
          IRDY_Z         : inout    bit;
          JTAG_TDO       : inout    bit;
          LOCK_Z         : inout    bit;
          PAR            : inout    bit;
          PERR_Z         : inout    bit;
          SERIRQ         : inout    bit;
          SERR_Z         : inout    bit;
          STOP_Z         : inout    bit;
          TRDY_Z         : inout    bit;
          CLKOUT0        : out      bit;
          CLKOUT1        : out      bit;
          CLKOUT2        : out      bit;
          CLKOUT3        : out      bit;
          CLKOUT4        : out      bit;
          CLKOUT5        : out      bit;
          CLKOUT6        : out      bit;
          CLKREQ_Z       : out      bit;
          GNT0_Z         : out      bit;
          GNT1_Z         : out      bit;
          GNT2_Z         : out      bit;
          GNT3_Z         : out      bit;
          GNT4_Z         : out      bit;
          GNT5_Z         : out      bit;
          PRST_Z         : out      bit;
          WAKE_Z         : out      bit;
          REF1_PCIE      : linkage  bit;
          REFCLK100N     : linkage  bit;
          REFCLK100P     : linkage  bit;
          RXN            : linkage  bit;
          RXP            : linkage  bit;
          TXN            : linkage  bit;
          TXP            : linkage  bit;
          VDDAEIO        : linkage  bit;
          VDDAEIOA       : linkage  bit;
          VDDAHVREFIN    : linkage  bit;
          VDDAUX33EIR    : linkage  bit;
          VDDCOMB15EIR   : linkage  bit;
          VDDCOMB33EIR   : linkage  bit;
          VDDCOMBIO33EIR : linkage  bit;
          VDDDEIO        : linkage  bit;
          VDDMAIN15EIR   : linkage  bit;
          VDDMAIN33EIR   : linkage  bit;
          VREG_PD33      : linkage  bit;
          VSSEIR         : linkage  bit;
          VDD            : linkage  bit_vector (1 to 3);
          VDDP           : linkage  bit_vector (1 to 2);
          VDDSHV         : linkage  bit_vector (1 to 8);
          VSS            : linkage  bit_vector (1 to 46)
   );
   
   use STD_1149_1_2001.all;
   
   attribute COMPONENT_CONFORMANCE of F751599: entity is "STD_1149_1_2001";
   
   attribute PIN_MAP of F751599: entity is PHYSICAL_PIN_MAP;
   
-- This section specifies the pin map for each port. This information is 
-- extracted from the port-to-pin map file that was read in using the 
-- "read_pin_map" command.
   
     constant 169ZGU: PIN_MAP_STRING := 
        "CLK            : F3," &
        "CLKRUN_EN      : A13," &
        "EXT_ARB_EN     : C10," &
        "GRST_Z         : N13," &
        "INTA_Z         : M6," &
        "INTB_Z         : N6," &
        "INTC_Z         : M7," &
        "INTD_Z         : L7," &
        "JTAG_TCK       : M12," &
        "JTAG_TDI       : N12," &
        "JTAG_TMS       : L10," &
        "JTAG_TRSTZ     : L9," &
        "M66EN          : L6," &
        "PCLK66_SEL     : B12," &
        "PME_Z          : L12," &
        "POWER_GOOD     : H11," &
        "REFCLK_SEL     : B13," &
        "REQ0_Z         : A4," &
        "REQ1_Z         : A6," &
        "REQ2_Z         : A8," &
        "REQ3_Z         : C8," &
        "REQ4_Z         : C9," &
        "REQ5_Z         : A12," &
        "AD0            : C5," &
        "AD1            : A3," &
        "AD10           : C1," &
        "AD11           : D2," &
        "AD12           : D1," &
        "AD13           : E3," &
        "AD14           : E2," &
        "AD15           : E1," &
        "AD16           : K1," &
        "AD17           : K2," &
        "AD18           : L1," &
        "AD19           : L2," &
        "AD2            : B4," &
        "AD20           : M1," &
        "AD21           : L3," &
        "AD22           : M2," &
        "AD23           : L4," &
        "AD24           : M3," &
        "AD25           : N2," &
        "AD26           : M4," &
        "AD27           : N3," &
        "AD28           : M5," &
        "AD29           : L5," &
        "AD3            : B3," &
        "AD30           : N4," &
        "AD31           : N5," &
        "AD4            : A2," &
        "AD5            : C4," &
        "AD6            : B2," &
        "AD7            : C3," &
        "AD8            : D3," &
        "AD9            : C2," &
        "CBE0_Z         : B1," &
        "CBE1_Z         : F2," &
        "CBE2_Z         : J3," &
        "CBE3_Z         : N1," &
        "DEVSEL_Z       : H2," &
        "FRAME_Z        : J2," &
        "GPIO0          : N9," &
        "GPIO1          : M9," &
        "GPIO2          : N10," &
        "GPIO3          : N11," &
        "GPIO4          : M10," &
        "IRDY_Z         : J1," &
        "JTAG_TDO       : M11," &
        "LOCK_Z         : M8," &
        "PAR            : F1," &
        "PERR_Z         : G2," &
        "SERIRQ         : N8," &
        "SERR_Z         : G3," &
        "STOP_Z         : G1," &
        "TRDY_Z         : H1," &
        "CLKOUT0        : B5," &
        "CLKOUT1        : B6," &
        "CLKOUT2        : A7," &
        "CLKOUT3        : B7," &
        "CLKOUT4        : A9," &
        "CLKOUT5        : A10," &
        "CLKOUT6        : B11," &
        "CLKREQ_Z       : D11," &
        "GNT0_Z         : A5," &
        "GNT1_Z         : C6," &
        "GNT2_Z         : B8," &
        "GNT3_Z         : B9," &
        "GNT4_Z         : A11," &
        "GNT5_Z         : B10," &
        "PRST_Z         : N7," &
        "WAKE_Z         : M13," &
        "REF1_PCIE      : K13," &
        "REFCLK100N     : C12," &
        "REFCLK100P     : C13," &
        "RXN            : E12," &
        "RXP            : E13," &
        "TXN            : G12," &
        "TXP            : G13," &
        "VDDAEIO        : H13," &
        "VDDAEIOA       : F13," &
        "VDDAHVREFIN    : D13," &
        "VDDAUX33EIR    : J11," &
        "VDDCOMB15EIR   : L13," &
        "VDDCOMB33EIR   : J13," &
        "VDDCOMBIO33EIR : K11," &
        "VDDDEIO        : G10," &
        "VDDMAIN15EIR   : H10," &
        "VDDMAIN33EIR   : J12," &
        "VREG_PD33      : D12," &
        "VSSEIR         : K12," &
        "VDD            : (D7, G4, K7)," &
        "VDDP           : (A1, K3)," &
        "VDDSHV         : (C7, D5, D9, E4, H3, J4, K9, L8)," &
        "VSS            : (C11, D4, D6, D8, D10, E5, E6, E7, E8, E9, E10, " &
        "E11, F4, F5, F6, F7, F8, F9, F10, F11, F12, G5, G6, G7, G8, G9, G11" &
        ", H4, H5, H6, H7, H8, H9, H12, J5, J6, J7, J8, J9, J10, K4, K5, K6" &
        ", K8, K10, L11)";
   
-- This section specifies the TAP ports. For the TAP TCK port, the parameters in 
-- the brackets are:
--        First Field : Maximum  TCK frequency.
--        Second Field: Allowable states TCK may be stopped in.
   
   attribute TAP_SCAN_CLOCK of JTAG_TCK  : signal is (10.0e6, BOTH);
   attribute TAP_SCAN_IN    of JTAG_TDI  : signal is true;
   attribute TAP_SCAN_MODE  of JTAG_TMS  : signal is true;
   attribute TAP_SCAN_OUT   of JTAG_TDO  : signal is true;
   attribute TAP_SCAN_RESET of JTAG_TRSTZ: signal is true;
   
-- Specifies the number of bits in the instruction register.
   
   attribute INSTRUCTION_LENGTH of F751599: entity is 5;
   
-- Specifies the boundary-scan instructions implemented in the design and their 
-- opcodes.
   
   attribute INSTRUCTION_OPCODE of F751599: entity is 
     "BYPASS            (11111)," &
     "EXTEST            (00001)," &
     "SAMPLE            (00100)," &
     "PRELOAD           (00100)," &
     "RD_TESTMODES      (00101)," &
     "WR_TESTMODES      (00110)," &
     "RD_DIE_ID_HI      (00111)," &
     "RD_DIE_ID_LO      (01000)," &
     "RD_PHY_CFG        (01001)," &
     "WR_PHY_CFG        (01010)," &
     "RD_PHY_TESTCFG    (01011)," &
     "WR_PHY_TESTCFG    (01100)," &
     "RD_MBIST          (01101)," &
     "WR_MBIST          (01110)," &
     "WR_MBIST_TEST_REG (01111)," &
     "RD_MBIST_TEST_REG (10000)";
   
-- Specifies the bit pattern that is loaded into the instruction register when 
-- the TAP controller passes through the Capture-IR state. The standard mandates 
-- that the two LSBs must be "01". The remaining bits are design specific.
   
   attribute INSTRUCTION_CAPTURE of F751599: entity is "X1101";
   
-- This section specifies the test data register placed between TDI and TDO for 
-- each implemented instruction.
   
   attribute REGISTER_ACCESS of F751599: entity is 
        "BYPASS       (BYPASS)," &
        "BOUNDARY     (EXTEST, SAMPLE, PRELOAD)," &
        "user_defined[32] (RD_TESTMODES, WR_TESTMODES, RD_DIE_ID_HI, " &
        "RD_DIE_ID_LO, RD_PHY_CFG, WR_PHY_CFG, RD_PHY_TESTCFG, WR_PHY_TESTCFG, " &
        "WR_MBIST, WR_MBIST_TEST_REG, RD_MBIST_TEST_REG)," &
        "UTDR1[8]     (RD_MBIST)";
   
-- Specifies the length of the boundary scan register.
   
   attribute BOUNDARY_LENGTH of F751599: entity is 200;
   
-- The following list specifies the characteristics of each cell in the boundary 
-- scan register from TDI to TDO. The following is a description of the label 
-- fields:
--      num     : Is the cell number.
--      cell    : Is the cell type as defined by the standard.
--      port    : Is the design port name. Control cells do not have a port 
--                name.
--      function: Is the function of the cell as defined by the standard. Is one 
--                of input, output2, output3, bidir, control or controlr.
--      safe    : Specifies the value that the BSR cell should be loaded with 
--                for safe operation when the software might otherwise choose a 
--                random value.
--      ccell   : The control cell number. Specifies the control cell that 
--                drives the output enable for this port.
--      disval  : Specifies the value that is loaded into the control cell to 
--                disable the output enable for the corresponding port.
--      rslt    : Resulting state. Shows the state of the driver when it is 
--                disabled.
   
   attribute BOUNDARY_REGISTER of F751599: entity is 
--     
--    num   cell   port        function      safe  [ccell  disval  rslt]
--     
     "199  (BC_0,  AD7,        output3,      X,    198,    1,      Z),  " &
     "198  (BC_0,  *,          control,      1),                        " &
     "197  (BC_4,  AD7,        observe_only, X),                        " &
     "196  (BC_0,  AD6,        output3,      X,    195,    1,      Z),  " &
     "195  (BC_0,  *,          control,      1),                        " &
     "194  (BC_4,  AD6,        observe_only, X),                        " &
     "193  (BC_0,  AD5,        output3,      X,    192,    1,      Z),  " &
     "192  (BC_0,  *,          control,      1),                        " &
     "191  (BC_4,  AD5,        observe_only, X),                        " &
     "190  (BC_0,  AD4,        output3,      X,    189,    1,      Z),  " &
     "189  (BC_0,  *,          control,      1),                        " &
     "188  (BC_4,  AD4,        observe_only, X),                        " &
     "187  (BC_0,  AD3,        output3,      X,    186,    1,      Z),  " &
     "186  (BC_0,  *,          control,      1),                        " &
     "185  (BC_4,  AD3,        observe_only, X),                        " &
     "184  (BC_0,  AD2,        output3,      X,    183,    1,      Z),  " &
     "183  (BC_0,  *,          control,      1),                        " &
     "182  (BC_4,  AD2,        observe_only, X),                        " &
     "181  (BC_0,  AD1,        output3,      X,    180,    1,      Z),  " &
     "180  (BC_0,  *,          control,      1),                        " &
     "179  (BC_4,  AD1,        observe_only, X),                        " &
     "178  (BC_0,  AD0,        output3,      X,    177,    1,      Z),  " &
     "177  (BC_0,  *,          control,      1),                        " &
     "176  (BC_4,  AD0,        observe_only, X),                        " &
     "175  (BC_1,  CLKOUT0,    output3,      X,    174,    1,      Z),  " &
     "174  (BC_1,  *,          control,      1),                        " &
     "173  (BC_4,  REQ0_Z,     observe_only, X),                        " &
     "172  (BC_0,  GNT0_Z,     output3,      X,    171,    1,      Z),  " &
     "171  (BC_0,  *,          control,      1),                        " &
     "170  (BC_1,  CLKOUT1,    output3,      X,    169,    1,      Z),  " &
     "169  (BC_1,  *,          control,      1),                        " &
     "168  (BC_1,  CLKOUT3,    output3,      X,    167,    1,      Z),  " &
     "167  (BC_1,  *,          control,      1),                        " &
     "166  (BC_0,  GNT1_Z,     output3,      X,    165,    1,      Z),  " &
     "165  (BC_0,  *,          control,      1),                        " &
     "164  (BC_1,  CLKOUT2,    output3,      X,    163,    1,      Z),  " &
     "163  (BC_1,  *,          control,      1),                        " &
     "162  (BC_4,  REQ2_Z,     observe_only, X),                        " &
     "161  (BC_0,  GNT2_Z,     output3,      X,    160,    1,      Z),  " &
     "160  (BC_0,  *,          control,      1),                        " &
     "159  (BC_4,  REQ1_Z,     observe_only, X),                        " &
     "158  (BC_4,  REQ3_Z,     observe_only, X),                        " &
     "157  (BC_0,  GNT3_Z,     output3,      X,    156,    1,      Z),  " &
     "156  (BC_0,  *,          control,      1),                        " &
     "155  (BC_1,  CLKOUT4,    output3,      X,    154,    1,      Z),  " &
     "154  (BC_1,  *,          control,      1),                        " &
     "153  (BC_4,  REQ4_Z,     observe_only, X),                        " &
     "152  (BC_1,  CLKOUT5,    output3,      X,    151,    1,      Z),  " &
     "151  (BC_1,  *,          control,      1),                        " &
     "150  (BC_0,  GNT4_Z,     output3,      X,    149,    1,      Z),  " &
     "149  (BC_0,  *,          control,      1),                        " &
     "148  (BC_4,  REQ5_Z,     observe_only, X),                        " &
     "147  (BC_4,  PCLK66_SEL, observe_only, X),                        " &
     "146  (BC_0,  GNT5_Z,     output3,      X,    145,    1,      Z),  " &
     "145  (BC_0,  *,          control,      1),                        " &
     "144  (BC_1,  CLKOUT6,    output3,      X,    143,    1,      Z),  " &
     "143  (BC_1,  *,          control,      1),                        " &
     "142  (BC_4,  EXT_ARB_EN, observe_only, X),                        " &
     "141  (BC_4,  CLKRUN_EN,  observe_only, X),                        " &
     "140  (BC_4,  REFCLK_SEL, observe_only, X),                        " &
     "139  (BC_4,  POWER_GOOD, observe_only, X),                        " &
     "138  (BC_4,  PME_Z,      observe_only, X),                        " &
     "137  (BC_4,  GRST_Z,     observe_only, X),                        " &
     "136  (BC_1,  GPIO4,      output3,      X,    135,    1,      Z),  " &
     "135  (BC_1,  *,          control,      1),                        " &
     "134  (BC_4,  GPIO4,      observe_only, X),                        " &
     "133  (BC_1,  GPIO3,      output3,      X,    132,    1,      Z),  " &
     "132  (BC_1,  *,          control,      1),                        " &
     "131  (BC_4,  GPIO3,      observe_only, X),                        " &
     "130  (BC_1,  GPIO2,      output3,      X,    129,    1,      Z),  " &
     "129  (BC_1,  *,          control,      1),                        " &
     "128  (BC_4,  GPIO2,      observe_only, X),                        " &
     "127  (BC_1,  GPIO1,      output3,      X,    126,    1,      Z),  " &
     "126  (BC_1,  *,          control,      1),                        " &
     "125  (BC_4,  GPIO1,      observe_only, X),                        " &
     "124  (BC_1,  GPIO0,      output3,      X,    123,    1,      Z),  " &
     "123  (BC_1,  *,          control,      1),                        " &
     "122  (BC_4,  GPIO0,      observe_only, X),                        " &
     "121  (BC_0,  LOCK_Z,     output3,      X,    120,    1,      Z),  " &
     "120  (BC_0,  *,          control,      1),                        " &
     "119  (BC_4,  LOCK_Z,     observe_only, X),                        " &
     "118  (BC_0,  SERIRQ,     output3,      X,    117,    1,      Z),  " &
     "117  (BC_0,  *,          control,      1),                        " &
     "116  (BC_4,  SERIRQ,     observe_only, X),                        " &
     "115  (BC_1,  PRST_Z,     output3,      X,    114,    1,      Z),  " &
     "114  (BC_1,  *,          control,      1),                        " &
     "113  (BC_4,  INTD_Z,     observe_only, X),                        " &
     "112  (BC_4,  INTC_Z,     observe_only, X),                        " &
     "111  (BC_4,  INTB_Z,     observe_only, X),                        " &
     "110  (BC_4,  INTA_Z,     observe_only, X),                        " &
     "109  (BC_4,  CLK,        clock,        X),                        " &
     "108  (BC_4,  M66EN,      observe_only, X),                        " &
     "107  (BC_0,  AD31,       output3,      X,    106,    1,      Z),  " &
     "106  (BC_0,  *,          control,      1),                        " &
     "105  (BC_4,  AD31,       observe_only, X),                        " &
     "104  (BC_0,  AD30,       output3,      X,    103,    1,      Z),  " &
     "103  (BC_0,  *,          control,      1),                        " &
     "102  (BC_4,  AD30,       observe_only, X),                        " &
     "101  (BC_0,  AD29,       output3,      X,    100,    1,      Z),  " &
     "100  (BC_0,  *,          control,      1),                        " &
     "99   (BC_4,  AD29,       observe_only, X),                        " &
     "98   (BC_0,  AD28,       output3,      X,    97,     1,      Z),  " &
     "97   (BC_0,  *,          control,      1),                        " &
     "96   (BC_4,  AD28,       observe_only, X),                        " &
     "95   (BC_0,  AD27,       output3,      X,    94,     1,      Z),  " &
     "94   (BC_0,  *,          control,      1),                        " &
     "93   (BC_4,  AD27,       observe_only, X),                        " &
     "92   (BC_0,  AD26,       output3,      X,    91,     1,      Z),  " &
     "91   (BC_0,  *,          control,      1),                        " &
     "90   (BC_4,  AD26,       observe_only, X),                        " &
     "89   (BC_0,  AD25,       output3,      X,    88,     1,      Z),  " &
     "88   (BC_0,  *,          control,      1),                        " &
     "87   (BC_4,  AD25,       observe_only, X),                        " &
     "86   (BC_0,  AD24,       output3,      X,    85,     1,      Z),  " &
     "85   (BC_0,  *,          control,      1),                        " &
     "84   (BC_4,  AD24,       observe_only, X),                        " &
     "83   (BC_0,  CBE3_Z,     output3,      X,    82,     1,      Z),  " &
     "82   (BC_0,  *,          control,      1),                        " &
     "81   (BC_4,  CBE3_Z,     observe_only, X),                        " &
     "80   (BC_0,  AD23,       output3,      X,    79,     1,      Z),  " &
     "79   (BC_0,  *,          control,      1),                        " &
     "78   (BC_4,  AD23,       observe_only, X),                        " &
     "77   (BC_0,  AD22,       output3,      X,    76,     1,      Z),  " &
     "76   (BC_0,  *,          control,      1),                        " &
     "75   (BC_4,  AD22,       observe_only, X),                        " &
     "74   (BC_0,  AD21,       output3,      X,    73,     1,      Z),  " &
     "73   (BC_0,  *,          control,      1),                        " &
     "72   (BC_4,  AD21,       observe_only, X),                        " &
     "71   (BC_0,  AD20,       output3,      X,    70,     1,      Z),  " &
     "70   (BC_0,  *,          control,      1),                        " &
     "69   (BC_4,  AD20,       observe_only, X),                        " &
     "68   (BC_0,  AD19,       output3,      X,    67,     1,      Z),  " &
     "67   (BC_0,  *,          control,      1),                        " &
     "66   (BC_4,  AD19,       observe_only, X),                        " &
     "65   (BC_0,  AD18,       output3,      X,    64,     1,      Z),  " &
     "64   (BC_0,  *,          control,      1),                        " &
     "63   (BC_4,  AD18,       observe_only, X),                        " &
     "62   (BC_0,  AD17,       output3,      X,    61,     1,      Z),  " &
     "61   (BC_0,  *,          control,      1),                        " &
     "60   (BC_4,  AD17,       observe_only, X),                        " &
     "59   (BC_0,  AD16,       output3,      X,    58,     1,      Z),  " &
     "58   (BC_0,  *,          control,      1),                        " &
     "57   (BC_4,  AD16,       observe_only, X),                        " &
     "56   (BC_0,  CBE2_Z,     output3,      X,    55,     1,      Z),  " &
     "55   (BC_0,  *,          control,      1),                        " &
     "54   (BC_4,  CBE2_Z,     observe_only, X),                        " &
     "53   (BC_0,  FRAME_Z,    output3,      X,    52,     1,      Z),  " &
     "52   (BC_0,  *,          control,      1),                        " &
     "51   (BC_4,  FRAME_Z,    observe_only, X),                        " &
     "50   (BC_0,  IRDY_Z,     output3,      X,    49,     1,      Z),  " &
     "49   (BC_0,  *,          control,      1),                        " &
     "48   (BC_4,  IRDY_Z,     observe_only, X),                        " &
     "47   (BC_0,  TRDY_Z,     output3,      X,    46,     1,      Z),  " &
     "46   (BC_0,  *,          control,      1),                        " &
     "45   (BC_4,  TRDY_Z,     observe_only, X),                        " &
     "44   (BC_0,  DEVSEL_Z,   output3,      X,    43,     1,      Z),  " &
     "43   (BC_0,  *,          control,      1),                        " &
     "42   (BC_4,  DEVSEL_Z,   observe_only, X),                        " &
     "41   (BC_0,  STOP_Z,     output3,      X,    40,     1,      Z),  " &
     "40   (BC_0,  *,          control,      1),                        " &
     "39   (BC_4,  STOP_Z,     observe_only, X),                        " &
     "38   (BC_0,  PERR_Z,     output3,      X,    37,     1,      Z),  " &
     "37   (BC_0,  *,          control,      1),                        " &
     "36   (BC_4,  PERR_Z,     observe_only, X),                        " &
     "35   (BC_1,  SERR_Z,     output3,      X,    34,     1,      Z),  " &
     "34   (BC_1,  *,          control,      1),                        " &
     "33   (BC_4,  SERR_Z,     observe_only, X),                        " &
     "32   (BC_0,  PAR,        output3,      X,    31,     1,      Z),  " &
     "31   (BC_0,  *,          control,      1),                        " &
     "30   (BC_4,  PAR,        observe_only, X),                        " &
     "29   (BC_0,  CBE1_Z,     output3,      X,    28,     1,      Z),  " &
     "28   (BC_0,  *,          control,      1),                        " &
     "27   (BC_4,  CBE1_Z,     observe_only, X),                        " &
     "26   (BC_0,  AD15,       output3,      X,    25,     1,      Z),  " &
     "25   (BC_0,  *,          control,      1),                        " &
     "24   (BC_4,  AD15,       observe_only, X),                        " &
     "23   (BC_0,  AD14,       output3,      X,    22,     1,      Z),  " &
     "22   (BC_0,  *,          control,      1),                        " &
     "21   (BC_4,  AD14,       observe_only, X),                        " &
     "20   (BC_0,  AD13,       output3,      X,    19,     1,      Z),  " &
     "19   (BC_0,  *,          control,      1),                        " &
     "18   (BC_4,  AD13,       observe_only, X),                        " &
     "17   (BC_0,  AD12,       output3,      X,    16,     1,      Z),  " &
     "16   (BC_0,  *,          control,      1),                        " &
     "15   (BC_4,  AD12,       observe_only, X),                        " &
     "14   (BC_0,  AD11,       output3,      X,    13,     1,      Z),  " &
     "13   (BC_0,  *,          control,      1),                        " &
     "12   (BC_4,  AD11,       observe_only, X),                        " &
     "11   (BC_0,  AD10,       output3,      X,    10,     1,      Z),  " &
     "10   (BC_0,  *,          control,      1),                        " &
     "9    (BC_4,  AD10,       observe_only, X),                        " &
     "8    (BC_0,  AD9,        output3,      X,    7,      1,      Z),  " &
     "7    (BC_0,  *,          control,      1),                        " &
     "6    (BC_4,  AD9,        observe_only, X),                        " &
     "5    (BC_0,  AD8,        output3,      X,    4,      1,      Z),  " &
     "4    (BC_0,  *,          control,      1),                        " &
     "3    (BC_4,  AD8,        observe_only, X),                        " &
     "2    (BC_0,  CBE0_Z,     output3,      X,    1,      1,      Z),  " &
     "1    (BC_0,  *,          control,      1),                        " &
     "0    (BC_4,  CBE0_Z,     observe_only, X)                         ";
 
 end F751599;

This library contains 11144 BSDL files (for 7889 distinct entities) from 72 vendors
Last BSDL model (PAPL01B1_BXI2) was added on Dec 4, 2018 10:07
info@bsdl.info