-- M O T O R O L A A D V T J T A G S O F T W A R E
-- BSDL File Generated: Mon Sep 4 09:37:59 2006
--
-- Revision History:
-- 03/19/2008 Edited pin map section
--
entity MCF52277 is
generic (PHYSICAL_PIN_MAP : string := "MBGA");
port ( bootmod: inout bit_vector(1 downto 0);
dspi_pcs0: inout bit;
dspi_sck: inout bit;
dspi_sin: inout bit;
dspi_sout: inout bit;
a: inout bit_vector(23 downto 0);
d: inout bit_vector(31 downto 0);
bs_b: inout bit_vector(3 downto 0);
cs_b: inout bit_vector(3 downto 0);
fb_clk: inout bit;
oe_b: inout bit;
rwb: inout bit;
ta_b: inout bit;
ts_b: inout bit;
i2c_scl: inout bit;
i2c_sda: inout bit;
irq_b_1: inout bit;
irq_b_4: inout bit;
irq_b_7: inout bit;
jtag_en: in bit;
ddata: inout bit_vector(3 downto 0);
pst: inout bit_vector(3 downto 0);
lcd_data: inout bit_vector(17 downto 0);
lcd_oe_acd: inout bit;
lcd_flm_vsync: inout bit;
lcd_lp_hsync: inout bit;
lcd_lsclk: inout bit;
reset_b: inout bit;
rstout_b: inout bit;
sd_a10: inout bit;
sd_cas_b: inout bit;
sd_cke: inout bit;
sd_clk: inout bit;
sd_clk_b: inout bit;
sd_cs_b: inout bit;
sd_dqs: inout bit_vector(3 downto 2);
sd_sdr_dqs: inout bit;
sd_ras_b: inout bit;
sd_we_b: inout bit;
t0in: inout bit;
t1in: inout bit;
t2in: inout bit;
t3in: inout bit;
tclk: in bit;
tdi: in bit;
tdo: out bit;
test: in bit;
tms: in bit;
trst_b: in bit;
u0cts_b: inout bit;
u0rts_b: inout bit;
u0rxd: inout bit;
u0txd: inout bit;
u1cts_b: inout bit;
u1rts_b: inout bit;
u1rxd: inout bit;
u1txd: inout bit;
usb_dev_dmns: linkage bit;
usb_dev_dpls: linkage bit;
extal: linkage bit;
extal32k: linkage bit;
xtal: linkage bit;
xtal32k: linkage bit;
vdd_usb_dev: linkage bit;
vdd_a_pll: linkage bit;
vdd_adc: linkage bit;
vdd_osc: linkage bit;
vdd_rtc: linkage bit;
vss_osc: linkage bit;
vss_adc: linkage bit;
adc_vref: linkage bit;
evdd: linkage bit_vector(8 downto 0);
sdvdd: linkage bit_vector(8 downto 0);
ivdd: linkage bit_vector(3 downto 0);
vss: linkage bit_vector(9 downto 0);
adc_ch: linkage bit_vector(7 downto 0));
use STD_1149_1_2001.all;
attribute COMPONENT_CONFORMANCE of MCF52277 : entity is "STD_1149_1_2001";
attribute PIN_MAP of MCF52277 : entity is PHYSICAL_PIN_MAP;
constant MBGA : PIN_MAP_STRING :=
"bootmod: (G10,H10), " &
"dspi_pcs0: B9, " &
"dspi_sck: C9, " &
"dspi_sin: D8, " &
"dspi_sout: D9, " &
"a: (C11,D11,A12,B12,C12,B13,A13,A14,B14,C13,C14,D12,D13,D14,E11,E12,E13,E14,F11,F12,F13,G11,G12,H11), " &
"d: (J4,K1,K2,K3,K4,L1,L2,L3,M3,N3,P3,M4,N4,P4,L5,M5,G1,G2,G3,G4,H1,H2,H3,H4,M6,N6,P6,L7,M7,N7,P7,L8), " &
"bs_b: (J3,N5,J1,L6), " &
"cs_b: (B11,A11,D10,C10), " &
"fb_clk: P1, " &
"oe_b: N8, " &
"rwb: M8, " &
"ta_b: H12, " &
"ts_b: F4, " &
"i2c_scl: C5, " &
"i2c_sda: D5, " &
"irq_b_1: B7, " &
"irq_b_4: C7, " &
"irq_b_7: D7, " &
"jtag_en: K10, " &
"ddata: (L10,M10,N10,P10), " &
"pst: (L9,M9,N9,P9), " &
"lcd_data: (E3,E4,D1,D2,C1,C2,D3,C3,D4,B1,B2,A1,A2,A3,B3,A4,B4,C4), " &
"lcd_oe_acd: B5, " &
"lcd_flm_vsync: E2, " &
"lcd_lp_hsync: E1, " &
"lcd_lsclk: A5, " &
"reset_b: J11, " &
"rstout_b: K11, " &
"sd_a10: L4, " &
"sd_cas_b: N2, " &
"sd_cke: F2, " &
"sd_clk: N1, " &
"sd_clk_b: M1, " &
"sd_cs_b: F1, " &
"sd_dqs: (J2,P5), " &
"sd_sdr_dqs: M2, " &
"sd_ras_b: P2, " &
"sd_we_b: F3, " &
"t0in: A6, " &
"t1in: B6, " &
"t2in: C6, " &
"t3in: D6, " &
"tclk: P8, " &
"tdi: M11, " &
"tdo: L11, " &
"test: E10, " &
"tms: N11, " &
"trst_b: P11, " &
"u0cts_b: K12, " &
"u0rts_b: J12, " &
"u0rxd: K13, " &
"u0txd: L12, " &
"u1cts_b: C8, " &
"u1rts_b: B8, " &
"u1rxd: A8, " &
"u1txd: A7, " &
"usb_dev_dmns: A9, " &
"usb_dev_dpls: A10, " &
"extal: F14, " &
"extal32k: J14, " &
"xtal: G14, " &
"xtal32k: K14, " &
"vdd_usb_dev: B10, " &
"vdd_a_pll: H14, " &
"vdd_adc: L13, " &
"vdd_osc: G13, " &
"vdd_rtc: J13, " &
"vss_osc: H13, " &
"vss_adc: L14, " &
"adc_vref: M12, " &
"ivdd: (E5,F10,K5,J10), " &
"evdd: (E6,E7,F5,F6,G5,H9,J9,K8,K9), " &
"sdvdd: (E8,E9,F9,G9,H5,J5,J6,K6,K7), " &
"vss: (F7,F8,G6,G7,G8,H6,H7,H8,J7,J8), " &
"adc_ch: (P12,N12,P13,N13,P14,N14,M13,M14) ";
attribute TAP_SCAN_IN of tdi : signal is true;
attribute TAP_SCAN_OUT of tdo : signal is true;
attribute TAP_SCAN_MODE of tms : signal is true;
attribute TAP_SCAN_RESET of trst_b : signal is true;
attribute TAP_SCAN_CLOCK of tclk : signal is (40.0e6, BOTH);
attribute COMPLIANCE_PATTERNS of MCF52277 : entity is
"(test, jtag_en) (01)";
attribute INSTRUCTION_LENGTH of MCF52277 : entity is 5;
attribute INSTRUCTION_OPCODE of MCF52277 : entity is
"EXTEST (00100)," &
"SAMPLE (00011)," &
"IDCODE (00001)," &
"CLAMP (01100)," &
"HIGHZ (01001)," &
"SAMPLE (00010)," &
"PRELOAD (00010)," &
"TEST_LEAKAGE (00101)," &
"ENABLE_TEST_CTRL (00110)," &
"RUN_PLLBIST (01010)," &
"ACCESS_AUX_TAP_NPC (10000)," &
"ACCESS_AUX_TAP_ONCE (10001)," &
"ACCESS_AUX_TAP_ETPU (10010)," &
"ACCESS_AUX_TAP_DMAN3 (10011)," &
"BYPASS (11111)";
attribute INSTRUCTION_CAPTURE of MCF52277 : entity is "00001";
attribute INSTRUCTION_PRIVATE of MCF52277 : entity is
"TEST_LEAKAGE, ENABLE_TEST_CTRL, RUN_PLLBIST, ACCESS_AUX_TAP_NPC, " &
"ACCESS_AUX_TAP_ONCE, ACCESS_AUX_TAP_ETPU, ACCESS_AUX_TAP_DMAN3 ";
attribute IDCODE_REGISTER of MCF52277 : entity is
"0000" &
"100000" &
"0001101100"&
"00000001110" &
"1";
attribute REGISTER_ACCESS of MCF52277 : entity is
"BYPASS (TEST_LEAKAGE)," &
"TEST_CTRL[1] (ENABLE_TEST_CTRL)";
attribute BOUNDARY_LENGTH of MCF52277 : entity is 272;
attribute BOUNDARY_REGISTER of MCF52277 : entity is
-- num cell port func safe [ccell dis rslt]
"0 (BC_8, lcd_data(6), bidir, 1, 1, 1, Z)," &
"1 (BC_2, *, control, 1)," &
"2 (BC_8, lcd_data(7), bidir, 0, 3, 1, Z)," &
"3 (BC_2, *, control, 1)," &
"4 (BC_8, lcd_data(8), bidir, 1, 5, 1, Z)," &
"5 (BC_2, *, control, 1)," &
"6 (BC_8, lcd_data(9), bidir, 1, 7, 1, Z)," &
"7 (BC_2, *, control, 1)," &
"8 (BC_8, lcd_data(10), bidir, 1, 9, 1, Z)," &
"9 (BC_2, *, control, 1)," &
"10 (BC_8, lcd_data(11), bidir, 1, 11, 1, Z)," &
"11 (BC_2, *, control, 1)," &
"12 (BC_8, lcd_data(12), bidir, 0, 13, 1, Z)," &
"13 (BC_2, *, control, 1)," &
"14 (BC_8, lcd_data(13), bidir, 0, 15, 1, Z)," &
"15 (BC_2, *, control, 1)," &
"16 (BC_8, lcd_data(14), bidir, 0, 17, 1, Z)," &
"17 (BC_2, *, control, 1)," &
"18 (BC_8, lcd_data(15), bidir, 0, 19, 1, Z)," &
"19 (BC_2, *, control, 1)," &
-- num cell port func safe [ccell dis rslt]
"20 (BC_8, lcd_data(16), bidir, 0, 21, 1, Z)," &
"21 (BC_2, *, control, 1)," &
"22 (BC_8, lcd_data(17), bidir, 0, 23, 1, Z)," &
"23 (BC_2, *, control, 1)," &
"24 (BC_8, lcd_flm_vsync, bidir, 0, 25, 1, Z)," &
"25 (BC_2, *, control, 1)," &
"26 (BC_8, lcd_lp_hsync, bidir, 0, 27, 1, Z)," &
"27 (BC_2, *, control, 1)," &
"28 (BC_8, ts_b, bidir, 0, 29, 1, Z)," &
"29 (BC_2, *, control, 1)," &
"30 (BC_8, sd_we_b, bidir, 0, 31, 1, Z)," &
"31 (BC_2, *, control, 1)," &
"32 (BC_8, sd_cke, bidir, 0, 33, 1, Z)," &
"33 (BC_2, *, control, 1)," &
"34 (BC_8, sd_cs_b, bidir, 0, 35, 1, Z)," &
"35 (BC_2, *, control, 1)," &
"36 (BC_8, d(15), bidir, 0, 37, 1, Z)," &
"37 (BC_2, *, control, 1)," &
"38 (BC_8, d(14), bidir, 0, 39, 1, Z)," &
"39 (BC_2, *, control, 1)," &
-- num cell port func safe [ccell dis rslt]
"40 (BC_8, d(13), bidir, 0, 41, 1, Z)," &
"41 (BC_2, *, control, 1)," &
"42 (BC_8, d(12), bidir, 0, 43, 1, Z)," &
"43 (BC_2, *, control, 1)," &
"44 (BC_8, d(11), bidir, 0, 45, 1, Z)," &
"45 (BC_2, *, control, 1)," &
"46 (BC_8, d(10), bidir, 0, 47, 1, Z)," &
"47 (BC_2, *, control, 1)," &
"48 (BC_8, d(9), bidir, 0, 49, 1, Z)," &
"49 (BC_2, *, control, 1)," &
"50 (BC_8, d(8), bidir, 0, 51, 1, Z)," &
"51 (BC_2, *, control, 1)," &
"52 (BC_8, bs_b(1), bidir, 0, 53, 1, Z)," &
"53 (BC_2, *, control, 1)," &
"54 (BC_8, sd_dqs(3), bidir, 0, 55, 1, Z)," &
"55 (BC_2, *, control, 1)," &
"56 (BC_8, bs_b(3), bidir, 0, 57, 1, Z)," &
"57 (BC_2, *, control, 1)," &
"58 (BC_8, d(31), bidir, 0, 59, 1, Z)," &
"59 (BC_2, *, control, 1)," &
-- num cell port func safe [ccell dis rslt]
"60 (BC_8, d(30), bidir, 0, 61, 1, Z)," &
"61 (BC_2, *, control, 1)," &
"62 (BC_8, d(29), bidir, 0, 63, 1, Z)," &
"63 (BC_2, *, control, 1)," &
"64 (BC_8, d(28), bidir, 0, 65, 1, Z)," &
"65 (BC_2, *, control, 1)," &
"66 (BC_8, d(27), bidir, 0, 67, 1, Z)," &
"67 (BC_2, *, control, 1)," &
"68 (BC_8, d(26), bidir, 0, 69, 1, Z)," &
"69 (BC_2, *, control, 1)," &
"70 (BC_8, d(25), bidir, 0, 71, 1, Z)," &
"71 (BC_2, *, control, 1)," &
"72 (BC_8, d(24), bidir, 0, 73, 1, Z)," &
"73 (BC_2, *, control, 1)," &
"74 (BC_8, sd_sdr_dqs, bidir, 0, 75, 1, Z)," &
"75 (BC_2, *, control, 1)," &
"76 (BC_8, sd_clk, bidir, 1, 77, 1, Z)," &
"77 (BC_2, *, control, 1)," &
"78 (BC_8, sd_clk_b, bidir, 0, 79, 1, Z)," &
"79 (BC_2, *, control, 1)," &
-- num cell port func safe [ccell dis rslt]
"80 (BC_8, fb_clk, bidir, 0, 81, 1, Z)," &
"81 (BC_2, *, control, 1)," &
"82 (BC_8, sd_a10, bidir, 0, 83, 1, Z)," &
"83 (BC_2, *, control, 1)," &
"84 (BC_8, sd_cas_b, bidir, 0, 85, 1, Z)," &
"85 (BC_2, *, control, 1)," &
"86 (BC_8, sd_ras_b, bidir, 0, 87, 1, Z)," &
"87 (BC_2, *, control, 1)," &
"88 (BC_8, d(23), bidir, 0, 89, 1, Z)," &
"89 (BC_2, *, control, 1)," &
"90 (BC_8, d(22), bidir, 0, 91, 1, Z)," &
"91 (BC_2, *, control, 1)," &
"92 (BC_8, d(21), bidir, 0, 93, 1, Z)," &
"93 (BC_2, *, control, 1)," &
"94 (BC_8, d(20), bidir, 1, 95, 1, Z)," &
"95 (BC_2, *, control, 1)," &
"96 (BC_8, d(19), bidir, 1, 97, 1, Z)," &
"97 (BC_2, *, control, 1)," &
"98 (BC_8, d(18), bidir, 0, 99, 1, Z)," &
"99 (BC_2, *, control, 1)," &
-- num cell port func safe [ccell dis rslt]
"100 (BC_8, d(17), bidir, 0, 101, 1, Z)," &
"101 (BC_2, *, control, 1)," &
"102 (BC_8, d(16), bidir, 0, 103, 1, Z)," &
"103 (BC_2, *, control, 1)," &
"104 (BC_8, bs_b(2), bidir, 0, 105, 1, Z)," &
"105 (BC_2, *, control, 1)," &
"106 (BC_8, sd_dqs(2), bidir, 0, 107, 1, Z)," &
"107 (BC_2, *, control, 1)," &
"108 (BC_8, bs_b(0), bidir, 0, 109, 1, Z)," &
"109 (BC_2, *, control, 1)," &
"110 (BC_8, d(7), bidir, 1, 111, 1, Z)," &
"111 (BC_2, *, control, 1)," &
"112 (BC_8, d(6), bidir, 0, 113, 1, Z)," &
"113 (BC_2, *, control, 1)," &
"114 (BC_8, d(5), bidir, 0, 115, 1, Z)," &
"115 (BC_2, *, control, 1)," &
"116 (BC_8, d(4), bidir, 0, 117, 1, Z)," &
"117 (BC_2, *, control, 1)," &
"118 (BC_8, d(3), bidir, 0, 119, 1, Z)," &
"119 (BC_2, *, control, 1)," &
-- num cell port func safe [ccell dis rslt]
"120 (BC_8, d(2), bidir, 0, 121, 1, Z)," &
"121 (BC_2, *, control, 1)," &
"122 (BC_8, d(1), bidir, 0, 123, 1, Z)," &
"123 (BC_2, *, control, 1)," &
"124 (BC_8, d(0), bidir, 0, 125, 1, Z)," &
"125 (BC_2, *, control, 1)," &
"126 (BC_8, rwb, bidir, 0, 127, 1, Z)," &
"127 (BC_2, *, control, 1)," &
"128 (BC_8, oe_b, bidir, 0, 129, 1, Z)," &
"129 (BC_2, *, control, 1)," &
"130 (BC_8, pst(0), bidir, 1, 131, 1, Z)," &
"131 (BC_2, *, control, 1)," &
"132 (BC_8, pst(1), bidir, 1, 133, 1, Z)," &
"133 (BC_2, *, control, 1)," &
"134 (BC_8, pst(2), bidir, 0, 135, 1, Z)," &
"135 (BC_2, *, control, 1)," &
"136 (BC_8, pst(3), bidir, 0, 137, 1, Z)," &
"137 (BC_2, *, control, 1)," &
"138 (BC_1, *, internal, X)," &
"139 (BC_1, *, internal, X)," &
-- num cell port func safe [ccell dis rslt]
"140 (BC_8, ddata(0), bidir, 0, 141, 1, Z)," &
"141 (BC_2, *, control, 1)," &
"142 (BC_8, ddata(1), bidir, 0, 143, 1, Z)," &
"143 (BC_2, *, control, 1)," &
"144 (BC_8, ddata(2), bidir, 0, 145, 1, Z)," &
"145 (BC_2, *, control, 1)," &
"146 (BC_8, ddata(3), bidir, 0, 147, 1, Z)," &
"147 (BC_2, *, control, 1)," &
"148 (BC_8, u0txd, bidir, 0, 149, 1, Z)," &
"149 (BC_2, *, control, 1)," &
"150 (BC_8, u0rxd, bidir, 0, 151, 1, Z)," &
"151 (BC_2, *, control, 1)," &
"152 (BC_8, u0cts_b, bidir, 0, 153, 1, Z)," &
"153 (BC_2, *, control, 1)," &
"154 (BC_8, u0rts_b, bidir, 0, 155, 1, Z)," &
"155 (BC_2, *, control, 1)," &
"156 (BC_8, rstout_b, bidir, 0, 157, 1, Z)," &
"157 (BC_2, *, control, 1)," &
"158 (BC_8, reset_b, bidir, 0, 159, 1, Z)," &
"159 (BC_2, *, control, 1)," &
-- num cell port func safe [ccell dis rslt]
"160 (BC_8, bootmod(0), bidir, 0, 161, 1, Z)," &
"161 (BC_2, *, control, 1)," &
"162 (BC_8, bootmod(1), bidir, 0, 163, 1, Z)," &
"163 (BC_2, *, control, 1)," &
"164 (BC_8, ta_b, bidir, 0, 165, 1, Z)," &
"165 (BC_2, *, control, 1)," &
"166 (BC_8, a(0), bidir, 0, 167, 1, Z)," &
"167 (BC_2, *, control, 1)," &
"168 (BC_8, a(1), bidir, 0, 169, 1, Z)," &
"169 (BC_2, *, control, 1)," &
"170 (BC_8, a(2), bidir, 0, 171, 1, Z)," &
"171 (BC_2, *, control, 1)," &
"172 (BC_8, a(3), bidir, 1, 173, 1, Z)," &
"173 (BC_2, *, control, 1)," &
"174 (BC_8, a(4), bidir, 1, 175, 1, Z)," &
"175 (BC_2, *, control, 1)," &
"176 (BC_8, a(5), bidir, 0, 177, 1, Z)," &
"177 (BC_2, *, control, 1)," &
"178 (BC_8, a(6), bidir, 1, 179, 1, Z)," &
"179 (BC_2, *, control, 1)," &
-- num cell port func safe [ccell dis rslt]
"180 (BC_8, a(7), bidir, 1, 181, 1, Z)," &
"181 (BC_2, *, control, 1)," &
"182 (BC_8, a(8), bidir, 1, 183, 1, Z)," &
"183 (BC_2, *, control, 1)," &
"184 (BC_8, a(9), bidir, 0, 185, 1, Z)," &
"185 (BC_2, *, control, 1)," &
"186 (BC_8, a(10), bidir, 0, 187, 1, Z)," &
"187 (BC_2, *, control, 1)," &
"188 (BC_8, a(11), bidir, 0, 189, 1, Z)," &
"189 (BC_2, *, control, 1)," &
"190 (BC_8, a(12), bidir, 0, 191, 1, Z)," &
"191 (BC_2, *, control, 1)," &
"192 (BC_8, a(13), bidir, 0, 193, 1, Z)," &
"193 (BC_2, *, control, 1)," &
"194 (BC_8, a(14), bidir, 0, 195, 1, Z)," &
"195 (BC_2, *, control, 1)," &
"196 (BC_8, a(15), bidir, 0, 197, 1, Z)," &
"197 (BC_2, *, control, 1)," &
"198 (BC_8, a(16), bidir, 0, 199, 1, Z)," &
"199 (BC_2, *, control, 1)," &
-- num cell port func safe [ccell dis rslt]
"200 (BC_8, a(17), bidir, 0, 201, 1, Z)," &
"201 (BC_2, *, control, 1)," &
"202 (BC_8, a(18), bidir, 0, 203, 1, Z)," &
"203 (BC_2, *, control, 1)," &
"204 (BC_8, a(19), bidir, 0, 205, 1, Z)," &
"205 (BC_2, *, control, 1)," &
"206 (BC_8, a(20), bidir, 0, 207, 1, Z)," &
"207 (BC_2, *, control, 1)," &
"208 (BC_8, a(21), bidir, 0, 209, 1, Z)," &
"209 (BC_2, *, control, 1)," &
"210 (BC_8, a(22), bidir, 0, 211, 1, Z)," &
"211 (BC_2, *, control, 1)," &
"212 (BC_8, a(23), bidir, 0, 213, 1, Z)," &
"213 (BC_2, *, control, 1)," &
"214 (BC_8, cs_b(3), bidir, 0, 215, 1, Z)," &
"215 (BC_2, *, control, 1)," &
"216 (BC_8, cs_b(2), bidir, 0, 217, 1, Z)," &
"217 (BC_2, *, control, 1)," &
"218 (BC_8, cs_b(1), bidir, 0, 219, 1, Z)," &
"219 (BC_2, *, control, 1)," &
-- num cell port func safe [ccell dis rslt]
"220 (BC_8, cs_b(0), bidir, 0, 221, 1, Z)," &
"221 (BC_2, *, control, 1)," &
"222 (BC_8, dspi_pcs0, bidir, 0, 223, 1, Z)," &
"223 (BC_2, *, control, 1)," &
"224 (BC_8, dspi_sck, bidir, 0, 225, 1, Z)," &
"225 (BC_2, *, control, 1)," &
"226 (BC_8, dspi_sout, bidir, 0, 227, 1, Z)," &
"227 (BC_2, *, control, 1)," &
"228 (BC_8, dspi_sin, bidir, 0, 229, 1, Z)," &
"229 (BC_2, *, control, 1)," &
"230 (BC_8, u1cts_b, bidir, 0, 231, 1, Z)," &
"231 (BC_2, *, control, 1)," &
"232 (BC_8, u1rts_b, bidir, 0, 233, 1, Z)," &
"233 (BC_2, *, control, 1)," &
"234 (BC_8, u1rxd, bidir, 0, 235, 1, Z)," &
"235 (BC_2, *, control, 1)," &
"236 (BC_8, u1txd, bidir, 0, 237, 1, Z)," &
"237 (BC_2, *, control, 1)," &
"238 (BC_8, irq_b_1, bidir, 0, 239, 1, Z)," &
"239 (BC_2, *, control, 1)," &
-- num cell port func safe [ccell dis rslt]
"240 (BC_8, irq_b_4, bidir, 0, 241, 1, Z)," &
"241 (BC_2, *, control, 1)," &
"242 (BC_8, irq_b_7, bidir, 0, 243, 1, Z)," &
"243 (BC_2, *, control, 1)," &
"244 (BC_8, t3in, bidir, 0, 245, 1, Z)," &
"245 (BC_2, *, control, 1)," &
"246 (BC_8, t2in, bidir, 0, 247, 1, Z)," &
"247 (BC_2, *, control, 1)," &
"248 (BC_8, t1in, bidir, 1, 249, 1, Z)," &
"249 (BC_2, *, control, 1)," &
"250 (BC_8, t0in, bidir, 1, 251, 1, Z)," &
"251 (BC_2, *, control, 1)," &
"252 (BC_8, i2c_sda, bidir, 1, 253, 1, Z)," &
"253 (BC_2, *, control, 1)," &
"254 (BC_8, i2c_scl, bidir, 1, 255, 1, Z)," &
"255 (BC_2, *, control, 1)," &
"256 (BC_8, lcd_oe_acd, bidir, 1, 257, 1, Z)," &
"257 (BC_2, *, control, 1)," &
"258 (BC_8, lcd_lsclk, bidir, 0, 259, 1, Z)," &
"259 (BC_2, *, control, 1)," &
-- num cell port func safe [ccell dis rslt]
"260 (BC_8, lcd_data(0), bidir, 0, 261, 1, Z)," &
"261 (BC_2, *, control, 1)," &
"262 (BC_8, lcd_data(1), bidir, 0, 263, 1, Z)," &
"263 (BC_2, *, control, 1)," &
"264 (BC_8, lcd_data(2), bidir, 0, 265, 1, Z)," &
"265 (BC_2, *, control, 1)," &
"266 (BC_8, lcd_data(3), bidir, 0, 267, 1, Z)," &
"267 (BC_2, *, control, 1)," &
"268 (BC_8, lcd_data(4), bidir, 0, 269, 1, Z)," &
"269 (BC_2, *, control, 1)," &
"270 (BC_8, lcd_data(5), bidir, 0, 271, 1, Z)," &
"271 (BC_2, *, control, 1)";
end MCF52277;