------------------------------------------------------------------------
-- A T M E L A R M M I C R O C O N T R O L L E R S --
------------------------------------------------------------------------
-- BSDL file
--
-- File Name: AT91SAM9G10_BGA217.bsd
-- File Revision: 2.0
-- Date: Thu May 3 16:13:26 2007
-- Created by: Atmel Corporation
-- File Status: Released
--
-- History:
-- 1.0 initial release
-- 2.0 corrected package pin names to conform to datasheet
-- corrected boundary scan register order
--
-- Device: AT91SAM9G10
-- Package: R-LFBGA217_B
--
-- Visit http://www.atmel.com for a updated list of BSDL files.
--
------------------------------------------------------------------------
-- Syntax and Semantics are checked against the IEEE 1149.1 standard. --
------------------------------------------------------------------------
------------------------------------------------------------------------
-- IMPORTANT NOTICE --
-- --
-- Copyright 2002 Atmel Corporation. All Rights Reserved. --
-- --
-- Atmel assumes no responsibility or liability arising out --
-- this application or use of any information described herein --
-- except as expressly agreed to in writing by Atmel Corporation. --
-- --
-- ------------------------------------------------------------------ --
-- =======================================================
-- *******************************************************
-- This BSDL has been validated for syntax and semantics
-- compliance to IEEE 1149.1 using the ASSET/Agilent BSDL
-- Validation Service.
-- *******************************************************
-- =======================================================
entity AT91SAM9G10 is
-- This section identifies the default device package selected.
generic (PHYSICAL_PIN_MAP: string:= "R_LFBGA217_B_287x295");
-- This section declares all the ports in the design.
port (
ntrst : in bit;
tck : in bit;
tdi : in bit;
tms : in bit;
a1 : inout bit;
d0 : inout bit;
d1 : inout bit;
d10 : inout bit;
d11 : inout bit;
d12 : inout bit;
d13 : inout bit;
d14 : inout bit;
d15 : inout bit;
d2 : inout bit;
d3 : inout bit;
d4 : inout bit;
d5 : inout bit;
d6 : inout bit;
d7 : inout bit;
d8 : inout bit;
d9 : inout bit;
nwr0 : inout bit;
nwr1 : inout bit;
nwr3 : inout bit;
pa0 : inout bit;
pa1 : inout bit;
pa10 : inout bit;
pa11 : inout bit;
pa12 : inout bit;
pa13 : inout bit;
pa14 : inout bit;
pa15 : inout bit;
pa16 : inout bit;
pa17 : inout bit;
pa18 : inout bit;
pa19 : inout bit;
pa2 : inout bit;
pa20 : inout bit;
pa21 : inout bit;
pa22 : inout bit;
pa23 : inout bit;
pa24 : inout bit;
pa25 : inout bit;
pa26 : inout bit;
pa27 : inout bit;
pa28 : inout bit;
pa29 : inout bit;
pa3 : inout bit;
pa30 : inout bit;
pa31 : inout bit;
pa4 : inout bit;
pa5 : inout bit;
pa6 : inout bit;
pa7 : inout bit;
pa8 : inout bit;
pa9 : inout bit;
pb0 : inout bit;
pb1 : inout bit;
pb10 : inout bit;
pb11 : inout bit;
pb12 : inout bit;
pb13 : inout bit;
pb14 : inout bit;
pb15 : inout bit;
pb16 : inout bit;
pb17 : inout bit;
pb18 : inout bit;
pb19 : inout bit;
pb2 : inout bit;
pb20 : inout bit;
pb21 : inout bit;
pb22 : inout bit;
pb23 : inout bit;
pb24 : inout bit;
pb25 : inout bit;
pb26 : inout bit;
pb27 : inout bit;
pb28 : inout bit;
pb29 : inout bit;
pb3 : inout bit;
pb30 : inout bit;
pb31 : inout bit;
pb4 : inout bit;
pb5 : inout bit;
pb6 : inout bit;
pb7 : inout bit;
pb8 : inout bit;
pb9 : inout bit;
pc0 : inout bit;
pc1 : inout bit;
pc10 : inout bit;
pc11 : inout bit;
pc12 : inout bit;
pc13 : inout bit;
pc14 : inout bit;
pc15 : inout bit;
pc16 : inout bit;
pc17 : inout bit;
pc18 : inout bit;
pc19 : inout bit;
pc2 : inout bit;
pc20 : inout bit;
pc21 : inout bit;
pc22 : inout bit;
pc23 : inout bit;
pc24 : inout bit;
pc25 : inout bit;
pc26 : inout bit;
pc27 : inout bit;
pc28 : inout bit;
pc29 : inout bit;
pc3 : inout bit;
pc30 : inout bit;
pc31 : inout bit;
pc4 : inout bit;
pc5 : inout bit;
pc6 : inout bit;
pc7 : inout bit;
pc8 : inout bit;
pc9 : inout bit;
sdramclk : inout bit;
a0 : out bit;
a10 : out bit;
a11 : out bit;
a12 : out bit;
a13 : out bit;
a14 : out bit;
a15 : out bit;
a16 : out bit;
a17 : out bit;
a18 : out bit;
a19 : out bit;
a2 : out bit;
a20 : out bit;
a21 : out bit;
a22 : out bit;
a3 : out bit;
a4 : out bit;
a5 : out bit;
a6 : out bit;
a7 : out bit;
a8 : out bit;
a9 : out bit;
cas : out bit;
ncs0 : out bit;
ncs1 : out bit;
ncs2 : out bit;
ncs3 : out bit;
nrd : out bit;
ras : out bit;
sda10 : out bit;
sdramcke : out bit;
sdwe : out bit;
tdo : out bit;
GNDBU : linkage bit;
GNDOSC : linkage bit;
GNDPLL : linkage bit;
NC : linkage bit;
VDDBU : linkage bit;
VDDOSC : linkage bit;
VDDPLL : linkage bit;
ddm : linkage bit;
ddp : linkage bit;
hdma : linkage bit;
hdmb : linkage bit;
hdpa : linkage bit;
hdpb : linkage bit;
jtagsel : in bit;
nrst : linkage bit;
osc32k_xin : linkage bit;
osc32k_xout : linkage bit;
osc9m_xin : linkage bit;
osc9m_xout : linkage bit;
pll_a_rc : linkage bit;
pll_b_rc : linkage bit;
rtck : linkage bit;
shdw : linkage bit;
tst : linkage bit;
vext_por_vddbu : linkage bit;
vext_por_vddcore : linkage bit;
wkup0 : linkage bit;
GND : linkage bit_vector (1 to 18);
VDDCORE : linkage bit_vector (1 to 4);
VDDIOM : linkage bit_vector (1 to 7);
VDDIOP : linkage bit_vector (1 to 7)
);
use STD_1149_1_2001.all;
attribute COMPONENT_CONFORMANCE of AT91SAM9G10: entity is "STD_1149_1_2001";
attribute PIN_MAP of AT91SAM9G10: entity is PHYSICAL_PIN_MAP;
-- This section specifies the pin map for each port. This information is extracted from the port-to-pin map file that
-- was read in using the "read_pin_map" command.
constant R_LFBGA217_B_287x295: PIN_MAP_STRING :=
"ntrst : F17," &
"tck : D17," &
"tdi : E17," &
"tms : C17," &
"a1 : B8," &
"d0 : G1," &
"d1 : G2," &
"d10 : K3," &
"d11 : L2," &
"d12 : L3," &
"d13 : M1," &
"d14 : N1," &
"d15 : M2," &
"d2 : H1," &
"d3 : H2," &
"d4 : J1," &
"d5 : J2," &
"d6 : K1," &
"d7 : K4," &
"d8 : K2," &
"d9 : L1," &
"nwr0 : E2," &
"nwr1 : E1," &
"nwr3 : F3," &
"pa0 : R11," &
"pa1 : T12," &
"pa10 : R13," &
"pa11 : T16," &
"pa12 : U15," &
"pa13 : R14," &
"pa14 : T17," &
"pa15 : P13," &
"pa16 : P14," &
"pa17 : R15," &
"pa18 : R17," &
"pa19 : P16," &
"pa2 : U13," &
"pa20 : P17," &
"pa21 : N15," &
"pa22 : N14," &
"pa23 : N16," &
"pa24 : N17," &
"pa25 : M14," &
"pa26 : M15," &
"pa27 : L15," &
"pa28 : M16," &
"pa29 : M17," &
"pa3 : P10," &
"pa30 : L14," &
"pa31 : L16," &
"pa4 : T13," &
"pa5 : U14," &
"pa6 : T14," &
"pa7 : R12," &
"pa8 : T15," &
"pa9 : U16," &
"pb0 : L17," &
"pb1 : K16," &
"pb10 : H14," &
"pb11 : G16," &
"pb12 : G15," &
"pb13 : H15," &
"pb14 : G14," &
"pb15 : E16," &
"pb16 : F14," &
"pb17 : D16," &
"pb18 : E15," &
"pb19 : B17," &
"pb2 : K17," &
"pb20 : D15," &
"pb21 : C16," &
"pb22 : E14," &
"pb23 : D14," &
"pb24 : A17," &
"pb25 : B16," &
"pb26 : B15," &
"pb27 : A15," &
"pb28 : D13," &
"pb29 : D12," &
"pb3 : K15," &
"pb30 : C13," &
"pb31 : B13," &
"pb4 : J17," &
"pb5 : H17," &
"pb6 : J16," &
"pb7 : H16," &
"pb8 : G17," &
"pb9 : J15," &
"pc0 : U2," &
"pc1 : P6," &
"pc10 : T8," &
"pc11 : P8," &
"pc12 : R8," &
"pc13 : U8," &
"pc14 : R9," &
"pc15 : T9," &
"pc16 : P1," &
"pc17 : N2," &
"pc18 : M3," &
"pc19 : R1," &
"pc2 : T4," &
"pc20 : T1," &
"pc21 : R2," &
"pc22 : P3," &
"pc23 : T2," &
"pc24 : P4," &
"pc25 : U1," &
"pc26 : T3," &
"pc27 : R4," &
"pc28 : P5," &
"pc29 : R5," &
"pc3 : U3," &
"pc30 : P2," &
"pc31 : N3," &
"pc4 : R6," &
"pc5 : T6," &
"pc6 : U5," &
"pc7 : P7," &
"pc8 : R7," &
"pc9 : T7," &
"sdramclk : H4," &
"a0 : D8," &
"a10 : D6," &
"a11 : B5," &
"a12 : A4," &
"a13 : B4," &
"a14 : A3," &
"a15 : B3," &
"a16 : A2," &
"a17 : C4," &
"a18 : B2," &
"a19 : A1," &
"a2 : A8," &
"a20 : B1," &
"a21 : C2," &
"a22 : C1," &
"a3 : A7," &
"a4 : B7," &
"a5 : D7," &
"a6 : A6," &
"a7 : B6," &
"a8 : C6," &
"a9 : A5," &
"cas : J4," &
"ncs0 : F4," &
"ncs1 : D2," &
"ncs2 : D1," &
"ncs3 : G4," &
"nrd : E3," &
"ras : F2," &
"sda10 : E4," &
"sdramcke : F1," &
"sdwe : G3," &
"tdo : F16," &
"GNDBU : C9," &
"GNDOSC : T11," &
"GNDPLL : P9," &
"NC : D10," &
"VDDBU : B9," &
"VDDOSC : T10," &
"VDDPLL : R10," &
"ddm : B12," &
"ddp : A12," &
"hdma : B14," &
"hdmb : A14," &
"hdpa : C12," &
"hdpb : A13," &
"jtagsel : B10," &
"nrst : F15," &
"osc32k_xin : A11," &
"osc32k_xout : A10," &
"osc9m_xin : U11," &
"osc9m_xout : U12," &
"pll_a_rc : U10," &
"pll_b_rc : U9," &
"rtck : U17," &
"shdw : D9," &
"tst : C10," &
"vext_por_vddbu : A9," &
"vext_por_vddcore : C14," &
"wkup0 : B11," &
"GND : (A16, C7, C11, D3, H8, H9, H10, J3, J8, J9, J10, K8, K9, K10, R3, R16, U4, U7)," &
"VDDCORE : (D5, K14, M4, P12)," &
"VDDIOM : (C3, C5, C8, D4, H3, L4, N4)," &
"VDDIOP : (C15, D11, J14, P11, P15, T5, U6)";
-- This section specifies the TAP ports. For the TAP TCK port, the parameters in the brackets are:
-- First Field : Maximum TCK frequency.
-- Second Field: Allowable states TCK may be sAT91SAM9G10ped in.
attribute TAP_SCAN_CLOCK of tck : signal is (1.000000e+06, BOTH);
attribute TAP_SCAN_IN of tdi : signal is true;
attribute TAP_SCAN_MODE of tms : signal is true;
attribute TAP_SCAN_OUT of tdo : signal is true;
attribute TAP_SCAN_RESET of ntrst: signal is true;
-- Specifies the compliance enable patterns for the design. It lists a set of design ports and the values that they
-- should be set to, in order to enable compliance to IEEE Std 1149.1
attribute COMPLIANCE_PATTERNS of AT91SAM9G10: entity is
"(jtagsel) (1)";
-- Specifies the number of bits in the instruction register.
attribute INSTRUCTION_LENGTH of AT91SAM9G10: entity is 3;
-- Specifies the boundary-scan instructions implemented in the design and their opcodes.
attribute INSTRUCTION_OPCODE of AT91SAM9G10: entity is
"BYPASS (111, 100, 110)," &
"EXTEST (000, 011)," &
"SAMPLE (001)," &
"PRELOAD (001)," &
"IDCODE (010)";
-- Specifies the bit pattern that is loaded into the instruction register when the TAP controller passes through the
-- Capture-IR state. The standard mandates that the two LSBs must be "01". The remaining bits are design specific.
attribute INSTRUCTION_CAPTURE of AT91SAM9G10: entity is "001";
-- Specifies the bit pattern that is loaded into the DEVICE_ID register during the IDCODE instruction when the TAP
-- controller passes through the Capture-DR state.
attribute IDCODE_REGISTER of AT91SAM9G10: entity is
"0000" &
-- 4-bit version number
"0101101100001000" &
-- 16-bit part number
"00000011111" &
-- 11-bit identity of the manufacturer
"1";
-- Required by IEEE Std 1149.1
-- This section specifies the test data register placed between TDI and TDO for each implemented instruction.
attribute REGISTER_ACCESS of AT91SAM9G10: entity is
"BYPASS (BYPASS)," &
"BOUNDARY (EXTEST, SAMPLE, PRELOAD)," &
"DEVICE_ID (IDCODE)";
-- Specifies the length of the boundary scan register.
attribute BOUNDARY_LENGTH of AT91SAM9G10: entity is 484;
-- The following list specifies the characteristics of each cell in the boundary scan register from TDI to TDO. The
-- following is a description of the label fields:
-- num : Is the cell number.
-- cell : Is the cell type as defined by the standard.
-- port : Is the design port name. Control cells do not have a port name.
-- function: Is the function of the cell as defined by the standard. Is one of input, output2, output3, bidir,
-- control or controlr.
-- safe : Specifies the value that the BSR cell should be loaded with for safe operation when the software might
-- otherwise choose a random value.
-- ccell : The control cell number. Specifies the control cell that drives the output enable for this port.
-- disval : Specifies the value that is loaded into the control cell to disable the output enable for the
-- corresponding port.
-- rslt : Resulting state. Shows the state of the driver when it is disabled.
attribute BOUNDARY_REGISTER of AT91SAM9G10: entity is
--
-- num cell port function safe [ccell disval rslt]
--
"483 (BC_1, a18, output3, X, 482, 1, Z), " &
"482 (BC_1, *, controlr, 1), " &
"481 (BC_1, a19, output3, X, 482, 1, Z), " &
"480 (BC_1, a20, output3, X, 482, 1, Z), " &
"479 (BC_1, a21, output3, X, 482, 1, Z), " &
"478 (BC_1, a22, output3, X, 482, 1, Z), " &
"477 (BC_1, ncs0, output3, X, 474, 1, Z), " &
"476 (BC_1, *, controlr, 1), " &
"475 (BC_1, ncs1, output3, X, 474, 1, Z), " &
"474 (BC_1, *, controlr, 1), " &
"473 (BC_1, ncs2, output3, X, 474, 1, Z), " &
"472 (BC_1, ncs3, output3, X, 474, 1, Z), " &
"471 (BC_1, nrd, output3, X, 474, 1, Z), " &
"470 (BC_1, nwr0, input, X), " &
"469 (BC_1, nwr0, output3, X, 474, 1, Z), " &
"468 (BC_1, nwr1, input, X), " &
"467 (BC_1, nwr1, output3, X, 474, 1, Z), " &
"466 (BC_1, nwr3, input, X), " &
"465 (BC_1, nwr3, output3, X, 474, 1, Z), " &
"464 (BC_1, sdramcke, output3, X, 463, 1, Z), " &
"463 (BC_1, *, controlr, 1), " &
"462 (BC_1, sdramclk, input, X), " &
"461 (BC_1, sdramclk, output3, X, 460, 1, Z), " &
"460 (BC_1, *, controlr, 1), " &
"459 (BC_1, ras, output3, X, 463, 1, Z), " &
"458 (BC_1, cas, output3, X, 463, 1, Z), " &
"457 (BC_1, sdwe, output3, X, 463, 1, Z), " &
"456 (BC_1, d0, input, X), " &
"455 (BC_1, d0, output3, X, 454, 1, Z), " &
"454 (BC_1, *, controlr, 1), " &
"453 (BC_0, *, internal, X), " &
"452 (BC_1, d1, input, X), " &
"451 (BC_1, d1, output3, X, 450, 1, Z), " &
"450 (BC_1, *, controlr, 1), " &
"449 (BC_1, d2, input, X), " &
"448 (BC_1, d2, output3, X, 447, 1, Z), " &
"447 (BC_1, *, controlr, 1), " &
"446 (BC_1, d3, input, X), " &
"445 (BC_1, d3, output3, X, 444, 1, Z), " &
"444 (BC_1, *, controlr, 1), " &
"443 (BC_1, d4, input, X), " &
"442 (BC_1, d4, output3, X, 441, 1, Z), " &
"441 (BC_1, *, controlr, 1), " &
"440 (BC_0, *, internal, X), " &
"439 (BC_1, d5, input, X), " &
"438 (BC_1, d5, output3, X, 437, 1, Z), " &
"437 (BC_1, *, controlr, 1), " &
"436 (BC_1, d6, input, X), " &
"435 (BC_1, d6, output3, X, 434, 1, Z), " &
"434 (BC_1, *, controlr, 1), " &
"433 (BC_1, d7, input, X), " &
"432 (BC_1, d7, output3, X, 431, 1, Z), " &
"431 (BC_1, *, controlr, 1), " &
"430 (BC_1, d8, input, X), " &
"429 (BC_1, d8, output3, X, 428, 1, Z), " &
"428 (BC_1, *, controlr, 1), " &
"427 (BC_0, *, internal, X), " &
"426 (BC_1, d9, input, X), " &
"425 (BC_1, d9, output3, X, 424, 1, Z), " &
"424 (BC_1, *, controlr, 1), " &
"423 (BC_1, d10, input, X), " &
"422 (BC_1, d10, output3, X, 421, 1, Z), " &
"421 (BC_1, *, controlr, 1), " &
"420 (BC_1, d11, input, X), " &
"419 (BC_1, d11, output3, X, 418, 1, Z), " &
"418 (BC_1, *, controlr, 1), " &
"417 (BC_1, d12, input, X), " &
"416 (BC_1, d12, output3, X, 415, 1, Z), " &
"415 (BC_1, *, controlr, 1), " &
"414 (BC_0, *, internal, X), " &
"413 (BC_1, d13, input, X), " &
"412 (BC_1, d13, output3, X, 411, 1, Z), " &
"411 (BC_1, *, controlr, 1), " &
"410 (BC_1, d14, input, X), " &
"409 (BC_1, d14, output3, X, 408, 1, Z), " &
"408 (BC_1, *, controlr, 1), " &
"407 (BC_1, d15, input, X), " &
"406 (BC_1, d15, output3, X, 405, 1, Z), " &
"405 (BC_1, *, controlr, 1), " &
"404 (BC_1, pc16, input, X), " &
"403 (BC_1, pc16, output3, X, 402, 1, Z), " &
"402 (BC_1, *, controlr, 1), " &
"401 (BC_0, *, internal, X), " &
"400 (BC_1, pc17, input, X), " &
"399 (BC_1, pc17, output3, X, 398, 1, Z), " &
"398 (BC_1, *, controlr, 1), " &
"397 (BC_0, *, internal, X), " &
"396 (BC_1, pc18, input, X), " &
"395 (BC_1, pc18, output3, X, 394, 1, Z), " &
"394 (BC_1, *, controlr, 1), " &
"393 (BC_0, *, internal, X), " &
"392 (BC_1, pc19, input, X), " &
"391 (BC_1, pc19, output3, X, 390, 1, Z), " &
"390 (BC_1, *, controlr, 1), " &
"389 (BC_0, *, internal, X), " &
"388 (BC_1, pc30, input, X), " &
"387 (BC_1, pc30, output3, X, 386, 1, Z), " &
"386 (BC_1, *, controlr, 1), " &
"385 (BC_0, *, internal, X), " &
"384 (BC_1, pc31, input, X), " &
"383 (BC_1, pc31, output3, X, 382, 1, Z), " &
"382 (BC_1, *, controlr, 1), " &
"381 (BC_0, *, internal, X), " &
"380 (BC_1, pc20, input, X), " &
"379 (BC_1, pc20, output3, X, 378, 1, Z), " &
"378 (BC_1, *, controlr, 1), " &
"377 (BC_0, *, internal, X), " &
"376 (BC_1, pc21, input, X), " &
"375 (BC_1, pc21, output3, X, 374, 1, Z), " &
"374 (BC_1, *, controlr, 1), " &
"373 (BC_0, *, internal, X), " &
"372 (BC_1, pc22, input, X), " &
"371 (BC_1, pc22, output3, X, 370, 1, Z), " &
"370 (BC_1, *, controlr, 1), " &
"369 (BC_0, *, internal, X), " &
"368 (BC_1, pc23, input, X), " &
"367 (BC_1, pc23, output3, X, 366, 1, Z), " &
"366 (BC_1, *, controlr, 1), " &
"365 (BC_0, *, internal, X), " &
"364 (BC_1, pc24, input, X), " &
"363 (BC_1, pc24, output3, X, 362, 1, Z), " &
"362 (BC_1, *, controlr, 1), " &
"361 (BC_0, *, internal, X), " &
"360 (BC_1, pc25, input, X), " &
"359 (BC_1, pc25, output3, X, 358, 1, Z), " &
"358 (BC_1, *, controlr, 1), " &
"357 (BC_0, *, internal, X), " &
"356 (BC_1, pc26, input, X), " &
"355 (BC_1, pc26, output3, X, 354, 1, Z), " &
"354 (BC_1, *, controlr, 1), " &
"353 (BC_0, *, internal, X), " &
"352 (BC_1, pc27, input, X), " &
"351 (BC_1, pc27, output3, X, 350, 1, Z), " &
"350 (BC_1, *, controlr, 1), " &
"349 (BC_0, *, internal, X), " &
"348 (BC_1, pc28, input, X), " &
"347 (BC_1, pc28, output3, X, 346, 1, Z), " &
"346 (BC_1, *, controlr, 1), " &
"345 (BC_0, *, internal, X), " &
"344 (BC_1, pc29, input, X), " &
"343 (BC_1, pc29, output3, X, 342, 1, Z), " &
"342 (BC_1, *, controlr, 1), " &
"341 (BC_0, *, internal, X), " &
"340 (BC_1, pc0, input, X), " &
"339 (BC_1, pc0, output3, X, 338, 1, Z), " &
"338 (BC_1, *, controlr, 1), " &
"337 (BC_0, *, internal, X), " &
"336 (BC_1, pc1, input, X), " &
"335 (BC_1, pc1, output3, X, 334, 1, Z), " &
"334 (BC_1, *, controlr, 1), " &
"333 (BC_0, *, internal, X), " &
"332 (BC_1, pc2, input, X), " &
"331 (BC_1, pc2, output3, X, 330, 1, Z), " &
"330 (BC_1, *, controlr, 1), " &
"329 (BC_0, *, internal, X), " &
"328 (BC_1, pc3, input, X), " &
"327 (BC_1, pc3, output3, X, 326, 1, Z), " &
"326 (BC_1, *, controlr, 1), " &
"325 (BC_0, *, internal, X), " &
"324 (BC_1, pc4, input, X), " &
"323 (BC_1, pc4, output3, X, 322, 1, Z), " &
"322 (BC_1, *, controlr, 1), " &
"321 (BC_0, *, internal, X), " &
"320 (BC_1, pc5, input, X), " &
"319 (BC_1, pc5, output3, X, 318, 1, Z), " &
"318 (BC_1, *, controlr, 1), " &
"317 (BC_0, *, internal, X), " &
"316 (BC_1, pc6, input, X), " &
"315 (BC_1, pc6, output3, X, 314, 1, Z), " &
"314 (BC_1, *, controlr, 1), " &
"313 (BC_0, *, internal, X), " &
"312 (BC_1, pc7, input, X), " &
"311 (BC_1, pc7, output3, X, 310, 1, Z), " &
"310 (BC_1, *, controlr, 1), " &
"309 (BC_0, *, internal, X), " &
"308 (BC_1, pc8, input, X), " &
"307 (BC_1, pc8, output3, X, 306, 1, Z), " &
"306 (BC_1, *, controlr, 1), " &
"305 (BC_0, *, internal, X), " &
"304 (BC_1, pc9, input, X), " &
"303 (BC_1, pc9, output3, X, 302, 1, Z), " &
"302 (BC_1, *, controlr, 1), " &
"301 (BC_0, *, internal, X), " &
"300 (BC_1, pc10, input, X), " &
"299 (BC_1, pc10, output3, X, 298, 1, Z), " &
"298 (BC_1, *, controlr, 1), " &
"297 (BC_0, *, internal, X), " &
"296 (BC_1, pc11, input, X), " &
"295 (BC_1, pc11, output3, X, 294, 1, Z), " &
"294 (BC_1, *, controlr, 1), " &
"293 (BC_0, *, internal, X), " &
"292 (BC_1, pc12, input, X), " &
"291 (BC_1, pc12, output3, X, 290, 1, Z), " &
"290 (BC_1, *, controlr, 1), " &
"289 (BC_0, *, internal, X), " &
"288 (BC_1, pc13, input, X), " &
"287 (BC_1, pc13, output3, X, 286, 1, Z), " &
"286 (BC_1, *, controlr, 1), " &
"285 (BC_0, *, internal, X), " &
"284 (BC_1, pc14, input, X), " &
"283 (BC_1, pc14, output3, X, 282, 1, Z), " &
"282 (BC_1, *, controlr, 1), " &
"281 (BC_0, *, internal, X), " &
"280 (BC_1, pc15, input, X), " &
"279 (BC_1, pc15, output3, X, 278, 1, Z), " &
"278 (BC_1, *, controlr, 1), " &
"277 (BC_0, *, internal, X), " &
"276 (BC_1, pa0, input, X), " &
"275 (BC_1, pa0, output3, X, 274, 1, Z), " &
"274 (BC_1, *, controlr, 1), " &
"273 (BC_0, *, internal, X), " &
"272 (BC_1, pa1, input, X), " &
"271 (BC_1, pa1, output3, X, 270, 1, Z), " &
"270 (BC_1, *, controlr, 1), " &
"269 (BC_0, *, internal, X), " &
"268 (BC_1, pa2, input, X), " &
"267 (BC_1, pa2, output3, X, 266, 1, Z), " &
"266 (BC_1, *, controlr, 1), " &
"265 (BC_0, *, internal, X), " &
"264 (BC_1, pa3, input, X), " &
"263 (BC_1, pa3, output3, X, 262, 1, Z), " &
"262 (BC_1, *, controlr, 1), " &
"261 (BC_0, *, internal, X), " &
"260 (BC_1, pa4, input, X), " &
"259 (BC_1, pa4, output3, X, 258, 1, Z), " &
"258 (BC_1, *, controlr, 1), " &
"257 (BC_0, *, internal, X), " &
"256 (BC_1, pa5, input, X), " &
"255 (BC_1, pa5, output3, X, 254, 1, Z), " &
"254 (BC_1, *, controlr, 1), " &
"253 (BC_0, *, internal, X), " &
"252 (BC_1, pa6, input, X), " &
"251 (BC_1, pa6, output3, X, 250, 1, Z), " &
"250 (BC_1, *, controlr, 1), " &
"249 (BC_0, *, internal, X), " &
"248 (BC_1, pa7, input, X), " &
"247 (BC_1, pa7, output3, X, 246, 1, Z), " &
"246 (BC_1, *, controlr, 1), " &
"245 (BC_0, *, internal, X), " &
"244 (BC_1, pa8, input, X), " &
"243 (BC_1, pa8, output3, X, 242, 1, Z), " &
"242 (BC_1, *, controlr, 1), " &
"241 (BC_0, *, internal, X), " &
"240 (BC_1, pa9, input, X), " &
"239 (BC_1, pa9, output3, X, 238, 1, Z), " &
"238 (BC_1, *, controlr, 1), " &
"237 (BC_0, *, internal, X), " &
"236 (BC_1, pa10, input, X), " &
"235 (BC_1, pa10, output3, X, 234, 1, Z), " &
"234 (BC_1, *, controlr, 1), " &
"233 (BC_0, *, internal, X), " &
"232 (BC_1, pa11, input, X), " &
"231 (BC_1, pa11, output3, X, 230, 1, Z), " &
"230 (BC_1, *, controlr, 1), " &
"229 (BC_0, *, internal, X), " &
"228 (BC_1, pa12, input, X), " &
"227 (BC_1, pa12, output3, X, 226, 1, Z), " &
"226 (BC_1, *, controlr, 1), " &
"225 (BC_0, *, internal, X), " &
"224 (BC_1, pa13, input, X), " &
"223 (BC_1, pa13, output3, X, 222, 1, Z), " &
"222 (BC_1, *, controlr, 1), " &
"221 (BC_0, *, internal, X), " &
"220 (BC_1, pa14, input, X), " &
"219 (BC_1, pa14, output3, X, 218, 1, Z), " &
"218 (BC_1, *, controlr, 1), " &
"217 (BC_0, *, internal, X), " &
"216 (BC_1, pa15, input, X), " &
"215 (BC_1, pa15, output3, X, 214, 1, Z), " &
"214 (BC_1, *, controlr, 1), " &
"213 (BC_0, *, internal, X), " &
"212 (BC_1, pa16, input, X), " &
"211 (BC_1, pa16, output3, X, 210, 1, Z), " &
"210 (BC_1, *, controlr, 1), " &
"209 (BC_0, *, internal, X), " &
"208 (BC_1, pa17, input, X), " &
"207 (BC_1, pa17, output3, X, 206, 1, Z), " &
"206 (BC_1, *, controlr, 1), " &
"205 (BC_0, *, internal, X), " &
"204 (BC_1, pa18, input, X), " &
"203 (BC_1, pa18, output3, X, 202, 1, Z), " &
"202 (BC_1, *, controlr, 1), " &
"201 (BC_0, *, internal, X), " &
"200 (BC_1, pa19, input, X), " &
"199 (BC_1, pa19, output3, X, 198, 1, Z), " &
"198 (BC_1, *, controlr, 1), " &
"197 (BC_0, *, internal, X), " &
"196 (BC_1, pa20, input, X), " &
"195 (BC_1, pa20, output3, X, 194, 1, Z), " &
"194 (BC_1, *, controlr, 1), " &
"193 (BC_0, *, internal, X), " &
"192 (BC_1, pa21, input, X), " &
"191 (BC_1, pa21, output3, X, 190, 1, Z), " &
"190 (BC_1, *, controlr, 1), " &
"189 (BC_0, *, internal, X), " &
"188 (BC_1, pa22, input, X), " &
"187 (BC_1, pa22, output3, X, 186, 1, Z), " &
"186 (BC_1, *, controlr, 1), " &
"185 (BC_0, *, internal, X), " &
"184 (BC_1, pa23, input, X), " &
"183 (BC_1, pa23, output3, X, 182, 1, Z), " &
"182 (BC_1, *, controlr, 1), " &
"181 (BC_0, *, internal, X), " &
"180 (BC_1, pa24, input, X), " &
"179 (BC_1, pa24, output3, X, 178, 1, Z), " &
"178 (BC_1, *, controlr, 1), " &
"177 (BC_0, *, internal, X), " &
"176 (BC_1, pa25, input, X), " &
"175 (BC_1, pa25, output3, X, 174, 1, Z), " &
"174 (BC_1, *, controlr, 1), " &
"173 (BC_0, *, internal, X), " &
"172 (BC_1, pa26, input, X), " &
"171 (BC_1, pa26, output3, X, 170, 1, Z), " &
"170 (BC_1, *, controlr, 1), " &
"169 (BC_0, *, internal, X), " &
"168 (BC_1, pa27, input, X), " &
"167 (BC_1, pa27, output3, X, 166, 1, Z), " &
"166 (BC_1, *, controlr, 1), " &
"165 (BC_0, *, internal, X), " &
"164 (BC_1, pa28, input, X), " &
"163 (BC_1, pa28, output3, X, 162, 1, Z), " &
"162 (BC_1, *, controlr, 1), " &
"161 (BC_0, *, internal, X), " &
"160 (BC_1, pa29, input, X), " &
"159 (BC_1, pa29, output3, X, 158, 1, Z), " &
"158 (BC_1, *, controlr, 1), " &
"157 (BC_0, *, internal, X), " &
"156 (BC_1, pa30, input, X), " &
"155 (BC_1, pa30, output3, X, 154, 1, Z), " &
"154 (BC_1, *, controlr, 1), " &
"153 (BC_0, *, internal, X), " &
"152 (BC_1, pa31, input, X), " &
"151 (BC_1, pa31, output3, X, 150, 1, Z), " &
"150 (BC_1, *, controlr, 1), " &
"149 (BC_0, *, internal, X), " &
"148 (BC_1, pb0, input, X), " &
"147 (BC_1, pb0, output3, X, 146, 1, Z), " &
"146 (BC_1, *, controlr, 1), " &
"145 (BC_0, *, internal, X), " &
"144 (BC_1, pb1, input, X), " &
"143 (BC_1, pb1, output3, X, 142, 1, Z), " &
"142 (BC_1, *, controlr, 1), " &
"141 (BC_0, *, internal, X), " &
"140 (BC_1, pb2, input, X), " &
"139 (BC_1, pb2, output3, X, 138, 1, Z), " &
"138 (BC_1, *, controlr, 1), " &
"137 (BC_0, *, internal, X), " &
"136 (BC_1, pb3, input, X), " &
"135 (BC_1, pb3, output3, X, 134, 1, Z), " &
"134 (BC_1, *, controlr, 1), " &
"133 (BC_0, *, internal, X), " &
"132 (BC_1, pb4, input, X), " &
"131 (BC_1, pb4, output3, X, 130, 1, Z), " &
"130 (BC_1, *, controlr, 1), " &
"129 (BC_0, *, internal, X), " &
"128 (BC_1, pb5, input, X), " &
"127 (BC_1, pb5, output3, X, 126, 1, Z), " &
"126 (BC_1, *, controlr, 1), " &
"125 (BC_0, *, internal, X), " &
"124 (BC_1, pb6, input, X), " &
"123 (BC_1, pb6, output3, X, 122, 1, Z), " &
"122 (BC_1, *, controlr, 1), " &
"121 (BC_0, *, internal, X), " &
"120 (BC_1, pb7, input, X), " &
"119 (BC_1, pb7, output3, X, 118, 1, Z), " &
"118 (BC_1, *, controlr, 1), " &
"117 (BC_0, *, internal, X), " &
"116 (BC_1, pb8, input, X), " &
"115 (BC_1, pb8, output3, X, 114, 1, Z), " &
"114 (BC_1, *, controlr, 1), " &
"113 (BC_0, *, internal, X), " &
"112 (BC_1, pb9, input, X), " &
"111 (BC_1, pb9, output3, X, 110, 1, Z), " &
"110 (BC_1, *, controlr, 1), " &
"109 (BC_0, *, internal, X), " &
"108 (BC_1, pb10, input, X), " &
"107 (BC_1, pb10, output3, X, 106, 1, Z), " &
"106 (BC_1, *, controlr, 1), " &
"105 (BC_0, *, internal, X), " &
"104 (BC_1, pb11, input, X), " &
"103 (BC_1, pb11, output3, X, 102, 1, Z), " &
"102 (BC_1, *, controlr, 1), " &
"101 (BC_0, *, internal, X), " &
"100 (BC_1, pb12, input, X), " &
"99 (BC_1, pb12, output3, X, 98, 1, Z), " &
"98 (BC_1, *, controlr, 1), " &
"97 (BC_0, *, internal, X), " &
"96 (BC_1, pb13, input, X), " &
"95 (BC_1, pb13, output3, X, 94, 1, Z), " &
"94 (BC_1, *, controlr, 1), " &
"93 (BC_0, *, internal, X), " &
"92 (BC_1, pb14, input, X), " &
"91 (BC_1, pb14, output3, X, 90, 1, Z), " &
"90 (BC_1, *, controlr, 1), " &
"89 (BC_0, *, internal, X), " &
"88 (BC_1, pb15, input, X), " &
"87 (BC_1, pb15, output3, X, 86, 1, Z), " &
"86 (BC_1, *, controlr, 1), " &
"85 (BC_0, *, internal, X), " &
"84 (BC_1, pb16, input, X), " &
"83 (BC_1, pb16, output3, X, 82, 1, Z), " &
"82 (BC_1, *, controlr, 1), " &
"81 (BC_0, *, internal, X), " &
"80 (BC_1, pb17, input, X), " &
"79 (BC_1, pb17, output3, X, 78, 1, Z), " &
"78 (BC_1, *, controlr, 1), " &
"77 (BC_0, *, internal, X), " &
"76 (BC_1, pb18, input, X), " &
"75 (BC_1, pb18, output3, X, 74, 1, Z), " &
"74 (BC_1, *, controlr, 1), " &
"73 (BC_0, *, internal, X), " &
"72 (BC_1, pb19, input, X), " &
"71 (BC_1, pb19, output3, X, 70, 1, Z), " &
"70 (BC_1, *, controlr, 1), " &
"69 (BC_0, *, internal, X), " &
"68 (BC_1, pb20, input, X), " &
"67 (BC_1, pb20, output3, X, 66, 1, Z), " &
"66 (BC_1, *, controlr, 1), " &
"65 (BC_0, *, internal, X), " &
"64 (BC_1, pb21, input, X), " &
"63 (BC_1, pb21, output3, X, 62, 1, Z), " &
"62 (BC_1, *, controlr, 1), " &
"61 (BC_0, *, internal, X), " &
"60 (BC_1, pb22, input, X), " &
"59 (BC_1, pb22, output3, X, 58, 1, Z), " &
"58 (BC_1, *, controlr, 1), " &
"57 (BC_0, *, internal, X), " &
"56 (BC_1, pb23, input, X), " &
"55 (BC_1, pb23, output3, X, 54, 1, Z), " &
"54 (BC_1, *, controlr, 1), " &
"53 (BC_0, *, internal, X), " &
"52 (BC_1, pb24, input, X), " &
"51 (BC_1, pb24, output3, X, 50, 1, Z), " &
"50 (BC_1, *, controlr, 1), " &
"49 (BC_0, *, internal, X), " &
"48 (BC_1, pb25, input, X), " &
"47 (BC_1, pb25, output3, X, 46, 1, Z), " &
"46 (BC_1, *, controlr, 1), " &
"45 (BC_0, *, internal, X), " &
"44 (BC_1, pb26, input, X), " &
"43 (BC_1, pb26, output3, X, 42, 1, Z), " &
"42 (BC_1, *, controlr, 1), " &
"41 (BC_0, *, internal, X), " &
"40 (BC_1, pb27, input, X), " &
"39 (BC_1, pb27, output3, X, 38, 1, Z), " &
"38 (BC_1, *, controlr, 1), " &
"37 (BC_0, *, internal, X), " &
"36 (BC_1, pb28, input, X), " &
"35 (BC_1, pb28, output3, X, 34, 1, Z), " &
"34 (BC_1, *, controlr, 1), " &
"33 (BC_0, *, internal, X), " &
"32 (BC_1, pb29, input, X), " &
"31 (BC_1, pb29, output3, X, 30, 1, Z), " &
"30 (BC_1, *, controlr, 1), " &
"29 (BC_0, *, internal, X), " &
"28 (BC_1, pb30, input, X), " &
"27 (BC_1, pb30, output3, X, 26, 1, Z), " &
"26 (BC_1, *, controlr, 1), " &
"25 (BC_0, *, internal, X), " &
"24 (BC_1, pb31, input, X), " &
"23 (BC_1, pb31, output3, X, 22, 1, Z), " &
"22 (BC_1, *, controlr, 1), " &
"21 (BC_0, *, internal, X), " &
"20 (BC_1, a0, output3, X, 476, 1, Z), " &
"19 (BC_1, a1, input, X), " &
"18 (BC_1, a1, output3, X, 476, 1, Z), " &
"17 (BC_1, a2, output3, X, 476, 1, Z), " &
"16 (BC_1, a3, output3, X, 476, 1, Z), " &
"15 (BC_1, a4, output3, X, 476, 1, Z), " &
"14 (BC_1, a5, output3, X, 476, 1, Z), " &
"13 (BC_1, a6, output3, X, 476, 1, Z), " &
"12 (BC_1, a7, output3, X, 476, 1, Z), " &
"11 (BC_1, a8, output3, X, 10, 1, Z), " &
"10 (BC_1, *, controlr, 1), " &
"9 (BC_1, a9, output3, X, 10, 1, Z), " &
"8 (BC_1, a10, output3, X, 10, 1, Z), " &
"7 (BC_1, sda10, output3, X, 463, 1, Z), " &
"6 (BC_1, a11, output3, X, 10, 1, Z), " &
"5 (BC_1, a12, output3, X, 10, 1, Z), " &
"4 (BC_1, a13, output3, X, 10, 1, Z), " &
"3 (BC_1, a14, output3, X, 10, 1, Z), " &
"2 (BC_1, a15, output3, X, 10, 1, Z), " &
"1 (BC_1, a16, output3, X, 482, 1, Z), " &
"0 (BC_1, a17, output3, X, 482, 1, Z) ";
end AT91SAM9G10;