-- ********************************************************************
-- * M5-128/68-YC/1 100 pin PQFP BSDL Model *
-- * *
-- * File Version: V1.00 *
-- * File Date: Jan. 9, 2002 *
-- * *
-- * Standard Test Access Port and Boundary-Scan Architecture *
-- * VHDL Description File *
-- * *
-- * This BSDL file is created according to: *
-- * - IEEE 1149.1 1994 spec. *
-- * *
-- * This BSDL file has been syntax checked with: *
-- * - Lattice BSDL Syntax Checker *
-- * - Teradyne VICTORY V2.30 *
-- * - Agilent BSDL Syntax Checker *
-- * *
-- * Copyright 2000, 2001, 2002 Lattice Semiconductor Corporation *
-- * 5555 NE Moore Ct., Hillsboro, OR 97124 *
-- * All rights reserved. No part of this program or publication *
-- * may be reproduced, transmitted, transcribed, stored in a *
-- * retrieval system, or translated into any language or *
-- * computer language, in any form or by any means without this *
-- * notice appearing within. *
-- ********************************************************************
-- * *
-- * IMPORTANT *
-- * *
-- * The following is a BSDL file that tests all of the I/O pins *
-- * as bidirectional pins. The functionality of the BSCAN register *
-- * for this device is independent of the pattern programmed *
-- * into the device. An additional programming step is not *
-- * required to configure the I/O pins prior to BSCAN test. *
-- * *
-- * For Further assistance, please contact Tech Support at *
-- * 1-800-LATTICE or techsupport@latticesemi.com *
-- ********************************************************************
-- * *
-- * REVISION HISTORY *
-- * *
-- * Rev 1.00: 01/09/2002 *
-- * - Initial version. *
-- * *
-- ********************************************************************
-- The Overall Structute of the Entity Description
entity M5_1_128_XXP100 is
generic(PHYSICAL_PIN_MAP : string := "PQFP_100");
port (
CLK : in bit_vector(0 to 3); -- Clocks/Inputs
S0A : inout bit_vector(0 to 8);
S0B : inout bit_vector(0 to 7);
S0C : inout bit_vector(0 to 7);
S0D : inout bit_vector(0 to 8);
S1A : inout bit_vector(0 to 8);
S1B : inout bit_vector(0 to 7);
S1C : inout bit_vector(0 to 7);
S1D : inout bit_vector(0 to 8);
TCK, TMS, TDI : in bit; -- JTAG inputs
TDO : out bit; -- JTAG outputs
VCC : linkage bit_vector(0 to 7);
GND : linkage bit_vector(0 to 15)
);
-- Version Control
use STD_1149_1_1994.all; -- 1149.1-1994 attributes
-- Component Conformance Statement
attribute COMPONENT_CONFORMANCE of M5_1_128_XXP100 : entity is
"STD_1149_1_1993";
attribute PIN_MAP of M5_1_128_XXP100 : entity is PHYSICAL_PIN_MAP;
constant PQFP_100 : PIN_MAP_STRING :=
"CLK:(13, 18, 63, 68), " & -- Dedicated Clock/Input Pins
"S0A:( 93, 94, 95, 96, 97, 98, 99,100, 4), " &
"S0B:( 12, 11, 10, 9, 8, 7, 6, 5), " &
"S0C:( 69, 70, 71, 72, 73, 74, 75, 76), " &
"S0D:( 88, 87, 86, 85, 84, 83, 82, 81, 77), " &
"S1A:( 38, 37, 36, 35, 34, 33, 32, 31, 27), " &
"S1B:( 19, 20, 21, 22, 23, 24, 25, 26), " &
"S1C:( 62, 61, 60, 59, 58, 57, 56, 55), " &
"S1D:( 43, 44, 45, 46, 47, 48, 49, 50, 54), " &
"TDI:3, TMS:53, TCK:28, TDO:78, " & -- JTAG
"VCC:(14,15,39,42,64,65,89,92), " & -- POWER
"GND:(1,2,16,17,29,30,40,41,51,52, " & -- GROUND PINS
" 66,67,79,80,90,91) ";
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_CLOCK of TCK: signal is (20.0e6, BOTH);
-- Instruction register definitions
attribute INSTRUCTION_LENGTH of M5_1_128_XXP100 : entity is 6;
attribute INSTRUCTION_OPCODE of M5_1_128_XXP100 : entity is
"BYPASS (111111)," &
"EXTEST (000000)," &
"SAMPLE (000010)," &
"IDCODE (000001)," &
"HIGHZ (010001)," &
"PRIV003 (000011)," &
"PRIV004 (000100)," &
"PRIV005 (000101)," &
"PRIV006 (000110)," &
"PRIV007 (000111)," &
"PRIV008 (001000)," &
"PRIV00F (001111)," &
"PRIVATE (001101,001110,001100," &
"110000,100101,100110,100111,101110)";
attribute INSTRUCTION_CAPTURE of M5_1_128_XXP100 : entity is "000001";
attribute INSTRUCTION_PRIVATE of M5_1_128_XXP100 : entity is "PRIVATE";
attribute IDCODE_REGISTER of M5_1_128_XXP100 : entity is
"0000" & -- version number
"0111101000011111" & -- part identification
"00010101011" & -- company code
"1"; -- mandatory 1
attribute REGISTER_ACCESS of M5_1_128_XXP100 : entity is
-- inst. sel. bypass reg.
"BYPASS (BYPASS, HIGHZ, PRIV005, PRIV006, PRIV008 )," &
"BOUNDARY (EXTEST, SAMPLE)," & -- inst. sel. BS reg.
"ROWREG[77](PRIV003)," &
"COLREG[632](PRIV004, PRIV007)," &
"PRIVR00F[5](PRIV00F)";
-- **************************************************************
-- * BOUNDARY SCAN CELL REGISTER DESCRIPTION
-- * THE FIRST CELL (0) IS THE CELL CLOSEST TO TDO
-- **************************************************************
attribute BOUNDARY_LENGTH of M5_1_128_XXP100 : entity is 264;
attribute BOUNDARY_REGISTER of M5_1_128_XXP100 : entity is
-- 1. The output is disabled when a 0 is shifted into the
-- OE cell.
--
" 263 (BC_2, *, INTERNAL, 0 )," &
" 262 (BC_2, *, INTERNAL, 0 )," &
" 261 (BC_2, *, INTERNAL, 0 )," &
" 260 (BC_2, *, INTERNAL, 0 )," &
" 259 (BC_7, S0A( 0), BIDIR, X, 258, 0, Z)," &
" 258 (BC_2, *, CONTROL, 0 )," &
" 257 (BC_7, S0A( 1), BIDIR, X, 256, 0, Z)," &
" 256 (BC_2, *, CONTROL, 0 )," &
" 255 (BC_7, S0A( 2), BIDIR, X, 254, 0, Z)," &
" 254 (BC_2, *, CONTROL, 0 )," &
" 253 (BC_2, *, INTERNAL, 0 )," &
" 252 (BC_2, *, INTERNAL, 0 )," &
" 251 (BC_2, *, INTERNAL, 0 )," &
" 250 (BC_2, *, INTERNAL, 0 )," &
" 249 (BC_7, S0A( 3), BIDIR, X, 248, 0, Z)," &
" 248 (BC_2, *, CONTROL, 0 )," &
" 247 (BC_7, S0A( 4), BIDIR, X, 246, 0, Z)," &
" 246 (BC_2, *, CONTROL, 0 )," &
" 245 (BC_2, *, INTERNAL, 0 )," &
" 244 (BC_2, *, INTERNAL, 0 )," &
" 243 (BC_2, *, INTERNAL, 0 )," &
" 242 (BC_2, *, INTERNAL, 0 )," &
" 241 (BC_7, S0A( 5), BIDIR, X, 240, 0, Z)," &
" 240 (BC_2, *, CONTROL, 0 )," &
" 239 (BC_7, S0A( 6), BIDIR, X, 238, 0, Z)," &
" 238 (BC_2, *, CONTROL, 0 )," &
" 237 (BC_7, S0A( 7), BIDIR, X, 236, 0, Z)," &
" 236 (BC_2, *, CONTROL, 0 )," &
" 235 (BC_7, S0A( 8), BIDIR, X, 234, 0, Z)," &
" 234 (BC_2, *, CONTROL, 0 )," &
" 233 (BC_2, *, INTERNAL, 0 )," &
" 232 (BC_2, *, INTERNAL, 0 )," &
" 231 (BC_2, *, INTERNAL, 0 )," &
" 230 (BC_2, *, INTERNAL, 0 )," &
" 229 (BC_2, *, INTERNAL, 0 )," &
" 228 (BC_2, *, INTERNAL, 0 )," &
" 227 (BC_7, S0B( 0), BIDIR, X, 226, 0, Z)," &
" 226 (BC_2, *, CONTROL, 0 )," &
" 225 (BC_7, S0B( 1), BIDIR, X, 224, 0, Z)," &
" 224 (BC_2, *, CONTROL, 0 )," &
" 223 (BC_7, S0B( 2), BIDIR, X, 222, 0, Z)," &
" 222 (BC_2, *, CONTROL, 0 )," &
" 221 (BC_2, *, INTERNAL, 0 )," &
" 220 (BC_2, *, INTERNAL, 0 )," &
" 219 (BC_2, *, INTERNAL, 0 )," &
" 218 (BC_2, *, INTERNAL, 0 )," &
" 217 (BC_7, S0B( 3), BIDIR, X, 216, 0, Z)," &
" 216 (BC_2, *, CONTROL, 0 )," &
" 215 (BC_7, S0B( 4), BIDIR, X, 214, 0, Z)," &
" 214 (BC_2, *, CONTROL, 0 )," &
" 213 (BC_2, *, INTERNAL, 0 )," &
" 212 (BC_2, *, INTERNAL, 0 )," &
" 211 (BC_2, *, INTERNAL, 0 )," &
" 210 (BC_2, *, INTERNAL, 0 )," &
" 209 (BC_7, S0B( 5), BIDIR, X, 208, 0, Z)," &
" 208 (BC_2, *, CONTROL, 0 )," &
" 207 (BC_7, S0B( 6), BIDIR, X, 206, 0, Z)," &
" 206 (BC_2, *, CONTROL, 0 )," &
" 205 (BC_7, S0B( 7), BIDIR, X, 204, 0, Z)," &
" 204 (BC_2, *, CONTROL, 0 )," &
" 203 (BC_2, *, INTERNAL, 0 )," &
" 202 (BC_2, *, INTERNAL, 0 )," &
" 201 (BC_2, *, INTERNAL, 0 )," &
" 200 (BC_2, *, INTERNAL, 0 )," &
" 199 (BC_2, *, INTERNAL, 0 )," &
" 198 (BC_2, *, INTERNAL, 0 )," &
" 197 (BC_2, *, INTERNAL, 0 )," &
" 196 (BC_2, *, INTERNAL, 0 )," &
" 195 (BC_7, S0C( 0), BIDIR, X, 194, 0, Z)," &
" 194 (BC_2, *, CONTROL, 0 )," &
" 193 (BC_7, S0C( 1), BIDIR, X, 192, 0, Z)," &
" 192 (BC_2, *, CONTROL, 0 )," &
" 191 (BC_7, S0C( 2), BIDIR, X, 190, 0, Z)," &
" 190 (BC_2, *, CONTROL, 0 )," &
" 189 (BC_2, *, INTERNAL, 0 )," &
" 188 (BC_2, *, INTERNAL, 0 )," &
" 187 (BC_2, *, INTERNAL, 0 )," &
" 186 (BC_2, *, INTERNAL, 0 )," &
" 185 (BC_7, S0C( 3), BIDIR, X, 184, 0, Z)," &
" 184 (BC_2, *, CONTROL, 0 )," &
" 183 (BC_7, S0C( 4), BIDIR, X, 182, 0, Z)," &
" 182 (BC_2, *, CONTROL, 0 )," &
" 181 (BC_2, *, INTERNAL, 0 )," &
" 180 (BC_2, *, INTERNAL, 0 )," &
" 179 (BC_2, *, INTERNAL, 0 )," &
" 178 (BC_2, *, INTERNAL, 0 )," &
" 177 (BC_7, S0C( 5), BIDIR, X, 176, 0, Z)," &
" 176 (BC_2, *, CONTROL, 0 )," &
" 175 (BC_7, S0C( 6), BIDIR, X, 174, 0, Z)," &
" 174 (BC_2, *, CONTROL, 0 )," &
" 173 (BC_7, S0C( 7), BIDIR, X, 172, 0, Z)," &
" 172 (BC_2, *, CONTROL, 0 )," &
" 171 (BC_2, *, INTERNAL, 0 )," &
" 170 (BC_2, *, INTERNAL, 0 )," &
" 169 (BC_2, *, INTERNAL, 0 )," &
" 168 (BC_2, *, INTERNAL, 0 )," &
" 167 (BC_2, *, INTERNAL, 0 )," &
" 166 (BC_2, *, INTERNAL, 0 )," &
" 165 (BC_2, *, INTERNAL, 0 )," &
" 164 (BC_2, *, INTERNAL, 0 )," &
" 163 (BC_7, S0D( 0), BIDIR, X, 162, 0, Z)," &
" 162 (BC_2, *, CONTROL, 0 )," &
" 161 (BC_7, S0D( 1), BIDIR, X, 160, 0, Z)," &
" 160 (BC_2, *, CONTROL, 0 )," &
" 159 (BC_7, S0D( 2), BIDIR, X, 158, 0, Z)," &
" 158 (BC_2, *, CONTROL, 0 )," &
" 157 (BC_2, *, INTERNAL, 0 )," &
" 156 (BC_2, *, INTERNAL, 0 )," &
" 155 (BC_2, *, INTERNAL, 0 )," &
" 154 (BC_2, *, INTERNAL, 0 )," &
" 153 (BC_7, S0D( 3), BIDIR, X, 152, 0, Z)," &
" 152 (BC_2, *, CONTROL, 0 )," &
" 151 (BC_7, S0D( 4), BIDIR, X, 150, 0, Z)," &
" 150 (BC_2, *, CONTROL, 0 )," &
" 149 (BC_2, *, INTERNAL, 0 )," &
" 148 (BC_2, *, INTERNAL, 0 )," &
" 147 (BC_2, *, INTERNAL, 0 )," &
" 146 (BC_2, *, INTERNAL, 0 )," &
" 145 (BC_7, S0D( 5), BIDIR, X, 144, 0, Z)," &
" 144 (BC_2, *, CONTROL, 0 )," &
" 143 (BC_7, S0D( 6), BIDIR, X, 142, 0, Z)," &
" 142 (BC_2, *, CONTROL, 0 )," &
" 141 (BC_7, S0D( 7), BIDIR, X, 140, 0, Z)," &
" 140 (BC_2, *, CONTROL, 0 )," &
" 139 (BC_7, S0D( 8), BIDIR, X, 138, 0, Z)," &
" 138 (BC_2, *, CONTROL, 0 )," &
" 137 (BC_2, *, INTERNAL, 0 )," &
" 136 (BC_2, *, INTERNAL, 0 )," &
" 135 (BC_4, CLK( 0), INPUT , X )," &
" 134 (BC_2, *, INTERNAL, 0 )," &
" 133 (BC_4, CLK( 1), INPUT , X )," &
" 132 (BC_2, *, INTERNAL, 0 )," &
" 131 (BC_2, *, INTERNAL, 0 )," &
" 130 (BC_2, *, INTERNAL, 0 )," &
" 129 (BC_2, *, INTERNAL, 0 )," &
" 128 (BC_2, *, INTERNAL, 0 )," &
" 127 (BC_7, S1A( 0), BIDIR, X, 126, 0, Z)," &
" 126 (BC_2, *, CONTROL, 0 )," &
" 125 (BC_7, S1A( 1), BIDIR, X, 124, 0, Z)," &
" 124 (BC_2, *, CONTROL, 0 )," &
" 123 (BC_7, S1A( 2), BIDIR, X, 122, 0, Z)," &
" 122 (BC_2, *, CONTROL, 0 )," &
" 121 (BC_2, *, INTERNAL, 0 )," &
" 120 (BC_2, *, INTERNAL, 0 )," &
" 119 (BC_2, *, INTERNAL, 0 )," &
" 118 (BC_2, *, INTERNAL, 0 )," &
" 117 (BC_7, S1A( 3), BIDIR, X, 116, 0, Z)," &
" 116 (BC_2, *, CONTROL, 0 )," &
" 115 (BC_7, S1A( 4), BIDIR, X, 114, 0, Z)," &
" 114 (BC_2, *, CONTROL, 0 )," &
" 113 (BC_2, *, INTERNAL, 0 )," &
" 112 (BC_2, *, INTERNAL, 0 )," &
" 111 (BC_2, *, INTERNAL, 0 )," &
" 110 (BC_2, *, INTERNAL, 0 )," &
" 109 (BC_7, S1A( 5), BIDIR, X, 108, 0, Z)," &
" 108 (BC_2, *, CONTROL, 0 )," &
" 107 (BC_7, S1A( 6), BIDIR, X, 106, 0, Z)," &
" 106 (BC_2, *, CONTROL, 0 )," &
" 105 (BC_7, S1A( 7), BIDIR, X, 104, 0, Z)," &
" 104 (BC_2, *, CONTROL, 0 )," &
" 103 (BC_7, S1A( 8), BIDIR, X, 102, 0, Z)," &
" 102 (BC_2, *, CONTROL, 0 )," &
" 101 (BC_2, *, INTERNAL, 0 )," &
" 100 (BC_2, *, INTERNAL, 0 )," &
" 99 (BC_2, *, INTERNAL, 0 )," &
" 98 (BC_2, *, INTERNAL, 0 )," &
" 97 (BC_2, *, INTERNAL, 0 )," &
" 96 (BC_2, *, INTERNAL, 0 )," &
" 95 (BC_7, S1B( 0), BIDIR, X, 94, 0, Z)," &
" 94 (BC_2, *, CONTROL, 0 )," &
" 93 (BC_7, S1B( 1), BIDIR, X, 92, 0, Z)," &
" 92 (BC_2, *, CONTROL, 0 )," &
" 91 (BC_7, S1B( 2), BIDIR, X, 90, 0, Z)," &
" 90 (BC_2, *, CONTROL, 0 )," &
" 89 (BC_2, *, INTERNAL, 0 )," &
" 88 (BC_2, *, INTERNAL, 0 )," &
" 87 (BC_2, *, INTERNAL, 0 )," &
" 86 (BC_2, *, INTERNAL, 0 )," &
" 85 (BC_7, S1B( 3), BIDIR, X, 84, 0, Z)," &
" 84 (BC_2, *, CONTROL, 0 )," &
" 83 (BC_7, S1B( 4), BIDIR, X, 82, 0, Z)," &
" 82 (BC_2, *, CONTROL, 0 )," &
" 81 (BC_2, *, INTERNAL, 0 )," &
" 80 (BC_2, *, INTERNAL, 0 )," &
" 79 (BC_2, *, INTERNAL, 0 )," &
" 78 (BC_2, *, INTERNAL, 0 )," &
" 77 (BC_7, S1B( 5), BIDIR, X, 76, 0, Z)," &
" 76 (BC_2, *, CONTROL, 0 )," &
" 75 (BC_7, S1B( 6), BIDIR, X, 74, 0, Z)," &
" 74 (BC_2, *, CONTROL, 0 )," &
" 73 (BC_7, S1B( 7), BIDIR, X, 72, 0, Z)," &
" 72 (BC_2, *, CONTROL, 0 )," &
" 71 (BC_2, *, INTERNAL, 0 )," &
" 70 (BC_2, *, INTERNAL, 0 )," &
" 69 (BC_2, *, INTERNAL, 0 )," &
" 68 (BC_2, *, INTERNAL, 0 )," &
" 67 (BC_2, *, INTERNAL, 0 )," &
" 66 (BC_2, *, INTERNAL, 0 )," &
" 65 (BC_2, *, INTERNAL, 0 )," &
" 64 (BC_2, *, INTERNAL, 0 )," &
" 63 (BC_7, S1C( 0), BIDIR, X, 62, 0, Z)," &
" 62 (BC_2, *, CONTROL, 0 )," &
" 61 (BC_7, S1C( 1), BIDIR, X, 60, 0, Z)," &
" 60 (BC_2, *, CONTROL, 0 )," &
" 59 (BC_7, S1C( 2), BIDIR, X, 58, 0, Z)," &
" 58 (BC_2, *, CONTROL, 0 )," &
" 57 (BC_2, *, INTERNAL, 0 )," &
" 56 (BC_2, *, INTERNAL, 0 )," &
" 55 (BC_2, *, INTERNAL, 0 )," &
" 54 (BC_2, *, INTERNAL, 0 )," &
" 53 (BC_7, S1C( 3), BIDIR, X, 52, 0, Z)," &
" 52 (BC_2, *, CONTROL, 0 )," &
" 51 (BC_7, S1C( 4), BIDIR, X, 50, 0, Z)," &
" 50 (BC_2, *, CONTROL, 0 )," &
" 49 (BC_2, *, INTERNAL, 0 )," &
" 48 (BC_2, *, INTERNAL, 0 )," &
" 47 (BC_2, *, INTERNAL, 0 )," &
" 46 (BC_2, *, INTERNAL, 0 )," &
" 45 (BC_7, S1C( 5), BIDIR, X, 44, 0, Z)," &
" 44 (BC_2, *, CONTROL, 0 )," &
" 43 (BC_7, S1C( 6), BIDIR, X, 42, 0, Z)," &
" 42 (BC_2, *, CONTROL, 0 )," &
" 41 (BC_7, S1C( 7), BIDIR, X, 40, 0, Z)," &
" 40 (BC_2, *, CONTROL, 0 )," &
" 39 (BC_2, *, INTERNAL, 0 )," &
" 38 (BC_2, *, INTERNAL, 0 )," &
" 37 (BC_2, *, INTERNAL, 0 )," &
" 36 (BC_2, *, INTERNAL, 0 )," &
" 35 (BC_2, *, INTERNAL, 0 )," &
" 34 (BC_2, *, INTERNAL, 0 )," &
" 33 (BC_2, *, INTERNAL, 0 )," &
" 32 (BC_2, *, INTERNAL, 0 )," &
" 31 (BC_7, S1D( 0), BIDIR, X, 30, 0, Z)," &
" 30 (BC_2, *, CONTROL, 0 )," &
" 29 (BC_7, S1D( 1), BIDIR, X, 28, 0, Z)," &
" 28 (BC_2, *, CONTROL, 0 )," &
" 27 (BC_7, S1D( 2), BIDIR, X, 26, 0, Z)," &
" 26 (BC_2, *, CONTROL, 0 )," &
" 25 (BC_2, *, INTERNAL, 0 )," &
" 24 (BC_2, *, INTERNAL, 0 )," &
" 23 (BC_2, *, INTERNAL, 0 )," &
" 22 (BC_2, *, INTERNAL, 0 )," &
" 21 (BC_7, S1D( 3), BIDIR, X, 20, 0, Z)," &
" 20 (BC_2, *, CONTROL, 0 )," &
" 19 (BC_7, S1D( 4), BIDIR, X, 18, 0, Z)," &
" 18 (BC_2, *, CONTROL, 0 )," &
" 17 (BC_2, *, INTERNAL, 0 )," &
" 16 (BC_2, *, INTERNAL, 0 )," &
" 15 (BC_2, *, INTERNAL, 0 )," &
" 14 (BC_2, *, INTERNAL, 0 )," &
" 13 (BC_7, S1D( 5), BIDIR, X, 12, 0, Z)," &
" 12 (BC_2, *, CONTROL, 0 )," &
" 11 (BC_7, S1D( 6), BIDIR, X, 10, 0, Z)," &
" 10 (BC_2, *, CONTROL, 0 )," &
" 9 (BC_7, S1D( 7), BIDIR, X, 8, 0, Z)," &
" 8 (BC_2, *, CONTROL, 0 )," &
" 7 (BC_7, S1D( 8), BIDIR, X, 6, 0, Z)," &
" 6 (BC_2, *, CONTROL, 0 )," &
" 5 (BC_2, *, INTERNAL, 0 )," &
" 4 (BC_2, *, INTERNAL, 0 )," &
" 3 (BC_4, CLK( 2), INPUT , X )," &
" 2 (BC_2, *, INTERNAL, 0 )," &
" 1 (BC_4, CLK( 3), INPUT , X )," &
" 0 (BC_2, *, INTERNAL, 0 ) ";
end M5_1_128_XXP100;