BSDL Files Library for JTAG

The only free public library that contains thousands of BSDL (Boundary Scan Description Language) models to use with BScan/JTAG tools

BSDL model: IDT72V223

-- Boundary Scan Description Language (BSDL) for IDT72V223
-- BSDL revision : 1.0
-- Date created  : 07/10/01
-- Last updated  : 05/30/02
-- Packages      : 100-Pin PBGA

entity idt72v223 is
    generic (PHYSICAL_PIN_MAP : string :=  "UNDEFINED");
    port (
        d                       :in             bit_vector(0 to 17);
        iw                      :in             bit;
        senb                    :in             bit;
        wenb                    :in             bit;
        wclk                    :in             bit;
        prsb                    :in             bit;
        mrsb                    :in             bit;
        rm                      :in             bit;
        asyrb                   :in             bit;
        asywb                   :in             bit;
        ldb                     :in             bit;
        fwftsi                  :in             bit;
        ff                      :out            bit;
        paf                     :out            bit;
        ow                      :in             bit;
        fsel                    :in             bit_vector(0 to 1);
        hf                      :out            bit;
        beb                     :in             bit;
        ip                      :in             bit;
        pae                     :out            bit;
        pfm                     :in             bit;
        ef                      :out            bit;
        rclk                    :in             bit;
        renb                    :in             bit;
        rtb                     :in             bit;
        oeb                     :in             bit;
        q                       :out            bit_vector(0 to 17);
        tck                     :in             bit;
        tms                     :in             bit;
        tdi                     :in             bit;
        trstb                   :in             bit;
        tdo                     :out            bit;
        gnd                     :linkage        bit_vector(0 to 15);
        vcc                     :linkage        bit_vector(0 to 16)
    );

    use STD_1149_1_1994.all;

    attribute COMPONENT_CONFORMANCE of idt72v223 : entity is
    "STD_1149_1_1993";

    attribute PIN_MAP of idt72v223 : entity is PHYSICAL_PIN_MAP;

    constant PBGA : PIN_MAP_STRING := 
        "d:(j4, k4, j3, k3, k2, k1, j1, j2, h1, h2, h3, g1, "&
           "g2, f1, f2, e2, e1, d1),"&
        "iw:d2,"&
        "senb:c2,"&
        "asywb:c1,"&
        "wenb:b1,"&
        "wclk:a1,"&
        "prsb:a2,"&
        "mrsb:b2,"&
        "ldb:a3,"&
        "fwftsi:b3,"&
        "ff:c3,"&
        "paf:a4,"&
        "ow:b4,"&
        "fsel:(a5, b6),"&
        "hf:b5,"&
        "beb:a6,"&
        "ip:b7,"&
        "asyrb:a7,"&
        "pae:b8,"&
        "pfm:a8,"&
        "ef:b9,"&
        "rm:a9,"&
        "rclk:b10,"&
        "renb:a10,"&
        "rtb:c9,"&
        "oeb:c10,"&
        "q:(k7, h8, j8, k8, j9, k9, k10, j10, h10, h9, g10, g9, "&
        "f10, f9, e9, e10, d9, d10),"&
        "tck:j6,"&
        "tms:j5,"&
        "tdi:k6,"&
        "trstb:k5,"&
        "tdo:j7,"&
        "gnd:(d4,d5,d6,d7, e4,e5,e6,e7, f4,f5,f6,f7, g4,g5,g6,g7),"&
        "vcc:(c4,c5,c6,c7,c8, d3,d8, e3,e8, f3,f8, g3,g8, h4,h5,h6,h7)";

    --Scan port identification
    attribute TAP_SCAN_IN of tdi :   signal is true;
    attribute TAP_SCAN_MODE of tms : signal is true;
    attribute TAP_SCAN_OUT of tdo :  signal is true;
    attribute TAP_SCAN_RESET of trstb : signal is true;
    attribute TAP_SCAN_CLOCK of tck : signal is (1.0e7, LOW);

    --TAP Description
    attribute INSTRUCTION_LENGTH of idt72v223 : entity is 4;
    attribute INSTRUCTION_OPCODE of idt72v223 : entity is
        "EXTEST          (0000),"&
        "SAMPLE          (0001),"&
        "IDCODE          (0010),"&
        "HIGHZ           (0011),"&
        "BYPASS          (1111)";
    attribute INSTRUCTION_CAPTURE of idt72v223 : entity is "1101";

    attribute IDCODE_REGISTER of idt72v223 : entity is
        "0000" &                -- version
        "0000010011101111" &    -- part number
        "00000110011" &         -- manufacturer's identity
        "1";                    -- required by 1149.1

    attribute REGISTER_ACCESS of idt72v223 : entity is
        "Bypass          (BYPASS, HIGHZ)," &
        "Boundary        (SAMPLE, EXTEST)," &
        "Device_ID       (IDCODE)";

    attribute BOUNDARY_LENGTH of idt72v223 : entity is 62;

    attribute BOUNDARY_REGISTER  of idt72v223 : entity is
     --
     -- num   cell   port     function safe[ccell disval rslt]
     --
        "61  (BC_0,  d(0),       input,      X)," &
        "60  (BC_0,  d(1),       input,      X)," &
        "59  (BC_0,  d(2),       input,      X)," &
        "58  (BC_0,  d(3),       input,      X)," &
        "57  (BC_0,  d(4),       input,      X)," &
        "56  (BC_0,  d(5),       input,      X)," &
        "55  (BC_0,  d(6),       input,      X)," &
        "54  (BC_0,  d(7),       input,      X)," &
        "53  (BC_0,  d(8),       input,      X)," &
        "52  (BC_0,  d(9),       input,      X)," &
        "51  (BC_0,  d(10),      input,      X)," &
        "50  (BC_0,  d(11),      input,      X)," &
        "49  (BC_0,  d(12),      input,      X)," &
        "48  (BC_0,  d(13),      input,      X)," &
        "47  (BC_0,  d(14),      input,      X)," &
        "46  (BC_0,  d(15),      input,      X)," &
        "45  (BC_0,  d(16),      input,      X)," &
        "44  (BC_0,  d(17),      input,      X)," &
        "43  (BC_0,  iw,         input,      X)," &
        "42  (BC_0,  senb,       input,      X)," &
        "41  (BC_0,  asywb,      input,      X)," &
        "40  (BC_0,  wenb,       input,      X)," &
        "39  (BC_0,  wclk,       input,      X)," &
        "38  (BC_0,  prsb,       input,      X)," &
        "37  (BC_0,  mrsb,       input,      X)," &
        "36  (BC_0,  ldb,        input,      X)," &
        "35  (BC_0,  fwftsi,     input,      X)," &
        "34  (BC_0,  ff,         output2,    X)," &
        "33  (BC_0,  paf,        output2,    X)," &
        "32  (BC_0,  ow,         input,      X)," &
        "31  (BC_0,  fsel(0),    input,      X)," &
        "30  (BC_0,  hf,         output2,    X)," &
        "29  (BC_0,  fsel(1),    input,      X)," &
        "28  (BC_0,  beb,        input,      X)," &
        "27  (BC_0,  ip,         input,      X)," &
        "26  (BC_0,  asyrb,      input,      X)," &
        "25  (BC_0,  pae,        output2,    X)," &
        "24  (BC_0,  pfm,        input,      X)," &
        "23  (BC_0,  ef,         output2,    X)," &
        "22  (BC_0,  rm,         input,      X)," &
        "21  (BC_0,  rclk,       input,      X)," &
        "20  (BC_0,  renb,       input,      X)," &
        "19  (BC_0,  rtb,        input,      X)," &
        "18  (BC_0,  oeb,        input,      X)," &
        "17  (BC_0,  q(17),      output2,    X)," &
        "16  (BC_0,  q(16),      output2,    X)," &
        "15  (BC_0,  q(15),      output2,    X)," &
        "14  (BC_0,  q(14),      output2,    X)," &
        "13  (BC_0,  q(13),      output2,    X)," &
        "12  (BC_0,  q(12),      output2,    X)," &
        "11  (BC_0,  q(11),      output2,    X)," &
        "10  (BC_0,  q(10),      output2,    X)," &
        "9   (BC_0,  q(9),       output2,    X)," &
        "8   (BC_0,  q(8),       output2,    X)," &
        "7   (BC_0,  q(7),       output2,    X)," &
        "6   (BC_0,  q(6),       output2,    X)," &
        "5   (BC_0,  q(5),       output2,    X)," &
        "4   (BC_0,  q(4),       output2,    X)," &
        "3   (BC_0,  q(3),       output2,    X)," &
        "2   (BC_0,  q(2),       output2,    X)," &
        "1   (BC_0,  q(1),       output2,    X)," &
        "0   (BC_0,  q(0),       output2,    X)";

end idt72v223;