--//*****************************************************************************
--//
--// lm3s2110_ra2_bga_v1p0.bsdl - Boundary Scan Description Language (BSDL) file
--// for the Texas Instruments LM3S2110 Stellaris microcontroller.
--//
--// Version 1.0 - 02/19/2010 - Initial Release of BSDL entity
--// - LM3S2110, Revision A2, 108-ball BGA
--//
--//
--// Copyright (c) 2010 Texas Instruments, Inc. All rights reserved.
--//
--// Software License Agreement
--//
--// Texas Instruments, Inc. (TI) is supplying this software for use solely and
--// exclusively on TI's Stellaris Family of microcontroller products.
--//
--// The software is owned by TI and/or its suppliers, and is protected under
--// applicable copyright laws. All rights are reserved. Any use in violation
--// of the foregoing restrictions may subject the user to criminal sanctions
--// under applicable laws, as well as to civil liability for the breach of the
--// terms and conditions of this license.
--//
--// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
--// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
--// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
--// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
--// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
--//
--//*****************************************************************************
entity LM3S2110 is generic (PHYSICAL_PIN_MAP : string := "BGA_108");
port ( CMOD0: in bit;
CMOD1: in bit;
GND: linkage bit_vector(0 to 12);
GNDA: linkage bit_vector(0 to 1);
LDO: linkage bit;
NC: linkage bit_vector(0 to 31);
OSC0: linkage bit;
OSC1: linkage bit;
PA0_U0Rx: inout bit;
PA1_U0Tx: inout bit;
PA2_SSI0Clk: inout bit;
PA3_SSI0Fss: inout bit;
PA4_SSI0Rx: inout bit;
PA5_SSI0Tx: inout bit;
PA6_CCP1: inout bit;
PB0_CCP0: inout bit;
PB1_CCP2: inout bit;
PB2_I2C0SCL: inout bit;
PB3_I2C0SDA: inout bit;
PB4: inout bit;
PB5: inout bit;
PB6: inout bit;
PC4: inout bit;
PC5: inout bit;
PC6: inout bit;
PC7: inout bit;
PD0_CAN0Rx: inout bit;
PD1_CAN0Tx: inout bit;
PD2: inout bit;
PD3: inout bit;
PD4_CCP3: inout bit;
PD5: inout bit;
PD6_Fault: inout bit;
PD7_C0o: inout bit;
PE0: inout bit;
PE1: inout bit;
PF0_PWM0: inout bit;
PF1_PWM1: inout bit;
PF2: inout bit;
PG0: inout bit;
PG1: inout bit;
PH0: inout bit;
PH1: inout bit;
RST: in bit;
TCK: in bit;
TDI: in bit;
TDO: out bit;
TMS: in bit;
TRST: in bit;
VDD: linkage bit;
VDD25: linkage bit_vector(0 to 3);
VDD33: linkage bit_vector(0 to 7);
VDDA: linkage bit_vector(0 to 1)
);
use STD_1149_1_1994.all; -- Get Std 1149.1-1994 attributes and definitions
attribute COMPONENT_CONFORMANCE of LM3S2110 : entity is "STD_1149_1_1993";
attribute PIN_MAP of LM3S2110 : entity is PHYSICAL_PIN_MAP;
constant BGA_108: PIN_MAP_STRING :=
"PB4: A6, " &
"PB6: A7, " &
"TRST: A8, " &
"TCK: A9, " &
"TDO: A10, " &
"PE0: A11, " &
"PB5: B7, " &
"TDI: B8, " &
"TMS: B9, " &
"CMOD1: B10, " &
"PE1: B12, " &
"PH1: C8, " &
"PH0: C9, " &
"PB2_I2C0SCL: C11, " &
"PB3_I2C0SDA: C12, " &
"PB1_CCP2: D12, " &
"PD4_CCP3: E1, " &
"PD5: E2, " &
"LDO: E3, " &
"CMOD0: E11, " &
"PB0_CCP0: E12, " &
"PD7_C0o: F1, " &
"PD6_Fault: F2, " &
"PD0_CAN0Rx: G1, " &
"PD1_CAN0Tx: G2, " &
"PD3: H1, " &
"PD2: H2, " &
"RST: H11, " &
"PF1_PWM1: H12, " &
"PF2: J11, " &
"PG0: K1, " &
"PG1: K2, " &
"PC4: L1, " &
"PC7: L2, " &
"PA0_U0Rx: L3, " &
"PA3_SSI0Fss: L4, " &
"PA4_SSI0Rx: L5, " &
"PA6_CCP1: L6, " &
"OSC0: L11, " &
"VDD: L12, " &
"PC5: M1, " &
"PC6: M2, " &
"PA1_U0Tx: M3, " &
"PA2_SSI0Clk: M4, " &
"PA5_SSI0Tx: M5, " &
"PF0_PWM0: M9, " &
"OSC1: M11, " &
"GND: ( B6, C4, C5, F10, F11, F12, H3, J3, J10, K5, K6, K10, L10 ), " &
"GNDA: ( A5, B5 ), " &
"NC: ( A1, A2, A3, A4, A12, B1, B2, B3, B4, B11, C1, C2, C10, D1, D2, D10, D11, J1, J2, J12, K3, K4, K11, K12, L7, L8, L9, M6, M7, M8, M10, M12 ), " &
"VDD25: ( C3, D3, F3, G3 ), " &
"VDD33: (E10, G10, G11, G12, H10, K7, K8, K9 ), " &
"VDDA: ( C6, C7 ) " ;
attribute TAP_SCAN_RESET of TRST : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (10.0e6, BOTH);
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute INSTRUCTION_LENGTH of LM3S2110 : entity is 4;
attribute INSTRUCTION_OPCODE of LM3S2110 : entity is
"EXTEST (0000)," &
"INTEST (0001)," &
"SAMPLE (0010)," &
"BYPASS (0011)," &
"BYPASS (0100)," &
"BYPASS (0101)," &
"BYPASS (0110)," &
"BYPASS (0111)," &
"ABORT (1000)," &
"BYPASS (1001)," &
"DPACC (1010)," &
"APACC (1011)," &
"BYPASS (1100)," &
"BYPASS (1101)," &
"IDCODE (1110)," &
"BYPASS (1111)";
attribute INSTRUCTION_CAPTURE of LM3S2110 : entity is "0001";
attribute IDCODE_REGISTER of LM3S2110 : entity is
"0011" & -- Version (Fourth Revision)
"1011101000000000" & -- Part number (ARM Cortex M3)
"01000111011" & -- Manufacturer Identity (ARM)
"1"; -- Mandatory LSB
-- IDCODE = 3BA00477
attribute INSTRUCTION_PRIVATE of LM3S2110 : entity is
"ABORT, DPACC, APACC"; -- ARM Debug Access Port Instructions
attribute BOUNDARY_LENGTH of LM3S2110 : entity is 108;
attribute BOUNDARY_REGISTER of LM3S2110 : entity is
-- num cell port function safe [ ccell disval rslt ]
-- --- ---- -------------- -------- ---- ------ ------ ------
" 0 (BC_4, CMOD1, CLOCK, X ), " &
" 1 (BC_1, *, CONTROL, 1 ), " &
" 2 (BC_1, PE1, OUTPUT3, X , 1, 1, Z ), " &
" 3 (BC_1, PE1, INPUT, X ), " &
" 4 (BC_1, *, CONTROL, 1 ), " &
" 5 (BC_1, PE0, OUTPUT3, X , 4, 1, Z ), " &
" 6 (BC_1, PE0, INPUT, X ), " &
" 7 (BC_1, *, CONTROL, 1 ), " &
" 8 (BC_1, PB3_I2C0SDA, OUTPUT3, X , 7, 1, Z ), " &
" 9 (BC_1, PB3_I2C0SDA, INPUT, X ), " &
" 10 (BC_1, *, CONTROL, 1 ), " &
" 11 (BC_1, PB2_I2C0SCL, OUTPUT3, X , 10, 1, Z ), " &
" 12 (BC_1, PB2_I2C0SCL, INPUT, X ), " &
" 13 (BC_1, *, CONTROL, 1 ), " &
" 14 (BC_1, PB1_CCP2, OUTPUT3, X , 13, 1, Z ), " &
" 15 (BC_1, PB1_CCP2, INPUT, X ), " &
" 16 (BC_1, *, CONTROL, 1 ), " &
" 17 (BC_1, PB0_CCP0, OUTPUT3, X , 16, 1, Z ), " &
" 18 (BC_1, PB0_CCP0, INPUT, X ), " &
" 19 (BC_4, CMOD0, CLOCK, X ), " &
" 20 (BC_4, RST, CLOCK, X ), " &
" 21 (BC_1, *, CONTROL, 1 ), " &
" 22 (BC_1, PF1_PWM1, OUTPUT3, X , 21, 1, Z ), " &
" 23 (BC_1, PF1_PWM1, INPUT, X ), " &
" 24 (BC_1, *, CONTROL, 1 ), " &
" 25 (BC_1, PF2, OUTPUT3, X , 24, 1, Z ), " &
" 26 (BC_1, PF2, INPUT, X ), " &
" 27 (BC_1, *, CONTROL, 1 ), " &
" 28 (BC_1, PF0_PWM0, OUTPUT3, X , 27, 1, Z ), " &
" 29 (BC_1, PF0_PWM0, INPUT, X ), " &
" 30 (BC_1, *, CONTROL, 1 ), " &
" 31 (BC_1, PA6_CCP1, OUTPUT3, X , 30, 1, Z ), " &
" 32 (BC_1, PA6_CCP1, INPUT, X ), " &
" 33 (BC_1, *, CONTROL, 1 ), " &
" 34 (BC_1, PA5_SSI0Tx, OUTPUT3, X , 33, 1, Z ), " &
" 35 (BC_1, PA5_SSI0Tx, INPUT, X ), " &
" 36 (BC_1, *, CONTROL, 1 ), " &
" 37 (BC_1, PA4_SSI0Rx, OUTPUT3, X , 36, 1, Z ), " &
" 38 (BC_1, PA4_SSI0Rx, INPUT, X ), " &
" 39 (BC_1, *, CONTROL, 1 ), " &
" 40 (BC_1, PA3_SSI0Fss, OUTPUT3, X , 39, 1, Z ), " &
" 41 (BC_1, PA3_SSI0Fss, INPUT, X ), " &
" 42 (BC_1, *, CONTROL, 1 ), " &
" 43 (BC_1, PA2_SSI0Clk, OUTPUT3, X , 42, 1, Z ), " &
" 44 (BC_1, PA2_SSI0Clk, INPUT, X ), " &
" 45 (BC_1, *, CONTROL, 1 ), " &
" 46 (BC_1, PA1_U0Tx, OUTPUT3, X , 45, 1, Z ), " &
" 47 (BC_1, PA1_U0Tx, INPUT, X ), " &
" 48 (BC_1, *, CONTROL, 1 ), " &
" 49 (BC_1, PA0_U0Rx, OUTPUT3, X , 48, 1, Z ), " &
" 50 (BC_1, PA0_U0Rx, INPUT, X ), " &
" 51 (BC_1, *, CONTROL, 1 ), " &
" 52 (BC_1, PC4, OUTPUT3, X , 51, 1, Z ), " &
" 53 (BC_1, PC4, INPUT, X ), " &
" 54 (BC_1, *, CONTROL, 1 ), " &
" 55 (BC_1, PC5, OUTPUT3, X , 54, 1, Z ), " &
" 56 (BC_1, PC5, INPUT, X ), " &
" 57 (BC_1, *, CONTROL, 1 ), " &
" 58 (BC_1, PC6, OUTPUT3, X , 57, 1, Z ), " &
" 59 (BC_1, PC6, INPUT, X ), " &
" 60 (BC_1, *, CONTROL, 1 ), " &
" 61 (BC_1, PC7, OUTPUT3, X , 60, 1, Z ), " &
" 62 (BC_1, PC7, INPUT, X ), " &
" 63 (BC_1, *, CONTROL, 1 ), " &
" 64 (BC_1, PG0, OUTPUT3, X , 63, 1, Z ), " &
" 65 (BC_1, PG0, INPUT, X ), " &
" 66 (BC_1, *, CONTROL, 1 ), " &
" 67 (BC_1, PG1, OUTPUT3, X , 66, 1, Z ), " &
" 68 (BC_1, PG1, INPUT, X ), " &
" 69 (BC_1, *, CONTROL, 1 ), " &
" 70 (BC_1, PD3, OUTPUT3, X , 69, 1, Z ), " &
" 71 (BC_1, PD3, INPUT, X ), " &
" 72 (BC_1, *, CONTROL, 1 ), " &
" 73 (BC_1, PD2, OUTPUT3, X , 72, 1, Z ), " &
" 74 (BC_1, PD2, INPUT, X ), " &
" 75 (BC_1, *, CONTROL, 1 ), " &
" 76 (BC_1, PD1_CAN0Tx, OUTPUT3, X , 75, 1, Z ), " &
" 77 (BC_1, PD1_CAN0Tx, INPUT, X ), " &
" 78 (BC_1, *, CONTROL, 1 ), " &
" 79 (BC_1, PD0_CAN0Rx, OUTPUT3, X , 78, 1, Z ), " &
" 80 (BC_1, PD0_CAN0Rx, INPUT, X ), " &
" 81 (BC_1, *, CONTROL, 1 ), " &
" 82 (BC_1, PD7_C0o, OUTPUT3, X , 81, 1, Z ), " &
" 83 (BC_1, PD7_C0o, INPUT, X ), " &
" 84 (BC_1, *, CONTROL, 1 ), " &
" 85 (BC_1, PD6_Fault, OUTPUT3, X , 84, 1, Z ), " &
" 86 (BC_1, PD6_Fault, INPUT, X ), " &
" 87 (BC_1, *, CONTROL, 1 ), " &
" 88 (BC_1, PD5, OUTPUT3, X , 87, 1, Z ), " &
" 89 (BC_1, PD5, INPUT, X ), " &
" 90 (BC_1, *, CONTROL, 1 ), " &
" 91 (BC_1, PD4_CCP3, OUTPUT3, X , 90, 1, Z ), " &
" 92 (BC_1, PD4_CCP3, INPUT, X ), " &
" 93 (BC_1, *, CONTROL, 1 ), " &
" 94 (BC_1, PB4, OUTPUT3, X , 93, 1, Z ), " &
" 95 (BC_1, PB4, INPUT, X ), " &
" 96 (BC_1, *, CONTROL, 1 ), " &
" 97 (BC_1, PB5, OUTPUT3, X , 96, 1, Z ), " &
" 98 (BC_1, PB5, INPUT, X ), " &
" 99 (BC_1, *, CONTROL, 1 ), " &
" 100 (BC_1, PB6, OUTPUT3, X , 99, 1, Z ), " &
" 101 (BC_1, PB6, INPUT, X ), " &
" 102 (BC_1, *, CONTROL, 1 ), " &
" 103 (BC_1, PH0, OUTPUT3, X , 102, 1, Z ), " &
" 104 (BC_1, PH0, INPUT, X ), " &
" 105 (BC_1, *, CONTROL, 1 ), " &
" 106 (BC_1, PH1, OUTPUT3, X , 105, 1, Z ), " &
" 107 (BC_1, PH1, INPUT, X ) " ;
end LM3S2110;