-- M O T O R O L A S S D T J T A G S O F T W A R E
-- BSDL File Generated: Fri Feb 13 19:01:10 1998
--
-- Revision History:
--
entity MPC2605 is
generic (PHYSICAL_PIN_MAP : string := "PBGA");
port ( TRST: in bit;
TCK: in bit;
TMS: in bit;
TDI: in bit;
TDO: out bit;
A: inout bit_vector(0 to 31);
AACK: inout bit;
ABB: inout bit;
AP: inout bit_vector(0 to 3);
APE: out bit;
APENNC: linkage bit;
ARTRY: inout bit;
CFG0: in bit;
CFG1: in bit;
CFG2: in bit;
CFG3: in bit;
CFG4NC: linkage bit;
CI: inout bit;
CLKNC: linkage bit;
CPUBG: in bit;
CPU2BG: in bit;
CPU3BG: in bit;
CPU4BG: in bit;
CPUBR: in bit;
CPU2BR: in bit;
CPU3BR: in bit;
CPU4BR: in bit;
CPUDBG: in bit;
CPU2DBG: in bit;
CPU3DBG: in bit;
CPU4DBG: in bit;
DH: inout bit_vector(0 to 31);
DL: inout bit_vector(0 to 31);
DBB: inout bit;
DP: inout bit_vector(0 to 7);
FDN: inout bit;
GBL: inout bit;
HRESET: in bit;
L2BG: in bit;
L2BR: inout bit;
L2CI: in bit;
L2CLAIM: out bit;
L2DBG: in bit;
L2FLUSH: in bit;
L2MISSINH: in bit;
L2TAGCLR: in bit;
L2UPDATEINH: in bit;
PWRDN: in bit;
SRESET: in bit;
TA: inout bit;
TBST: inout bit;
TEA: in bit;
TS: inout bit;
TSIZ: inout bit_vector(0 to 2);
TT: inout bit_vector(0 to 4);
WT: inout bit;
NC: linkage bit_vector(0 to 119);
VDD: linkage bit_vector(0 to 32);
VSS: linkage bit_vector(0 to 40);
NCF3: linkage bit;
NCR3: linkage bit);
use STD_1149_1_1994.all;
attribute COMPONENT_CONFORMANCE of MPC2605 : entity is
"STD_1149_1_1993"; -- complies with Std. 1149.1a-1993
attribute PIN_MAP of MPC2605 : entity is PHYSICAL_PIN_MAP;
constant PBGA : PIN_MAP_STRING :=
"NC: (T16, A1, A19, W1, W19, D4, D5, D6, D14, D15, D16, E4, "&
" E5, E6, E7, E8, E9, E10, E11, E12, E13, E14, E15, E16, "&
" F4, F5, F6, F7, F8, F9, F10, F11, F12, F13, F14, F15, "&
" F16, G5, G6, G7, G8, G9, G10, G11, G12, G13, G14, G15, "&
" H5, H6, H7, H13, H14, H15, J5, J6, J7, J13, J14, J15, "&
" K5, K6, K7, K13, K14, K15, L5, L6, L7, L13, L14, L15, "&
" M5, M6, M7, M13, M14, M15, N5, N6, N7, N8, N9, N10, "&
" N11, N12, N13, N14, N15, P4, P5, P6, P7, P8, P9, P10, "&
" P11, P12, P13, P14, P15, P16, R4, R5, R6, R7, R8, R9, "&
" R10, R11, R12, R13, R14, R15, R16, T4, T5, T6, T14, T15),"&
"ABB: A2, " &
"L2BG: A3, " &
"DH: (W6, V6, W5, V5, W4, V4, W3, V3, W10, W9, U9, V9, W8, V8, U8,"&
" W7, B7, A6, B6, A5, A4, B5, C6, B4, C10, B10, A10, A9, B9, "&
" A8, B8, A7), " &
"DL: (V10, U10, W11, V11, U11, W12, V12, W13, W14, W15, V14, W16, "&
" V15, W17, V16, V17, A11, B11, C11, A12, B12, C12, A13, B13, "&
" B14, A15, B15, A16, B16, A17, A18, B17), " &
"DP: (W2, V7, C5, C8, V13, U16, A14, B18), " &
"CPU3BG: B1, " &
"CFG4NC: B2, " &
"L2MISSINH: B3, " &
"APE: B19, " &
"FDN: C1, " &
"CPU3BR: C2, " &
"CPU3DBG: C3, " &
"VDD: (C4, C15, C16, D9, D10, D11, H8, H9, H10, J4, J8, J9, J16,"&
" K4, K8, K12, K16, L4, L11, L12, L16, M10, M11, M12, T3, T9,"&
" T10, T11, T17, U3, U4, U15, U17), " &
"VSS: (C7, C9, C13, C14, D7, D8, D12, D13, G4, G16, G17, G18, H4, H11, "&
" H12, H16, J10, J11, J12, K9, K10, K11, L8, L9, L10, M4, M8, M9, "&
" M16, N4, N16, T7, T8, T12, T13, U5, U6, U7, U12, U13, U14), " &
"AP: (D17, C19, C18, C17), " &
"L2BR: D1, " &
"CPU2BR: D2, " &
"CPU2DBG: D3, " &
"L2FLUSH: D18, " &
"L2CI: D19, " &
"TA: E1, " &
"L2DBG: E2, " &
"CPU2BG: E3, " &
"CFG3: E17, " &
"APENNC: E18, " &
"GBL: E19, " &
"CPUDBG: F1, " &
"L2CLAIM: F2, " &
"NCF3: F3, " &
"TSIZ: (F18, F17, F19), " &
"ARTRY: G1, " &
"CI: G2, " &
"AACK: G3, " &
"A: (W18, V18, V19, U18, U19, T18, T19, R17, R18, R19, P17, P18, "&
" P19, G19, H17, H18, " &
" H19, J19, J18, J17, K17, K19, K18, L19, L18, L17, M19, M18, "&
" M17, N19, N18, N17), " &
"TEA: H1, " &
"CPUBR: H2, " &
"WT: H3, " &
"HRESET: J1, " &
"DBB: J2, " &
"PWRDN: J3, " &
"TT: (K2, K1, L2, M1, L1), " &
"TBST: K3, " &
"TS: L3, " &
"CPUBG: M2, " &
"CLKNC: M3, " &
"SRESET: N1, " &
"L2TAGCLR: N2, " &
"L2UPDATEINH: N3, " &
"TDI: P1, " &
"TCK: P2, " &
"TMS: P3, " &
"TDO: R1, " &
"TRST: R2, " &
"NCR3: R3, " &
"CPU4BG: T1, " &
"CPU4DBG: T2, " &
"CPU4BR: U1, " &
"CFG0: U2, " &
"CFG2: V1, " &
"CFG1: V2 ";
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_RESET of TRST : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (20.0e6, BOTH);
attribute INSTRUCTION_LENGTH of MPC2605 : entity is 4;
attribute INSTRUCTION_OPCODE of MPC2605 : entity is
"EXTEST (0000)," &
"SAMPLE (0010)," &
"CLAMP (1100)," &
"HIGHZ (1001)," &
"BYPASS (1111)";
attribute INSTRUCTION_CAPTURE of MPC2605 : entity is "0001";
attribute BOUNDARY_LENGTH of MPC2605 : entity is 169;
attribute BOUNDARY_REGISTER of MPC2605 : entity is
-- num cell port func safe [ccell dis rslt]
"0 (BC_4, *, internal, 1)," &
"1 (BC_7, DL(16), bidir, 1, 163, 1, Z)," &
"2 (BC_7, DL(17), bidir, 1, 163, 1, Z)," &
"3 (BC_7, DL(18), bidir, 1, 163, 1, Z)," &
"4 (BC_7, DL(19), bidir, 1, 163, 1, Z)," &
"5 (BC_7, DL(20), bidir, 1, 163, 1, Z)," &
"6 (BC_7, DL(21), bidir, 1, 163, 1, Z)," &
"7 (BC_7, DL(22), bidir, 1, 163, 1, Z)," &
"8 (BC_7, DL(23), bidir, 1, 163, 1, Z)," &
"9 (BC_7, DP(6), bidir, 1, 163, 1, Z)," &
"10 (BC_7, DL(24), bidir, 1, 163, 1, Z)," &
"11 (BC_7, DL(25), bidir, 1, 163, 1, Z)," &
"12 (BC_7, DL(26), bidir, 1, 163, 1, Z)," &
"13 (BC_7, DL(27), bidir, 1, 163, 1, Z)," &
"14 (BC_7, DL(28), bidir, 1, 163, 1, Z)," &
"15 (BC_7, DL(29), bidir, 1, 163, 1, Z)," &
"16 (BC_7, DL(30), bidir, 1, 163, 1, Z)," &
"17 (BC_7, DL(31), bidir, 1, 163, 1, Z)," &
"18 (BC_7, DP(7), bidir, 1, 163, 1, Z)," &
"19 (BC_7, DH(24), bidir, 1, 163, 1, Z)," &
-- num cell port func safe [ccell dis rslt]
"20 (BC_7, DH(25), bidir, 1, 163, 1, Z)," &
"21 (BC_7, DH(26), bidir, 1, 163, 1, Z)," &
"22 (BC_7, DH(27), bidir, 1, 163, 1, Z)," &
"23 (BC_7, DH(28), bidir, 1, 163, 1, Z)," &
"24 (BC_7, DH(29), bidir, 1, 163, 1, Z)," &
"25 (BC_7, DH(30), bidir, 1, 163, 1, Z)," &
"26 (BC_7, DH(31), bidir, 1, 163, 1, Z)," &
"27 (BC_7, DP(3), bidir, 1, 163, 1, Z)," &
"28 (BC_7, DH(16), bidir, 1, 163, 1, Z)," &
"29 (BC_7, DH(17), bidir, 1, 163, 1, Z)," &
"30 (BC_7, DH(18), bidir, 1, 163, 1, Z)," &
"31 (BC_7, DH(19), bidir, 1, 163, 1, Z)," &
"32 (BC_7, DH(20), bidir, 1, 163, 1, Z)," &
"33 (BC_7, DH(21), bidir, 1, 163, 1, Z)," &
"34 (BC_7, DH(22), bidir, 1, 163, 1, Z)," &
"35 (BC_7, DH(23), bidir, 1, 163, 1, Z)," &
"36 (BC_7, DP(2), bidir, 1, 163, 1, Z)," &
"37 (BC_2, L2BG, input, 1)," &
"38 (BC_2, L2MISSINH, input, 1)," &
"39 (BC_7, ABB, bidir, 1, 166, 1, Z)," &
-- num cell port func safe [ccell dis rslt]
"40 (BC_2, CPU3DBG, input, 1)," &
"41 (BC_2, CPU3BG, input, 1)," &
"42 (BC_2, CPU3BR, input, 1)," &
"43 (BC_2, CPU2DBG, input, 1)," &
"44 (BC_2, CPU2BG, input, 1)," &
"45 (BC_2, CPU2BR, input, 1)," &
"46 (BC_7, FDN, bidir, 1, 161, 1, Z)," &
"47 (BC_2, L2DBG, input, 1)," &
"48 (BC_7, L2BR, bidir, 1, 160, 1, Z)," &
"49 (BC_7, TA, bidir, 1, 158, 1, Z)," &
"50 (BC_2, L2CLAIM, output3, 1, 159, 1, Z)," &
"51 (BC_2, CPUDBG, input, 1)," &
"52 (BC_7, AACK, bidir, 1, 167, 1, Z)," &
"53 (BC_7, CI, bidir, 1, 168, 1, Z)," &
"54 (BC_7, ARTRY, bidir, 1, 164, 1, Z)," &
"55 (BC_7, WT, bidir, 1, 168, 1, Z)," &
"56 (BC_2, CPUBR, input, 1)," &
"57 (BC_2, TEA, input, 1)," &
"58 (BC_2, PWRDN, input, 1)," &
"59 (BC_7, DBB, bidir, 1, 162, 1, Z)," &
-- num cell port func safe [ccell dis rslt]
"60 (BC_2, HRESET, input, 1)," &
"61 (BC_7, TBST, bidir, 1, 168, 1, Z)," &
"62 (BC_7, TT(0), bidir, 1, 168, 1, Z)," &
"63 (BC_7, TS, bidir, 1, 168, 1, Z)," &
"64 (BC_7, TT(1), bidir, 1, 168, 1, Z)," &
"65 (BC_7, TT(2), bidir, 1, 168, 1, Z)," &
"66 (BC_7, TT(4), bidir, 1, 168, 1, Z)," &
"67 (BC_7, TT(3), bidir, 1, 168, 1, Z)," &
"68 (BC_2, CPUBG, input, 1)," &
"69 (BC_2, SRESET, input, 1)," &
"70 (BC_2, L2TAGCLR, input, 1)," &
"71 (BC_2, L2UPDATEINH, input, 1)," &
"72 (BC_2, CPU4BG, input, 1)," &
"73 (BC_2, CPU4DBG, input, 1)," &
"74 (BC_2, CPU4BR, input, 1)," &
"75 (BC_2, CFG0, input, 1)," &
"76 (BC_2, CFG2, input, 1)," &
"77 (BC_2, CFG1, input, 1)," &
"78 (BC_7, DH(8), bidir, 1, 163, 1, Z)," &
"79 (BC_7, DH(9), bidir, 1, 163, 1, Z)," &
-- num cell port func safe [ccell dis rslt]
"80 (BC_7, DH(10), bidir, 1, 163, 1, Z)," &
"81 (BC_7, DH(11), bidir, 1, 163, 1, Z)," &
"82 (BC_7, DH(12), bidir, 1, 163, 1, Z)," &
"83 (BC_7, DH(13), bidir, 1, 163, 1, Z)," &
"84 (BC_7, DH(14), bidir, 1, 163, 1, Z)," &
"85 (BC_7, DH(15), bidir, 1, 163, 1, Z)," &
"86 (BC_7, DP(1), bidir, 1, 163, 1, Z)," &
"87 (BC_7, DH(0), bidir, 1, 163, 1, Z)," &
"88 (BC_7, DH(1), bidir, 1, 163, 1, Z)," &
"89 (BC_7, DH(2), bidir, 1, 163, 1, Z)," &
"90 (BC_7, DH(3), bidir, 1, 163, 1, Z)," &
"91 (BC_7, DH(4), bidir, 1, 163, 1, Z)," &
"92 (BC_7, DH(5), bidir, 1, 163, 1, Z)," &
"93 (BC_7, DH(6), bidir, 1, 163, 1, Z)," &
"94 (BC_7, DH(7), bidir, 1, 163, 1, Z)," &
"95 (BC_7, DP(0), bidir, 1, 163, 1, Z)," &
"96 (BC_7, DL(0), bidir, 1, 163, 1, Z)," &
"97 (BC_7, DL(1), bidir, 1, 163, 1, Z)," &
"98 (BC_7, DL(2), bidir, 1, 163, 1, Z)," &
"99 (BC_7, DL(3), bidir, 1, 163, 1, Z)," &
-- num cell port func safe [ccell dis rslt]
"100 (BC_7, DL(4), bidir, 1, 163, 1, Z)," &
"101 (BC_7, DL(5), bidir, 1, 163, 1, Z)," &
"102 (BC_7, DL(6), bidir, 1, 163, 1, Z)," &
"103 (BC_7, DL(7), bidir, 1, 163, 1, Z)," &
"104 (BC_7, DP(4), bidir, 1, 163, 1, Z)," &
"105 (BC_7, DL(8), bidir, 1, 163, 1, Z)," &
"106 (BC_7, DL(9), bidir, 1, 163, 1, Z)," &
"107 (BC_7, DL(10), bidir, 1, 163, 1, Z)," &
"108 (BC_7, DL(11), bidir, 1, 163, 1, Z)," &
"109 (BC_7, DL(12), bidir, 1, 163, 1, Z)," &
"110 (BC_7, DL(13), bidir, 1, 163, 1, Z)," &
"111 (BC_7, DL(14), bidir, 1, 163, 1, Z)," &
"112 (BC_7, DL(15), bidir, 1, 163, 1, Z)," &
"113 (BC_7, DP(5), bidir, 1, 163, 1, Z)," &
"114 (BC_7, A(0), bidir, 1, 168, 1, Z)," &
"115 (BC_7, A(1), bidir, 1, 168, 1, Z)," &
"116 (BC_7, A(2), bidir, 1, 168, 1, Z)," &
"117 (BC_7, A(3), bidir, 1, 168, 1, Z)," &
"118 (BC_7, A(4), bidir, 1, 168, 1, Z)," &
"119 (BC_7, A(5), bidir, 1, 168, 1, Z)," &
-- num cell port func safe [ccell dis rslt]
"120 (BC_7, A(6), bidir, 1, 168, 1, Z)," &
"121 (BC_7, A(7), bidir, 1, 168, 1, Z)," &
"122 (BC_7, A(8), bidir, 1, 168, 1, Z)," &
"123 (BC_7, A(9), bidir, 1, 168, 1, Z)," &
"124 (BC_7, A(10), bidir, 1, 168, 1, Z)," &
"125 (BC_7, A(11), bidir, 1, 168, 1, Z)," &
"126 (BC_7, A(12), bidir, 1, 168, 1, Z)," &
"127 (BC_7, A(31), bidir, 1, 168, 1, Z)," &
"128 (BC_7, A(30), bidir, 1, 168, 1, Z)," &
"129 (BC_7, A(29), bidir, 1, 168, 1, Z)," &
"130 (BC_7, A(28), bidir, 1, 168, 1, Z)," &
"131 (BC_7, A(27), bidir, 1, 168, 1, Z)," &
"132 (BC_7, A(26), bidir, 1, 168, 1, Z)," &
"133 (BC_7, A(25), bidir, 1, 168, 1, Z)," &
"134 (BC_7, A(24), bidir, 1, 168, 1, Z)," &
"135 (BC_7, A(23), bidir, 1, 168, 1, Z)," &
"136 (BC_7, A(22), bidir, 1, 168, 1, Z)," &
"137 (BC_7, A(21), bidir, 1, 168, 1, Z)," &
"138 (BC_7, A(20), bidir, 1, 168, 1, Z)," &
"139 (BC_7, A(19), bidir, 1, 168, 1, Z)," &
-- num cell port func safe [ccell dis rslt]
"140 (BC_7, A(18), bidir, 1, 168, 1, Z)," &
"141 (BC_7, A(17), bidir, 1, 168, 1, Z)," &
"142 (BC_7, A(16), bidir, 1, 168, 1, Z)," &
"143 (BC_7, A(15), bidir, 1, 168, 1, Z)," &
"144 (BC_7, A(14), bidir, 1, 168, 1, Z)," &
"145 (BC_7, A(13), bidir, 1, 168, 1, Z)," &
"146 (BC_7, TSIZ(2), bidir, 1, 168, 1, Z)," &
"147 (BC_7, TSIZ(0), bidir, 1, 168, 1, Z)," &
"148 (BC_7, TSIZ(1), bidir, 1, 168, 1, Z)," &
"149 (BC_7, GBL, bidir, 1, 168, 1, Z)," &
"150 (BC_2, CFG3, input, 1)," &
"151 (BC_2, L2CI, input, 1)," &
"152 (BC_2, L2FLUSH, input, 1)," &
"153 (BC_7, AP(0), bidir, 1, 168, 1, Z)," &
"154 (BC_7, AP(1), bidir, 1, 168, 1, Z)," &
"155 (BC_7, AP(2), bidir, 1, 168, 1, Z)," &
"156 (BC_7, AP(3), bidir, 1, 168, 1, Z)," &
"157 (BC_2, APE, output3, 1, 165, 1, Z)," &
"158 (BC_2, *, control, 1)," &
"159 (BC_2, *, control, 1)," &
-- num cell port func safe [ccell dis rslt]
"160 (BC_2, *, control, 1)," &
"161 (BC_2, *, control, 1)," &
"162 (BC_2, *, control, 1)," &
"163 (BC_2, *, control, 1)," &
"164 (BC_2, *, control, 1)," &
"165 (BC_2, *, control, 1)," &
"166 (BC_2, *, control, 1)," &
"167 (BC_2, *, control, 1)," &
"168 (BC_2, *, control, 1)";
end MPC2605;