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BSDL File: ADSP_21479 Download View details  


--------------------------------------------------------------
-- BSDL for ADSP_21479 BGA_PACKAGE
-- 196 12mm bga Package
-- 
-- Revision History :
--
-- Revision 0.0 - Initial release, PrA, Wed Oct  7 09:35:20 2009, RMyers
--------------------------------------------------------------

entity ADSP_21479 is 
	generic (PHYSICAL_PIN_MAP : string := "BGA_PACKAGE");

	port (  ADDR0:	inout	bit;
	        ADDR1:	inout	bit;
	        ADDR2:	inout	bit;
	        ADDR3:	inout	bit;
	        ADDR4:	inout	bit;
	        ADDR5:	inout	bit;
	        ADDR6:	inout	bit;
	        ADDR7:	inout	bit;
	        ADDR8:	inout	bit;
	        ADDR9:	inout	bit;
	       ADDR10:	inout	bit;
	       ADDR11:	inout	bit;
	       ADDR12:	inout	bit;
	       ADDR13:	inout	bit;
	       ADDR14:	inout	bit;
	       ADDR15:	inout	bit;
	       ADDR16:	inout	bit;
	       ADDR17:	inout	bit;
	       ADDR18:	inout	bit;
	       ADDR19:	inout	bit;
	       ADDR20:	inout	bit;
	       ADDR21:	inout	bit;
	       ADDR22:	inout	bit;
	       ADDR23:	inout	bit;
	      AMI_ACK:	in	bit;
	          MS0:	out	bit;
	          MS1:	out	bit;
	       AMI_RD:	out	bit;
	       AMI_WR:	out	bit;
	    BOOT_CFG0:	in	bit;
	    BOOT_CFG1:	in	bit;
	    BOOT_CFG2:	in	bit;
	     CLK_CFG0:	in	bit;
	     CLK_CFG1:	in	bit;
	     RESETOUT:	inout	bit;
	        DATA0:	inout	bit;
	        DATA1:	inout	bit;
	        DATA2:	inout	bit;
	        DATA3:	inout	bit;
	        DATA4:	inout	bit;
	        DATA5:	inout	bit;
	        DATA6:	inout	bit;
	        DATA7:	inout	bit;
	        DATA8:	inout	bit;
	        DATA9:	inout	bit;
	       DATA10:	inout	bit;
	       DATA11:	inout	bit;
	       DATA12:	inout	bit;
	       DATA13:	inout	bit;
	       DATA14:	inout	bit;
	       DATA15:	inout	bit;
	      DAI_P01:	inout	bit;
	      DAI_P02:	inout	bit;
	      DAI_P03:	inout	bit;
	      DAI_P04:	inout	bit;
	      DAI_P05:	inout	bit;
	      DAI_P06:	inout	bit;
	      DAI_P07:	inout	bit;
	      DAI_P08:	inout	bit;
	      DAI_P09:	inout	bit;
	      DAI_P10:	inout	bit;
	      DAI_P11:	inout	bit;
	      DAI_P12:	inout	bit;
	      DAI_P13:	inout	bit;
	      DAI_P14:	inout	bit;
	      DAI_P15:	inout	bit;
	      DAI_P16:	inout	bit;
	      DAI_P17:	inout	bit;
	      DAI_P18:	inout	bit;
	      DAI_P19:	inout	bit;
	      DAI_P20:	inout	bit;
	      DPI_P01:	inout	bit;
	      DPI_P02:	inout	bit;
	      DPI_P03:	inout	bit;
	      DPI_P04:	inout	bit;
	      DPI_P05:	inout	bit;
	      DPI_P06:	inout	bit;
	      DPI_P07:	inout	bit;
	      DPI_P08:	inout	bit;
	      DPI_P09:	inout	bit;
	      DPI_P10:	inout	bit;
	      DPI_P11:	inout	bit;
	      DPI_P12:	inout	bit;
	      DPI_P13:	inout	bit;
	      DPI_P14:	inout	bit;
	        SDDQM:	inout	bit;
	          EMU:	out	bit;
	        FLAG0:	inout	bit;
	        FLAG1:	inout	bit;
	        FLAG2:	inout	bit;
	        FLAG3:	inout	bit;
	        RESET:	in	bit;
	        SDA10:	out	bit;
	        SDCAS:	out	bit;
	        SDCKE:	out	bit;
	       SDCLK0:	inout	bit;
	        SDRAS:	out	bit;
	         SDWE:	out	bit;
	       SR_CLR:	inout	bit;
	       SR_LAT:	inout	bit;
	      SR_LDO0:	inout	bit;
	      SR_LDO1:	inout	bit;
	      SR_LDO2:	inout	bit;
	      SR_LDO3:	inout	bit;
	      SR_LDO4:	inout	bit;
	      SR_LDO5:	inout	bit;
	      SR_LDO6:	inout	bit;
	      SR_LDO7:	inout	bit;
	      SR_LDO8:	inout	bit;
	      SR_LDO9:	inout	bit;
	     SR_LDO10:	inout	bit;
	     SR_LDO11:	inout	bit;
	     SR_LDO12:	inout	bit;
	     SR_LDO13:	inout	bit;
	     SR_LDO14:	inout	bit;
	     SR_LDO15:	inout	bit;
	     SR_LDO16:	inout	bit;
	     SR_LDO17:	inout	bit;
	      SR_SCLK:	inout	bit;
	       SR_SDI:	inout	bit;
	       SR_SDO:	inout	bit;
	          TCK:	in		bit;
	          TDI:	in		bit;
	          TDO:	out		bit;
	          TMS:	in		bit;
	         TRST:	in		bit;
	      WDTRSTO:	inout	bit;
	     RTCLKOUT:	out		bit;
        WDT_CLKIN:	in		bit;
	     WDT_CLKO:	out		bit;
	         XTAL:	out		bit;
	        CLKIN:	in		bit;
	         RTXI:	in		bit;
	         RTXO:	out		bit;
		  VDD_INT:	    linkage bit_vector(0 to 19);
		  VDD_EXT:	    linkage	bit_vector(0 to 11);
		    VDD_A:		linkage	bit;
		  VDD_RTC:		linkage	bit;
		    VSS_A:		linkage	bit;
	      VSS_RTC:		linkage	bit;
			  GND:	    linkage bit_vector(0 to 25));

	use STD_1149_1_1994.all;

	attribute COMPONENT_CONFORMANCE of ADSP_21479 : entity is "STD_1149_1_1990";

	attribute PIN_MAP of ADSP_21479 : entity is PHYSICAL_PIN_MAP;

	constant BGA_PACKAGE : PIN_MAP_STRING := 
	"SDCKE:       A2, " &
	"SDDQM:       A3, " &
	"SDRAS:       A4, " &
	"SDWE:        A5, " &
	"DATA12:      A6, " &
	"DATA13:      A7, " &
	"DATA10:      A8, " &
	"DATA9:       A9, " &
	"DATA7:       A10, " &
	"DATA3:       A11, " &
	"DATA1:       A12, " &
	"DATA2:       A13, " &
	"ADDR0:       B1, " &
	"CLK_CFG1:    B2, " &
	"BOOT_CFG0:   B3, " &
	"TMS:         B4, " &
	"RESET:       B5, " &
	"DATA14:      B6, " &
	"DATA11:      B7, " &
	"DATA4:       B8, " &
	"DATA8:       B9, " &
	"DATA6:       B10, " &
	"DATA5:       B11, " &
	"TRST:        B12, " &
	"FLAG1:       B13, " &
	"DATA0:       B14, " &
	"ADDR2:       C1, " &
	"ADDR3:       C2, " &
	"MS0:         C4, " &
	"SDCAS:       C5, " &
	"DATA15:      C6, " &
	"TCK:         C7, " &
	"TDI:         C8, " &
	"SDCLK0:      C9, " &
	"EMU:         C10, " &
	"TDO:         C11, " &
	"FLAG3:       C12, " &
	"ADDR16:      C13, " &
	"ADDR6:       D1, " &
	"ADDR4:       D2, " &
	"ADDR1:       D3, " &
	"CLK_CFG0:    D4, " &
	"ADDR14:      D12, " &
	"ADDR20:      D13, " &
	"ADDR8:       E1, " &
	"ADDR7:       E2, " &
	"ADDR5:       E3, " &
	"AMI_RD:      E12, " &
	"ADDR22:      E13, " &
	"FLAG2:       E14, " &
	"ADDR9:       F2, " &
	"BOOT_CFG1:   F3, " &
	"ADDR15:      F12, " &
	"FLAG0:       F13, " &
	"AMI_WR:      F14, " &
	"SDA10:       G2, " &
	"ADDR11:      G3, " &
	"ADDR21:      G12, " &
	"ADDR19:      G13, " &
	"ADDR13:      H1, " &
	"ADDR12:      H2, " &
	"ADDR10:      H3, " &
	"ADDR17:      H4, " &
	"BOOT_CFG2:   H12, " &
	"ADDR23:      H13, " &
	"DPI_P01:     J1, " &
	"DPI_P03:     J2, " &
	"ADDR18:      J3, " &
	"RESETOUT:    J4, " &
	"DAI_P11:     J12, " &
	"AMI_ACK:     J13, " &
	"MS1:         J14, " &
	"DPI_P02:     K1, " &
	"DPI_P04:     K2, " &
	"DPI_P05:     K3, " &
	"DPI_P09:     K4, " &
	"DAI_P16:     K12, " &
	"DAI_P18:     K13, " &
	"DAI_P15:     K14, " &
	"DAI_P03:     L1, " &
	"DPI_P10:     L2, " &
	"DPI_P08:     L3, " &
	"DPI_P06:     L4, " &
	"DAI_P10:     L11, " &
	"DAI_P20:     L12, " &
	"DAI_P17:     L13, " &
	"DAI_P04:     L14, " &
	"DPI_P13:     M1, " &
	"DPI_P12:     M2, " &
	"SR_LDO0:     M3, " &
	"DPI_P07:     M4, " &
	"DPI_P11:     M5, " &
	"SR_LDO5:     M6, " &
	"SR_LDO7:     M7, " &
	"DAI_P07:     M8, " &
	"SR_LDO16:    M9, " &
	"SR_SDO:      M10, " &
	"DAI_P06:     M11, " &
	"DAI_P05:     M12, " &
	"DAI_P08:     M13, " &
	"DAI_P12:     M14, " &
	"DPI_P14:     N1, " &
	"SR_LDO1:     N2, " &
	"SR_LDO4:     N3, " &
	"SR_LDO8:     N4, " &
	"SR_LDO10:    N5, " &
	"DAI_P01:     N6, " &
	"SR_LDO9:     N7, " &
	"DAI_P02:     N8, " &
	"SR_LDO13:    N9, " &
	"SR_SCLK:     N10, " &
	"DAI_P09:     N11, " &
	"SR_SDI:      N12, " &
	"SR_LDO17:    N13, " &
	"DAI_P14:     N14, " &
	"SR_LDO3:     P2, " &
	"SR_LDO2:     P3, " &
	"SR_LDO6:     P4, " &
	"WDTRSTO:     P5, " &
	"DAI_P19:     P6, " &
	"DAI_P13:     P7, " &
	"SR_LDO11:    P8, " &
	"SR_LDO15:    P9, " &
	"SR_CLR:      P10, " &
	"SR_LAT:      P11, " &
	"SR_LDO14:    P12, " &
	"SR_LDO12:    P13, " &
	"RTCLKOUT:    C3 , " &
	"WDT_CLKIN:   C14, " &
	"WDT_CLKO:    D14  , " &
	"XTAL:        G1, " &
	"CLKIN:       F1  , " &
	"RTXI:        H14 , " &
	"RTXO:        G14 , " &
	"VDD_INT:	  (E10,E5,E6,E7,E8,E9,F10,G10,G5,H10,H5,J5,K10,K5,L10,L5,L6,L7,L8,L9),  " &
	"VDD_EXT:	  (D10,D11,D5,D6,D7,D8,D9,E11,E4,F11,G11,H11),  " &
	"VDD_A:		  F5,  " &
	"VDD_RTC:	  J11, " &
	"VSS_A:		  F4,  " &
	"VSS_RTC:	  J10, " &
	"GND:	      (A1,A14,F6,F7,F8,F9,G4,G6,G7,G8,G9,H6,H7,H8,H9,J6,J7,J8,J9,K11,K6,K7,K8,K9,P1,P14)";

	attribute TAP_SCAN_IN    of   TDI : signal is true;
	attribute TAP_SCAN_OUT   of   TDO : signal is true;
	attribute TAP_SCAN_MODE  of   TMS : signal is true;
	attribute TAP_SCAN_RESET of  TRST : signal is true;
	attribute TAP_SCAN_CLOCK of   TCK : signal is (50.0e6, BOTH);

	attribute INSTRUCTION_LENGTH of ADSP_21479 : entity is 5;

	attribute INSTRUCTION_OPCODE of ADSP_21479 : entity is 
	   "EXTEST        	(00000)," &
	   "SAMPLE        	(10000)," &
	   "INTEST        	(11000)," &
	   "IDCODE        	(11101)," &
	   "EMULATION     	(00010, 00100, 01000, 01001, 01010," &
	                 	"01100, 10100, 10110, 11100)," &
	   "BYPASS        	(11111)";

	attribute INSTRUCTION_CAPTURE of ADSP_21479 : entity is "00001";
	attribute INSTRUCTION_PRIVATE of ADSP_21479 : entity is 
	   "EMULATION ";

	attribute IDCODE_REGISTER   of ADSP_21479 : entity is 
	   "00000000000011100000000011001011";
	attribute BOUNDARY_LENGTH of ADSP_21479 : entity is 418;

	attribute BOUNDARY_REGISTER of ADSP_21479 : entity is 
	-- num    cell   port    func          safe [ccell  dis  rslt]
	   "0     (BC_1, SDDQM,      output3,       X,      1,   0,   Z)," &
	   "1     (BC_1, *,          control,       0)," &
	   "2     (BC_2, SDDQM,      input,         X)," &
	   "3     (BC_1, MS0,        output3,       X,      4,   0,   Z)," &
	   "4     (BC_1, *,          control,       0)," &
	   "5     (BC_3, *,          internal,      X)," &
	   "6     (BC_1, SDCKE,      output3,       X,      7,   0,   Z)," &
	   "7     (BC_1, *,          control,       0)," &
	   "8     (BC_3, *,          internal,      X)," &
	   "9     (BC_3, *,          internal,      X)," &
	   "10    (BC_3, *,          internal,      X)," &
	   "11    (BC_2, CLK_CFG1,   input,         X)," &
	   "12    (BC_1, MS1,        output3,       X,     13,   0,   Z)," &
	   "13    (BC_1, *,          control,       0)," &
	   "14    (BC_3, *,          internal,      X)," &
	   "15    (BC_1, ADDR0,      output3,       X,     16,   0,   Z)," &
	   "16    (BC_1, *,          control,       0)," &
	   "17    (BC_2, ADDR0,      input,         X)," &
	   "18    (BC_3, *,          internal,      X)," &
	   "19    (BC_3, *,          internal,      X)," &
	-- num    cell   port    func          safe [ccell  dis  rslt]
	   "20    (BC_2, BOOT_CFG0,  input,         X)," &
	   "21    (BC_1, ADDR1,      output3,       X,     22,   0,   Z)," &
	   "22    (BC_1, *,          control,       0)," &
	   "23    (BC_2, ADDR1,      input,         X)," &
	   "24    (BC_1, ADDR2,      output3,       X,     25,   0,   Z)," &
	   "25    (BC_1, *,          control,       0)," &
	   "26    (BC_2, ADDR2,      input,         X)," &
	   "27    (BC_1, ADDR3,      output3,       X,     28,   0,   Z)," &
	   "28    (BC_1, *,          control,       0)," &
	   "29    (BC_2, ADDR3,      input,         X)," &
	   "30    (BC_1, ADDR4,      output3,       X,     31,   0,   Z)," &
	   "31    (BC_1, *,          control,       0)," &
	   "32    (BC_2, ADDR4,      input,         X)," &
	   "33    (BC_1, ADDR5,      output3,       X,     34,   0,   Z)," &
	   "34    (BC_1, *,          control,       0)," &
	   "35    (BC_2, ADDR5,      input,         X)," &
	   "36    (BC_3, *,          internal,      X)," &
	   "37    (BC_3, *,          internal,      X)," &
	   "38    (BC_2, BOOT_CFG1,  input,         X)," &
	   "39    (BC_1, ADDR6,      output3,       X,     40,   0,   Z)," &
	-- num    cell   port    func          safe [ccell  dis  rslt]
	   "40    (BC_1, *,          control,       0)," &
	   "41    (BC_2, ADDR6,      input,         X)," &
	   "42    (BC_1, ADDR7,      output3,       X,     43,   0,   Z)," &
	   "43    (BC_1, *,          control,       0)," &
	   "44    (BC_2, ADDR7,      input,         X)," &
	   "45    (BC_1, ADDR8,      output3,       X,     46,   0,   Z)," &
	   "46    (BC_1, *,          control,       0)," &
	   "47    (BC_2, ADDR8,      input,         X)," &
	   "48    (BC_1, ADDR9,      output3,       X,     49,   0,   Z)," &
	   "49    (BC_1, *,          control,       0)," &
	   "50    (BC_2, ADDR9,      input,         X)," &
	   "51    (BC_3, *,          internal,      X)," &
	   "52    (BC_3, *,          internal,      X)," &
	   "53    (BC_2, CLK_CFG0,   input,         X)," &
	   "54    (BC_1, SDA10,      output3,       X,     55,   0,   Z)," &
	   "55    (BC_1, *,          control,       0)," &
	   "56    (BC_3, *,          internal,      X)," &
	   "57    (BC_1, ADDR10,     output3,       X,     58,   0,   Z)," &
	   "58    (BC_1, *,          control,       0)," &
	   "59    (BC_2, ADDR10,     input,         X)," &
	-- num    cell   port    func          safe [ccell  dis  rslt]
	   "60    (BC_1, ADDR11,     output3,       X,     61,   0,   Z)," &
	   "61    (BC_1, *,          control,       0)," &
	   "62    (BC_2, ADDR11,     input,         X)," &
	   "63    (BC_1, ADDR12,     output3,       X,     64,   0,   Z)," &
	   "64    (BC_1, *,          control,       0)," &
	   "65    (BC_2, ADDR12,     input,         X)," &
	   "66    (BC_1, ADDR13,     output3,       X,     67,   0,   Z)," &
	   "67    (BC_1, *,          control,       0)," &
	   "68    (BC_2, ADDR13,     input,         X)," &
	   "69    (BC_1, ADDR17,     output3,       X,     70,   0,   Z)," &
	   "70    (BC_1, *,          control,       0)," &
	   "71    (BC_2, ADDR17,     input,         X)," &
	   "72    (BC_1, ADDR18,     output3,       X,     73,   0,   Z)," &
	   "73    (BC_1, *,          control,       0)," &
	   "74    (BC_2, ADDR18,     input,         X)," &
	   "75    (BC_1, RESETOUT,   output3,       X,     76,   0,   Z)," &
	   "76    (BC_1, *,          control,       0)," &
	   "77    (BC_2, RESETOUT,   input,         X)," &
	   "78    (BC_3, *,          internal,      X)," &
	   "79    (BC_3, *,          internal,      X)," &
	-- num    cell   port    func          safe [ccell  dis  rslt]
	   "80    (BC_2, *,          internal,      X)," &
	   "81    (BC_3, *,          internal,      X)," &
	   "82    (BC_3, *,          internal,      X)," &
	   "83    (BC_2, *,          internal,      X)," &
	   "84    (BC_3, *,          internal,      X)," &
	   "85    (BC_3, *,          internal,      X)," &
	   "86    (BC_2, *,          internal,      X)," &
	   "87    (BC_1, *,          internal,      X)," &
	   "88    (BC_1, *,          internal,      X)," &
	   "89    (BC_2, *,          internal,      X)," &
	   "90    (BC_1, *,          internal,      X)," &
	   "91    (BC_1, *,          internal,      X)," &
	   "92    (BC_2, *,          internal,      X)," &
	   "93    (BC_1, *,          internal,      X)," &
	   "94    (BC_1, *,          internal,      X)," &
	   "95    (BC_2, *,          internal,      X)," &
	   "96    (BC_1, *,          internal,      X)," &
	   "97    (BC_1, *,          internal,      X)," &
	   "98    (BC_2, *,          internal,      X)," &
	   "99    (BC_1, *,          internal,      X)," &
	-- num    cell   port    func          safe [ccell  dis  rslt]
	   "100   (BC_1, *,          internal,      X)," &
	   "101   (BC_2, *,          internal,      X)," &
	   "102   (BC_1, *,          internal,      X)," &
	   "103   (BC_1, *,          internal,      X)," &
	   "104   (BC_2, *,          internal,      X)," &
	   "105   (BC_3, *,          internal,      X)," &
	   "106   (BC_3, *,          internal,      X)," &
	   "107   (BC_2, *,          internal,      X)," &
	   "108   (BC_1, DPI_P01,    output3,       X,    109,   0,   Z)," &
	   "109   (BC_1, *,          control,       0)," &
	   "110   (BC_2, DPI_P01,    input,         X)," &
	   "111   (BC_1, DPI_P02,    output3,       X,    112,   0,   Z)," &
	   "112   (BC_1, *,          control,       0)," &
	   "113   (BC_2, DPI_P02,    input,         X)," &
	   "114   (BC_1, DPI_P03,    output3,       X,    115,   0,   Z)," &
	   "115   (BC_1, *,          control,       0)," &
	   "116   (BC_2, DPI_P03,    input,         X)," &
	   "117   (BC_1, DPI_P04,    output3,       X,    118,   0,   Z)," &
	   "118   (BC_1, *,          control,       0)," &
	   "119   (BC_2, DPI_P04,    input,         X)," &
	-- num    cell   port    func          safe [ccell  dis  rslt]
	   "120   (BC_1, DPI_P05,    output3,       X,    121,   0,   Z)," &
	   "121   (BC_1, *,          control,       0)," &
	   "122   (BC_2, DPI_P05,    input,         X)," &
	   "123   (BC_1, DPI_P06,    output3,       X,    124,   0,   Z)," &
	   "124   (BC_1, *,          control,       0)," &
	   "125   (BC_2, DPI_P06,    input,         X)," &
	   "126   (BC_1, DPI_P08,    output3,       X,    127,   0,   Z)," &
	   "127   (BC_1, *,          control,       0)," &
	   "128   (BC_2, DPI_P08,    input,         X)," &
	   "129   (BC_1, DPI_P07,    output3,       X,    130,   0,   Z)," &
	   "130   (BC_1, *,          control,       0)," &
	   "131   (BC_2, DPI_P07,    input,         X)," &
	   "132   (BC_1, DPI_P09,    output3,       X,    133,   0,   Z)," &
	   "133   (BC_1, *,          control,       0)," &
	   "134   (BC_2, DPI_P09,    input,         X)," &
	   "135   (BC_1, DPI_P10,    output3,       X,    136,   0,   Z)," &
	   "136   (BC_1, *,          control,       0)," &
	   "137   (BC_2, DPI_P10,    input,         X)," &
	   "138   (BC_1, DPI_P11,    output3,       X,    139,   0,   Z)," &
	   "139   (BC_1, *,          control,       0)," &
	-- num    cell   port    func          safe [ccell  dis  rslt]
	   "140   (BC_2, DPI_P11,    input,         X)," &
	   "141   (BC_1, DPI_P13,    output3,       X,    142,   0,   Z)," &
	   "142   (BC_1, *,          control,       0)," &
	   "143   (BC_2, DPI_P13,    input,         X)," &
	   "144   (BC_1, DPI_P12,    output3,       X,    145,   0,   Z)," &
	   "145   (BC_1, *,          control,       0)," &
	   "146   (BC_2, DPI_P12,    input,         X)," &
	   "147   (BC_1, DAI_P03,    output3,       X,    148,   0,   Z)," &
	   "148   (BC_1, *,          control,       0)," &
	   "149   (BC_2, DAI_P03,    input,         X)," &
	   "150   (BC_1, DPI_P14,    output3,       X,    151,   0,   Z)," &
	   "151   (BC_1, *,          control,       0)," &
	   "152   (BC_2, DPI_P14,    input,         X)," &
	   "153   (BC_1, SR_LDO0,    output3,       X,    154,   0,   Z)," &
	   "154   (BC_1, *,          control,       0)," &
	   "155   (BC_2, SR_LDO0,    input,         X)," &
	   "156   (BC_1, SR_LDO1,    output3,       X,    157,   0,   Z)," &
	   "157   (BC_1, *,          control,       0)," &
	   "158   (BC_2, SR_LDO1,    input,         X)," &
	   "159   (BC_1, SR_LDO2,    output3,       X,    160,   0,   Z)," &
	-- num    cell   port    func          safe [ccell  dis  rslt]
	   "160   (BC_1, *,          control,       0)," &
	   "161   (BC_2, SR_LDO2,    input,         X)," &
	   "162   (BC_1, SR_LDO3,    output3,       X,    163,   0,   Z)," &
	   "163   (BC_1, *,          control,       0)," &
	   "164   (BC_2, SR_LDO3,    input,         X)," &
	   "165   (BC_1, SR_LDO4,    output3,       X,    166,   0,   Z)," &
	   "166   (BC_1, *,          control,       0)," &
	   "167   (BC_2, SR_LDO4,    input,         X)," &
	   "168   (BC_1, SR_LDO5,    output3,       X,    169,   0,   Z)," &
	   "169   (BC_1, *,          control,       0)," &
	   "170   (BC_2, SR_LDO5,    input,         X)," &
	   "171   (BC_1, SR_LDO6,    output3,       X,    172,   0,   Z)," &
	   "172   (BC_1, *,          control,       0)," &
	   "173   (BC_2, SR_LDO6,    input,         X)," &
	   "174   (BC_1, SR_LDO7,    output3,       X,    175,   0,   Z)," &
	   "175   (BC_1, *,          control,       0)," &
	   "176   (BC_2, SR_LDO7,    input,         X)," &
	   "177   (BC_1, SR_LDO8,    output3,       X,    178,   0,   Z)," &
	   "178   (BC_1, *,          control,       0)," &
	   "179   (BC_2, SR_LDO8,    input,         X)," &
	-- num    cell   port    func          safe [ccell  dis  rslt]
	   "180   (BC_1, SR_LDO9,    output3,       X,    181,   0,   Z)," &
	   "181   (BC_1, *,          control,       0)," &
	   "182   (BC_2, SR_LDO9,    input,         X)," &
	   "183   (BC_1, WDTRSTO,    output3,       X,    184,   0,   Z)," &
	   "184   (BC_1, *,          control,       0)," &
	   "185   (BC_2, WDTRSTO,    input,         X)," &
	   "186   (BC_1, SR_LDO10,   output3,       X,    187,   0,   Z)," &
	   "187   (BC_1, *,          control,       0)," &
	   "188   (BC_2, SR_LDO10,   input,         X)," &
	   "189   (BC_1, DAI_P13,    output3,       X,    190,   0,   Z)," &
	   "190   (BC_1, *,          control,       0)," &
	   "191   (BC_2, DAI_P13,    input,         X)," &
	   "192   (BC_1, DAI_P07,    output3,       X,    193,   0,   Z)," &
	   "193   (BC_1, *,          control,       0)," &
	   "194   (BC_2, DAI_P07,    input,         X)," &
	   "195   (BC_1, DAI_P01,    output3,       X,    196,   0,   Z)," &
	   "196   (BC_1, *,          control,       0)," &
	   "197   (BC_2, DAI_P01,    input,         X)," &
	   "198   (BC_1, DAI_P19,    output3,       X,    199,   0,   Z)," &
	   "199   (BC_1, *,          control,       0)," &
	-- num    cell   port    func          safe [ccell  dis  rslt]
	   "200   (BC_2, DAI_P19,    input,         X)," &
	   "201   (BC_1, DAI_P02,    output3,       X,    202,   0,   Z)," &
	   "202   (BC_1, *,          control,       0)," &
	   "203   (BC_2, DAI_P02,    input,         X)," &
	   "204   (BC_1, SR_LDO11,   output3,       X,    205,   0,   Z)," &
	   "205   (BC_1, *,          control,       0)," &
	   "206   (BC_2, SR_LDO11,   input,         X)," &
	   "207   (BC_1, SR_CLR,     output3,       X,    208,   0,   Z)," &
	   "208   (BC_1, *,          control,       0)," &
	   "209   (BC_2, SR_CLR,     input,         X)," &
	   "210   (BC_1, SR_LAT,     output3,       X,    211,   0,   Z)," &
	   "211   (BC_1, *,          control,       0)," &
	   "212   (BC_2, SR_LAT,     input,         X)," &
	   "213   (BC_1, SR_LDO12,   output3,       X,    214,   0,   Z)," &
	   "214   (BC_1, *,          control,       0)," &
	   "215   (BC_2, SR_LDO12,   input,         X)," &
	   "216   (BC_1, SR_LDO13,   output3,       X,    217,   0,   Z)," &
	   "217   (BC_1, *,          control,       0)," &
	   "218   (BC_2, SR_LDO13,   input,         X)," &
	   "219   (BC_1, SR_LDO14,   output3,       X,    220,   0,   Z)," &
	-- num    cell   port    func          safe [ccell  dis  rslt]
	   "220   (BC_1, *,          control,       0)," &
	   "221   (BC_2, SR_LDO14,   input,         X)," &
	   "222   (BC_1, SR_LDO15,   output3,       X,    223,   0,   Z)," &
	   "223   (BC_1, *,          control,       0)," &
	   "224   (BC_2, SR_LDO15,   input,         X)," &
	   "225   (BC_1, SR_LDO16,   output3,       X,    226,   0,   Z)," &
	   "226   (BC_1, *,          control,       0)," &
	   "227   (BC_2, SR_LDO16,   input,         X)," &
	   "228   (BC_1, SR_LDO17,   output3,       X,    229,   0,   Z)," &
	   "229   (BC_1, *,          control,       0)," &
	   "230   (BC_2, SR_LDO17,   input,         X)," &
	   "231   (BC_1, SR_SCLK,    output3,       X,    232,   0,   Z)," &
	   "232   (BC_1, *,          control,       0)," &
	   "233   (BC_2, SR_SCLK,    input,         X)," &
	   "234   (BC_1, SR_SDI,     output3,       X,    235,   0,   Z)," &
	   "235   (BC_1, *,          control,       0)," &
	   "236   (BC_2, SR_SDI,     input,         X)," &
	   "237   (BC_1, SR_SDO,     output3,       X,    238,   0,   Z)," &
	   "238   (BC_1, *,          control,       0)," &
	   "239   (BC_2, SR_SDO,     input,         X)," &
	-- num    cell   port    func          safe [ccell  dis  rslt]
	   "240   (BC_1, DAI_P05,    output3,       X,    241,   0,   Z)," &
	   "241   (BC_1, *,          control,       0)," &
	   "242   (BC_2, DAI_P05,    input,         X)," &
	   "243   (BC_1, DAI_P06,    output3,       X,    244,   0,   Z)," &
	   "244   (BC_1, *,          control,       0)," &
	   "245   (BC_2, DAI_P06,    input,         X)," &
	   "246   (BC_1, DAI_P09,    output3,       X,    247,   0,   Z)," &
	   "247   (BC_1, *,          control,       0)," &
	   "248   (BC_2, DAI_P09,    input,         X)," &
	   "249   (BC_1, DAI_P10,    output3,       X,    250,   0,   Z)," &
	   "250   (BC_1, *,          control,       0)," &
	   "251   (BC_2, DAI_P10,    input,         X)," &
	   "252   (BC_1, DAI_P20,    output3,       X,    253,   0,   Z)," &
	   "253   (BC_1, *,          control,       0)," &
	   "254   (BC_2, DAI_P20,    input,         X)," &
	   "255   (BC_1, DAI_P14,    output3,       X,    256,   0,   Z)," &
	   "256   (BC_1, *,          control,       0)," &
	   "257   (BC_2, DAI_P14,    input,         X)," &
	   "258   (BC_1, DAI_P08,    output3,       X,    259,   0,   Z)," &
	   "259   (BC_1, *,          control,       0)," &
	-- num    cell   port    func          safe [ccell  dis  rslt]
	   "260   (BC_2, DAI_P08,    input,         X)," &
	   "261   (BC_1, DAI_P04,    output3,       X,    262,   0,   Z)," &
	   "262   (BC_1, *,          control,       0)," &
	   "263   (BC_2, DAI_P04,    input,         X)," &
	   "264   (BC_1, DAI_P18,    output3,       X,    265,   0,   Z)," &
	   "265   (BC_1, *,          control,       0)," &
	   "266   (BC_2, DAI_P18,    input,         X)," &
	   "267   (BC_1, DAI_P17,    output3,       X,    268,   0,   Z)," &
	   "268   (BC_1, *,          control,       0)," &
	   "269   (BC_2, DAI_P17,    input,         X)," &
	   "270   (BC_1, DAI_P16,    output3,       X,    271,   0,   Z)," &
	   "271   (BC_1, *,          control,       0)," &
	   "272   (BC_2, DAI_P16,    input,         X)," &
	   "273   (BC_1, DAI_P12,    output3,       X,    274,   0,   Z)," &
	   "274   (BC_1, *,          control,       0)," &
	   "275   (BC_2, DAI_P12,    input,         X)," &
	   "276   (BC_1, DAI_P15,    output3,       X,    277,   0,   Z)," &
	   "277   (BC_1, *,          control,       0)," &
	   "278   (BC_2, DAI_P15,    input,         X)," &
	   "279   (BC_1, DAI_P11,    output3,       X,    280,   0,   Z)," &
	-- num    cell   port    func          safe [ccell  dis  rslt]
	   "280   (BC_1, *,          control,       0)," &
	   "281   (BC_2, DAI_P11,    input,         X)," &
	   "282   (BC_3, *,          internal,      X)," &
	   "283   (BC_3, *,          internal,      X)," &
	   "284   (BC_2, BOOT_CFG2,  input,         X)," &
	   "285   (BC_3, *,          internal,      X)," &
	   "286   (BC_3, *,          internal,      X)," &
	   "287   (BC_2, AMI_ACK,    input,         X)," &
	   "288   (BC_1, *,          internal,      X)," &
	   "289   (BC_1, *,          internal,      X)," &
	   "290   (BC_3, *,          internal,      X)," &
	   "291   (BC_1, *,          internal,      X)," &
	   "292   (BC_1, *,          internal,      X)," &
	   "293   (BC_2, *,          internal,      X)," &
	   "294   (BC_1, ADDR23,     output3,       X,    295,   0,   Z)," &
	   "295   (BC_1, *,          control,       0)," &
	   "296   (BC_2, ADDR23,     input,         X)," &
	   "297   (BC_1, ADDR22,     output3,       X,    298,   0,   Z)," &
	   "298   (BC_1, *,          control,       0)," &
	   "299   (BC_2, ADDR22,     input,         X)," &
	-- num    cell   port    func          safe [ccell  dis  rslt]
	   "300   (BC_1, ADDR21,     output3,       X,    301,   0,   Z)," &
	   "301   (BC_1, *,          control,       0)," &
	   "302   (BC_2, ADDR21,     input,         X)," &
	   "303   (BC_1, ADDR20,     output3,       X,    304,   0,   Z)," &
	   "304   (BC_1, *,          control,       0)," &
	   "305   (BC_2, ADDR20,     input,         X)," &
	   "306   (BC_1, ADDR19,     output3,       X,    307,   0,   Z)," &
	   "307   (BC_1, *,          control,       0)," &
	   "308   (BC_2, ADDR19,     input,         X)," &
	   "309   (BC_1, ADDR16,     output3,       X,    310,   0,   Z)," &
	   "310   (BC_1, *,          control,       0)," &
	   "311   (BC_2, ADDR16,     input,         X)," &
	   "312   (BC_1, ADDR15,     output3,       X,    313,   0,   Z)," &
	   "313   (BC_1, *,          control,       0)," &
	   "314   (BC_2, ADDR15,     input,         X)," &
	   "315   (BC_1, ADDR14,     output3,       X,    316,   0,   Z)," &
	   "316   (BC_1, *,          control,       0)," &
	   "317   (BC_2, ADDR14,     input,         X)," &
	   "318   (BC_1, AMI_WR,     output3,       X,    319,   0,   Z)," &
	   "319   (BC_1, *,          control,       0)," &
	-- num    cell   port    func          safe [ccell  dis  rslt]
	   "320   (BC_3, *,          internal,      X)," &
	   "321   (BC_1, AMI_RD,     output3,       X,    322,   0,   Z)," &
	   "322   (BC_1, *,          control,       0)," &
	   "323   (BC_3, *,          internal,      X)," &
	   "324   (BC_1, FLAG0,      output3,       X,    325,   0,   Z)," &
	   "325   (BC_1, *,          control,       0)," &
	   "326   (BC_2, FLAG0,      input,         X)," &
	   "327   (BC_1, FLAG1,      output3,       X,    328,   0,   Z)," &
	   "328   (BC_1, *,          control,       0)," &
	   "329   (BC_2, FLAG1,      input,         X)," &
	   "330   (BC_1, FLAG2,      output3,       X,    331,   0,   Z)," &
	   "331   (BC_1, *,          control,       0)," &
	   "332   (BC_2, FLAG2,      input,         X)," &
	   "333   (BC_1, FLAG3,      output3,       X,    334,   0,   Z)," &
	   "334   (BC_1, *,          control,       0)," &
	   "335   (BC_2, FLAG3,      input,         X)," &
	   "336   (BC_3, *,          internal,      X)," &
	   "337   (BC_3, *,          internal,      X)," &
	   "338   (BC_2, *,          internal,      X)," &
	   "339   (BC_1, *,          internal,      X)," &
	-- num    cell   port    func          safe [ccell  dis  rslt]
	   "340   (BC_1, *,          internal,      X)," &
	   "341   (BC_2, *,          internal,      X)," &
	   "342   (BC_1, *,          internal,      X)," &
	   "343   (BC_1, *,          internal,      X)," &
	   "344   (BC_2, *,          internal,      X)," &
	   "345   (BC_1, *,          internal,      X)," &
	   "346   (BC_1, *,          internal,      X)," &
	   "347   (BC_2, *,          internal,      X)," &
	   "348   (BC_1, *,          internal,      X)," &
	   "349   (BC_1, *,          internal,      X)," &
	   "350   (BC_2, *,          internal,      X)," &
	   "351   (BC_1, EMU,        output3,       X,    352,   0,   Z)," &
	   "352   (BC_1, *,          control,       0)," &
	   "353   (BC_3, *,          internal,      X)," &
	   "354   (BC_1, DATA0,      output3,       X,    355,   0,   Z)," &
	   "355   (BC_1, *,          control,       0)," &
	   "356   (BC_2, DATA0,      input,         X)," &
	   "357   (BC_1, DATA1,      output3,       X,    358,   0,   Z)," &
	   "358   (BC_1, *,          control,       0)," &
	   "359   (BC_2, DATA1,      input,         X)," &
	-- num    cell   port    func          safe [ccell  dis  rslt]
	   "360   (BC_1, DATA2,      output3,       X,    361,   0,   Z)," &
	   "361   (BC_1, *,          control,       0)," &
	   "362   (BC_2, DATA2,      input,         X)," &
	   "363   (BC_1, DATA3,      output3,       X,    364,   0,   Z)," &
	   "364   (BC_1, *,          control,       0)," &
	   "365   (BC_2, DATA3,      input,         X)," &
	   "366   (BC_1, DATA4,      output3,       X,    367,   0,   Z)," &
	   "367   (BC_1, *,          control,       0)," &
	   "368   (BC_2, DATA4,      input,         X)," &
	   "369   (BC_1, DATA5,      output3,       X,    370,   0,   Z)," &
	   "370   (BC_1, *,          control,       0)," &
	   "371   (BC_2, DATA5,      input,         X)," &
	   "372   (BC_1, DATA6,      output3,       X,    373,   0,   Z)," &
	   "373   (BC_1, *,          control,       0)," &
	   "374   (BC_2, DATA6,      input,         X)," &
	   "375   (BC_1, DATA7,      output3,       X,    376,   0,   Z)," &
	   "376   (BC_1, *,          control,       0)," &
	   "377   (BC_2, DATA7,      input,         X)," &
	   "378   (BC_1, SDCLK0,     output3,       X,    379,   0,   Z)," &
	   "379   (BC_1, *,          control,       0)," &
	-- num    cell   port    func          safe [ccell  dis  rslt]
	   "380   (BC_2, SDCLK0,     input,         X)," &
	   "381   (BC_1, DATA8,      output3,       X,    382,   0,   Z)," &
	   "382   (BC_1, *,          control,       0)," &
	   "383   (BC_2, DATA8,      input,         X)," &
	   "384   (BC_1, DATA9,      output3,       X,    385,   0,   Z)," &
	   "385   (BC_1, *,          control,       0)," &
	   "386   (BC_2, DATA9,      input,         X)," &
	   "387   (BC_1, DATA10,     output3,       X,    388,   0,   Z)," &
	   "388   (BC_1, *,          control,       0)," &
	   "389   (BC_2, DATA10,     input,         X)," &
	   "390   (BC_1, DATA11,     output3,       X,    391,   0,   Z)," &
	   "391   (BC_1, *,          control,       0)," &
	   "392   (BC_2, DATA11,     input,         X)," &
	   "393   (BC_1, DATA12,     output3,       X,    394,   0,   Z)," &
	   "394   (BC_1, *,          control,       0)," &
	   "395   (BC_2, DATA12,     input,         X)," &
	   "396   (BC_1, DATA13,     output3,       X,    397,   0,   Z)," &
	   "397   (BC_1, *,          control,       0)," &
	   "398   (BC_2, DATA13,     input,         X)," &
	   "399   (BC_1, DATA14,     output3,       X,    400,   0,   Z)," &
	-- num    cell   port    func          safe [ccell  dis  rslt]
	   "400   (BC_1, *,          control,       0)," &
	   "401   (BC_2, DATA14,     input,         X)," &
	   "402   (BC_1, DATA15,     output3,       X,    403,   0,   Z)," &
	   "403   (BC_1, *,          control,       0)," &
	   "404   (BC_2, DATA15,     input,         X)," &
	   "405   (BC_1, SDWE,       output3,       X,    406,   0,   Z)," &
	   "406   (BC_1, *,          control,       0)," &
	   "407   (BC_3, *,          internal,      X)," &
	   "408   (BC_3, *,          internal,      X)," &
	   "409   (BC_3, *,          internal,      X)," &
	   "410   (BC_2, RESET,      input,         X)," &
	   "411   (BC_1, SDRAS,      output3,       X,    412,   0,   Z)," &
	   "412   (BC_1, *,          control,       0)," &
	   "413   (BC_3, *,          internal,      X)," &
	   "414   (BC_1, SDCAS,      output3,       X,    415,   0,   Z)," &
	   "415   (BC_1, *,          control,       0)," &
	   "416   (BC_3, *,          internal,      X)," &
	   "417   (BC_3, *,          internal,      X)";

end ADSP_21479;

This library contains 7714 BSDL files (for 6086 distinct entities) from 64 vendors
Last BSDL model (CY7C1512KV18) was added on Sep 15, 2017 14:30
info@bsdl.info