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--
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-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
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--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
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--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
--
-- BSDL file for device XC7Z010, package DIE_BOND
-- Generated by bsdlnet Version 1.10
-- Generated on Tue Jul 10, 2012 17:04:12 IST
-- Generated using schematic at v32_top/xc7z010/schematic
-- Schematic date = 2012-06-08 14:17:25
-- Schematic ICM_VARIANT = 28t_n1
-- Package File date =
------------------------------------------------------------------------
-- Modification History
-- | CR # N/A
-- | Details - Initial Release
------------------------------------------------------------------------
-- | CR # 682613
-- | Date: 10/25/12
-- | Details - Changed PS_VREF_MIO label to PS_MIO_VREF.
------------------------------------------------------------------------
--
-- For technical support, http://support.xilinx.com -> enter text 'bsdl'
-- in the text search box at the left of the page. If none of
-- these records resolve your problem you should open a web support case
-- or contact our technical support at:
--
-- North America 1-800-255-7778 hotline@xilinx.com
-- United Kingdom +44 870 7350 610 eurosupport@xilinx.com
-- France (33) 1 3463 0100 eurosupport@xilinx.com
-- Germany (49) 89 991 54930 eurosupport@xilinx.com
-- Japan (81) 3-3297-9163 jhotline@xilinx.com
--
-- This BSDL file reflects the pre-configuration JTAG behavior. To reflect
-- the post-configuration JTAG behavior (if any), edit this file as described
-- below. Many of these changes are demonstrated by commented-out template
-- lines preceeding the lines they would replace:
--
-- 1. Enable USER instructions as appropriate (see below).
-- 2. Set disable result of all pads as configured.
-- 3. Set safe state of boundary cells as necessary.
-- 4. Rename entity if necessary to avoid name collisions.
-- 5. Modify USERCODE value in USERCODE_REGISTER declaration.
--
-- To prevent losing the current configuration, the boundary scan
-- test vectors should keep the PROGRAM_B pin high.
--
-- PROGRAM_B can only be captured, not updated. The value
-- at the pin is always used by the device.
--
-- All IOBs prior to configuration, and unused and output-only IOBs following
-- configuration, will sense their pad values during boundary-scan with an CMOS
-- input buffer. In order to properly capture a logic high value at one
-- of these IOBs into its input boundary scan cell, please refer to the
-- datasheet and user guide for proper input levels.
--
-- For post-configuration boundary scan only: If an IOB is configured to use
-- an input standard that uses VREF pins, then the boundary scan test vectors
-- must keep the used VREF pins 3-stated.
----------------------------------
-- BSDL File for P1149.6 Standard.
----------------------------------
-- ----------------------------------------------------------------------
-- This BSDL file has been checked and verified by JTAG Technologies B.V.
-- on 2012-08-23, for syntactical and semantic compliance with
-- IEEE standards 1149.1 and 1149.6
-- using bsdl32.dll 1.6.2.0 - 20120208 Win32
-- copyright (c) 2009 JTAG Technologies B.V., All rights reserved
-- ----------------------------------------------------------------------
entity XC7Z010 is
-- Generic Parameter
generic (PHYSICAL_PIN_MAP : string := "DIE_BOND" );
-- Logical Port Description
port (
RSVDGND_0: inout bit;
CFGBVS_0: in bit;
DONE_0: inout bit;
GND: linkage bit;
GNDADC_0: linkage bit;
INIT_B_0: inout bit;
RSVDVCC3_0: in bit;
RSVDVCC2_0: in bit;
RSVDVCC1_0: in bit;
NOCONNECT: linkage bit_vector (1 to 3);
PROGRAM_B: in bit; -- PROGRAM_B_0
PSS_PWR_POR_B: linkage bit;
PS_CLK: in bit;
PS_DDR_A0: inout bit;
PS_DDR_A1: inout bit;
PS_DDR_A10: inout bit;
PS_DDR_A11: inout bit;
PS_DDR_A12: inout bit;
PS_DDR_A13: inout bit;
PS_DDR_A14: inout bit;
PS_DDR_A2: inout bit;
PS_DDR_A3: inout bit;
PS_DDR_A4: inout bit;
PS_DDR_A5: inout bit;
PS_DDR_A6: inout bit;
PS_DDR_A7: inout bit;
PS_DDR_A8: inout bit;
PS_DDR_A9: inout bit;
PS_DDR_BA0: inout bit;
PS_DDR_BA1: inout bit;
PS_DDR_BA2: inout bit;
PS_DDR_CAS_B: inout bit;
PS_DDR_CKE: inout bit;
PS_DDR_CKN: inout bit;
PS_DDR_CKP: inout bit;
PS_DDR_CS_B: inout bit;
PS_DDR_DM0: inout bit;
PS_DDR_DM1: inout bit;
PS_DDR_DM2: inout bit;
PS_DDR_DM3: inout bit;
PS_DDR_DQ0: inout bit;
PS_DDR_DQ1: inout bit;
PS_DDR_DQ10: inout bit;
PS_DDR_DQ11: inout bit;
PS_DDR_DQ12: inout bit;
PS_DDR_DQ13: inout bit;
PS_DDR_DQ14: inout bit;
PS_DDR_DQ15: inout bit;
PS_DDR_DQ16: inout bit;
PS_DDR_DQ17: inout bit;
PS_DDR_DQ18: inout bit;
PS_DDR_DQ19: inout bit;
PS_DDR_DQ2: inout bit;
PS_DDR_DQ20: inout bit;
PS_DDR_DQ21: inout bit;
PS_DDR_DQ22: inout bit;
PS_DDR_DQ23: inout bit;
PS_DDR_DQ24: inout bit;
PS_DDR_DQ25: inout bit;
PS_DDR_DQ26: inout bit;
PS_DDR_DQ27: inout bit;
PS_DDR_DQ28: inout bit;
PS_DDR_DQ29: inout bit;
PS_DDR_DQ3: inout bit;
PS_DDR_DQ30: inout bit;
PS_DDR_DQ31: inout bit;
PS_DDR_DQ4: inout bit;
PS_DDR_DQ5: inout bit;
PS_DDR_DQ6: inout bit;
PS_DDR_DQ7: inout bit;
PS_DDR_DQ8: inout bit;
PS_DDR_DQ9: inout bit;
PS_DDR_DQS_N0: inout bit;
PS_DDR_DQS_N1: inout bit;
PS_DDR_DQS_N2: inout bit;
PS_DDR_DQS_N3: inout bit;
PS_DDR_DQS_P0: inout bit;
PS_DDR_DQS_P1: inout bit;
PS_DDR_DQS_P2: inout bit;
PS_DDR_DQS_P3: inout bit;
PS_DDR_DRST_B: inout bit;
PS_DDR_ODT: inout bit;
PS_DDR_RAS_B: inout bit;
PS_DDR_VRN: inout bit;
PS_DDR_VRP: inout bit;
PS_DDR_WE_B: inout bit;
PS_FIFO_WE_IN0_502: in bit;
PS_FIFO_WE_IN1_502: in bit;
PS_FIFO_WE_OUT0_502: inout bit;
PS_FIFO_WE_OUT1_502: inout bit;
PS_MIO0: inout bit;
PS_MIO1: inout bit;
PS_MIO10: inout bit;
PS_MIO11: inout bit;
PS_MIO12: inout bit;
PS_MIO13: inout bit;
PS_MIO14: inout bit;
PS_MIO15: inout bit;
PS_MIO16: inout bit;
PS_MIO17: inout bit;
PS_MIO18: inout bit;
PS_MIO19: inout bit;
PS_MIO2: inout bit;
PS_MIO20: inout bit;
PS_MIO21: inout bit;
PS_MIO22: inout bit;
PS_MIO23: inout bit;
PS_MIO24: inout bit;
PS_MIO25: inout bit;
PS_MIO26: inout bit;
PS_MIO27: inout bit;
PS_MIO28: inout bit;
PS_MIO29: inout bit;
PS_MIO3: inout bit;
PS_MIO30: inout bit;
PS_MIO31: inout bit;
PS_MIO32: inout bit;
PS_MIO33: inout bit;
PS_MIO34: inout bit;
PS_MIO35: inout bit;
PS_MIO36: inout bit;
PS_MIO37: inout bit;
PS_MIO38: inout bit;
PS_MIO39: inout bit;
PS_MIO4: inout bit;
PS_MIO40: inout bit;
PS_MIO41: inout bit;
PS_MIO42: inout bit;
PS_MIO43: inout bit;
PS_MIO44: inout bit;
PS_MIO45: inout bit;
PS_MIO46: inout bit;
PS_MIO47: inout bit;
PS_MIO48: inout bit;
PS_MIO49: inout bit;
PS_MIO5: inout bit;
PS_MIO50: inout bit;
PS_MIO51: inout bit;
PS_MIO52: inout bit;
PS_MIO53: inout bit;
PS_MIO6: inout bit;
PS_MIO7: inout bit;
PS_MIO8: inout bit;
PS_MIO9: inout bit;
PS_POR_B: in bit;
PS_SRST_B: in bit;
PS_VREF0_502: in bit;
PS_VREF1_502: in bit;
PS_VREF2_502: in bit;
PS_VREF3_502: in bit;
PS_MIO_VREF_501: in bit;
TCK: in bit; -- TCK_0
TDI: in bit; -- TDI_0
TDN_0: linkage bit; -- DXN_0
TDO: out bit; -- TDO_0
TDP_0: linkage bit; -- DXP_0
TMS: in bit; -- TMS_0
VCCADC_0: linkage bit;
VCCAUX: linkage bit;
VCCBATT_0: linkage bit;
VCCBRAM: linkage bit;
VCCINT: linkage bit;
VCCO33_0: linkage bit;
VCCO33_34: linkage bit;
VCCO33_35: linkage bit;
VCCPAUX: linkage bit;
VCCPFUSE_500: linkage bit;
VCCPINT: linkage bit;
VCCPLL: linkage bit;
VCCPO0_500: linkage bit;
VCCPO1_500: linkage bit;
VN_0: linkage bit;
VP_0: linkage bit;
VREFN_0: linkage bit;
VREFP_0: linkage bit;
IO_PAD1: inout bit; -- PAD1
IO_PAD2: inout bit; -- PAD2
IO_PAD3: inout bit; -- PAD3
IO_PAD4: inout bit; -- PAD4
IO_PAD5: inout bit; -- PAD5
IO_PAD6: inout bit; -- PAD6
IO_PAD7: inout bit; -- PAD7
IO_PAD8: inout bit; -- PAD8
IO_PAD9: inout bit; -- PAD9
IO_PAD10: inout bit; -- PAD10
IO_PAD11: inout bit; -- PAD11
IO_PAD12: inout bit; -- PAD12
IO_PAD13: inout bit; -- PAD13
IO_PAD14: inout bit; -- PAD14
IO_PAD15: inout bit; -- PAD15
IO_PAD16: inout bit; -- PAD16
IO_PAD17: inout bit; -- PAD17
IO_PAD18: inout bit; -- PAD18
IO_PAD19: inout bit; -- PAD19
IO_PAD20: inout bit; -- PAD20
IO_PAD21: inout bit; -- PAD21
IO_PAD22: inout bit; -- PAD22
IO_PAD23: inout bit; -- PAD23
IO_PAD24: inout bit; -- PAD24
IO_PAD25: inout bit; -- PAD25
IO_PAD26: inout bit; -- PAD26
IO_PAD27: inout bit; -- PAD27
IO_PAD28: inout bit; -- PAD28
IO_PAD29: inout bit; -- PAD29
IO_PAD30: inout bit; -- PAD30
IO_PAD31: inout bit; -- PAD31
IO_PAD32: inout bit; -- PAD32
IO_PAD33: inout bit; -- PAD33
IO_PAD34: inout bit; -- PAD34
IO_PAD35: inout bit; -- PAD35
IO_PAD36: inout bit; -- PAD36
IO_PAD37: inout bit; -- PAD37
IO_PAD38: inout bit; -- PAD38
IO_PAD39: inout bit; -- PAD39
IO_PAD40: inout bit; -- PAD40
IO_PAD41: inout bit; -- PAD41
IO_PAD42: inout bit; -- PAD42
IO_PAD43: inout bit; -- PAD43
IO_PAD44: inout bit; -- PAD44
IO_PAD45: inout bit; -- PAD45
IO_PAD46: inout bit; -- PAD46
IO_PAD47: inout bit; -- PAD47
IO_PAD48: inout bit; -- PAD48
IO_PAD49: inout bit; -- PAD49
IO_PAD50: inout bit; -- PAD50
IO_PAD51: inout bit; -- PAD51
IO_PAD52: inout bit; -- PAD52
IO_PAD53: inout bit; -- PAD53
IO_PAD54: inout bit; -- PAD54
IO_PAD55: inout bit; -- PAD55
IO_PAD56: inout bit; -- PAD56
IO_PAD57: inout bit; -- PAD57
IO_PAD58: inout bit; -- PAD58
IO_PAD59: inout bit; -- PAD59
IO_PAD60: inout bit; -- PAD60
IO_PAD61: inout bit; -- PAD61
IO_PAD62: inout bit; -- PAD62
IO_PAD63: inout bit; -- PAD63
IO_PAD64: inout bit; -- PAD64
IO_PAD65: inout bit; -- PAD65
IO_PAD66: inout bit; -- PAD66
IO_PAD67: inout bit; -- PAD67
IO_PAD68: inout bit; -- PAD68
IO_PAD69: inout bit; -- PAD69
IO_PAD70: inout bit; -- PAD70
IO_PAD71: inout bit; -- PAD71
IO_PAD72: inout bit; -- PAD72
IO_PAD73: inout bit; -- PAD73
IO_PAD74: inout bit; -- PAD74
IO_PAD75: inout bit; -- PAD75
IO_PAD76: inout bit; -- PAD76
IO_PAD77: inout bit; -- PAD77
IO_PAD78: inout bit; -- PAD78
IO_PAD79: inout bit; -- PAD79
IO_PAD80: inout bit; -- PAD80
IO_PAD81: inout bit; -- PAD81
IO_PAD82: inout bit; -- PAD82
IO_PAD83: inout bit; -- PAD83
IO_PAD84: inout bit; -- PAD84
IO_PAD85: inout bit; -- PAD85
IO_PAD86: inout bit; -- PAD86
IO_PAD87: inout bit; -- PAD87
IO_PAD88: inout bit; -- PAD88
IO_PAD89: inout bit; -- PAD89
IO_PAD90: inout bit; -- PAD90
IO_PAD91: inout bit; -- PAD91
IO_PAD92: inout bit; -- PAD92
IO_PAD93: inout bit; -- PAD93
IO_PAD94: inout bit; -- PAD94
IO_PAD95: inout bit; -- PAD95
IO_PAD96: inout bit; -- PAD96
IO_PAD97: inout bit; -- PAD97
IO_PAD98: inout bit; -- PAD98
IO_PAD99: inout bit; -- PAD99
IO_PAD100: inout bit -- PAD100
); --end port list
-- Use Statements
use STD_1149_1_2001.all;
use STD_1149_6_2003.all;
-- Component Conformance Statement(s)
attribute COMPONENT_CONFORMANCE of XC7Z010 : entity is
"STD_1149_1_2001";
-- Device Package Pin Mappings
attribute PIN_MAP of XC7Z010 : entity is PHYSICAL_PIN_MAP;
constant DIE_BOND: PIN_MAP_STRING:=
"RSVDGND_0:BARE1," &
"CFGBVS_0:BARE2," &
"DONE_0:BARE3," &
"GND:BARE4," &
"GNDADC_0:BARE5," &
"INIT_B_0:BARE6," &
"RSVDVCC3_0:BARE7," &
"RSVDVCC2_0:BARE8," &
"RSVDVCC1_0:BARE9," &
"NOCONNECT:(BARE10,BARE11,BARE12)," &
"PROGRAM_B:BARE13," &
"PSS_PWR_POR_B:BARE14," &
"PS_CLK:BARE15," &
"PS_DDR_A0:BARE16," &
"PS_DDR_A1:BARE17," &
"PS_DDR_A10:BARE18," &
"PS_DDR_A11:BARE19," &
"PS_DDR_A12:BARE20," &
"PS_DDR_A13:BARE21," &
"PS_DDR_A14:BARE22," &
"PS_DDR_A2:BARE23," &
"PS_DDR_A3:BARE24," &
"PS_DDR_A4:BARE25," &
"PS_DDR_A5:BARE26," &
"PS_DDR_A6:BARE27," &
"PS_DDR_A7:BARE28," &
"PS_DDR_A8:BARE29," &
"PS_DDR_A9:BARE30," &
"PS_DDR_BA0:BARE31," &
"PS_DDR_BA1:BARE32," &
"PS_DDR_BA2:BARE33," &
"PS_DDR_CAS_B:BARE34," &
"PS_DDR_CKE:BARE35," &
"PS_DDR_CKN:BARE36," &
"PS_DDR_CKP:BARE37," &
"PS_DDR_CS_B:BARE38," &
"PS_DDR_DM0:BARE39," &
"PS_DDR_DM1:BARE40," &
"PS_DDR_DM2:BARE41," &
"PS_DDR_DM3:BARE42," &
"PS_DDR_DQ0:BARE43," &
"PS_DDR_DQ1:BARE44," &
"PS_DDR_DQ10:BARE45," &
"PS_DDR_DQ11:BARE46," &
"PS_DDR_DQ12:BARE47," &
"PS_DDR_DQ13:BARE48," &
"PS_DDR_DQ14:BARE49," &
"PS_DDR_DQ15:BARE50," &
"PS_DDR_DQ16:BARE51," &
"PS_DDR_DQ17:BARE52," &
"PS_DDR_DQ18:BARE53," &
"PS_DDR_DQ19:BARE54," &
"PS_DDR_DQ2:BARE55," &
"PS_DDR_DQ20:BARE56," &
"PS_DDR_DQ21:BARE57," &
"PS_DDR_DQ22:BARE58," &
"PS_DDR_DQ23:BARE59," &
"PS_DDR_DQ24:BARE60," &
"PS_DDR_DQ25:BARE61," &
"PS_DDR_DQ26:BARE62," &
"PS_DDR_DQ27:BARE63," &
"PS_DDR_DQ28:BARE64," &
"PS_DDR_DQ29:BARE65," &
"PS_DDR_DQ3:BARE66," &
"PS_DDR_DQ30:BARE67," &
"PS_DDR_DQ31:BARE68," &
"PS_DDR_DQ4:BARE69," &
"PS_DDR_DQ5:BARE70," &
"PS_DDR_DQ6:BARE71," &
"PS_DDR_DQ7:BARE72," &
"PS_DDR_DQ8:BARE73," &
"PS_DDR_DQ9:BARE74," &
"PS_DDR_DQS_N0:BARE75," &
"PS_DDR_DQS_N1:BARE76," &
"PS_DDR_DQS_N2:BARE77," &
"PS_DDR_DQS_N3:BARE78," &
"PS_DDR_DQS_P0:BARE79," &
"PS_DDR_DQS_P1:BARE80," &
"PS_DDR_DQS_P2:BARE81," &
"PS_DDR_DQS_P3:BARE82," &
"PS_DDR_DRST_B:BARE83," &
"PS_DDR_ODT:BARE84," &
"PS_DDR_RAS_B:BARE85," &
"PS_DDR_VRN:BARE86," &
"PS_DDR_VRP:BARE87," &
"PS_DDR_WE_B:BARE88," &
"PS_FIFO_WE_IN0_502:BARE89," &
"PS_FIFO_WE_IN1_502:BARE90," &
"PS_FIFO_WE_OUT0_502:BARE91," &
"PS_FIFO_WE_OUT1_502:BARE92," &
"PS_MIO0:BARE93," &
"PS_MIO1:BARE94," &
"PS_MIO10:BARE95," &
"PS_MIO11:BARE96," &
"PS_MIO12:BARE97," &
"PS_MIO13:BARE98," &
"PS_MIO14:BARE99," &
"PS_MIO15:BARE100," &
"PS_MIO16:BARE101," &
"PS_MIO17:BARE102," &
"PS_MIO18:BARE103," &
"PS_MIO19:BARE104," &
"PS_MIO2:BARE105," &
"PS_MIO20:BARE106," &
"PS_MIO21:BARE107," &
"PS_MIO22:BARE108," &
"PS_MIO23:BARE109," &
"PS_MIO24:BARE110," &
"PS_MIO25:BARE111," &
"PS_MIO26:BARE112," &
"PS_MIO27:BARE113," &
"PS_MIO28:BARE114," &
"PS_MIO29:BARE115," &
"PS_MIO3:BARE116," &
"PS_MIO30:BARE117," &
"PS_MIO31:BARE118," &
"PS_MIO32:BARE119," &
"PS_MIO33:BARE120," &
"PS_MIO34:BARE121," &
"PS_MIO35:BARE122," &
"PS_MIO36:BARE123," &
"PS_MIO37:BARE124," &
"PS_MIO38:BARE125," &
"PS_MIO39:BARE126," &
"PS_MIO4:BARE127," &
"PS_MIO40:BARE128," &
"PS_MIO41:BARE129," &
"PS_MIO42:BARE130," &
"PS_MIO43:BARE131," &
"PS_MIO44:BARE132," &
"PS_MIO45:BARE133," &
"PS_MIO46:BARE134," &
"PS_MIO47:BARE135," &
"PS_MIO48:BARE136," &
"PS_MIO49:BARE137," &
"PS_MIO5:BARE138," &
"PS_MIO50:BARE139," &
"PS_MIO51:BARE140," &
"PS_MIO52:BARE141," &
"PS_MIO53:BARE142," &
"PS_MIO6:BARE143," &
"PS_MIO7:BARE144," &
"PS_MIO8:BARE145," &
"PS_MIO9:BARE146," &
"PS_POR_B:BARE147," &
"PS_SRST_B:BARE148," &
"PS_VREF0_502:BARE149," &
"PS_VREF1_502:BARE150," &
"PS_VREF2_502:BARE151," &
"PS_VREF3_502:BARE152," &
"PS_MIO_VREF_501:BARE153," &
"TCK:BARE154," &
"TDI:BARE155," &
"TDN_0:BARE156," &
"TDO:BARE157," &
"TDP_0:BARE158," &
"TMS:BARE159," &
"VCCADC_0:BARE160," &
"VCCAUX:BARE161," &
"VCCBATT_0:BARE162," &
"VCCBRAM:BARE163," &
"VCCINT:BARE164," &
"VCCO33_0:BARE165," &
"VCCO33_34:BARE166," &
"VCCO33_35:BARE167," &
"VCCPAUX:BARE168," &
"VCCPFUSE_500:BARE169," &
"VCCPINT:BARE170," &
"VCCPLL:BARE171," &
"VCCPO0_500:BARE172," &
"VCCPO1_500:BARE173," &
"VN_0:BARE174," &
"VP_0:BARE175," &
"VREFN_0:BARE176," &
"VREFP_0:BARE177," &
"IO_PAD1:BARE178," &
"IO_PAD2:BARE179," &
"IO_PAD3:BARE180," &
"IO_PAD4:BARE181," &
"IO_PAD5:BARE182," &
"IO_PAD6:BARE183," &
"IO_PAD7:BARE184," &
"IO_PAD8:BARE185," &
"IO_PAD9:BARE186," &
"IO_PAD10:BARE187," &
"IO_PAD11:BARE188," &
"IO_PAD12:BARE189," &
"IO_PAD13:BARE190," &
"IO_PAD14:BARE191," &
"IO_PAD15:BARE192," &
"IO_PAD16:BARE193," &
"IO_PAD17:BARE194," &
"IO_PAD18:BARE195," &
"IO_PAD19:BARE196," &
"IO_PAD20:BARE197," &
"IO_PAD21:BARE198," &
"IO_PAD22:BARE199," &
"IO_PAD23:BARE200," &
"IO_PAD24:BARE201," &
"IO_PAD25:BARE202," &
"IO_PAD26:BARE203," &
"IO_PAD27:BARE204," &
"IO_PAD28:BARE205," &
"IO_PAD29:BARE206," &
"IO_PAD30:BARE207," &
"IO_PAD31:BARE208," &
"IO_PAD32:BARE209," &
"IO_PAD33:BARE210," &
"IO_PAD34:BARE211," &
"IO_PAD35:BARE212," &
"IO_PAD36:BARE213," &
"IO_PAD37:BARE214," &
"IO_PAD38:BARE215," &
"IO_PAD39:BARE216," &
"IO_PAD40:BARE217," &
"IO_PAD41:BARE218," &
"IO_PAD42:BARE219," &
"IO_PAD43:BARE220," &
"IO_PAD44:BARE221," &
"IO_PAD45:BARE222," &
"IO_PAD46:BARE223," &
"IO_PAD47:BARE224," &
"IO_PAD48:BARE225," &
"IO_PAD49:BARE226," &
"IO_PAD50:BARE227," &
"IO_PAD51:BARE228," &
"IO_PAD52:BARE229," &
"IO_PAD53:BARE230," &
"IO_PAD54:BARE231," &
"IO_PAD55:BARE232," &
"IO_PAD56:BARE233," &
"IO_PAD57:BARE234," &
"IO_PAD58:BARE235," &
"IO_PAD59:BARE236," &
"IO_PAD60:BARE237," &
"IO_PAD61:BARE238," &
"IO_PAD62:BARE239," &
"IO_PAD63:BARE240," &
"IO_PAD64:BARE241," &
"IO_PAD65:BARE242," &
"IO_PAD66:BARE243," &
"IO_PAD67:BARE244," &
"IO_PAD68:BARE245," &
"IO_PAD69:BARE246," &
"IO_PAD70:BARE247," &
"IO_PAD71:BARE248," &
"IO_PAD72:BARE249," &
"IO_PAD73:BARE250," &
"IO_PAD74:BARE251," &
"IO_PAD75:BARE252," &
"IO_PAD76:BARE253," &
"IO_PAD77:BARE254," &
"IO_PAD78:BARE255," &
"IO_PAD79:BARE256," &
"IO_PAD80:BARE257," &
"IO_PAD81:BARE258," &
"IO_PAD82:BARE259," &
"IO_PAD83:BARE260," &
"IO_PAD84:BARE261," &
"IO_PAD85:BARE262," &
"IO_PAD86:BARE263," &
"IO_PAD87:BARE264," &
"IO_PAD88:BARE265," &
"IO_PAD89:BARE266," &
"IO_PAD90:BARE267," &
"IO_PAD91:BARE268," &
"IO_PAD92:BARE269," &
"IO_PAD93:BARE270," &
"IO_PAD94:BARE271," &
"IO_PAD95:BARE272," &
"IO_PAD96:BARE273," &
"IO_PAD97:BARE274," &
"IO_PAD98:BARE275," &
"IO_PAD99:BARE276," &
"IO_PAD100:BARE277";
-- Grouped Port Identification
-- Scan Port Identification
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (66.0e6, BOTH);
-- Compliance-Enable Description
attribute COMPLIANCE_PATTERNS of XC7Z010 : entity is
"(PROGRAM_B) (1)";
-- Instruction Register Description
attribute INSTRUCTION_LENGTH of XC7Z010 : entity is 6;
attribute INSTRUCTION_OPCODE of XC7Z010 : entity is
"IDCODE (001001)," & -- DEVICE_ID
"BYPASS (111111)," & -- BYPASS
"EXTEST (100110)," & -- BOUNDARY
"SAMPLE (000001)," & -- BOUNDARY
"PRELOAD (000001)," & -- Same as SAMPLE
"USERCODE (001000)," & -- DEVICE_ID
"HIGHZ (001010)," & -- BYPASS
"EXTEST_PULSE (111100)," & -- BOUNDARY
"EXTEST_TRAIN (111101)," & -- BOUNDARY
"ISC_ENABLE (010000)," & -- ISC_CONFIG
"ISC_PROGRAM (010001)," & -- ISC_PDATA
"ISC_NOOP (010100)," & -- ISC_DEFAULT
"XSC_READ_RSVD (010101)," & -- PRIVATE
"ISC_DISABLE (010110)," & -- ISC_CONFIG
"XSC_PROGRAM_KEY (010010)," & -- XSC_KEY_DATA
"XSC_DNA (010111)," & -- DNA
"CFG_OUT (000100)," & -- Not available during configuration with another mode.
"CFG_IN (000101)," & -- Not available during configuration with another mode.
"JPROGRAM (001011)," & -- Not available during configuration with another mode.
"JSTART (001100)," & -- Not available during configuration with another mode.
"JSHUTDOWN (001101)," & -- Not available during configuration with another mode.
"FUSE_CTS (110000)," & -- PRIVATE
"FUSE_KEY (110001)," & -- PRIVATE
"FUSE_DNA (110010)," & -- PRIVATE
"FUSE_USER (110011)," & -- PRIVATE
"FUSE_CNTL (110100)," & -- PRIVATE
"USER1 (000010)," & -- Not available until after configuration
"USER2 (000011)," & -- Not available until after configuration
"USER3 (100010)," & -- Not available until after configuration
"USER4 (100011)," & -- Not available until after configuration
"XADC_DRP (110111)," & -- PRIVATE
"INTEST_RSVD (000111)"; -- PRIVATE
attribute INSTRUCTION_CAPTURE of XC7Z010 : entity is
-- Bit 5 is 1 when DONE is released (part of startup sequence)
-- Bit 4 is 1 if house-cleaning is complete
-- Bit 3 is ISC_Enabled
-- Bit 2 is ISC_Done
"XXXX01";
attribute INSTRUCTION_PRIVATE of XC7Z010 : entity is
-- If the device is configured, and a USER instruction is implemented
-- and not private to the FPGA designer, then it should be removed
-- from INSTRUCTION_PRIVATE, and the target register should be defined
-- in REGISTER_ACCESS.
"ISC_ENABLE," &
"ISC_PROGRAM," &
"ISC_NOOP," &
"XSC_READ_RSVD," &
"ISC_DISABLE," &
"XSC_PROGRAM_KEY," &
"XSC_DNA," &
"CFG_OUT," &
"CFG_IN," &
"JPROGRAM," &
"JSTART," &
"JSHUTDOWN," &
"FUSE_CTS," &
"FUSE_KEY," &
"FUSE_DNA," &
"FUSE_USER," &
"FUSE_CNTL," &
"USER1," &
"USER2," &
"USER3," &
"USER4," &
"XADC_DRP," &
"INTEST_RSVD";
-- Optional Register Description
attribute IDCODE_REGISTER of XC7Z010 : entity is
"XXXX" & -- version
"0011011" & -- family
"100100010" & -- array size
"00001001001" & -- manufacturer
"1"; -- required by 1149.1
attribute USERCODE_REGISTER of XC7Z010 : entity is
"XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX";
-- Register Access Description
attribute REGISTER_ACCESS of XC7Z010 : entity is
-- "<reg_name>[<length>] (USER1)," &
-- "<reg_name>[<length>] (USER2)," &
-- "<reg_name>[<length>] (USER3)," &
-- "<reg_name>[<length>] (USER4)," &
"DATAREG[57] (XSC_DNA)," &
"BYPASS (HIGHZ,BYPASS)," &
"DEVICE_ID (USERCODE,IDCODE)," &
"BOUNDARY (SAMPLE,PRELOAD,EXTEST,EXTEST_PULSE,EXTEST_TRAIN)";
-- Boundary-Scan Register Description
attribute BOUNDARY_LENGTH of XC7Z010 : entity is 770;
attribute BOUNDARY_REGISTER of XC7Z010 : entity is
-- cellnum (type, port, function, safe[, ccell, disval, disrslt])
" 0 (BC_2, *, controlr, 1)," &
" 1 (BC_2, RSVDGND_0, output3, X, 0, 1, Z)," &
" 2 (BC_2, RSVDGND_0, input, X)," &
" 3 (BC_2, RSVDVCC3_0, input, X)," &
" 4 (BC_2, RSVDVCC2_0, input, X)," &
" 5 (BC_2, RSVDVCC1_0, input, X)," &
" 6 (BC_2, CFGBVS_0, input, X)," &
" 7 (BC_2, *, internal, 1)," & -- PROGRAM_B
" 8 (BC_2, *, controlr, 1)," &
" 9 (BC_2, INIT_B_0, output3, X, 8, 1, Z)," &
" 10 (BC_2, INIT_B_0, input, X)," &
" 11 (BC_2, *, controlr, 1)," &
" 12 (BC_2, DONE_0, output3, X, 11, 1, Z)," &
" 13 (BC_2, DONE_0, input, X)," &
" 14 (BC_2, *, internal, X)," &
" 15 (BC_2, *, internal, X)," &
" 16 (BC_2, *, internal, X)," &
" 17 (BC_2, *, internal, X)," &
" 18 (BC_2, *, internal, X)," &
" 19 (BC_2, *, internal, X)," &
" 20 (BC_2, *, internal, X)," &
" 21 (BC_2, *, internal, X)," &
" 22 (BC_2, *, internal, X)," &
" 23 (BC_2, *, internal, X)," &
" 24 (BC_2, *, internal, X)," &
" 25 (BC_2, *, internal, X)," &
" 26 (BC_2, *, controlr, 1)," &
" 27 (BC_2, IO_PAD100, output3, X, 26, 1, Z)," & -- PAD100
" 28 (BC_2, IO_PAD100, input, X)," & -- PAD100
" 29 (BC_2, *, controlr, 1)," &
" 30 (BC_2, IO_PAD99, output3, X, 29, 1, Z)," & -- PAD99
" 31 (BC_2, IO_PAD99, input, X)," & -- PAD99
" 32 (BC_2, *, controlr, 1)," &
" 33 (BC_2, IO_PAD98, output3, X, 32, 1, Z)," & -- PAD98
" 34 (BC_2, IO_PAD98, input, X)," & -- PAD98
" 35 (BC_2, *, controlr, 1)," &
" 36 (BC_2, IO_PAD97, output3, X, 35, 1, Z)," & -- PAD97
" 37 (BC_2, IO_PAD97, input, X)," & -- PAD97
" 38 (BC_2, *, controlr, 1)," &
" 39 (BC_2, IO_PAD96, output3, X, 38, 1, Z)," & -- PAD96
" 40 (BC_2, IO_PAD96, input, X)," & -- PAD96
" 41 (BC_2, *, controlr, 1)," &
" 42 (BC_2, IO_PAD95, output3, X, 41, 1, Z)," & -- PAD95
" 43 (BC_2, IO_PAD95, input, X)," & -- PAD95
" 44 (BC_2, *, controlr, 1)," &
" 45 (BC_2, IO_PAD94, output3, X, 44, 1, Z)," & -- PAD94
" 46 (BC_2, IO_PAD94, input, X)," & -- PAD94
" 47 (BC_2, *, controlr, 1)," &
" 48 (BC_2, IO_PAD93, output3, X, 47, 1, Z)," & -- PAD93
" 49 (BC_2, IO_PAD93, input, X)," & -- PAD93
" 50 (BC_2, *, controlr, 1)," &
" 51 (BC_2, IO_PAD92, output3, X, 50, 1, Z)," & -- PAD92
" 52 (BC_2, IO_PAD92, input, X)," & -- PAD92
" 53 (BC_2, *, controlr, 1)," &
" 54 (BC_2, IO_PAD91, output3, X, 53, 1, Z)," & -- PAD91
" 55 (BC_2, IO_PAD91, input, X)," & -- PAD91
" 56 (BC_2, *, controlr, 1)," &
" 57 (BC_2, IO_PAD90, output3, X, 56, 1, Z)," & -- PAD90
" 58 (BC_2, IO_PAD90, input, X)," & -- PAD90
" 59 (BC_2, *, controlr, 1)," &
" 60 (BC_2, IO_PAD89, output3, X, 59, 1, Z)," & -- PAD89
" 61 (BC_2, IO_PAD89, input, X)," & -- PAD89
" 62 (BC_2, *, controlr, 1)," &
" 63 (BC_2, IO_PAD88, output3, X, 62, 1, Z)," & -- PAD88
" 64 (BC_2, IO_PAD88, input, X)," & -- PAD88
" 65 (BC_2, *, controlr, 1)," &
" 66 (BC_2, IO_PAD87, output3, X, 65, 1, Z)," & -- PAD87
" 67 (BC_2, IO_PAD87, input, X)," & -- PAD87
" 68 (BC_2, *, controlr, 1)," &
" 69 (BC_2, IO_PAD86, output3, X, 68, 1, Z)," & -- PAD86
" 70 (BC_2, IO_PAD86, input, X)," & -- PAD86
" 71 (BC_2, *, controlr, 1)," &
" 72 (BC_2, IO_PAD85, output3, X, 71, 1, Z)," & -- PAD85
" 73 (BC_2, IO_PAD85, input, X)," & -- PAD85
" 74 (BC_2, *, controlr, 1)," &
" 75 (BC_2, IO_PAD84, output3, X, 74, 1, Z)," & -- PAD84
" 76 (BC_2, IO_PAD84, input, X)," & -- PAD84
" 77 (BC_2, *, controlr, 1)," &
" 78 (BC_2, IO_PAD83, output3, X, 77, 1, Z)," & -- PAD83
" 79 (BC_2, IO_PAD83, input, X)," & -- PAD83
" 80 (BC_2, *, controlr, 1)," &
" 81 (BC_2, IO_PAD82, output3, X, 80, 1, Z)," & -- PAD82
" 82 (BC_2, IO_PAD82, input, X)," & -- PAD82
" 83 (BC_2, *, controlr, 1)," &
" 84 (BC_2, IO_PAD81, output3, X, 83, 1, Z)," & -- PAD81
" 85 (BC_2, IO_PAD81, input, X)," & -- PAD81
" 86 (BC_2, *, controlr, 1)," &
" 87 (BC_2, IO_PAD80, output3, X, 86, 1, Z)," & -- PAD80
" 88 (BC_2, IO_PAD80, input, X)," & -- PAD80
" 89 (BC_2, *, controlr, 1)," &
" 90 (BC_2, IO_PAD79, output3, X, 89, 1, Z)," & -- PAD79
" 91 (BC_2, IO_PAD79, input, X)," & -- PAD79
" 92 (BC_2, *, controlr, 1)," &
" 93 (BC_2, IO_PAD78, output3, X, 92, 1, Z)," & -- PAD78
" 94 (BC_2, IO_PAD78, input, X)," & -- PAD78
" 95 (BC_2, *, controlr, 1)," &
" 96 (BC_2, IO_PAD77, output3, X, 95, 1, Z)," & -- PAD77
" 97 (BC_2, IO_PAD77, input, X)," & -- PAD77
" 98 (BC_2, *, controlr, 1)," &
" 99 (BC_2, IO_PAD76, output3, X, 98, 1, Z)," & -- PAD76
" 100 (BC_2, IO_PAD76, input, X)," & -- PAD76
" 101 (BC_2, *, controlr, 1)," &
" 102 (BC_2, IO_PAD75, output3, X, 101, 1, Z)," & -- PAD75
" 103 (BC_2, IO_PAD75, input, X)," & -- PAD75
" 104 (BC_2, *, controlr, 1)," &
" 105 (BC_2, IO_PAD74, output3, X, 104, 1, Z)," & -- PAD74
" 106 (BC_2, IO_PAD74, input, X)," & -- PAD74
" 107 (BC_2, *, controlr, 1)," &
" 108 (BC_2, IO_PAD73, output3, X, 107, 1, Z)," & -- PAD73
" 109 (BC_2, IO_PAD73, input, X)," & -- PAD73
" 110 (BC_2, *, controlr, 1)," &
" 111 (BC_2, IO_PAD72, output3, X, 110, 1, Z)," & -- PAD72
" 112 (BC_2, IO_PAD72, input, X)," & -- PAD72
" 113 (BC_2, *, controlr, 1)," &
" 114 (BC_2, IO_PAD71, output3, X, 113, 1, Z)," & -- PAD71
" 115 (BC_2, IO_PAD71, input, X)," & -- PAD71
" 116 (BC_2, *, controlr, 1)," &
" 117 (BC_2, IO_PAD70, output3, X, 116, 1, Z)," & -- PAD70
" 118 (BC_2, IO_PAD70, input, X)," & -- PAD70
" 119 (BC_2, *, controlr, 1)," &
" 120 (BC_2, IO_PAD69, output3, X, 119, 1, Z)," & -- PAD69
" 121 (BC_2, IO_PAD69, input, X)," & -- PAD69
" 122 (BC_2, *, controlr, 1)," &
" 123 (BC_2, IO_PAD68, output3, X, 122, 1, Z)," & -- PAD68
" 124 (BC_2, IO_PAD68, input, X)," & -- PAD68
" 125 (BC_2, *, controlr, 1)," &
" 126 (BC_2, IO_PAD67, output3, X, 125, 1, Z)," & -- PAD67
" 127 (BC_2, IO_PAD67, input, X)," & -- PAD67
" 128 (BC_2, *, controlr, 1)," &
" 129 (BC_2, IO_PAD66, output3, X, 128, 1, Z)," & -- PAD66
" 130 (BC_2, IO_PAD66, input, X)," & -- PAD66
" 131 (BC_2, *, controlr, 1)," &
" 132 (BC_2, IO_PAD65, output3, X, 131, 1, Z)," & -- PAD65
" 133 (BC_2, IO_PAD65, input, X)," & -- PAD65
" 134 (BC_2, *, controlr, 1)," &
" 135 (BC_2, IO_PAD64, output3, X, 134, 1, Z)," & -- PAD64
" 136 (BC_2, IO_PAD64, input, X)," & -- PAD64
" 137 (BC_2, *, controlr, 1)," &
" 138 (BC_2, IO_PAD63, output3, X, 137, 1, Z)," & -- PAD63
" 139 (BC_2, IO_PAD63, input, X)," & -- PAD63
" 140 (BC_2, *, controlr, 1)," &
" 141 (BC_2, IO_PAD62, output3, X, 140, 1, Z)," & -- PAD62
" 142 (BC_2, IO_PAD62, input, X)," & -- PAD62
" 143 (BC_2, *, controlr, 1)," &
" 144 (BC_2, IO_PAD61, output3, X, 143, 1, Z)," & -- PAD61
" 145 (BC_2, IO_PAD61, input, X)," & -- PAD61
" 146 (BC_2, *, controlr, 1)," &
" 147 (BC_2, IO_PAD60, output3, X, 146, 1, Z)," & -- PAD60
" 148 (BC_2, IO_PAD60, input, X)," & -- PAD60
" 149 (BC_2, *, controlr, 1)," &
" 150 (BC_2, IO_PAD59, output3, X, 149, 1, Z)," & -- PAD59
" 151 (BC_2, IO_PAD59, input, X)," & -- PAD59
" 152 (BC_2, *, controlr, 1)," &
" 153 (BC_2, IO_PAD58, output3, X, 152, 1, Z)," & -- PAD58
" 154 (BC_2, IO_PAD58, input, X)," & -- PAD58
" 155 (BC_2, *, controlr, 1)," &
" 156 (BC_2, IO_PAD57, output3, X, 155, 1, Z)," & -- PAD57
" 157 (BC_2, IO_PAD57, input, X)," & -- PAD57
" 158 (BC_2, *, controlr, 1)," &
" 159 (BC_2, IO_PAD56, output3, X, 158, 1, Z)," & -- PAD56
" 160 (BC_2, IO_PAD56, input, X)," & -- PAD56
" 161 (BC_2, *, controlr, 1)," &
" 162 (BC_2, IO_PAD55, output3, X, 161, 1, Z)," & -- PAD55
" 163 (BC_2, IO_PAD55, input, X)," & -- PAD55
" 164 (BC_2, *, controlr, 1)," &
" 165 (BC_2, IO_PAD54, output3, X, 164, 1, Z)," & -- PAD54
" 166 (BC_2, IO_PAD54, input, X)," & -- PAD54
" 167 (BC_2, *, controlr, 1)," &
" 168 (BC_2, IO_PAD53, output3, X, 167, 1, Z)," & -- PAD53
" 169 (BC_2, IO_PAD53, input, X)," & -- PAD53
" 170 (BC_2, *, controlr, 1)," &
" 171 (BC_2, IO_PAD52, output3, X, 170, 1, Z)," & -- PAD52
" 172 (BC_2, IO_PAD52, input, X)," & -- PAD52
" 173 (BC_2, *, controlr, 1)," &
" 174 (BC_2, IO_PAD51, output3, X, 173, 1, Z)," & -- PAD51
" 175 (BC_2, IO_PAD51, input, X)," & -- PAD51
" 176 (BC_2, *, controlr, 1)," &
" 177 (BC_2, IO_PAD50, output3, X, 176, 1, Z)," & -- PAD50
" 178 (BC_2, IO_PAD50, input, X)," & -- PAD50
" 179 (BC_2, *, controlr, 1)," &
" 180 (BC_2, IO_PAD49, output3, X, 179, 1, Z)," & -- PAD49
" 181 (BC_2, IO_PAD49, input, X)," & -- PAD49
" 182 (BC_2, *, controlr, 1)," &
" 183 (BC_2, IO_PAD48, output3, X, 182, 1, Z)," & -- PAD48
" 184 (BC_2, IO_PAD48, input, X)," & -- PAD48
" 185 (BC_2, *, controlr, 1)," &
" 186 (BC_2, IO_PAD47, output3, X, 185, 1, Z)," & -- PAD47
" 187 (BC_2, IO_PAD47, input, X)," & -- PAD47
" 188 (BC_2, *, controlr, 1)," &
" 189 (BC_2, IO_PAD46, output3, X, 188, 1, Z)," & -- PAD46
" 190 (BC_2, IO_PAD46, input, X)," & -- PAD46
" 191 (BC_2, *, controlr, 1)," &
" 192 (BC_2, IO_PAD45, output3, X, 191, 1, Z)," & -- PAD45
" 193 (BC_2, IO_PAD45, input, X)," & -- PAD45
" 194 (BC_2, *, controlr, 1)," &
" 195 (BC_2, IO_PAD44, output3, X, 194, 1, Z)," & -- PAD44
" 196 (BC_2, IO_PAD44, input, X)," & -- PAD44
" 197 (BC_2, *, controlr, 1)," &
" 198 (BC_2, IO_PAD43, output3, X, 197, 1, Z)," & -- PAD43
" 199 (BC_2, IO_PAD43, input, X)," & -- PAD43
" 200 (BC_2, *, controlr, 1)," &
" 201 (BC_2, IO_PAD42, output3, X, 200, 1, Z)," & -- PAD42
" 202 (BC_2, IO_PAD42, input, X)," & -- PAD42
" 203 (BC_2, *, controlr, 1)," &
" 204 (BC_2, IO_PAD41, output3, X, 203, 1, Z)," & -- PAD41
" 205 (BC_2, IO_PAD41, input, X)," & -- PAD41
" 206 (BC_2, *, controlr, 1)," &
" 207 (BC_2, IO_PAD40, output3, X, 206, 1, Z)," & -- PAD40
" 208 (BC_2, IO_PAD40, input, X)," & -- PAD40
" 209 (BC_2, *, controlr, 1)," &
" 210 (BC_2, IO_PAD39, output3, X, 209, 1, Z)," & -- PAD39
" 211 (BC_2, IO_PAD39, input, X)," & -- PAD39
" 212 (BC_2, *, controlr, 1)," &
" 213 (BC_2, IO_PAD38, output3, X, 212, 1, Z)," & -- PAD38
" 214 (BC_2, IO_PAD38, input, X)," & -- PAD38
" 215 (BC_2, *, controlr, 1)," &
" 216 (BC_2, IO_PAD37, output3, X, 215, 1, Z)," & -- PAD37
" 217 (BC_2, IO_PAD37, input, X)," & -- PAD37
" 218 (BC_2, *, controlr, 1)," &
" 219 (BC_2, IO_PAD36, output3, X, 218, 1, Z)," & -- PAD36
" 220 (BC_2, IO_PAD36, input, X)," & -- PAD36
" 221 (BC_2, *, controlr, 1)," &
" 222 (BC_2, IO_PAD35, output3, X, 221, 1, Z)," & -- PAD35
" 223 (BC_2, IO_PAD35, input, X)," & -- PAD35
" 224 (BC_2, *, controlr, 1)," &
" 225 (BC_2, IO_PAD34, output3, X, 224, 1, Z)," & -- PAD34
" 226 (BC_2, IO_PAD34, input, X)," & -- PAD34
" 227 (BC_2, *, controlr, 1)," &
" 228 (BC_2, IO_PAD33, output3, X, 227, 1, Z)," & -- PAD33
" 229 (BC_2, IO_PAD33, input, X)," & -- PAD33
" 230 (BC_2, *, controlr, 1)," &
" 231 (BC_2, IO_PAD32, output3, X, 230, 1, Z)," & -- PAD32
" 232 (BC_2, IO_PAD32, input, X)," & -- PAD32
" 233 (BC_2, *, controlr, 1)," &
" 234 (BC_2, IO_PAD31, output3, X, 233, 1, Z)," & -- PAD31
" 235 (BC_2, IO_PAD31, input, X)," & -- PAD31
" 236 (BC_2, *, controlr, 1)," &
" 237 (BC_2, IO_PAD30, output3, X, 236, 1, Z)," & -- PAD30
" 238 (BC_2, IO_PAD30, input, X)," & -- PAD30
" 239 (BC_2, *, controlr, 1)," &
" 240 (BC_2, IO_PAD29, output3, X, 239, 1, Z)," & -- PAD29
" 241 (BC_2, IO_PAD29, input, X)," & -- PAD29
" 242 (BC_2, *, controlr, 1)," &
" 243 (BC_2, IO_PAD28, output3, X, 242, 1, Z)," & -- PAD28
" 244 (BC_2, IO_PAD28, input, X)," & -- PAD28
" 245 (BC_2, *, controlr, 1)," &
" 246 (BC_2, IO_PAD27, output3, X, 245, 1, Z)," & -- PAD27
" 247 (BC_2, IO_PAD27, input, X)," & -- PAD27
" 248 (BC_2, *, controlr, 1)," &
" 249 (BC_2, IO_PAD26, output3, X, 248, 1, Z)," & -- PAD26
" 250 (BC_2, IO_PAD26, input, X)," & -- PAD26
" 251 (BC_2, *, controlr, 1)," &
" 252 (BC_2, IO_PAD25, output3, X, 251, 1, Z)," & -- PAD25
" 253 (BC_2, IO_PAD25, input, X)," & -- PAD25
" 254 (BC_2, *, controlr, 1)," &
" 255 (BC_2, IO_PAD24, output3, X, 254, 1, Z)," & -- PAD24
" 256 (BC_2, IO_PAD24, input, X)," & -- PAD24
" 257 (BC_2, *, controlr, 1)," &
" 258 (BC_2, IO_PAD23, output3, X, 257, 1, Z)," & -- PAD23
" 259 (BC_2, IO_PAD23, input, X)," & -- PAD23
" 260 (BC_2, *, controlr, 1)," &
" 261 (BC_2, IO_PAD22, output3, X, 260, 1, Z)," & -- PAD22
" 262 (BC_2, IO_PAD22, input, X)," & -- PAD22
" 263 (BC_2, *, controlr, 1)," &
" 264 (BC_2, IO_PAD21, output3, X, 263, 1, Z)," & -- PAD21
" 265 (BC_2, IO_PAD21, input, X)," & -- PAD21
" 266 (BC_2, *, controlr, 1)," &
" 267 (BC_2, IO_PAD20, output3, X, 266, 1, Z)," & -- PAD20
" 268 (BC_2, IO_PAD20, input, X)," & -- PAD20
" 269 (BC_2, *, controlr, 1)," &
" 270 (BC_2, IO_PAD19, output3, X, 269, 1, Z)," & -- PAD19
" 271 (BC_2, IO_PAD19, input, X)," & -- PAD19
" 272 (BC_2, *, controlr, 1)," &
" 273 (BC_2, IO_PAD18, output3, X, 272, 1, Z)," & -- PAD18
" 274 (BC_2, IO_PAD18, input, X)," & -- PAD18
" 275 (BC_2, *, controlr, 1)," &
" 276 (BC_2, IO_PAD17, output3, X, 275, 1, Z)," & -- PAD17
" 277 (BC_2, IO_PAD17, input, X)," & -- PAD17
" 278 (BC_2, *, controlr, 1)," &
" 279 (BC_2, IO_PAD16, output3, X, 278, 1, Z)," & -- PAD16
" 280 (BC_2, IO_PAD16, input, X)," & -- PAD16
" 281 (BC_2, *, controlr, 1)," &
" 282 (BC_2, IO_PAD15, output3, X, 281, 1, Z)," & -- PAD15
" 283 (BC_2, IO_PAD15, input, X)," & -- PAD15
" 284 (BC_2, *, controlr, 1)," &
" 285 (BC_2, IO_PAD14, output3, X, 284, 1, Z)," & -- PAD14
" 286 (BC_2, IO_PAD14, input, X)," & -- PAD14
" 287 (BC_2, *, controlr, 1)," &
" 288 (BC_2, IO_PAD13, output3, X, 287, 1, Z)," & -- PAD13
" 289 (BC_2, IO_PAD13, input, X)," & -- PAD13
" 290 (BC_2, *, controlr, 1)," &
" 291 (BC_2, IO_PAD12, output3, X, 290, 1, Z)," & -- PAD12
" 292 (BC_2, IO_PAD12, input, X)," & -- PAD12
" 293 (BC_2, *, controlr, 1)," &
" 294 (BC_2, IO_PAD11, output3, X, 293, 1, Z)," & -- PAD11
" 295 (BC_2, IO_PAD11, input, X)," & -- PAD11
" 296 (BC_2, *, controlr, 1)," &
" 297 (BC_2, IO_PAD10, output3, X, 296, 1, Z)," & -- PAD10
" 298 (BC_2, IO_PAD10, input, X)," & -- PAD10
" 299 (BC_2, *, controlr, 1)," &
" 300 (BC_2, IO_PAD9, output3, X, 299, 1, Z)," & -- PAD9
" 301 (BC_2, IO_PAD9, input, X)," & -- PAD9
" 302 (BC_2, *, controlr, 1)," &
" 303 (BC_2, IO_PAD8, output3, X, 302, 1, Z)," & -- PAD8
" 304 (BC_2, IO_PAD8, input, X)," & -- PAD8
" 305 (BC_2, *, controlr, 1)," &
" 306 (BC_2, IO_PAD7, output3, X, 305, 1, Z)," & -- PAD7
" 307 (BC_2, IO_PAD7, input, X)," & -- PAD7
" 308 (BC_2, *, controlr, 1)," &
" 309 (BC_2, IO_PAD6, output3, X, 308, 1, Z)," & -- PAD6
" 310 (BC_2, IO_PAD6, input, X)," & -- PAD6
" 311 (BC_2, *, controlr, 1)," &
" 312 (BC_2, IO_PAD5, output3, X, 311, 1, Z)," & -- PAD5
" 313 (BC_2, IO_PAD5, input, X)," & -- PAD5
" 314 (BC_2, *, controlr, 1)," &
" 315 (BC_2, IO_PAD4, output3, X, 314, 1, Z)," & -- PAD4
" 316 (BC_2, IO_PAD4, input, X)," & -- PAD4
" 317 (BC_2, *, controlr, 1)," &
" 318 (BC_2, IO_PAD3, output3, X, 317, 1, Z)," & -- PAD3
" 319 (BC_2, IO_PAD3, input, X)," & -- PAD3
" 320 (BC_2, *, controlr, 1)," &
" 321 (BC_2, IO_PAD2, output3, X, 320, 1, Z)," & -- PAD2
" 322 (BC_2, IO_PAD2, input, X)," & -- PAD2
" 323 (BC_2, *, controlr, 1)," &
" 324 (BC_2, IO_PAD1, output3, X, 323, 1, Z)," & -- PAD1
" 325 (BC_2, IO_PAD1, input, X)," & -- PAD1
" 326 (BC_2, *, internal, X)," &
" 327 (BC_2, *, internal, X)," &
" 328 (BC_2, *, internal, X)," &
" 329 (BC_2, *, internal, X)," &
" 330 (BC_2, *, internal, X)," &
" 331 (BC_2, *, internal, X)," &
" 332 (BC_2, *, internal, X)," &
" 333 (BC_2, *, internal, X)," &
" 334 (BC_2, *, internal, X)," &
" 335 (BC_2, *, internal, X)," &
" 336 (BC_2, *, internal, X)," &
" 337 (BC_2, *, internal, X)," &
" 338 (BC_2, *, internal, X)," &
" 339 (BC_2, *, internal, X)," &
" 340 (BC_2, *, internal, X)," &
" 341 (BC_2, *, internal, X)," &
" 342 (BC_2, *, internal, X)," &
" 343 (BC_2, *, controlr, 1)," &
" 344 (BC_2, PS_DDR_DQ31, output3, X, 343, 1, Z)," &
" 345 (BC_2, PS_DDR_DQ31, input, X)," &
" 346 (BC_2, *, controlr, 1)," &
" 347 (BC_2, PS_DDR_DQ30, output3, X, 346, 1, Z)," &
" 348 (BC_2, PS_DDR_DQ30, input, X)," &
" 349 (BC_2, *, controlr, 1)," &
" 350 (BC_2, PS_DDR_DQ29, output3, X, 349, 1, Z)," &
" 351 (BC_2, PS_DDR_DQ29, input, X)," &
" 352 (BC_2, *, controlr, 1)," &
" 353 (BC_2, PS_DDR_DQ28, output3, X, 352, 1, Z)," &
" 354 (BC_2, PS_DDR_DQ28, input, X)," &
" 355 (BC_2, *, controlr, 1)," &
" 356 (BC_2, PS_DDR_DQS_N3, output3, X, 355, 1, Z)," &
" 357 (BC_2, PS_DDR_DQS_N3, input, X)," &
" 358 (BC_2, *, controlr, 1)," &
" 359 (BC_2, PS_DDR_DQS_P3, output3, X, 358, 1, Z)," &
" 360 (BC_2, PS_DDR_DQS_P3, input, X)," &
" 361 (BC_2, *, internal, 1)," &
" 362 (BC_2, *, internal, X)," &
" 363 (BC_2, PS_VREF3_502, input, X)," &
" 364 (BC_2, *, controlr, 1)," &
" 365 (BC_2, PS_DDR_DM3, output3, X, 364, 1, Z)," &
" 366 (BC_2, PS_DDR_DM3, input, X)," &
" 367 (BC_2, *, controlr, 1)," &
" 368 (BC_2, PS_DDR_DQ27, output3, X, 367, 1, Z)," &
" 369 (BC_2, PS_DDR_DQ27, input, X)," &
" 370 (BC_2, *, controlr, 1)," &
" 371 (BC_2, PS_DDR_DQ26, output3, X, 370, 1, Z)," &
" 372 (BC_2, PS_DDR_DQ26, input, X)," &
" 373 (BC_2, *, controlr, 1)," &
" 374 (BC_2, PS_DDR_DQ25, output3, X, 373, 1, Z)," &
" 375 (BC_2, PS_DDR_DQ25, input, X)," &
" 376 (BC_2, *, controlr, 1)," &
" 377 (BC_2, PS_DDR_DQ24, output3, X, 376, 1, Z)," &
" 378 (BC_2, PS_DDR_DQ24, input, X)," &
" 379 (BC_2, *, controlr, 1)," &
" 380 (BC_2, PS_FIFO_WE_OUT1_502, output3, X, 379, 1, Z)," &
" 381 (BC_2, PS_FIFO_WE_OUT1_502, input, X)," &
" 382 (BC_2, *, internal, 1)," &
" 383 (BC_2, *, internal, X)," &
" 384 (BC_2, PS_FIFO_WE_IN1_502, input, X)," &
" 385 (BC_2, *, controlr, 1)," &
" 386 (BC_2, PS_DDR_DQ23, output3, X, 385, 1, Z)," &
" 387 (BC_2, PS_DDR_DQ23, input, X)," &
" 388 (BC_2, *, controlr, 1)," &
" 389 (BC_2, PS_DDR_DQ22, output3, X, 388, 1, Z)," &
" 390 (BC_2, PS_DDR_DQ22, input, X)," &
" 391 (BC_2, *, controlr, 1)," &
" 392 (BC_2, PS_DDR_DQ21, output3, X, 391, 1, Z)," &
" 393 (BC_2, PS_DDR_DQ21, input, X)," &
" 394 (BC_2, *, controlr, 1)," &
" 395 (BC_2, PS_DDR_DQ20, output3, X, 394, 1, Z)," &
" 396 (BC_2, PS_DDR_DQ20, input, X)," &
" 397 (BC_2, *, controlr, 1)," &
" 398 (BC_2, PS_DDR_DQS_N2, output3, X, 397, 1, Z)," &
" 399 (BC_2, PS_DDR_DQS_N2, input, X)," &
" 400 (BC_2, *, controlr, 1)," &
" 401 (BC_2, PS_DDR_DQS_P2, output3, X, 400, 1, Z)," &
" 402 (BC_2, PS_DDR_DQS_P2, input, X)," &
" 403 (BC_2, *, internal, 1)," &
" 404 (BC_2, *, internal, X)," &
" 405 (BC_2, PS_VREF2_502, input, X)," &
" 406 (BC_2, *, controlr, 1)," &
" 407 (BC_2, PS_DDR_DM2, output3, X, 406, 1, Z)," &
" 408 (BC_2, PS_DDR_DM2, input, X)," &
" 409 (BC_2, *, controlr, 1)," &
" 410 (BC_2, PS_DDR_DQ19, output3, X, 409, 1, Z)," &
" 411 (BC_2, PS_DDR_DQ19, input, X)," &
" 412 (BC_2, *, controlr, 1)," &
" 413 (BC_2, PS_DDR_DQ18, output3, X, 412, 1, Z)," &
" 414 (BC_2, PS_DDR_DQ18, input, X)," &
" 415 (BC_2, *, controlr, 1)," &
" 416 (BC_2, PS_DDR_DQ17, output3, X, 415, 1, Z)," &
" 417 (BC_2, PS_DDR_DQ17, input, X)," &
" 418 (BC_2, *, controlr, 1)," &
" 419 (BC_2, PS_DDR_DQ16, output3, X, 418, 1, Z)," &
" 420 (BC_2, PS_DDR_DQ16, input, X)," &
" 421 (BC_2, *, controlr, 1)," &
" 422 (BC_2, PS_DDR_RAS_B, output3, X, 421, 1, Z)," &
" 423 (BC_2, PS_DDR_RAS_B, input, X)," &
" 424 (BC_2, *, controlr, 1)," &
" 425 (BC_2, PS_DDR_CAS_B, output3, X, 424, 1, Z)," &
" 426 (BC_2, PS_DDR_CAS_B, input, X)," &
" 427 (BC_2, *, controlr, 1)," &
" 428 (BC_2, PS_DDR_WE_B, output3, X, 427, 1, Z)," &
" 429 (BC_2, PS_DDR_WE_B, input, X)," &
" 430 (BC_2, *, controlr, 1)," &
" 431 (BC_2, PS_DDR_CKE, output3, X, 430, 1, Z)," &
" 432 (BC_2, PS_DDR_CKE, input, X)," &
" 433 (BC_2, *, controlr, 1)," &
" 434 (BC_2, PS_DDR_CS_B, output3, X, 433, 1, Z)," &
" 435 (BC_2, PS_DDR_CS_B, input, X)," &
" 436 (BC_2, *, controlr, 1)," &
" 437 (BC_2, PS_DDR_ODT, output3, X, 436, 1, Z)," &
" 438 (BC_2, PS_DDR_ODT, input, X)," &
" 439 (BC_2, *, controlr, 1)," &
" 440 (BC_2, PS_DDR_BA0, output3, X, 439, 1, Z)," &
" 441 (BC_2, PS_DDR_BA0, input, X)," &
" 442 (BC_2, *, controlr, 1)," &
" 443 (BC_2, PS_DDR_BA1, output3, X, 442, 1, Z)," &
" 444 (BC_2, PS_DDR_BA1, input, X)," &
" 445 (BC_2, *, controlr, 1)," &
" 446 (BC_2, PS_DDR_BA2, output3, X, 445, 1, Z)," &
" 447 (BC_2, PS_DDR_BA2, input, X)," &
" 448 (BC_2, *, controlr, 1)," &
" 449 (BC_2, PS_DDR_A0, output3, X, 448, 1, Z)," &
" 450 (BC_2, PS_DDR_A0, input, X)," &
" 451 (BC_2, *, controlr, 1)," &
" 452 (BC_2, PS_DDR_A1, output3, X, 451, 1, Z)," &
" 453 (BC_2, PS_DDR_A1, input, X)," &
" 454 (BC_2, *, controlr, 1)," &
" 455 (BC_2, PS_DDR_A2, output3, X, 454, 1, Z)," &
" 456 (BC_2, PS_DDR_A2, input, X)," &
" 457 (BC_2, *, controlr, 1)," &
" 458 (BC_2, PS_DDR_CKN, output3, X, 457, 1, Z)," &
" 459 (BC_2, PS_DDR_CKN, input, X)," &
" 460 (BC_2, *, controlr, 1)," &
" 461 (BC_2, PS_DDR_CKP, output3, X, 460, 1, Z)," &
" 462 (BC_2, PS_DDR_CKP, input, X)," &
" 463 (BC_2, *, controlr, 1)," &
" 464 (BC_2, PS_DDR_VRN, output3, X, 463, 1, Z)," &
" 465 (BC_2, PS_DDR_VRN, input, X)," &
" 466 (BC_2, *, controlr, 1)," &
" 467 (BC_2, PS_DDR_VRP, output3, X, 466, 1, Z)," &
" 468 (BC_2, PS_DDR_VRP, input, X)," &
" 469 (BC_2, *, controlr, 1)," &
" 470 (BC_2, PS_DDR_A3, output3, X, 469, 1, Z)," &
" 471 (BC_2, PS_DDR_A3, input, X)," &
" 472 (BC_2, *, controlr, 1)," &
" 473 (BC_2, PS_DDR_A4, output3, X, 472, 1, Z)," &
" 474 (BC_2, PS_DDR_A4, input, X)," &
" 475 (BC_2, *, controlr, 1)," &
" 476 (BC_2, PS_DDR_A5, output3, X, 475, 1, Z)," &
" 477 (BC_2, PS_DDR_A5, input, X)," &
" 478 (BC_2, *, controlr, 1)," &
" 479 (BC_2, PS_DDR_A6, output3, X, 478, 1, Z)," &
" 480 (BC_2, PS_DDR_A6, input, X)," &
" 481 (BC_2, *, controlr, 1)," &
" 482 (BC_2, PS_DDR_A7, output3, X, 481, 1, Z)," &
" 483 (BC_2, PS_DDR_A7, input, X)," &
" 484 (BC_2, *, controlr, 1)," &
" 485 (BC_2, PS_DDR_A8, output3, X, 484, 1, Z)," &
" 486 (BC_2, PS_DDR_A8, input, X)," &
" 487 (BC_2, *, controlr, 1)," &
" 488 (BC_2, PS_DDR_A9, output3, X, 487, 1, Z)," &
" 489 (BC_2, PS_DDR_A9, input, X)," &
" 490 (BC_2, *, controlr, 1)," &
" 491 (BC_2, PS_DDR_A10, output3, X, 490, 1, Z)," &
" 492 (BC_2, PS_DDR_A10, input, X)," &
" 493 (BC_2, *, controlr, 1)," &
" 494 (BC_2, PS_DDR_A11, output3, X, 493, 1, Z)," &
" 495 (BC_2, PS_DDR_A11, input, X)," &
" 496 (BC_2, *, controlr, 1)," &
" 497 (BC_2, PS_DDR_A12, output3, X, 496, 1, Z)," &
" 498 (BC_2, PS_DDR_A12, input, X)," &
" 499 (BC_2, *, controlr, 1)," &
" 500 (BC_2, PS_DDR_A13, output3, X, 499, 1, Z)," &
" 501 (BC_2, PS_DDR_A13, input, X)," &
" 502 (BC_2, *, controlr, 1)," &
" 503 (BC_2, PS_DDR_A14, output3, X, 502, 1, Z)," &
" 504 (BC_2, PS_DDR_A14, input, X)," &
" 505 (BC_2, *, controlr, 1)," &
" 506 (BC_2, PS_DDR_DQ15, output3, X, 505, 1, Z)," &
" 507 (BC_2, PS_DDR_DQ15, input, X)," &
" 508 (BC_2, *, controlr, 1)," &
" 509 (BC_2, PS_DDR_DQ14, output3, X, 508, 1, Z)," &
" 510 (BC_2, PS_DDR_DQ14, input, X)," &
" 511 (BC_2, *, controlr, 1)," &
" 512 (BC_2, PS_DDR_DQ13, output3, X, 511, 1, Z)," &
" 513 (BC_2, PS_DDR_DQ13, input, X)," &
" 514 (BC_2, *, controlr, 1)," &
" 515 (BC_2, PS_DDR_DQ12, output3, X, 514, 1, Z)," &
" 516 (BC_2, PS_DDR_DQ12, input, X)," &
" 517 (BC_2, *, controlr, 1)," &
" 518 (BC_2, PS_DDR_DQS_N1, output3, X, 517, 1, Z)," &
" 519 (BC_2, PS_DDR_DQS_N1, input, X)," &
" 520 (BC_2, *, controlr, 1)," &
" 521 (BC_2, PS_DDR_DQS_P1, output3, X, 520, 1, Z)," &
" 522 (BC_2, PS_DDR_DQS_P1, input, X)," &
" 523 (BC_2, *, internal, 1)," &
" 524 (BC_2, *, internal, X)," &
" 525 (BC_2, PS_VREF1_502, input, X)," &
" 526 (BC_2, *, controlr, 1)," &
" 527 (BC_2, PS_DDR_DM1, output3, X, 526, 1, Z)," &
" 528 (BC_2, PS_DDR_DM1, input, X)," &
" 529 (BC_2, *, controlr, 1)," &
" 530 (BC_2, PS_DDR_DQ11, output3, X, 529, 1, Z)," &
" 531 (BC_2, PS_DDR_DQ11, input, X)," &
" 532 (BC_2, *, controlr, 1)," &
" 533 (BC_2, PS_DDR_DQ10, output3, X, 532, 1, Z)," &
" 534 (BC_2, PS_DDR_DQ10, input, X)," &
" 535 (BC_2, *, controlr, 1)," &
" 536 (BC_2, PS_DDR_DQ9, output3, X, 535, 1, Z)," &
" 537 (BC_2, PS_DDR_DQ9, input, X)," &
" 538 (BC_2, *, controlr, 1)," &
" 539 (BC_2, PS_DDR_DQ8, output3, X, 538, 1, Z)," &
" 540 (BC_2, PS_DDR_DQ8, input, X)," &
" 541 (BC_2, *, controlr, 1)," &
" 542 (BC_2, PS_FIFO_WE_OUT0_502, output3, X, 541, 1, Z)," &
" 543 (BC_2, PS_FIFO_WE_OUT0_502, input, X)," &
" 544 (BC_2, *, internal, 1)," &
" 545 (BC_2, *, internal, X)," &
" 546 (BC_2, PS_FIFO_WE_IN0_502, input, X)," &
" 547 (BC_2, *, controlr, 1)," &
" 548 (BC_2, PS_DDR_DQ7, output3, X, 547, 1, Z)," &
" 549 (BC_2, PS_DDR_DQ7, input, X)," &
" 550 (BC_2, *, controlr, 1)," &
" 551 (BC_2, PS_DDR_DQ6, output3, X, 550, 1, Z)," &
" 552 (BC_2, PS_DDR_DQ6, input, X)," &
" 553 (BC_2, *, controlr, 1)," &
" 554 (BC_2, PS_DDR_DQ5, output3, X, 553, 1, Z)," &
" 555 (BC_2, PS_DDR_DQ5, input, X)," &
" 556 (BC_2, *, controlr, 1)," &
" 557 (BC_2, PS_DDR_DQ4, output3, X, 556, 1, Z)," &
" 558 (BC_2, PS_DDR_DQ4, input, X)," &
" 559 (BC_2, *, controlr, 1)," &
" 560 (BC_2, PS_DDR_DQS_N0, output3, X, 559, 1, Z)," &
" 561 (BC_2, PS_DDR_DQS_N0, input, X)," &
" 562 (BC_2, *, controlr, 1)," &
" 563 (BC_2, PS_DDR_DQS_P0, output3, X, 562, 1, Z)," &
" 564 (BC_2, PS_DDR_DQS_P0, input, X)," &
" 565 (BC_2, *, internal, 1)," &
" 566 (BC_2, *, internal, X)," &
" 567 (BC_2, PS_VREF0_502, input, X)," &
" 568 (BC_2, *, controlr, 1)," &
" 569 (BC_2, PS_DDR_DM0, output3, X, 568, 1, Z)," &
" 570 (BC_2, PS_DDR_DM0, input, X)," &
" 571 (BC_2, *, controlr, 1)," &
" 572 (BC_2, PS_DDR_DQ3, output3, X, 571, 1, Z)," &
" 573 (BC_2, PS_DDR_DQ3, input, X)," &
" 574 (BC_2, *, controlr, 1)," &
" 575 (BC_2, PS_DDR_DQ2, output3, X, 574, 1, Z)," &
" 576 (BC_2, PS_DDR_DQ2, input, X)," &
" 577 (BC_2, *, controlr, 1)," &
" 578 (BC_2, PS_DDR_DQ1, output3, X, 577, 1, Z)," &
" 579 (BC_2, PS_DDR_DQ1, input, X)," &
" 580 (BC_2, *, controlr, 1)," &
" 581 (BC_2, PS_DDR_DQ0, output3, X, 580, 1, Z)," &
" 582 (BC_2, PS_DDR_DQ0, input, X)," &
" 583 (BC_2, *, controlr, 1)," &
" 584 (BC_2, PS_DDR_DRST_B, output3, X, 583, 1, Z)," &
" 585 (BC_2, PS_DDR_DRST_B, input, X)," &
" 586 (BC_2, *, controlr, 1)," &
" 587 (BC_2, PS_MIO0, output3, X, 586, 1, Z)," &
" 588 (BC_2, PS_MIO0, input, X)," &
" 589 (BC_2, *, controlr, 1)," &
" 590 (BC_2, PS_MIO1, output3, X, 589, 1, Z)," &
" 591 (BC_2, PS_MIO1, input, X)," &
" 592 (BC_2, *, controlr, 1)," &
" 593 (BC_2, PS_MIO2, output3, X, 592, 1, Z)," &
" 594 (BC_2, PS_MIO2, input, X)," &
" 595 (BC_2, *, controlr, 1)," &
" 596 (BC_2, PS_MIO3, output3, X, 595, 1, Z)," &
" 597 (BC_2, PS_MIO3, input, X)," &
" 598 (BC_2, *, controlr, 1)," &
" 599 (BC_2, PS_MIO4, output3, X, 598, 1, Z)," &
" 600 (BC_2, PS_MIO4, input, X)," &
" 601 (BC_2, *, controlr, 1)," &
" 602 (BC_2, PS_MIO5, output3, X, 601, 1, Z)," &
" 603 (BC_2, PS_MIO5, input, X)," &
" 604 (BC_2, *, controlr, 1)," &
" 605 (BC_2, PS_MIO6, output3, X, 604, 1, Z)," &
" 606 (BC_2, PS_MIO6, input, X)," &
" 607 (BC_2, *, controlr, 1)," &
" 608 (BC_2, PS_MIO7, output3, X, 607, 1, Z)," &
" 609 (BC_2, PS_MIO7, input, X)," &
" 610 (BC_2, *, controlr, 1)," &
" 611 (BC_2, PS_MIO8, output3, X, 610, 1, Z)," &
" 612 (BC_2, PS_MIO8, input, X)," &
" 613 (BC_2, *, controlr, 1)," &
" 614 (BC_2, PS_MIO9, output3, X, 613, 1, Z)," &
" 615 (BC_2, PS_MIO9, input, X)," &
" 616 (BC_2, *, controlr, 1)," &
" 617 (BC_2, PS_MIO10, output3, X, 616, 1, Z)," &
" 618 (BC_2, PS_MIO10, input, X)," &
" 619 (BC_2, *, controlr, 1)," &
" 620 (BC_2, PS_MIO11, output3, X, 619, 1, Z)," &
" 621 (BC_2, PS_MIO11, input, X)," &
" 622 (BC_2, *, controlr, 1)," &
" 623 (BC_2, PS_MIO12, output3, X, 622, 1, Z)," &
" 624 (BC_2, PS_MIO12, input, X)," &
" 625 (BC_2, *, controlr, 1)," &
" 626 (BC_2, PS_MIO13, output3, X, 625, 1, Z)," &
" 627 (BC_2, PS_MIO13, input, X)," &
" 628 (BC_2, *, controlr, 1)," &
" 629 (BC_2, PS_MIO14, output3, X, 628, 1, Z)," &
" 630 (BC_2, PS_MIO14, input, X)," &
" 631 (BC_2, *, controlr, 1)," &
" 632 (BC_2, PS_MIO15, output3, X, 631, 1, Z)," &
" 633 (BC_2, PS_MIO15, input, X)," &
" 634 (BC_2, *, internal, 1)," &
" 635 (BC_2, *, internal, X)," &
" 636 (BC_2, PS_POR_B, input, X)," &
" 637 (BC_2, *, internal, 1)," &
" 638 (BC_2, *, internal, X)," &
" 639 (BC_2, PS_CLK, input, X)," &
" 640 (BC_2, *, controlr, 1)," &
" 641 (BC_2, PS_MIO16, output3, X, 640, 1, Z)," &
" 642 (BC_2, PS_MIO16, input, X)," &
" 643 (BC_2, *, controlr, 1)," &
" 644 (BC_2, PS_MIO17, output3, X, 643, 1, Z)," &
" 645 (BC_2, PS_MIO17, input, X)," &
" 646 (BC_2, *, controlr, 1)," &
" 647 (BC_2, PS_MIO18, output3, X, 646, 1, Z)," &
" 648 (BC_2, PS_MIO18, input, X)," &
" 649 (BC_2, *, controlr, 1)," &
" 650 (BC_2, PS_MIO19, output3, X, 649, 1, Z)," &
" 651 (BC_2, PS_MIO19, input, X)," &
" 652 (BC_2, *, controlr, 1)," &
" 653 (BC_2, PS_MIO20, output3, X, 652, 1, Z)," &
" 654 (BC_2, PS_MIO20, input, X)," &
" 655 (BC_2, *, controlr, 1)," &
" 656 (BC_2, PS_MIO21, output3, X, 655, 1, Z)," &
" 657 (BC_2, PS_MIO21, input, X)," &
" 658 (BC_2, *, controlr, 1)," &
" 659 (BC_2, PS_MIO22, output3, X, 658, 1, Z)," &
" 660 (BC_2, PS_MIO22, input, X)," &
" 661 (BC_2, *, controlr, 1)," &
" 662 (BC_2, PS_MIO23, output3, X, 661, 1, Z)," &
" 663 (BC_2, PS_MIO23, input, X)," &
" 664 (BC_2, *, controlr, 1)," &
" 665 (BC_2, PS_MIO24, output3, X, 664, 1, Z)," &
" 666 (BC_2, PS_MIO24, input, X)," &
" 667 (BC_2, *, controlr, 1)," &
" 668 (BC_2, PS_MIO25, output3, X, 667, 1, Z)," &
" 669 (BC_2, PS_MIO25, input, X)," &
" 670 (BC_2, *, controlr, 1)," &
" 671 (BC_2, PS_MIO26, output3, X, 670, 1, Z)," &
" 672 (BC_2, PS_MIO26, input, X)," &
" 673 (BC_2, *, controlr, 1)," &
" 674 (BC_2, PS_MIO27, output3, X, 673, 1, Z)," &
" 675 (BC_2, PS_MIO27, input, X)," &
" 676 (BC_2, *, controlr, 1)," &
" 677 (BC_2, PS_MIO28, output3, X, 676, 1, Z)," &
" 678 (BC_2, PS_MIO28, input, X)," &
" 679 (BC_2, *, controlr, 1)," &
" 680 (BC_2, PS_MIO29, output3, X, 679, 1, Z)," &
" 681 (BC_2, PS_MIO29, input, X)," &
" 682 (BC_2, *, controlr, 1)," &
" 683 (BC_2, PS_MIO30, output3, X, 682, 1, Z)," &
" 684 (BC_2, PS_MIO30, input, X)," &
" 685 (BC_2, *, controlr, 1)," &
" 686 (BC_2, PS_MIO31, output3, X, 685, 1, Z)," &
" 687 (BC_2, PS_MIO31, input, X)," &
" 688 (BC_2, *, controlr, 1)," &
" 689 (BC_2, PS_MIO32, output3, X, 688, 1, Z)," &
" 690 (BC_2, PS_MIO32, input, X)," &
" 691 (BC_2, *, controlr, 1)," &
" 692 (BC_2, PS_MIO33, output3, X, 691, 1, Z)," &
" 693 (BC_2, PS_MIO33, input, X)," &
" 694 (BC_2, *, controlr, 1)," &
" 695 (BC_2, PS_MIO34, output3, X, 694, 1, Z)," &
" 696 (BC_2, PS_MIO34, input, X)," &
" 697 (BC_2, *, controlr, 1)," &
" 698 (BC_2, PS_MIO35, output3, X, 697, 1, Z)," &
" 699 (BC_2, PS_MIO35, input, X)," &
" 700 (BC_2, *, controlr, 1)," &
" 701 (BC_2, PS_MIO36, output3, X, 700, 1, Z)," &
" 702 (BC_2, PS_MIO36, input, X)," &
" 703 (BC_2, *, internal, 1)," &
" 704 (BC_2, *, internal, X)," &
" 705 (BC_2, PS_MIO_VREF_501, input, X)," &
" 706 (BC_2, *, controlr, 1)," &
" 707 (BC_2, PS_MIO37, output3, X, 706, 1, Z)," &
" 708 (BC_2, PS_MIO37, input, X)," &
" 709 (BC_2, *, controlr, 1)," &
" 710 (BC_2, PS_MIO38, output3, X, 709, 1, Z)," &
" 711 (BC_2, PS_MIO38, input, X)," &
" 712 (BC_2, *, controlr, 1)," &
" 713 (BC_2, PS_MIO39, output3, X, 712, 1, Z)," &
" 714 (BC_2, PS_MIO39, input, X)," &
" 715 (BC_2, *, controlr, 1)," &
" 716 (BC_2, PS_MIO40, output3, X, 715, 1, Z)," &
" 717 (BC_2, PS_MIO40, input, X)," &
" 718 (BC_2, *, controlr, 1)," &
" 719 (BC_2, PS_MIO41, output3, X, 718, 1, Z)," &
" 720 (BC_2, PS_MIO41, input, X)," &
" 721 (BC_2, *, controlr, 1)," &
" 722 (BC_2, PS_MIO42, output3, X, 721, 1, Z)," &
" 723 (BC_2, PS_MIO42, input, X)," &
" 724 (BC_2, *, controlr, 1)," &
" 725 (BC_2, PS_MIO43, output3, X, 724, 1, Z)," &
" 726 (BC_2, PS_MIO43, input, X)," &
" 727 (BC_2, *, controlr, 1)," &
" 728 (BC_2, PS_MIO44, output3, X, 727, 1, Z)," &
" 729 (BC_2, PS_MIO44, input, X)," &
" 730 (BC_2, *, controlr, 1)," &
" 731 (BC_2, PS_MIO45, output3, X, 730, 1, Z)," &
" 732 (BC_2, PS_MIO45, input, X)," &
" 733 (BC_2, *, controlr, 1)," &
" 734 (BC_2, PS_MIO46, output3, X, 733, 1, Z)," &
" 735 (BC_2, PS_MIO46, input, X)," &
" 736 (BC_2, *, controlr, 1)," &
" 737 (BC_2, PS_MIO47, output3, X, 736, 1, Z)," &
" 738 (BC_2, PS_MIO47, input, X)," &
" 739 (BC_2, *, controlr, 1)," &
" 740 (BC_2, PS_MIO48, output3, X, 739, 1, Z)," &
" 741 (BC_2, PS_MIO48, input, X)," &
" 742 (BC_2, *, controlr, 1)," &
" 743 (BC_2, PS_MIO49, output3, X, 742, 1, Z)," &
" 744 (BC_2, PS_MIO49, input, X)," &
" 745 (BC_2, *, controlr, 1)," &
" 746 (BC_2, PS_MIO50, output3, X, 745, 1, Z)," &
" 747 (BC_2, PS_MIO50, input, X)," &
" 748 (BC_2, *, controlr, 1)," &
" 749 (BC_2, PS_MIO51, output3, X, 748, 1, Z)," &
" 750 (BC_2, PS_MIO51, input, X)," &
" 751 (BC_2, *, controlr, 1)," &
" 752 (BC_2, PS_MIO52, output3, X, 751, 1, Z)," &
" 753 (BC_2, PS_MIO52, input, X)," &
" 754 (BC_2, *, controlr, 1)," &
" 755 (BC_2, PS_MIO53, output3, X, 754, 1, Z)," &
" 756 (BC_2, PS_MIO53, input, X)," &
" 757 (BC_2, *, internal, 1)," &
" 758 (BC_2, *, internal, X)," &
" 759 (BC_2, PS_SRST_B, input, X)," &
" 760 (BC_2, *, internal, X)," &
" 761 (BC_2, *, internal, X)," &
" 762 (BC_2, *, internal, X)," &
" 763 (BC_2, *, internal, X)," &
" 764 (BC_2, *, internal, X)," &
" 765 (BC_2, *, internal, X)," &
" 766 (BC_2, *, internal, X)," &
" 767 (BC_2, *, internal, X)," &
" 768 (BC_2, *, internal, X)," &
" 769 (BC_2, *, internal, X)";
-- Advanced I/O Description
attribute AIO_COMPONENT_CONFORMANCE of XC7Z010 : entity is
"STD_1149_6_2003";
attribute AIO_EXTEST_Pulse_Execution of XC7Z010 : entity is
"Wait_Duration TCK 15";
attribute AIO_EXTEST_Train_Execution of XC7Z010 : entity is
"train 30, maximum_time 120.0e-6";
-- Design Warning Section
attribute DESIGN_WARNING of XC7Z010 : entity is
"This is a preliminary BSDL file which has not been verified." &
"When no bitstream is loaded and GTPs are not instantiated," &
"the boundary-scan cells associated with GTPs will not" &
"capture correct state information. To model the boundary-" &
"scan cell behavior correctly post-configuration, use" &
"BSDLanno to modify the BSDL file." &
"This BSDL file must be modified by the FPGA designer in order to" &
"reflect post-configuration behavior (if any)." &
"To avoid losing the current configuration, the boundary scan" &
"test vectors should keep the PROGRAM_B pin" &
"high. If the PROGRAM_B pin goes low by any means," &
"the configuration will be cleared." &
"PROGRAM_B can only be captured, not updated." &
"The value at the pin is always used by the device." &
"In EXTEST, output and tristate values are not captured in the" &
"Capture-DR state - those register cells are unchanged." &
"Differential Serial IO pins do not support INTEST." &
"In INTEST, the pin input values are not captured in the" &
"Capture-DR state - those register cells are unchanged." &
"The output and tristate capture values are not valid until after" &
"the device is configured." &
"The tristate control value is not captured properly when" &
"GTS is activated." &
"The IEEE Std 1149.6 EXTEST_PULSE and EXTEST_TRAIN instructions" &
"require a minimum TCK freq of 15 MHz and min temp of 0C." &
"NOCONNECT pins should not be connected to any supply" &
"or GND. They should be left floating." &
"PSS IOs do not support INTEST" &
"PSS IOs do not support cfg_ts which is asserted for TSC instructions" &
"BSCAN is not available if the PSS power supplies are not applied" &
"PS_POR_B can only be captured, not updated." &
"The value at the pin is always used by the device.";
end XC7Z010;
