--------------------------------------------------------------------------------
-- Freescale Boundary Scan Description Language --
--------------------------------------------------------------------------------
-- Boundary Scan Description Language (IEEE 1149.1b) --
-- --
-- Device : MPC8569E Revision 2 --
-- File Version : B --
-- File created : Generated by Viper version: 2009.12.27 at: Sun Dec 27 09:51:30 2009--
-- Package type : PBGA --
-- BSDL_status : preliminary --
-- --
--------------------------------------------------------------------------------
-- Revision History: --
-- --
-- A - Original version --
-- This BSDL file covers the following products: --
-- MPC8569 rev 2.0 --
-- Update pin names to match hardware spec rev F --
-- changed to Reserved: U20, U21, T22 --
-- changed from Vdd to GND: Y16 --
-- --
-- B - Change IIC2_SCL_SD_CD name to IIC2_SCL_SD_CD_B. --
-- --
--------------------------------------------------------------------------------
-- --
-- NOTE : The DDR DQS pins (D1_MDQS[0:3], D1_MDQS8, D2_MDQS[0:3], D2_MDQS8) --
-- are not IEEE 1149.1 compliant when in receiver mode. --
-- The DQS are only declared to be of port type "out" instead of type "inout".--
-- Board interconnect can be tested with the pins in driver state. --
-- With this restriction, the part will operate in compliance for any patterns--
-- generated. --
-- --
--------------------------------------------------------------------------------
-- --
-- WARNING : INCORRECT VOLTAGE SELECT SETTINGS CAN LEAD TO IRREVERSIBLE --
-- DEVICE DAMAGE. BVDD_VSEL(0), BVDD_VSEL(1), LVDD_VSEL(0) and LVDD_VSEL(1) --
-- voltage selects must be correctly set to match BVDD and LVDD power levels. --
-- --
-- The VSELs are to be set as follows. --
-- --
-- Voltage Select Setting Supply Voltage --
-- BVDD_VSEL[0:1] 00 BVDD = 3.3V --
-- 01 BVDD = 2.5V --
-- 10 BVDD = 1.8V --
-- 11 BVDD = 3.3V --
-- --
-- LVDD_VSEL[0] 0 LVDD1 = 3.3V --
-- 1 LVDD1 = 2.5V --
-- --
-- LVDD_VSEL[1] 0 LVDD2 = 3.3V --
-- 1 LVDD2 = 2.5V --
-- --
-- Refer to the Hardware Spec for more details. --
-- --
--============================================================================--
-- IMPORTANT NOTICE --
-- This information is provided on an AS IS basis and without warranty. --
-- IN NO EVENT SHALL Freescale BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL --
-- DAMAGES ARISING FROM USE OF THIS INFORMATION. THIS DISCLAIMER OF --
-- WARRANTY EXTENDS TO THE USER OF THE INFORMATION, AND TO THEIR CUSTOMERS --
-- OR USERS OF PRODUCTS AND IS IN LIEU OF ALL WARRANTIES WHETHER EXPRESS, --
-- IMPLIED, OR STATUTORY, INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY --
-- OR FITNESS FOR PARTICULAR PURPOSE. --
-- --
-- Freescale does not represent or warrant that the information furnished --
-- hereunder is free of infringement of any third party patents, --
-- copyrights, trade secrets, or other intellectual property rights. --
-- Freescale does not represent or warrant that the information is free of --
-- defect, or that it meets any particular standard, requirements or need --
-- of the user of the infomation or their customers. --
-- --
-- Freescale reserves the right to change the information in this file --
-- without notice. --
-- --
-- --
--============================================================================--
entity MPC8569E is
generic (PHYSICAL_PIN_MAP : string := "PBGA");
-- PORT DESCRIPTION TERMS
-- in = input only
-- out = three-state output (0, Z, 1)
-- buffer = two-state output (0, 1)
-- inout = bidirectional
-- linkage = OTHER (vdd, vss, analog)
--
-- bit = single pin
-- bit_vector = group of pins with suffix 0 to n
port (
ASLEEP: inout bit;
BVDD_VSEL0: in bit;
BVDD_VSEL1: in bit;
CKSTP_IN_B: in bit;
CKSTP_OUT_B: inout bit;
CLK_OUT: out bit;
D1_MA0: inout bit;
D1_MA1: inout bit;
D1_MA10: inout bit;
D1_MA11: inout bit;
D1_MA12: inout bit;
D1_MA13: inout bit;
D1_MA14: inout bit;
D1_MA15: inout bit;
D1_MA2: inout bit;
D1_MA3: inout bit;
D1_MA4: inout bit;
D1_MA5: inout bit;
D1_MA6: inout bit;
D1_MA7: inout bit;
D1_MA8: inout bit;
D1_MA9: inout bit;
D1_MAPAR_ERR_B: inout bit;
D1_MAPAR_OUT: inout bit;
D1_MBA0: inout bit;
D1_MBA1: inout bit;
D1_MBA2: inout bit;
D1_MCAS_B: inout bit;
D1_MCK0: out bit;
D1_MCK1: out bit;
D1_MCK2: out bit;
D1_MCKE0: inout bit;
D1_MCKE1: inout bit;
D1_MCKE2: inout bit;
D1_MCKE3: inout bit;
D1_MCK_B0: inout bit;
D1_MCK_B1: inout bit;
D1_MCK_B2: inout bit;
D1_MCS_B0: inout bit;
D1_MCS_B1: inout bit;
D1_MCS_B2: inout bit;
D1_MCS_B3: inout bit;
D1_MDIC0: inout bit;
D1_MDIC1: inout bit;
D1_MDM0: inout bit;
D1_MDM1: inout bit;
D1_MDM2: inout bit;
D1_MDM3: inout bit;
D1_MDM8: inout bit;
D1_MDQ0: inout bit;
D1_MDQ1: inout bit;
D1_MDQ10: inout bit;
D1_MDQ11: inout bit;
D1_MDQ12: inout bit;
D1_MDQ13: inout bit;
D1_MDQ14: inout bit;
D1_MDQ15: inout bit;
D1_MDQ16: inout bit;
D1_MDQ17: inout bit;
D1_MDQ18: inout bit;
D1_MDQ19: inout bit;
D1_MDQ2: inout bit;
D1_MDQ20: inout bit;
D1_MDQ21: inout bit;
D1_MDQ22: inout bit;
D1_MDQ23: inout bit;
D1_MDQ24: inout bit;
D1_MDQ25: inout bit;
D1_MDQ26: inout bit;
D1_MDQ27: inout bit;
D1_MDQ28: inout bit;
D1_MDQ29: inout bit;
D1_MDQ3: inout bit;
D1_MDQ30: inout bit;
D1_MDQ31: inout bit;
D1_MDQ4: inout bit;
D1_MDQ5: inout bit;
D1_MDQ6: inout bit;
D1_MDQ7: inout bit;
D1_MDQ8: inout bit;
D1_MDQ9: inout bit;
D1_MDQS0: out bit;
D1_MDQS1: out bit;
D1_MDQS2: out bit;
D1_MDQS3: out bit;
D1_MDQS8: out bit;
D1_MDQS_B0: inout bit;
D1_MDQS_B1: inout bit;
D1_MDQS_B2: inout bit;
D1_MDQS_B3: inout bit;
D1_MDQS_B8: inout bit;
D1_MECC0: inout bit;
D1_MECC1: inout bit;
D1_MECC2: inout bit;
D1_MECC3: inout bit;
D1_MECC4: inout bit;
D1_MECC5: inout bit;
D1_MECC6: inout bit;
D1_MECC7: inout bit;
D1_MODT0: inout bit;
D1_MODT1: inout bit;
D1_MODT2: inout bit;
D1_MODT3: inout bit;
D1_MRAS_B: inout bit;
D1_MWE_B: inout bit;
D2_MA0: inout bit;
D2_MA1: inout bit;
D2_MA10: inout bit;
D2_MA11: inout bit;
D2_MA12: inout bit;
D2_MA13: inout bit;
D2_MA14: inout bit;
D2_MA15: inout bit;
D2_MA2: inout bit;
D2_MA3: inout bit;
D2_MA4: inout bit;
D2_MA5: inout bit;
D2_MA6: inout bit;
D2_MA7: inout bit;
D2_MA8: inout bit;
D2_MA9: inout bit;
D2_MAPAR_ERR_B: inout bit;
D2_MAPAR_OUT: inout bit;
D2_MBA0: inout bit;
D2_MBA1: inout bit;
D2_MBA2: inout bit;
D2_MCAS_B: inout bit;
D2_MCK0: out bit;
D2_MCK1: out bit;
D2_MCK2: out bit;
D2_MCKE0: inout bit;
D2_MCKE1: inout bit;
D2_MCKE2: inout bit;
D2_MCKE3: inout bit;
D2_MCK_B0: inout bit;
D2_MCK_B1: inout bit;
D2_MCK_B2: inout bit;
D2_MCS_B0: inout bit;
D2_MCS_B1: inout bit;
D2_MCS_B2: inout bit;
D2_MCS_B3: inout bit;
D2_MDIC0: inout bit;
D2_MDIC1: inout bit;
D2_MDM0: inout bit;
D2_MDM1: inout bit;
D2_MDM2: inout bit;
D2_MDM3: inout bit;
D2_MDM8: inout bit;
D2_MDQ0: inout bit;
D2_MDQ1: inout bit;
D2_MDQ10: inout bit;
D2_MDQ11: inout bit;
D2_MDQ12: inout bit;
D2_MDQ13: inout bit;
D2_MDQ14: inout bit;
D2_MDQ15: inout bit;
D2_MDQ16: inout bit;
D2_MDQ17: inout bit;
D2_MDQ18: inout bit;
D2_MDQ19: inout bit;
D2_MDQ2: inout bit;
D2_MDQ20: inout bit;
D2_MDQ21: inout bit;
D2_MDQ22: inout bit;
D2_MDQ23: inout bit;
D2_MDQ24: inout bit;
D2_MDQ25: inout bit;
D2_MDQ26: inout bit;
D2_MDQ27: inout bit;
D2_MDQ28: inout bit;
D2_MDQ29: inout bit;
D2_MDQ3: inout bit;
D2_MDQ30: inout bit;
D2_MDQ31: inout bit;
D2_MDQ4: inout bit;
D2_MDQ5: inout bit;
D2_MDQ6: inout bit;
D2_MDQ7: inout bit;
D2_MDQ8: inout bit;
D2_MDQ9: inout bit;
D2_MDQS0: out bit;
D2_MDQS1: out bit;
D2_MDQS2: out bit;
D2_MDQS3: out bit;
D2_MDQS8: out bit;
D2_MDQS_B0: inout bit;
D2_MDQS_B1: inout bit;
D2_MDQS_B2: inout bit;
D2_MDQS_B3: inout bit;
D2_MDQS_B8: inout bit;
D2_MECC0: inout bit;
D2_MECC1: inout bit;
D2_MECC2: inout bit;
D2_MECC3: inout bit;
D2_MECC4: inout bit;
D2_MECC5: inout bit;
D2_MECC6: inout bit;
D2_MECC7: inout bit;
D2_MODT0: inout bit;
D2_MODT1: inout bit;
D2_MODT2: inout bit;
D2_MODT3: inout bit;
D2_MRAS_B: inout bit;
D2_MWE_B: inout bit;
DMA_DACK_B0: inout bit;
DMA_DACK_B1_MSRCID1: inout bit;
DMA_DACK_B2_SD_CMD: inout bit;
DMA_DDONE_B0: inout bit;
DMA_DDONE_B1_MSRCID2: inout bit;
DMA_DDONE_B2_SD_WP: inout bit;
DMA_DREQ_B0: inout bit;
DMA_DREQ_B1_MSRCID0: inout bit;
DMA_DREQ_B2_SD_DAT0: inout bit;
HRESET_B: in bit;
HRESET_REQ_B: inout bit;
IIC1_SCL: inout bit;
IIC1_SDA: inout bit;
IIC2_SCL_SD_CD_B: inout bit;
IIC2_SDA_SD_CLK: inout bit;
IRQ0: inout bit;
IRQ1: inout bit;
IRQ2: inout bit;
IRQ3: inout bit;
IRQ4_MSRCID3: inout bit;
IRQ5_MSRCID4: inout bit;
IRQ6_MDVAL: inout bit;
IRQ_OUT_B: inout bit;
LA16: inout bit;
LA17: inout bit;
LA18: inout bit;
LA19: inout bit;
LA20: inout bit;
LA21: inout bit;
LA22: inout bit;
LA23: inout bit;
LA24: inout bit;
LA25: inout bit;
LA26: inout bit;
LA27: inout bit;
LAD0: inout bit;
LAD1: inout bit;
LAD10: inout bit;
LAD11: inout bit;
LAD12: inout bit;
LAD13: inout bit;
LAD14: inout bit;
LAD15: inout bit;
LAD2: inout bit;
LAD3: inout bit;
LAD4: inout bit;
LAD5: inout bit;
LAD6: inout bit;
LAD7: inout bit;
LAD8: inout bit;
LAD9: inout bit;
LALE: inout bit;
LBCTL: inout bit;
LCLK0: inout bit;
LCLK1: inout bit;
LCS_B0: inout bit;
LCS_B1: inout bit;
LCS_B2: inout bit;
LCS_B3: inout bit;
LCS_B4_IRQ8: inout bit;
LCS_B5_IRQ9: inout bit;
LCS_B6_IRQ10: inout bit;
LCS_B7_IRQ11: inout bit;
LDP0: inout bit;
LDP1: inout bit;
LGPL0_LFCLE: inout bit;
LGPL1_LFALE: inout bit;
LGPL2_LOE_B_LFRE_B: inout bit;
LGPL3_LFWP_B: inout bit;
LGPL4_LUPWAIT_LBPBSE_LFRB_B: inout bit;
LGPL5: inout bit;
LSSD_MODE_B: in bit;
LSYNC_IN: in bit;
LSYNC_OUT: out bit;
LVDD_VSEL0: in bit;
LVDD_VSEL1: in bit;
LWE_B0_LBS_B0_LFWE_B: inout bit;
LWE_B1_LBS_B1: inout bit;
MCP_B: inout bit;
QE_PA0: inout bit;
QE_PA1: inout bit;
QE_PA10: inout bit;
QE_PA11: inout bit;
QE_PA12: inout bit;
QE_PA13: inout bit;
QE_PA14: inout bit;
QE_PA15: inout bit;
QE_PA16: inout bit;
QE_PA17: inout bit;
QE_PA18: inout bit;
QE_PA19: inout bit;
QE_PA2: inout bit;
QE_PA20: inout bit;
QE_PA21: inout bit;
QE_PA22: inout bit;
QE_PA23: inout bit;
QE_PA24: inout bit;
QE_PA25: inout bit;
QE_PA26: inout bit;
QE_PA27: inout bit;
QE_PA28: inout bit;
QE_PA29: inout bit;
QE_PA3: inout bit;
QE_PA30: inout bit;
QE_PA31: inout bit;
QE_PA4: inout bit;
QE_PA5: inout bit;
QE_PA6: inout bit;
QE_PA7: inout bit;
QE_PA8: inout bit;
QE_PA9: inout bit;
QE_PB0: inout bit;
QE_PB1: inout bit;
QE_PB10: inout bit;
QE_PB11: inout bit;
QE_PB12: inout bit;
QE_PB13: inout bit;
QE_PB14: inout bit;
QE_PB15: inout bit;
QE_PB16: inout bit;
QE_PB17: inout bit;
QE_PB18: inout bit;
QE_PB19: inout bit;
QE_PB2: inout bit;
QE_PB20: inout bit;
QE_PB21: inout bit;
QE_PB22: inout bit;
QE_PB23: inout bit;
QE_PB24: inout bit;
QE_PB25: inout bit;
QE_PB26: inout bit;
QE_PB27: inout bit;
QE_PB28: inout bit;
QE_PB29: inout bit;
QE_PB3: inout bit;
QE_PB30: inout bit;
QE_PB31: inout bit;
QE_PB4: inout bit;
QE_PB5: inout bit;
QE_PB6: inout bit;
QE_PB7: inout bit;
QE_PB8: inout bit;
QE_PB9: inout bit;
QE_PC0: inout bit;
QE_PC1: inout bit;
QE_PC10: inout bit;
QE_PC11: inout bit;
QE_PC12: inout bit;
QE_PC13: inout bit;
QE_PC14: inout bit;
QE_PC15: inout bit;
QE_PC16: inout bit;
QE_PC17: inout bit;
QE_PC18: inout bit;
QE_PC19: inout bit;
QE_PC2: inout bit;
QE_PC20: inout bit;
QE_PC21: inout bit;
QE_PC22: inout bit;
QE_PC23: inout bit;
QE_PC24: inout bit;
QE_PC25: inout bit;
QE_PC26: inout bit;
QE_PC27: inout bit;
QE_PC28: inout bit;
QE_PC29: inout bit;
QE_PC3: inout bit;
QE_PC30: inout bit;
QE_PC31: inout bit;
QE_PC4: inout bit;
QE_PC5: inout bit;
QE_PC6: inout bit;
QE_PC7: inout bit;
QE_PC8: inout bit;
QE_PC9: inout bit;
QE_PD0: inout bit;
QE_PD1: inout bit;
QE_PD10: inout bit;
QE_PD11: inout bit;
QE_PD12: inout bit;
QE_PD13: inout bit;
QE_PD14: inout bit;
QE_PD15: inout bit;
QE_PD16: inout bit;
QE_PD17: inout bit;
QE_PD18: inout bit;
QE_PD19: inout bit;
QE_PD2: inout bit;
QE_PD20: inout bit;
QE_PD21: inout bit;
QE_PD22: inout bit;
QE_PD23: inout bit;
QE_PD24: inout bit;
QE_PD25: inout bit;
QE_PD26: inout bit;
QE_PD27: inout bit;
QE_PD28: inout bit;
QE_PD29: inout bit;
QE_PD3: inout bit;
QE_PD30: inout bit;
QE_PD31: inout bit;
QE_PD4: inout bit;
QE_PD5: inout bit;
QE_PD6: inout bit;
QE_PD7: inout bit;
QE_PD8: inout bit;
QE_PD9: inout bit;
QE_PE0: inout bit;
QE_PE1: inout bit;
QE_PE10: inout bit;
QE_PE11: inout bit;
QE_PE12: inout bit;
QE_PE13: inout bit;
QE_PE14: inout bit;
QE_PE15: inout bit;
QE_PE16: inout bit;
QE_PE17: inout bit;
QE_PE18: inout bit;
QE_PE19: inout bit;
QE_PE2: inout bit;
QE_PE20: inout bit;
QE_PE21: inout bit;
QE_PE22: inout bit;
QE_PE23: inout bit;
QE_PE24: inout bit;
QE_PE25: inout bit;
QE_PE26: inout bit;
QE_PE27: inout bit;
QE_PE28: inout bit;
QE_PE29: inout bit;
QE_PE3: inout bit;
QE_PE30: inout bit;
QE_PE31: inout bit;
QE_PE4: inout bit;
QE_PE5: inout bit;
QE_PE6: inout bit;
QE_PE7: inout bit;
QE_PE8: inout bit;
QE_PE9: inout bit;
QE_PF0: inout bit;
QE_PF1: inout bit;
QE_PF10: inout bit;
QE_PF11: inout bit;
QE_PF12: inout bit;
QE_PF13: inout bit;
QE_PF14: inout bit;
QE_PF15: inout bit;
QE_PF16: inout bit;
QE_PF17: inout bit;
QE_PF18: inout bit;
QE_PF19: inout bit;
QE_PF2: inout bit;
QE_PF20: inout bit;
QE_PF21: inout bit;
QE_PF22: inout bit;
QE_PF3: inout bit;
QE_PF4: inout bit;
QE_PF5: inout bit;
QE_PF6: inout bit;
QE_PF7: inout bit;
QE_PF8: inout bit;
QE_PF9: inout bit;
RTC: inout bit;
SD_PLL_TPD: out bit;
SD_REF_CLK: in bit;
SD_REF_CLK_B: in bit;
SD_RX0: in bit;
SD_RX1: in bit;
SD_RX2: in bit;
SD_RX3: in bit;
SD_RX_B0: in bit;
SD_RX_B1: in bit;
SD_RX_B2: in bit;
SD_RX_B3: in bit;
SD_TX0: out bit;
SD_TX1: out bit;
SD_TX2: out bit;
SD_TX3: out bit;
SD_TX_B0: out bit;
SD_TX_B1: out bit;
SD_TX_B2: out bit;
SD_TX_B3: out bit;
SD_TX_CLK: out bit;
SD_TX_CLK_B: out bit;
SRESET_B: in bit;
SYSCLK: in bit;
TCK: in bit;
TDI: in bit;
TDO: out bit;
TMS: in bit;
TRIG_IN: in bit;
TRIG_OUT_READY_QUIESCE_B: inout bit;
TRST_B: in bit;
UART_CTS_B0_DMA_DDONE_B3_SD_DAT3: inout bit;
UART_RTS_B0: inout bit;
UART_SIN0_DMA_DACK_B3_SD_DAT2: inout bit;
UART_SOUT0_DMA_DREQ_B3_SD_DAT1: inout bit;
UDE_B: inout bit;
AGND_SRDS: linkage bit;
AVDD_CORE: linkage bit;
AVDD_DDR: linkage bit;
AVDD_LBIU: linkage bit;
AVDD_PLAT: linkage bit;
AVDD_QE: linkage bit;
AVDD_SRDS: linkage bit;
BVDD: linkage bit_vector(0 to 7);
D1_MVREF: linkage bit;
D2_MVREF: linkage bit;
GND: linkage bit_vector(0 to 120);
GVDD: linkage bit_vector(0 to 45);
LVDD1: linkage bit_vector(0 to 2);
LVDD2: linkage bit_vector(0 to 2);
NC: linkage bit;
OVDD: linkage bit_vector(0 to 11);
RESERVED: linkage bit_vector(0 to 2);
SCOREGND: linkage bit_vector(0 to 8);
SCOREVDD: linkage bit_vector(0 to 7);
SD_IMP_CAL_RX: linkage bit;
SD_IMP_CAL_TX: linkage bit;
SD_PLL_TPA: linkage bit;
SENSEVDD: linkage bit;
SENSEVSS: linkage bit;
VDD: linkage bit_vector(0 to 36);
XGND: linkage bit_vector(0 to 8);
XVDD: linkage bit_vector(0 to 7));
use STD_1149_1_2001.all;
attribute COMPONENT_CONFORMANCE of MPC8569E: entity is "STD_1149_1_2001";
attribute PIN_MAP of MPC8569E: entity is PHYSICAL_PIN_MAP;
constant PBGA :PIN_MAP_STRING :=
"ASLEEP: M23," &
"BVDD_VSEL0: N26," &
"BVDD_VSEL1: P20," &
"CKSTP_IN_B: AE28," &
"CKSTP_OUT_B: AF28," &
"CLK_OUT: M24," &
"D1_MA0: E18," &
"D1_MA1: A18," &
"D1_MA10: J18," &
"D1_MA11: A19," &
"D1_MA12: J22," &
"D1_MA13: A15," &
"D1_MA14: D20," &
"D1_MA15: C15," &
"D1_MA2: H19," &
"D1_MA3: G20," &
"D1_MA4: B18," &
"D1_MA5: H18," &
"D1_MA6: C18," &
"D1_MA7: J21," &
"D1_MA8: E19," &
"D1_MA9: G19," &
"D1_MAPAR_ERR_B: F15," &
"D1_MAPAR_OUT: E15," &
"D1_MBA0: K17," &
"D1_MBA1: F18," &
"D1_MBA2: E20," &
"D1_MCAS_B: J17," &
"D1_MCK0: E24," &
"D1_MCK1: J24," &
"D1_MCK2: C20," &
"D1_MCKE0: G21," &
"D1_MCKE1: J20," &
"D1_MCKE2: C17," &
"D1_MCKE3: A16," &
"D1_MCK_B0: E23," &
"D1_MCK_B1: J23," &
"D1_MCK_B2: C19," &
"D1_MCS_B0: D17," &
"D1_MCS_B1: K16," &
"D1_MCS_B2: K20," &
"D1_MCS_B3: G16," &
"D1_MDIC0: A20," &
"D1_MDIC1: A17," &
"D1_MDM0: A27," &
"D1_MDM1: E27," &
"D1_MDM2: J27," &
"D1_MDM3: A23," &
"D1_MDM8: E22," &
"D1_MDQ0: C28," &
"D1_MDQ1: C27," &
"D1_MDQ10: G25," &
"D1_MDQ11: F25," &
"D1_MDQ12: F28," &
"D1_MDQ13: E28," &
"D1_MDQ14: E26," &
"D1_MDQ15: E25," &
"D1_MDQ16: L27," &
"D1_MDQ17: L26," &
"D1_MDQ18: K23," &
"D1_MDQ19: K25," &
"D1_MDQ2: C25," &
"D1_MDQ20: K28," &
"D1_MDQ21: J28," &
"D1_MDQ22: J26," &
"D1_MDQ23: J25," &
"D1_MDQ24: C24," &
"D1_MDQ25: C22," &
"D1_MDQ26: C21," &
"D1_MDQ27: B21," &
"D1_MDQ28: B24," &
"D1_MDQ29: A24," &
"D1_MDQ3: B25," &
"D1_MDQ30: A22," &
"D1_MDQ31: A21," &
"D1_MDQ4: B28," &
"D1_MDQ5: A28," &
"D1_MDQ6: A26," &
"D1_MDQ7: A25," &
"D1_MDQ8: G28," &
"D1_MDQ9: G27," &
"D1_MDQS0: D26," &
"D1_MDQS1: H26," &
"D1_MDQS2: K24," &
"D1_MDQS3: D23," &
"D1_MDQS8: H23," &
"D1_MDQS_B0: C26," &
"D1_MDQS_B1: G26," &
"D1_MDQS_B2: L25," &
"D1_MDQS_B3: C23," &
"D1_MDQS_B8: G23," &
"D1_MECC0: G24," &
"D1_MECC1: H22," &
"D1_MECC2: G22," &
"D1_MECC3: F21," &
"D1_MECC4: F24," &
"D1_MECC5: D22," &
"D1_MECC6: E21," &
"D1_MECC7: D21," &
"D1_MODT0: C16," &
"D1_MODT1: J16," &
"D1_MODT2: G17," &
"D1_MODT3: E16," &
"D1_MRAS_B: G18," &
"D1_MWE_B: E17," &
"D2_MA0: E4," &
"D2_MA1: A4," &
"D2_MA10: J6," &
"D2_MA11: A5," &
"D2_MA12: J9," &
"D2_MA13: D3," &
"D2_MA14: D6," &
"D2_MA15: B1," &
"D2_MA2: J7," &
"D2_MA3: G6," &
"D2_MA4: B4," &
"D2_MA5: H4," &
"D2_MA6: G3," &
"D2_MA7: J8," &
"D2_MA8: E5," &
"D2_MA9: G5," &
"D2_MAPAR_ERR_B: G1," &
"D2_MAPAR_OUT: F1," &
"D2_MBA0: J5," &
"D2_MBA1: F4," &
"D2_MBA2: E6," &
"D2_MCAS_B: J4," &
"D2_MCK0: E10," &
"D2_MCK1: J11," &
"D2_MCK2: C6," &
"D2_MCKE0: G7," &
"D2_MCKE1: K8," &
"D2_MCKE2: C2," &
"D2_MCKE3: A2," &
"D2_MCK_B0: E9," &
"D2_MCK_B1: J10," &
"D2_MCK_B2: C5," &
"D2_MCS_B0: E3," &
"D2_MCS_B1: A6," &
"D2_MCS_B2: H7," &
"D2_MCS_B3: G2," &
"D2_MDIC0: J2," &
"D2_MDIC1: L2," &
"D2_MDM0: A13," &
"D2_MDM1: D13," &
"D2_MDM2: G14," &
"D2_MDM3: A9," &
"D2_MDM8: E8," &
"D2_MDQ0: B14," &
"D2_MDQ1: C14," &
"D2_MDQ10: G11," &
"D2_MDQ11: F11," &
"D2_MDQ12: E14," &
"D2_MDQ13: D14," &
"D2_MDQ14: D12," &
"D2_MDQ15: E11," &
"D2_MDQ16: J15," &
"D2_MDQ17: J14," &
"D2_MDQ18: K13," &
"D2_MDQ19: J12," &
"D2_MDQ2: C11," &
"D2_MDQ20: H15," &
"D2_MDQ21: G15," &
"D2_MDQ22: G13," &
"D2_MDQ23: H12," &
"D2_MDQ24: C10," &
"D2_MDQ25: C8," &
"D2_MDQ26: C7," &
"D2_MDQ27: B7," &
"D2_MDQ28: B10," &
"D2_MDQ29: A10," &
"D2_MDQ3: B11," &
"D2_MDQ30: A8," &
"D2_MDQ31: A7," &
"D2_MDQ4: B15," &
"D2_MDQ5: A14," &
"D2_MDQ6: A12," &
"D2_MDQ7: A11," &
"D2_MDQ8: F14," &
"D2_MDQ9: F13," &
"D2_MDQS0: C12," &
"D2_MDQS1: G12," &
"D2_MDQS2: J13," &
"D2_MDQS3: D9," &
"D2_MDQS8: H9," &
"D2_MDQS_B0: C13," &
"D2_MDQS_B1: F12," &
"D2_MDQS_B2: K14," &
"D2_MDQS_B3: C9," &
"D2_MDQS_B8: G9," &
"D2_MECC0: G10," &
"D2_MECC1: H8," &
"D2_MECC2: G8," &
"D2_MECC3: F7," &
"D2_MECC4: F10," &
"D2_MECC5: D8," &
"D2_MECC6: E7," &
"D2_MECC7: D7," &
"D2_MODT0: C1," &
"D2_MODT1: A3," &
"D2_MODT2: H3," &
"D2_MODT3: E1," &
"D2_MRAS_B: G4," &
"D2_MWE_B: E2," &
"DMA_DACK_B0: AF23," &
"DMA_DACK_B1_MSRCID1: AD27," &
"DMA_DACK_B2_SD_CMD: AD24," &
"DMA_DDONE_B0: AD25," &
"DMA_DDONE_B1_MSRCID2: AE24," &
"DMA_DDONE_B2_SD_WP: AF25," &
"DMA_DREQ_B0: AG23," &
"DMA_DREQ_B1_MSRCID0: AE25," &
"DMA_DREQ_B2_SD_DAT0: AD26," &
"HRESET_B: AD23," &
"HRESET_REQ_B: AC26," &
"IIC1_SCL: AG26," &
"IIC1_SDA: AH26," &
"IIC2_SCL_SD_CD_B: AF26," &
"IIC2_SDA_SD_CLK: AG25," &
"IRQ0: R20," &
"IRQ1: T21," &
"IRQ2: R26," &
"IRQ3: R25," &
"IRQ4_MSRCID3: N20," &
"IRQ5_MSRCID4: R21," &
"IRQ6_MDVAL: R22," &
"IRQ_OUT_B: M20," &
"LA16: AD15," &
"LA17: AD16," &
"LA18: AE14," &
"LA19: AD17," &
"LA20: AE16," &
"LA21: AD18," &
"LA22: AE17," &
"LA23: AD19," &
"LA24: AE18," &
"LA25: AC20," &
"LA26: AE19," &
"LA27: AE22," &
"LAD0: AG14," &
"LAD1: AF14," &
"LAD10: AH22," &
"LAD11: AG22," &
"LAD12: AE21," &
"LAD13: AE20," &
"LAD14: AF22," &
"LAD15: AD21," &
"LAD2: AG16," &
"LAD3: AH17," &
"LAD4: AH18," &
"LAD5: AH19," &
"LAD6: AG18," &
"LAD7: AF20," &
"LAD8: AG20," &
"LAD9: AH21," &
"LALE: AH20," &
"LBCTL: AE15," &
"LCLK0: AF18," &
"LCLK1: AF16," &
"LCS_B0: AC18," &
"LCS_B1: AC16," &
"LCS_B2: AB16," &
"LCS_B3: AC14," &
"LCS_B4_IRQ8: AD14," &
"LCS_B5_IRQ9: AE23," &
"LCS_B6_IRQ10: AD22," &
"LCS_B7_IRQ11: AC22," &
"LDP0: AB14," &
"LDP1: AA15," &
"LGPL0_LFCLE: AA19," &
"LGPL1_LFALE: AA17," &
"LGPL2_LOE_B_LFRE_B: AD20," &
"LGPL3_LFWP_B: AA20," &
"LGPL4_LUPWAIT_LBPBSE_LFRB_B: AA18," &
"LGPL5: AA16," &
"LSSD_MODE_B: AH27," &
"LSYNC_IN: AH16," &
"LSYNC_OUT: AH15," &
"LVDD_VSEL0: AD28," &
"LVDD_VSEL1: P26," &
"LWE_B0_LBS_B0_LFWE_B: AB20," &
"LWE_B1_LBS_B1: AB18," &
"MCP_B: M22," &
"QE_PA0: T11," &
"QE_PA1: U11," &
"QE_PA10: V10," &
"QE_PA11: V9," &
"QE_PA12: R8," &
"QE_PA13: V8," &
"QE_PA14: P7," &
"QE_PA15: L6," &
"QE_PA16: M6," &
"QE_PA17: N6," &
"QE_PA18: L5," &
"QE_PA19: P1," &
"QE_PA2: R11," &
"QE_PA20: M5," &
"QE_PA21: N5," &
"QE_PA22: L4," &
"QE_PA23: M4," &
"QE_PA24: N1," &
"QE_PA25: R1," &
"QE_PA26: N4," &
"QE_PA27: T1," &
"QE_PA28: N2," &
"QE_PA29: P6," &
"QE_PA3: U10," &
"QE_PA30: U6," &
"QE_PA31: T5," &
"QE_PA4: R10," &
"QE_PA5: V11," &
"QE_PA6: R9," &
"QE_PA7: U9," &
"QE_PA8: T8," &
"QE_PA9: U8," &
"QE_PB0: R5," &
"QE_PB1: P5," &
"QE_PB10: V5," &
"QE_PB11: W11," &
"QE_PB12: L11," &
"QE_PB13: M11," &
"QE_PB14: N11," &
"QE_PB15: P11," &
"QE_PB16: P10," &
"QE_PB17: P2," &
"QE_PB18: L10," &
"QE_PB19: M9," &
"QE_PB2: V6," &
"QE_PB20: N9," &
"QE_PB21: P9," &
"QE_PB22: T2," &
"QE_PB23: R2," &
"QE_PB24: P8," &
"QE_PB25: U2," &
"QE_PB26: AG13," &
"QE_PB27: AH14," &
"QE_PB28: AC8," &
"QE_PB29: AD8," &
"QE_PB3: T3," &
"QE_PB30: AD9," &
"QE_PB31: AD10," &
"QE_PB4: U3," &
"QE_PB5: U4," &
"QE_PB6: U5," &
"QE_PB7: V3," &
"QE_PB8: V4," &
"QE_PB9: P4," &
"QE_PC0: W3," &
"QE_PC1: W4," &
"QE_PC10: AB2," &
"QE_PC11: R7," &
"QE_PC12: AA6," &
"QE_PC13: AA3," &
"QE_PC14: AA5," &
"QE_PC15: AA4," &
"QE_PC16: L7," &
"QE_PC17: M8," &
"QE_PC18: AB3," &
"QE_PC19: Y5," &
"QE_PC2: N3," &
"QE_PC20: U7," &
"QE_PC21: AB1," &
"QE_PC22: Y3," &
"QE_PC23: Y4," &
"QE_PC24: N8," &
"QE_PC25: P3," &
"QE_PC26: W8," &
"QE_PC27: W9," &
"QE_PC28: AF13," &
"QE_PC29: V7," &
"QE_PC3: L3," &
"QE_PC30: AA14," &
"QE_PC31: AA13," &
"QE_PC4: Y7," &
"QE_PC5: W2," &
"QE_PC6: W5," &
"QE_PC7: W7," &
"QE_PC8: T7," &
"QE_PC9: R3," &
"QE_PD0: AH6," &
"QE_PD1: AF6," &
"QE_PD10: AB5," &
"QE_PD11: AC4," &
"QE_PD12: AE5," &
"QE_PD13: AE6," &
"QE_PD14: AC7," &
"QE_PD15: AB7," &
"QE_PD16: AB8," &
"QE_PD17: AA9," &
"QE_PD18: Y8," &
"QE_PD19: AA8," &
"QE_PD2: AG6," &
"QE_PD20: AA12," &
"QE_PD21: Y11," &
"QE_PD22: AA11," &
"QE_PD23: AB11," &
"QE_PD24: AA7," &
"QE_PD25: AB10," &
"QE_PD26: Y9," &
"QE_PD27: AA10," &
"QE_PD28: AF1," &
"QE_PD29: AG1," &
"QE_PD3: AF5," &
"QE_PD30: AG2," &
"QE_PD31: AH1," &
"QE_PD4: AE4," &
"QE_PD5: AD4," &
"QE_PD6: AB6," &
"QE_PD7: AD7," &
"QE_PD8: AC6," &
"QE_PD9: AD6," &
"QE_PE0: AH2," &
"QE_PE1: AH3," &
"QE_PE10: AA1," &
"QE_PE11: Y1," &
"QE_PE12: AC1," &
"QE_PE13: AC2," &
"QE_PE14: V1," &
"QE_PE15: AB4," &
"QE_PE16: W1," &
"QE_PE17: V2," &
"QE_PE18: AC3," &
"QE_PE19: AD2," &
"QE_PE2: AF4," &
"QE_PE20: AD3," &
"QE_PE21: AD1," &
"QE_PE22: U1," &
"QE_PE23: AE1," &
"QE_PE24: AC12," &
"QE_PE25: AB12," &
"QE_PE26: AB13," &
"QE_PE27: AH11," &
"QE_PE28: AG10," &
"QE_PE29: AH10," &
"QE_PE3: AG4," &
"QE_PE30: AG11," &
"QE_PE31: AE7," &
"QE_PE4: AF3," &
"QE_PE5: AE3," &
"QE_PE6: AG3," &
"QE_PE7: AH5," &
"QE_PE8: AH4," &
"QE_PE9: AG5," &
"QE_PF0: AF8," &
"QE_PF1: AG8," &
"QE_PF10: AC10," &
"QE_PF11: AC11," &
"QE_PF12: AD11," &
"QE_PF13: AH12," &
"QE_PF14: AH13," &
"QE_PF15: AE10," &
"QE_PF16: AE9," &
"QE_PF17: AF9," &
"QE_PF18: AF10," &
"QE_PF19: AH8," &
"QE_PF2: AE8," &
"QE_PF20: AH7," &
"QE_PF21: AG9," &
"QE_PF22: AH9," &
"QE_PF3: AE13," &
"QE_PF4: AC13," &
"QE_PF5: AD13," &
"QE_PF6: AF12," &
"QE_PF7: AE12," &
"QE_PF8: AG12," &
"QE_PF9: AD12," &
"RTC: M25," &
"SD_PLL_TPD: W21," &
"SD_REF_CLK: W26," &
"SD_REF_CLK_B: W25," &
"SD_RX0: T28," &
"SD_RX1: V28," &
"SD_RX2: Y28," &
"SD_RX3: AB28," &
"SD_RX_B0: T27," &
"SD_RX_B1: V27," &
"SD_RX_B2: Y27," &
"SD_RX_B3: AB27," &
"SD_TX0: T23," &
"SD_TX1: V23," &
"SD_TX2: Y23," &
"SD_TX3: AB23," &
"SD_TX_B0: T24," &
"SD_TX_B1: V24," &
"SD_TX_B2: Y24," &
"SD_TX_B3: AB24," &
"SD_TX_CLK: AA21," &
"SD_TX_CLK_B: AA22," &
"SRESET_B: AC25," &
"SYSCLK: P25," &
"TCK: N21," &
"TDI: P21," &
"TDO: P23," &
"TMS: N22," &
"TRIG_IN: N25," &
"TRIG_OUT_READY_QUIESCE_B: P24," &
"TRST_B: P22," &
"UART_CTS_B0_DMA_DDONE_B3_SD_DAT3: AG27," &
"UART_RTS_B0: AH28," &
"UART_SIN0_DMA_DACK_B3_SD_DAT2: AF27," &
"UART_SOUT0_DMA_DREQ_B3_SD_DAT1: AG28," &
"UDE_B: M21," &
"AGND_SRDS: U25," &
"AVDD_CORE: L1," &
"AVDD_DDR: M28," &
"AVDD_LBIU: AH24," &
"AVDD_PLAT: N28," &
"AVDD_QE: K1," &
"AVDD_SRDS: U26," &
"BVDD: (AC15, AC17, AC19, AC21, AF15, AF17," &
"AF19, AF21)," &
"D1_MVREF: N27," &
"D2_MVREF: J1," &
"GND: (B3, B6, B9, B13, B17, B20," &
"B23, B27, C4, D2, D5, D11," &
"D16, D19, D25, D28, E13, F3," &
"F6, F9, F17, F20, F23, F27," &
"H1, H6, H11, H14, H17, H21," &
"H25, H28, K2, K5, K7, K12," &
"K15, K19, K21, K27, L8, L9," &
"L12, L14, L16, L18, L20, L22," &
"L24, L28, M1, M2, M13, M15," &
"M17, M19, M27, N7, N10, N12," &
"N14, N16, N18, N24, P13, P17," &
"P19, P27, P28, R12, R14, R16," &
"R18, T4, T6, T9, T13, T15," &
"T17, T19, T20, U12, U14, U16," &
"U18, U22, V13, V15, V17, V19," &
"V20, W12, W14, W16, W18, W20," &
"Y6, Y10, Y13, Y15, Y16, Y17," &
"Y19, Y20, AA2, AB15, AB17, AB19," &
"AC9, AD5, AE26, AF2, AF11, AG7," &
"AG15, AG17, AG19, AG21, AG24, AH23," &
"AH25)," &
"GVDD: (B2, B5, B8, B12, B16, B19," &
"B22, B26, C3, D1, D4, D10," &
"D15, D18, D24, D27, E12, F2," &
"F5, F8, F16, F19, F22, F26," &
"H2, H5, H10, H13, H16, H20," &
"H24, H27, J3, J19, K3, K4," &
"K6, K9, K10, K11, K18, K22," &
"K26, L15, L21, L23)," &
"LVDD1: (R4, R6, T10)," &
"LVDD2: (M3, M7, M10)," &
"NC: A1," &
"OVDD: (M26, N23, W6, W10, Y2, AB9," &
"AC5, AE2, AE11, AE27, AF7, AF24)," &
"RESERVED: (T22, U20, U21)," &
"SCOREGND: (R28, T26, U27, V25, W28, Y26," &
"AA27, AB26, AC28)," &
"SCOREVDD: (R27, T25, U28, V26, W27, Y25," &
"AA28, AC27)," &
"SD_IMP_CAL_RX: W22," &
"SD_IMP_CAL_TX: AA25," &
"SD_PLL_TPA: AA26," &
"SENSEVDD: P14," &
"SENSEVSS: P15," &
"VDD: (L13, L17, L19, M12, M14, M16," &
"M18, N13, N15, N17, N19, P12," &
"P16, P18, R13, R15, R17, R19," &
"T12, T14, T16, T18, U13, U15," &
"U17, U19, V12, V14, V16, V18," &
"W13, W15, W17, W19, Y12, Y14," &
"Y18)," &
"XGND: (R24, U24, V22, W23, Y21, AA24," &
"AB22, AB25, AC23)," &
"XVDD: (R23, U23, V21, W24, Y22, AA23," &
"AB21, AC24)" ;
attribute PORT_GROUPING of MPC8569E: entity is
"DIFFERENTIAL_VOLTAGE (" &
"(SD_RX0, SD_RX_B0)," &
"(SD_RX1, SD_RX_B1)," &
"(SD_RX2, SD_RX_B2)," &
"(SD_RX3, SD_RX_B3)," &
"(SD_TX0, SD_TX_B0)," &
"(SD_TX1, SD_TX_B1)," &
"(SD_TX2, SD_TX_B2)," &
"(SD_TX3, SD_TX_B3)," &
"(SD_REF_CLK, SD_REF_CLK_B)," &
"(SD_TX_CLK, SD_TX_CLK_B))" ;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (3.00e+07,BOTH);
attribute TAP_SCAN_RESET of TRST_B : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_IN of TDI : signal is true;
attribute COMPLIANCE_PATTERNS of MPC8569E: entity is
"(LSSD_MODE_B, LVDD_VSEL0, LVDD_VSEL1, BVDD_VSEL0, BVDD_VSEL1) (1XXXX)";
attribute INSTRUCTION_LENGTH of MPC8569E: entity is 8;
attribute INSTRUCTION_OPCODE of MPC8569E: entity is
"BYPASS (11111111)," &
"CLAMP (11110001)," &
"EXTEST (00000000)," &
"HIGHZ (11110010)," &
"IDCODE (11110011)," &
"PRELOAD (11110000)," &
"SAMPLE (11110000)," &
"PRIVATE000 (01000100)," &
"PRIVATE001 (00111001)," &
"PRIVATE002 (00110111)," &
"PRIVATE003 (00000101)," &
"PRIVATE004 (00000110)," &
"PRIVATE005 (00001010)," &
"PRIVATE006 (00110110)," &
"PRIVATE007 (00111000)," &
"PRIVATE008 (00000111)," &
"PRIVATE009 (00010000)," &
"PRIVATE010 (00010001)," &
"PRIVATE011 (00010010)," &
"PRIVATE012 (00010011)," &
"PRIVATE013 (00010100)," &
"PRIVATE014 (11111110)," &
"PRIVATE015 (01100110)," &
"PRIVATE016 (00000100)," &
"PRIVATE017 (00000011)," &
"PRIVATE018 (00110000)," &
"PRIVATE019 (00001001)," &
"PRIVATE020 (00001011)," &
"PRIVATE021 (00001100)," &
"PRIVATE022 (00001110)," &
"PRIVATE023 (00100000)," &
"PRIVATE024 (00100001)," &
"PRIVATE025 (00100010)," &
"PRIVATE026 (00100011)," &
"PRIVATE027 (00100100)," &
"PRIVATE028 (00100101)," &
"PRIVATE029 (00100110)," &
"PRIVATE030 (00100111)," &
"PRIVATE031 (01000000)," &
"PRIVATE032 (01000001)," &
"PRIVATE033 (01000010)," &
"PRIVATE034 (01010000)," &
"PRIVATE035 (01010001)," &
"PRIVATE036 (01000011)," &
"PRIVATE037 (01000101)," &
"PRIVATE038 (01000110)," &
"PRIVATE039 (01000111)," &
"PRIVATE040 (01001000)," &
"PRIVATE041 (01001001)," &
"PRIVATE042 (01100001)," &
"PRIVATE043 (01100010)," &
"PRIVATE044 (01100011)," &
"PRIVATE045 (01100100)," &
"PRIVATE046 (01100101)," &
"PRIVATE047 (11110100)," &
"PRIVATE048 (00101000)";
attribute INSTRUCTION_CAPTURE of MPC8569E: entity is "xxxxxx01";
attribute INSTRUCTION_PRIVATE of MPC8569E: entity is
"PRIVATE000," &
"PRIVATE001," &
"PRIVATE002," &
"PRIVATE003," &
"PRIVATE004," &
"PRIVATE005," &
"PRIVATE006," &
"PRIVATE007," &
"PRIVATE008," &
"PRIVATE009," &
"PRIVATE010," &
"PRIVATE011," &
"PRIVATE012," &
"PRIVATE013," &
"PRIVATE014," &
"PRIVATE015," &
"PRIVATE016," &
"PRIVATE017," &
"PRIVATE018," &
"PRIVATE019," &
"PRIVATE020," &
"PRIVATE021," &
"PRIVATE022," &
"PRIVATE023," &
"PRIVATE024," &
"PRIVATE025," &
"PRIVATE026," &
"PRIVATE027," &
"PRIVATE028," &
"PRIVATE029," &
"PRIVATE030," &
"PRIVATE031," &
"PRIVATE032," &
"PRIVATE033," &
"PRIVATE034," &
"PRIVATE035," &
"PRIVATE036," &
"PRIVATE037," &
"PRIVATE038," &
"PRIVATE039," &
"PRIVATE040," &
"PRIVATE041," &
"PRIVATE042," &
"PRIVATE043," &
"PRIVATE044," &
"PRIVATE045," &
"PRIVATE046," &
"PRIVATE047," &
"PRIVATE048";
attribute IDCODE_REGISTER of MPC8569E: entity is
"0001" & -- Version
"0001100011010001" & -- Part Number
"00000001110" & -- Manufacturer Identity
"1"; -- IEEE 1149.1 Requirement
attribute REGISTER_ACCESS of MPC8569E: entity is
"BOUNDARY (SAMPLE)," &
"BYPASS (BYPASS)";
attribute BOUNDARY_LENGTH of MPC8569E: entity is 959;
attribute BOUNDARY_REGISTER of MPC8569E: entity is
-- BSR DESCRIPTION TERMS
-- cell type = BC_0 - BC_99
-- port = port name
-- function
-- input = input only
-- bidir = bidirectional
-- output2 = two state ouput
-- output3 = three state ouput
-- control = control cell
-- controlr = control cell
-- internal = placeholder cell
-- safe = value that turns off drivers in control cells
-- ccell = controlling cell number for I/O direction
-- dsval = disabling (input) value
-- rslt = result if disabled (input = Z)
--
-- num cell port/* func safe [ccell dis rslt]
"0 (BC_2, *, control, 0)," &
"1 (BC_6, TRIG_OUT_READY_QUIESCE_B, bidir, 0, 0, 0, Z)," &
"2 (BC_2, *, control, 0)," &
"3 (BC_6, IRQ5_MSRCID4, bidir, 0, 2, 0, Z)," &
"4 (BC_2, *, control, 0)," &
"5 (BC_6, IRQ6_MDVAL, bidir, 0, 4, 0, Z)," &
"6 (BC_2, *, internal, X)," &
"7 (BC_2, SYSCLK, input, X)," &
"8 (BC_2, *, control, 0)," &
"9 (BC_6, IRQ3, bidir, 0, 8, 0, Z)," &
"10 (BC_2, *, control, 0)," &
"11 (BC_6, IRQ0, bidir, 0, 10, 0, Z)," &
"12 (BC_2, *, control, 0)," &
"13 (BC_6, IRQ1, bidir, 0, 12, 0, Z)," &
"14 (BC_2, *, control, 0)," &
"15 (BC_6, IRQ2, bidir, 0, 14, 0, Z)," &
"16 (BC_4, SD_RX0, observe_only, X)," &
"17 (BC_2, *, control, 1)," &
"18 (BC_2, SD_TX0, output3, 0, 17, 1, Z)," &
"19 (BC_2, *, control, 1)," &
"20 (BC_2, SD_TX1, output3, 0, 19, 1, Z)," &
"21 (BC_4, SD_RX1, observe_only, X)," &
"22 (BC_4, SD_REF_CLK, clock, X)," &
"23 (BC_2, *, control, 1)," &
"24 (BC_2, SD_PLL_TPD, output3, 0, 23, 1, Z)," &
"25 (BC_2, *, control, 1)," &
"26 (BC_2, SD_TX_CLK, output3, 0, 25, 1, Z)," &
"27 (BC_4, SD_RX2, observe_only, X)," &
"28 (BC_2, *, control, 1)," &
"29 (BC_2, SD_TX2, output3, 0, 28, 1, Z)," &
"30 (BC_2, *, control, 1)," &
"31 (BC_2, SD_TX3, output3, 0, 30, 1, Z)," &
"32 (BC_4, SD_RX3, observe_only, X)," &
"33 (BC_2, *, control, 0)," &
"34 (BC_6, HRESET_REQ_B, bidir, 0, 33, 0, Z)," &
"35 (BC_2, *, control, 0)," &
"36 (BC_6, DMA_DACK_B1_MSRCID1, bidir, 0, 35, 0, Z)," &
"37 (BC_2, *, internal, X)," &
"38 (BC_2, SRESET_B, input, X)," &
"39 (BC_2, *, control, 0)," &
"40 (BC_6, DMA_DREQ_B2_SD_DAT0, bidir, 0, 39, 0, Z)," &
"41 (BC_2, *, internal, X)," &
"42 (BC_2, CKSTP_IN_B, input, X)," &
"43 (BC_2, *, control, 0)," &
"44 (BC_6, CKSTP_OUT_B, bidir, 0, 43, 0, Z)," &
"45 (BC_2, *, control, 0)," &
"46 (BC_6, UART_SOUT0_DMA_DREQ_B3_SD_DAT1, bidir, 0, 45, 0, Z)," &
"47 (BC_2, *, control, 0)," &
"48 (BC_6, UART_SIN0_DMA_DACK_B3_SD_DAT2, bidir, 0, 47, 0, Z)," &
"49 (BC_2, *, control, 0)," &
"50 (BC_6, DMA_DDONE_B0, bidir, 0, 49, 0, Z)," &
"51 (BC_2, *, control, 0)," &
"52 (BC_6, DMA_DACK_B2_SD_CMD, bidir, 0, 51, 0, Z)," &
"53 (BC_2, *, control, 0)," &
"54 (BC_6, DMA_DREQ_B1_MSRCID0, bidir, 0, 53, 0, Z)," &
"55 (BC_2, *, control, 0)," &
"56 (BC_6, UART_CTS_B0_DMA_DDONE_B3_SD_DAT3, bidir, 0, 55, 0, Z)," &
"57 (BC_2, *, control, 0)," &
"58 (BC_6, UART_RTS_B0, bidir, 0, 57, 0, Z)," &
"59 (BC_2, *, control, 0)," &
"60 (BC_6, IIC2_SCL_SD_CD_B, bidir, 0, 59, 0, Z)," &
"61 (BC_2, *, control, 0)," &
"62 (BC_6, DMA_DDONE_B1_MSRCID2, bidir, 0, 61, 0, Z)," &
"63 (BC_2, *, control, 0)," &
"64 (BC_6, DMA_DDONE_B2_SD_WP, bidir, 0, 63, 0, Z)," &
"65 (BC_2, *, control, 0)," &
"66 (BC_6, IIC1_SCL, bidir, 0, 65, 0, Z)," &
"67 (BC_2, *, internal, X)," &
"68 (BC_2, HRESET_B, input, X)," &
"69 (BC_2, *, control, 0)," &
"70 (BC_6, IIC1_SDA, bidir, 0, 69, 0, Z)," &
"71 (BC_2, *, control, 0)," &
"72 (BC_6, DMA_DACK_B0, bidir, 0, 71, 0, Z)," &
"73 (BC_2, *, control, 0)," &
"74 (BC_6, DMA_DREQ_B0, bidir, 0, 73, 0, Z)," &
"75 (BC_2, *, control, 0)," &
"76 (BC_6, IIC2_SDA_SD_CLK, bidir, 0, 75, 0, Z)," &
"77 (BC_2, *, control, 0)," &
"78 (BC_6, LCS_B7_IRQ11, bidir, 0, 77, 0, Z)," &
"79 (BC_2, *, control, 0)," &
"80 (BC_6, LGPL3_LFWP_B, bidir, 0, 79, 0, Z)," &
"81 (BC_2, *, control, 0)," &
"82 (BC_6, LCS_B5_IRQ9, bidir, 0, 81, 0, Z)," &
"83 (BC_2, *, control, 0)," &
"84 (BC_6, LA27, bidir, 0, 83, 0, Z)," &
"85 (BC_2, *, control, 0)," &
"86 (BC_6, LWE_B0_LBS_B0_LFWE_B, bidir, 0, 85, 0, Z)," &
"87 (BC_2, *, control, 0)," &
"88 (BC_6, LCS_B6_IRQ10, bidir, 0, 87, 0, Z)," &
"89 (BC_2, *, control, 0)," &
"90 (BC_6, LGPL0_LFCLE, bidir, 0, 89, 0, Z)," &
"91 (BC_2, *, control, 0)," &
"92 (BC_6, LA25, bidir, 0, 91, 0, Z)," &
"93 (BC_2, *, control, 0)," &
"94 (BC_6, LAD15, bidir, 0, 93, 0, Z)," &
"95 (BC_2, *, control, 0)," &
"96 (BC_6, LAD14, bidir, 0, 95, 0, Z)," &
"97 (BC_2, *, control, 0)," &
"98 (BC_6, LAD12, bidir, 0, 97, 0, Z)," &
"99 (BC_2, *, control, 0)," &
"100 (BC_6, LAD11, bidir, 0, 99, 0, Z)," &
"101 (BC_2, *, control, 0)," &
"102 (BC_6, LAD13, bidir, 0, 101, 0, Z)," &
"103 (BC_2, *, control, 0)," &
"104 (BC_6, LAD10, bidir, 0, 103, 0, Z)," &
"105 (BC_2, *, control, 0)," &
"106 (BC_6, LGPL2_LOE_B_LFRE_B, bidir, 0, 105, 0, Z)," &
"107 (BC_2, *, control, 0)," &
"108 (BC_6, LGPL4_LUPWAIT_LBPBSE_LFRB_B, bidir, 0, 107, 0, Z)," &
"109 (BC_2, *, control, 0)," &
"110 (BC_6, LA23, bidir, 0, 109, 0, Z)," &
"111 (BC_2, *, control, 0)," &
"112 (BC_6, LAD9, bidir, 0, 111, 0, Z)," &
"113 (BC_2, *, control, 0)," &
"114 (BC_6, LAD7, bidir, 0, 113, 0, Z)," &
"115 (BC_2, *, control, 0)," &
"116 (BC_6, LWE_B1_LBS_B1, bidir, 0, 115, 0, Z)," &
"117 (BC_2, *, control, 0)," &
"118 (BC_6, LAD8, bidir, 0, 117, 0, Z)," &
"119 (BC_2, *, control, 0)," &
"120 (BC_6, LCS_B0, bidir, 0, 119, 0, Z)," &
"121 (BC_2, *, control, 0)," &
"122 (BC_6, LALE, bidir, 0, 121, 0, Z)," &
"123 (BC_2, *, control, 0)," &
"124 (BC_6, LA26, bidir, 0, 123, 0, Z)," &
"125 (BC_2, *, control, 0)," &
"126 (BC_6, LA21, bidir, 0, 125, 0, Z)," &
"127 (BC_2, *, control, 0)," &
"128 (BC_6, LA24, bidir, 0, 127, 0, Z)," &
"129 (BC_2, *, control, 0)," &
"130 (BC_6, LGPL1_LFALE, bidir, 0, 129, 0, Z)," &
"131 (BC_2, *, control, 0)," &
"132 (BC_6, LAD5, bidir, 0, 131, 0, Z)," &
"133 (BC_2, *, control, 0)," &
"134 (BC_6, LCLK0, bidir, 0, 133, 0, Z)," &
"135 (BC_2, *, control, 0)," &
"136 (BC_6, LAD6, bidir, 0, 135, 0, Z)," &
"137 (BC_2, *, control, 0)," &
"138 (BC_6, LA22, bidir, 0, 137, 0, Z)," &
"139 (BC_2, *, control, 0)," &
"140 (BC_6, LA19, bidir, 0, 139, 0, Z)," &
"141 (BC_2, *, control, 0)," &
"142 (BC_6, LAD4, bidir, 0, 141, 0, Z)," &
"143 (BC_2, *, control, 0)," &
"144 (BC_6, LAD3, bidir, 0, 143, 0, Z)," &
"145 (BC_2, *, control, 0)," &
"146 (BC_6, LCS_B1, bidir, 0, 145, 0, Z)," &
"147 (BC_2, *, control, 0)," &
"148 (BC_6, LGPL5, bidir, 0, 147, 0, Z)," &
"149 (BC_2, *, control, 0)," &
"150 (BC_6, LCS_B2, bidir, 0, 149, 0, Z)," &
"151 (BC_2, *, control, 0)," &
"152 (BC_6, LA17, bidir, 0, 151, 0, Z)," &
"153 (BC_2, *, control, 0)," &
"154 (BC_6, LA20, bidir, 0, 153, 0, Z)," &
"155 (BC_2, *, internal, X)," &
"156 (BC_2, LSYNC_IN, input, X)," &
"157 (BC_2, *, control, 0)," &
"158 (BC_6, LAD2, bidir, 0, 157, 0, Z)," &
"159 (BC_2, *, control, 0)," &
"160 (BC_6, LCLK1, bidir, 0, 159, 0, Z)," &
"161 (BC_2, *, control, 0)," &
"162 (BC_1, LSYNC_OUT, output3, 0, 161, 0, Z)," &
"163 (BC_2, *, control, 0)," &
"164 (BC_6, LDP1, bidir, 0, 163, 0, Z)," &
"165 (BC_2, *, control, 0)," &
"166 (BC_6, LBCTL, bidir, 0, 165, 0, Z)," &
"167 (BC_2, *, control, 0)," &
"168 (BC_6, LA16, bidir, 0, 167, 0, Z)," &
"169 (BC_2, *, control, 0)," &
"170 (BC_6, LDP0, bidir, 0, 169, 0, Z)," &
"171 (BC_2, *, control, 0)," &
"172 (BC_6, LAD0, bidir, 0, 171, 0, Z)," &
"173 (BC_2, *, control, 0)," &
"174 (BC_6, LCS_B4_IRQ8, bidir, 0, 173, 0, Z)," &
"175 (BC_2, *, control, 0)," &
"176 (BC_6, LA18, bidir, 0, 175, 0, Z)," &
"177 (BC_2, *, control, 0)," &
"178 (BC_6, LAD1, bidir, 0, 177, 0, Z)," &
"179 (BC_2, *, control, 0)," &
"180 (BC_6, LCS_B3, bidir, 0, 179, 0, Z)," &
"181 (BC_2, *, control, 0)," &
"182 (BC_6, QE_PF14, bidir, 0, 181, 0, Z)," &
"183 (BC_2, *, control, 0)," &
"184 (BC_6, QE_PB26, bidir, 0, 183, 0, Z)," &
"185 (BC_2, *, control, 0)," &
"186 (BC_6, QE_PB27, bidir, 0, 185, 0, Z)," &
"187 (BC_2, *, control, 0)," &
"188 (BC_6, QE_PC30, bidir, 0, 187, 0, Z)," &
"189 (BC_2, *, control, 0)," &
"190 (BC_6, QE_PC28, bidir, 0, 189, 0, Z)," &
"191 (BC_2, *, control, 0)," &
"192 (BC_6, QE_PF3, bidir, 0, 191, 0, Z)," &
"193 (BC_2, *, control, 0)," &
"194 (BC_6, QE_PF13, bidir, 0, 193, 0, Z)," &
"195 (BC_2, *, control, 0)," &
"196 (BC_6, QE_PF5, bidir, 0, 195, 0, Z)," &
"197 (BC_2, *, control, 0)," &
"198 (BC_6, QE_PF4, bidir, 0, 197, 0, Z)," &
"199 (BC_2, *, control, 0)," &
"200 (BC_6, QE_PF6, bidir, 0, 199, 0, Z)," &
"201 (BC_2, *, control, 0)," &
"202 (BC_6, QE_PF8, bidir, 0, 201, 0, Z)," &
"203 (BC_2, *, control, 0)," &
"204 (BC_6, QE_PE27, bidir, 0, 203, 0, Z)," &
"205 (BC_2, *, control, 0)," &
"206 (BC_6, QE_PE30, bidir, 0, 205, 0, Z)," &
"207 (BC_2, *, control, 0)," &
"208 (BC_6, QE_PF7, bidir, 0, 207, 0, Z)," &
"209 (BC_2, *, control, 0)," &
"210 (BC_6, QE_PE26, bidir, 0, 209, 0, Z)," &
"211 (BC_2, *, control, 0)," &
"212 (BC_6, QE_PF9, bidir, 0, 211, 0, Z)," &
"213 (BC_2, *, control, 0)," &
"214 (BC_6, QE_PE29, bidir, 0, 213, 0, Z)," &
"215 (BC_2, *, control, 0)," &
"216 (BC_6, QE_PE28, bidir, 0, 215, 0, Z)," &
"217 (BC_2, *, control, 0)," &
"218 (BC_6, QE_PE24, bidir, 0, 217, 0, Z)," &
"219 (BC_2, *, control, 0)," &
"220 (BC_6, QE_PC31, bidir, 0, 219, 0, Z)," &
"221 (BC_2, *, control, 0)," &
"222 (BC_6, QE_PF22, bidir, 0, 221, 0, Z)," &
"223 (BC_2, *, control, 0)," &
"224 (BC_6, QE_PE25, bidir, 0, 223, 0, Z)," &
"225 (BC_2, *, control, 0)," &
"226 (BC_6, QE_PF18, bidir, 0, 225, 0, Z)," &
"227 (BC_2, *, control, 0)," &
"228 (BC_6, QE_PF12, bidir, 0, 227, 0, Z)," &
"229 (BC_2, *, control, 0)," &
"230 (BC_6, QE_PF21, bidir, 0, 229, 0, Z)," &
"231 (BC_2, *, control, 0)," &
"232 (BC_6, QE_PF15, bidir, 0, 231, 0, Z)," &
"233 (BC_2, *, control, 0)," &
"234 (BC_6, QE_PF17, bidir, 0, 233, 0, Z)," &
"235 (BC_2, *, control, 0)," &
"236 (BC_6, QE_PF11, bidir, 0, 235, 0, Z)," &
"237 (BC_2, *, control, 0)," &
"238 (BC_6, QE_PF19, bidir, 0, 237, 0, Z)," &
"239 (BC_2, *, control, 0)," &
"240 (BC_6, QE_PD20, bidir, 0, 239, 0, Z)," &
"241 (BC_2, *, control, 0)," &
"242 (BC_6, QE_PF20, bidir, 0, 241, 0, Z)," &
"243 (BC_2, *, control, 0)," &
"244 (BC_6, QE_PB31, bidir, 0, 243, 0, Z)," &
"245 (BC_2, *, control, 0)," &
"246 (BC_6, QE_PF1, bidir, 0, 245, 0, Z)," &
"247 (BC_2, *, control, 0)," &
"248 (BC_6, QE_PF16, bidir, 0, 247, 0, Z)," &
"249 (BC_2, *, control, 0)," &
"250 (BC_6, QE_PD23, bidir, 0, 249, 0, Z)," &
"251 (BC_2, *, control, 0)," &
"252 (BC_6, QE_PD0, bidir, 0, 251, 0, Z)," &
"253 (BC_2, *, control, 0)," &
"254 (BC_6, QE_PF10, bidir, 0, 253, 0, Z)," &
"255 (BC_2, *, control, 0)," &
"256 (BC_6, QE_PF0, bidir, 0, 255, 0, Z)," &
"257 (BC_2, *, control, 0)," &
"258 (BC_6, QE_PB30, bidir, 0, 257, 0, Z)," &
"259 (BC_2, *, control, 0)," &
"260 (BC_6, QE_PD22, bidir, 0, 259, 0, Z)," &
"261 (BC_2, *, control, 0)," &
"262 (BC_6, QE_PF2, bidir, 0, 261, 0, Z)," &
"263 (BC_2, *, control, 0)," &
"264 (BC_6, QE_PD2, bidir, 0, 263, 0, Z)," &
"265 (BC_2, *, control, 0)," &
"266 (BC_6, QE_PE7, bidir, 0, 265, 0, Z)," &
"267 (BC_2, *, control, 0)," &
"268 (BC_6, QE_PD25, bidir, 0, 267, 0, Z)," &
"269 (BC_2, *, control, 0)," &
"270 (BC_6, QE_PD1, bidir, 0, 269, 0, Z)," &
"271 (BC_2, *, control, 0)," &
"272 (BC_6, QE_PE31, bidir, 0, 271, 0, Z)," &
"273 (BC_2, *, control, 0)," &
"274 (BC_6, QE_PB29, bidir, 0, 273, 0, Z)," &
"275 (BC_2, *, control, 0)," &
"276 (BC_6, QE_PE9, bidir, 0, 275, 0, Z)," &
"277 (BC_2, *, control, 0)," &
"278 (BC_6, QE_PE3, bidir, 0, 277, 0, Z)," &
"279 (BC_2, *, control, 0)," &
"280 (BC_6, QE_PE8, bidir, 0, 279, 0, Z)," &
"281 (BC_2, *, control, 0)," &
"282 (BC_6, QE_PE1, bidir, 0, 281, 0, Z)," &
"283 (BC_2, *, control, 0)," &
"284 (BC_6, QE_PD3, bidir, 0, 283, 0, Z)," &
"285 (BC_2, *, control, 0)," &
"286 (BC_6, QE_PD13, bidir, 0, 285, 0, Z)," &
"287 (BC_2, *, control, 0)," &
"288 (BC_6, QE_PE0, bidir, 0, 287, 0, Z)," &
"289 (BC_2, *, control, 0)," &
"290 (BC_6, QE_PB28, bidir, 0, 289, 0, Z)," &
"291 (BC_2, *, control, 0)," &
"292 (BC_6, QE_PD7, bidir, 0, 291, 0, Z)," &
"293 (BC_2, *, control, 0)," &
"294 (BC_6, QE_PE6, bidir, 0, 293, 0, Z)," &
"295 (BC_2, *, control, 0)," &
"296 (BC_6, QE_PE2, bidir, 0, 295, 0, Z)," &
"297 (BC_2, *, control, 0)," &
"298 (BC_6, QE_PD27, bidir, 0, 297, 0, Z)," &
"299 (BC_2, *, control, 0)," &
"300 (BC_6, QE_PD21, bidir, 0, 299, 0, Z)," &
"301 (BC_2, *, control, 0)," &
"302 (BC_6, QE_PD12, bidir, 0, 301, 0, Z)," &
"303 (BC_2, *, control, 0)," &
"304 (BC_6, QE_PD9, bidir, 0, 303, 0, Z)," &
"305 (BC_2, *, control, 0)," &
"306 (BC_6, QE_PD16, bidir, 0, 305, 0, Z)," &
"307 (BC_2, *, control, 0)," &
"308 (BC_6, QE_PD31, bidir, 0, 307, 0, Z)," &
"309 (BC_2, *, control, 0)," &
"310 (BC_6, QE_PD14, bidir, 0, 309, 0, Z)," &
"311 (BC_2, *, control, 0)," &
"312 (BC_6, QE_PD30, bidir, 0, 311, 0, Z)," &
"313 (BC_2, *, control, 0)," &
"314 (BC_6, QE_PD4, bidir, 0, 313, 0, Z)," &
"315 (BC_2, *, control, 0)," &
"316 (BC_6, QE_PE4, bidir, 0, 315, 0, Z)," &
"317 (BC_2, *, control, 0)," &
"318 (BC_6, QE_PD17, bidir, 0, 317, 0, Z)," &
"319 (BC_2, *, control, 0)," &
"320 (BC_6, QE_PD29, bidir, 0, 319, 0, Z)," &
"321 (BC_2, *, control, 0)," &
"322 (BC_6, QE_PD8, bidir, 0, 321, 0, Z)," &
"323 (BC_2, *, control, 0)," &
"324 (BC_6, QE_PB11, bidir, 0, 323, 0, Z)," &
"325 (BC_2, *, control, 0)," &
"326 (BC_6, QE_PD15, bidir, 0, 325, 0, Z)," &
"327 (BC_2, *, control, 0)," &
"328 (BC_6, QE_PE5, bidir, 0, 327, 0, Z)," &
"329 (BC_2, *, control, 0)," &
"330 (BC_6, QE_PD5, bidir, 0, 329, 0, Z)," &
"331 (BC_2, *, control, 0)," &
"332 (BC_6, QE_PE20, bidir, 0, 331, 0, Z)," &
"333 (BC_2, *, control, 0)," &
"334 (BC_6, QE_PD28, bidir, 0, 333, 0, Z)," &
"335 (BC_2, *, control, 0)," &
"336 (BC_6, QE_PD19, bidir, 0, 335, 0, Z)," &
"337 (BC_2, *, control, 0)," &
"338 (BC_6, QE_PD6, bidir, 0, 337, 0, Z)," &
"339 (BC_2, *, control, 0)," &
"340 (BC_6, QE_PD26, bidir, 0, 339, 0, Z)," &
"341 (BC_2, *, control, 0)," &
"342 (BC_6, QE_PD24, bidir, 0, 341, 0, Z)," &
"343 (BC_2, *, control, 0)," &
"344 (BC_6, QE_PD11, bidir, 0, 343, 0, Z)," &
"345 (BC_2, *, control, 0)," &
"346 (BC_6, QE_PE23, bidir, 0, 345, 0, Z)," &
"347 (BC_2, *, control, 0)," &
"348 (BC_6, QE_PE19, bidir, 0, 347, 0, Z)," &
"349 (BC_2, *, control, 0)," &
"350 (BC_6, QE_PE21, bidir, 0, 349, 0, Z)," &
"351 (BC_2, *, control, 0)," &
"352 (BC_6, QE_PD10, bidir, 0, 351, 0, Z)," &
"353 (BC_2, *, control, 0)," &
"354 (BC_6, QE_PE18, bidir, 0, 353, 0, Z)," &
"355 (BC_2, *, control, 0)," &
"356 (BC_6, QE_PD18, bidir, 0, 355, 0, Z)," &
"357 (BC_2, *, control, 0)," &
"358 (BC_6, QE_PC12, bidir, 0, 357, 0, Z)," &
"359 (BC_2, *, control, 0)," &
"360 (BC_6, QE_PA5, bidir, 0, 359, 0, Z)," &
"361 (BC_2, *, control, 0)," &
"362 (BC_6, QE_PE13, bidir, 0, 361, 0, Z)," &
"363 (BC_2, *, control, 0)," &
"364 (BC_6, QE_PE15, bidir, 0, 363, 0, Z)," &
"365 (BC_2, *, control, 0)," &
"366 (BC_6, QE_PC27, bidir, 0, 365, 0, Z)," &
"367 (BC_2, *, control, 0)," &
"368 (BC_6, QE_PC18, bidir, 0, 367, 0, Z)," &
"369 (BC_2, *, control, 0)," &
"370 (BC_6, QE_PC4, bidir, 0, 369, 0, Z)," &
"371 (BC_2, *, control, 0)," &
"372 (BC_6, QE_PC14, bidir, 0, 371, 0, Z)," &
"373 (BC_2, *, control, 0)," &
"374 (BC_6, QE_PE12, bidir, 0, 373, 0, Z)," &
"375 (BC_2, *, control, 0)," &
"376 (BC_6, QE_PC10, bidir, 0, 375, 0, Z)," &
"377 (BC_2, *, control, 0)," &
"378 (BC_6, QE_PC21, bidir, 0, 377, 0, Z)," &
"379 (BC_2, *, control, 0)," &
"380 (BC_6, QE_PC26, bidir, 0, 379, 0, Z)," &
"381 (BC_2, *, control, 0)," &
"382 (BC_6, QE_PC15, bidir, 0, 381, 0, Z)," &
"383 (BC_2, *, control, 0)," &
"384 (BC_6, QE_PC13, bidir, 0, 383, 0, Z)," &
"385 (BC_2, *, control, 0)," &
"386 (BC_6, QE_PC7, bidir, 0, 385, 0, Z)," &
"387 (BC_2, *, control, 0)," &
"388 (BC_6, QE_PA10, bidir, 0, 387, 0, Z)," &
"389 (BC_2, *, control, 0)," &
"390 (BC_6, QE_PC19, bidir, 0, 389, 0, Z)," &
"391 (BC_2, *, control, 0)," &
"392 (BC_6, QE_PC23, bidir, 0, 391, 0, Z)," &
"393 (BC_2, *, control, 0)," &
"394 (BC_6, QE_PE10, bidir, 0, 393, 0, Z)," &
"395 (BC_2, *, control, 0)," &
"396 (BC_6, QE_PC6, bidir, 0, 395, 0, Z)," &
"397 (BC_2, *, control, 0)," &
"398 (BC_6, QE_PC22, bidir, 0, 397, 0, Z)," &
"399 (BC_2, *, control, 0)," &
"400 (BC_6, QE_PA11, bidir, 0, 399, 0, Z)," &
"401 (BC_2, *, control, 0)," &
"402 (BC_6, QE_PA13, bidir, 0, 401, 0, Z)," &
"403 (BC_2, *, control, 0)," &
"404 (BC_6, QE_PA27, bidir, 0, 403, 0, Z)," &
"405 (BC_2, *, control, 0)," &
"406 (BC_6, QE_PE11, bidir, 0, 405, 0, Z)," &
"407 (BC_2, *, control, 0)," &
"408 (BC_6, QE_PC1, bidir, 0, 407, 0, Z)," &
"409 (BC_2, *, control, 0)," &
"410 (BC_6, QE_PC29, bidir, 0, 409, 0, Z)," &
"411 (BC_2, *, control, 0)," &
"412 (BC_6, QE_PC0, bidir, 0, 411, 0, Z)," &
"413 (BC_2, *, control, 0)," &
"414 (BC_6, QE_PA28, bidir, 0, 413, 0, Z)," &
"415 (BC_2, *, control, 0)," &
"416 (BC_6, QE_PB2, bidir, 0, 415, 0, Z)," &
"417 (BC_2, *, control, 0)," &
"418 (BC_6, QE_PC5, bidir, 0, 417, 0, Z)," &
"419 (BC_2, *, control, 0)," &
"420 (BC_6, QE_PE16, bidir, 0, 419, 0, Z)," &
"421 (BC_2, *, control, 0)," &
"422 (BC_6, QE_PB23, bidir, 0, 421, 0, Z)," &
"423 (BC_2, *, control, 0)," &
"424 (BC_6, QE_PB10, bidir, 0, 423, 0, Z)," &
"425 (BC_2, *, control, 0)," &
"426 (BC_6, QE_PB8, bidir, 0, 425, 0, Z)," &
"427 (BC_2, *, control, 0)," &
"428 (BC_6, QE_PB7, bidir, 0, 427, 0, Z)," &
"429 (BC_2, *, control, 0)," &
"430 (BC_6, QE_PB17, bidir, 0, 429, 0, Z)," &
"431 (BC_2, *, control, 0)," &
"432 (BC_6, QE_PA19, bidir, 0, 431, 0, Z)," &
"433 (BC_2, *, control, 0)," &
"434 (BC_6, QE_PE14, bidir, 0, 433, 0, Z)," &
"435 (BC_2, *, control, 0)," &
"436 (BC_6, QE_PE17, bidir, 0, 435, 0, Z)," &
"437 (BC_2, *, control, 0)," &
"438 (BC_6, QE_PA25, bidir, 0, 437, 0, Z)," &
"439 (BC_2, *, control, 0)," &
"440 (BC_6, QE_PA24, bidir, 0, 439, 0, Z)," &
"441 (BC_2, *, control, 0)," &
"442 (BC_6, QE_PE22, bidir, 0, 441, 0, Z)," &
"443 (BC_2, *, control, 0)," &
"444 (BC_6, QE_PB22, bidir, 0, 443, 0, Z)," &
"445 (BC_2, *, control, 0)," &
"446 (BC_6, QE_PB25, bidir, 0, 445, 0, Z)," &
"447 (BC_2, *, control, 0)," &
"448 (BC_6, QE_PA8, bidir, 0, 447, 0, Z)," &
"449 (BC_2, *, control, 0)," &
"450 (BC_6, QE_PB6, bidir, 0, 449, 0, Z)," &
"451 (BC_2, *, control, 0)," &
"452 (BC_6, QE_PA0, bidir, 0, 451, 0, Z)," &
"453 (BC_2, *, control, 0)," &
"454 (BC_6, QE_PC8, bidir, 0, 453, 0, Z)," &
"455 (BC_2, *, control, 0)," &
"456 (BC_6, QE_PA31, bidir, 0, 455, 0, Z)," &
"457 (BC_2, *, control, 0)," &
"458 (BC_6, QE_PA1, bidir, 0, 457, 0, Z)," &
"459 (BC_2, *, control, 0)," &
"460 (BC_6, QE_PB5, bidir, 0, 459, 0, Z)," &
"461 (BC_2, *, control, 0)," &
"462 (BC_6, QE_PB3, bidir, 0, 461, 0, Z)," &
"463 (BC_2, *, control, 0)," &
"464 (BC_6, QE_PA30, bidir, 0, 463, 0, Z)," &
"465 (BC_2, *, control, 0)," &
"466 (BC_6, QE_PB0, bidir, 0, 465, 0, Z)," &
"467 (BC_2, *, control, 0)," &
"468 (BC_6, QE_PA7, bidir, 0, 467, 0, Z)," &
"469 (BC_2, *, control, 0)," &
"470 (BC_6, QE_PC9, bidir, 0, 469, 0, Z)," &
"471 (BC_2, *, control, 0)," &
"472 (BC_6, QE_PC11, bidir, 0, 471, 0, Z)," &
"473 (BC_2, *, control, 0)," &
"474 (BC_6, QE_PA12, bidir, 0, 473, 0, Z)," &
"475 (BC_2, *, control, 0)," &
"476 (BC_6, QE_PA9, bidir, 0, 475, 0, Z)," &
"477 (BC_2, *, control, 0)," &
"478 (BC_6, QE_PC20, bidir, 0, 477, 0, Z)," &
"479 (BC_2, *, control, 0)," &
"480 (BC_6, QE_PA6, bidir, 0, 479, 0, Z)," &
"481 (BC_2, *, control, 0)," &
"482 (BC_6, QE_PA4, bidir, 0, 481, 0, Z)," &
"483 (BC_2, *, control, 0)," &
"484 (BC_6, QE_PB1, bidir, 0, 483, 0, Z)," &
"485 (BC_2, *, control, 0)," &
"486 (BC_6, QE_PC25, bidir, 0, 485, 0, Z)," &
"487 (BC_2, *, control, 0)," &
"488 (BC_6, QE_PB9, bidir, 0, 487, 0, Z)," &
"489 (BC_2, *, control, 0)," &
"490 (BC_6, QE_PA2, bidir, 0, 489, 0, Z)," &
"491 (BC_2, *, control, 0)," &
"492 (BC_6, QE_PA29, bidir, 0, 491, 0, Z)," &
"493 (BC_2, *, control, 0)," &
"494 (BC_6, QE_PB4, bidir, 0, 493, 0, Z)," &
"495 (BC_2, *, control, 0)," &
"496 (BC_6, QE_PA3, bidir, 0, 495, 0, Z)," &
"497 (BC_2, *, control, 0)," &
"498 (BC_6, QE_PB24, bidir, 0, 497, 0, Z)," &
"499 (BC_2, *, control, 0)," &
"500 (BC_6, QE_PA14, bidir, 0, 499, 0, Z)," &
"501 (BC_2, *, control, 0)," &
"502 (BC_6, QE_PC2, bidir, 0, 501, 0, Z)," &
"503 (BC_2, *, control, 0)," &
"504 (BC_6, QE_PA26, bidir, 0, 503, 0, Z)," &
"505 (BC_2, *, control, 0)," &
"506 (BC_6, QE_PA21, bidir, 0, 505, 0, Z)," &
"507 (BC_2, *, control, 0)," &
"508 (BC_6, QE_PB16, bidir, 0, 507, 0, Z)," &
"509 (BC_2, *, control, 0)," &
"510 (BC_6, QE_PA17, bidir, 0, 509, 0, Z)," &
"511 (BC_2, *, control, 0)," &
"512 (BC_6, QE_PB21, bidir, 0, 511, 0, Z)," &
"513 (BC_2, *, control, 0)," &
"514 (BC_6, QE_PA23, bidir, 0, 513, 0, Z)," &
"515 (BC_2, *, control, 0)," &
"516 (BC_6, QE_PC3, bidir, 0, 515, 0, Z)," &
"517 (BC_2, *, control, 0)," &
"518 (BC_6, QE_PA20, bidir, 0, 517, 0, Z)," &
"519 (BC_2, *, control, 0)," &
"520 (BC_6, QE_PC24, bidir, 0, 519, 0, Z)," &
"521 (BC_2, *, control, 0)," &
"522 (BC_6, QE_PB15, bidir, 0, 521, 0, Z)," &
"523 (BC_2, *, control, 0)," &
"524 (BC_6, QE_PA16, bidir, 0, 523, 0, Z)," &
"525 (BC_2, *, control, 0)," &
"526 (BC_6, QE_PA18, bidir, 0, 525, 0, Z)," &
"527 (BC_2, *, control, 0)," &
"528 (BC_6, QE_PB20, bidir, 0, 527, 0, Z)," &
"529 (BC_2, *, control, 0)," &
"530 (BC_6, QE_PA22, bidir, 0, 529, 0, Z)," &
"531 (BC_2, *, control, 0)," &
"532 (BC_6, QE_PA15, bidir, 0, 531, 0, Z)," &
"533 (BC_2, *, control, 0)," &
"534 (BC_6, QE_PB19, bidir, 0, 533, 0, Z)," &
"535 (BC_2, *, control, 0)," &
"536 (BC_6, QE_PC17, bidir, 0, 535, 0, Z)," &
"537 (BC_2, *, control, 0)," &
"538 (BC_6, QE_PC16, bidir, 0, 537, 0, Z)," &
"539 (BC_2, *, control, 0)," &
"540 (BC_6, QE_PB14, bidir, 0, 539, 0, Z)," &
"541 (BC_2, *, control, 0)," &
"542 (BC_6, QE_PB13, bidir, 0, 541, 0, Z)," &
"543 (BC_2, *, control, 0)," &
"544 (BC_6, QE_PB18, bidir, 0, 543, 0, Z)," &
"545 (BC_2, *, control, 0)," &
"546 (BC_6, QE_PB12, bidir, 0, 545, 0, Z)," &
"547 (BC_2, *, control, 0)," &
"548 (BC_6, D2_MDIC1, bidir, 0, 547, 0, Z)," &
"549 (BC_2, *, control, 0)," &
"550 (BC_6, D2_MDIC0, bidir, 0, 549, 0, Z)," &
"551 (BC_2, *, control, 0)," &
"552 (BC_6, D2_MCAS_B, bidir, 0, 551, 0, Z)," &
"553 (BC_2, *, control, 0)," &
"554 (BC_6, D2_MBA0, bidir, 0, 553, 0, Z)," &
"555 (BC_2, *, control, 0)," &
"556 (BC_6, D2_MODT2, bidir, 0, 555, 0, Z)," &
"557 (BC_2, *, control, 0)," &
"558 (BC_6, D2_MAPAR_ERR_B, bidir, 0, 557, 0, Z)," &
"559 (BC_2, *, control, 0)," &
"560 (BC_6, D2_MCKE1, bidir, 0, 559, 0, Z)," &
"561 (BC_2, *, control, 0)," &
"562 (BC_6, D2_MCS_B3, bidir, 0, 561, 0, Z)," &
"563 (BC_2, *, control, 0)," &
"564 (BC_6, D2_MA10, bidir, 0, 563, 0, Z)," &
"565 (BC_2, *, control, 0)," &
"566 (BC_6, D2_MA5, bidir, 0, 565, 0, Z)," &
"567 (BC_2, *, control, 0)," &
"568 (BC_6, D2_MA6, bidir, 0, 567, 0, Z)," &
"569 (BC_2, *, control, 0)," &
"570 (BC_6, D2_MAPAR_OUT, bidir, 0, 569, 0, Z)," &
"571 (BC_2, *, control, 0)," &
"572 (BC_6, D2_MA2, bidir, 0, 571, 0, Z)," &
"573 (BC_2, *, control, 0)," &
"574 (BC_6, D2_MRAS_B, bidir, 0, 573, 0, Z)," &
"575 (BC_2, *, control, 0)," &
"576 (BC_6, D2_MODT3, bidir, 0, 575, 0, Z)," &
"577 (BC_2, *, control, 0)," &
"578 (BC_6, D2_MCK_B2, bidir, 0, 577, 0, Z)," &
"579 (BC_2, *, control, 0)," &
"580 (BC_1, D2_MCK2, output3, 0, 579, 0, Z)," &
"581 (BC_2, *, control, 0)," &
"582 (BC_6, D2_MWE_B, bidir, 0, 581, 0, Z)," &
"583 (BC_2, *, control, 0)," &
"584 (BC_6, D2_MBA1, bidir, 0, 583, 0, Z)," &
"585 (BC_2, *, control, 0)," &
"586 (BC_6, D2_MCS_B2, bidir, 0, 585, 0, Z)," &
"587 (BC_2, *, control, 0)," &
"588 (BC_6, D2_MCS_B0, bidir, 0, 587, 0, Z)," &
"589 (BC_2, *, control, 0)," &
"590 (BC_6, D2_MA3, bidir, 0, 589, 0, Z)," &
"591 (BC_2, *, control, 0)," &
"592 (BC_6, D2_MODT0, bidir, 0, 591, 0, Z)," &
"593 (BC_2, *, control, 0)," &
"594 (BC_6, D2_MA12, bidir, 0, 593, 0, Z)," &
"595 (BC_2, *, control, 0)," &
"596 (BC_6, D2_MA0, bidir, 0, 595, 0, Z)," &
"597 (BC_2, *, control, 0)," &
"598 (BC_6, D2_MA13, bidir, 0, 597, 0, Z)," &
"599 (BC_2, *, control, 0)," &
"600 (BC_6, D2_MCKE2, bidir, 0, 599, 0, Z)," &
"601 (BC_2, *, control, 0)," &
"602 (BC_6, D2_MA7, bidir, 0, 601, 0, Z)," &
"603 (BC_2, *, control, 0)," &
"604 (BC_6, D2_MA15, bidir, 0, 603, 0, Z)," &
"605 (BC_2, *, control, 0)," &
"606 (BC_6, D2_MCKE0, bidir, 0, 605, 0, Z)," &
"607 (BC_2, *, control, 0)," &
"608 (BC_6, D2_MA8, bidir, 0, 607, 0, Z)," &
"609 (BC_2, *, control, 0)," &
"610 (BC_6, D2_MA1, bidir, 0, 609, 0, Z)," &
"611 (BC_2, *, control, 0)," &
"612 (BC_6, D2_MBA2, bidir, 0, 611, 0, Z)," &
"613 (BC_2, *, control, 0)," &
"614 (BC_6, D2_MA11, bidir, 0, 613, 0, Z)," &
"615 (BC_2, *, control, 0)," &
"616 (BC_6, D2_MCS_B1, bidir, 0, 615, 0, Z)," &
"617 (BC_2, *, control, 0)," &
"618 (BC_6, D2_MA14, bidir, 0, 617, 0, Z)," &
"619 (BC_2, *, control, 0)," &
"620 (BC_6, D2_MCKE3, bidir, 0, 619, 0, Z)," &
"621 (BC_2, *, control, 0)," &
"622 (BC_6, D2_MA4, bidir, 0, 621, 0, Z)," &
"623 (BC_2, *, control, 0)," &
"624 (BC_6, D2_MODT1, bidir, 0, 623, 0, Z)," &
"625 (BC_2, *, control, 0)," &
"626 (BC_6, D2_MA9, bidir, 0, 625, 0, Z)," &
"627 (BC_2, *, control, 0)," &
"628 (BC_6, D2_MECC1, bidir, 0, 627, 0, Z)," &
"629 (BC_2, *, control, 0)," &
"630 (BC_6, D2_MECC6, bidir, 0, 629, 0, Z)," &
"631 (BC_2, *, control, 0)," &
"632 (BC_6, D2_MDQS_B8, bidir, 0, 631, 0, Z)," &
"633 (BC_2, *, control, 0)," &
"634 (BC_1, D2_MDQS8, output3, 0, 633, 0, Z)," &
"635 (BC_2, *, control, 0)," &
"636 (BC_6, D2_MECC5, bidir, 0, 635, 0, Z)," &
"637 (BC_2, *, control, 0)," &
"638 (BC_6, D2_MECC3, bidir, 0, 637, 0, Z)," &
"639 (BC_2, *, control, 0)," &
"640 (BC_6, D2_MECC7, bidir, 0, 639, 0, Z)," &
"641 (BC_2, *, control, 0)," &
"642 (BC_6, D2_MDM8, bidir, 0, 641, 0, Z)," &
"643 (BC_2, *, control, 0)," &
"644 (BC_6, D2_MECC2, bidir, 0, 643, 0, Z)," &
"645 (BC_2, *, control, 0)," &
"646 (BC_6, D2_MDQ26, bidir, 0, 645, 0, Z)," &
"647 (BC_2, *, control, 0)," &
"648 (BC_6, D2_MECC0, bidir, 0, 647, 0, Z)," &
"649 (BC_2, *, control, 0)," &
"650 (BC_6, D2_MCK_B0, bidir, 0, 649, 0, Z)," &
"651 (BC_2, *, control, 0)," &
"652 (BC_1, D2_MCK0, output3, 0, 651, 0, Z)," &
"653 (BC_2, *, control, 0)," &
"654 (BC_6, D2_MDQ27, bidir, 0, 653, 0, Z)," &
"655 (BC_2, *, control, 0)," &
"656 (BC_6, D2_MDQ30, bidir, 0, 655, 0, Z)," &
"657 (BC_2, *, control, 0)," &
"658 (BC_6, D2_MDQ25, bidir, 0, 657, 0, Z)," &
"659 (BC_2, *, control, 0)," &
"660 (BC_6, D2_MDQ29, bidir, 0, 659, 0, Z)," &
"661 (BC_2, *, control, 0)," &
"662 (BC_6, D2_MECC4, bidir, 0, 661, 0, Z)," &
"663 (BC_2, *, control, 0)," &
"664 (BC_6, D2_MDQ31, bidir, 0, 663, 0, Z)," &
"665 (BC_2, *, control, 0)," &
"666 (BC_6, D2_MDQ24, bidir, 0, 665, 0, Z)," &
"667 (BC_2, *, control, 0)," &
"668 (BC_6, D2_MDQS_B3, bidir, 0, 667, 0, Z)," &
"669 (BC_2, *, control, 0)," &
"670 (BC_1, D2_MDQS3, output3, 0, 669, 0, Z)," &
"671 (BC_2, *, control, 0)," &
"672 (BC_6, D2_MDQ28, bidir, 0, 671, 0, Z)," &
"673 (BC_2, *, control, 0)," &
"674 (BC_6, D2_MDQ14, bidir, 0, 673, 0, Z)," &
"675 (BC_2, *, control, 0)," &
"676 (BC_6, D2_MDQ11, bidir, 0, 675, 0, Z)," &
"677 (BC_2, *, control, 0)," &
"678 (BC_6, D2_MDM3, bidir, 0, 677, 0, Z)," &
"679 (BC_2, *, control, 0)," &
"680 (BC_6, D2_MDQ8, bidir, 0, 679, 0, Z)," &
"681 (BC_2, *, control, 0)," &
"682 (BC_6, D2_MDQ15, bidir, 0, 681, 0, Z)," &
"683 (BC_2, *, control, 0)," &
"684 (BC_6, D2_MDQS_B1, bidir, 0, 683, 0, Z)," &
"685 (BC_2, *, control, 0)," &
"686 (BC_1, D2_MDQS1, output3, 0, 685, 0, Z)," &
"687 (BC_2, *, control, 0)," &
"688 (BC_6, D2_MDQ10, bidir, 0, 687, 0, Z)," &
"689 (BC_2, *, control, 0)," &
"690 (BC_6, D2_MDM1, bidir, 0, 689, 0, Z)," &
"691 (BC_2, *, control, 0)," &
"692 (BC_6, D2_MDQ12, bidir, 0, 691, 0, Z)," &
"693 (BC_2, *, control, 0)," &
"694 (BC_6, D2_MDQ13, bidir, 0, 693, 0, Z)," &
"695 (BC_2, *, control, 0)," &
"696 (BC_6, D2_MDQ9, bidir, 0, 695, 0, Z)," &
"697 (BC_2, *, control, 0)," &
"698 (BC_6, D2_MDM0, bidir, 0, 697, 0, Z)," &
"699 (BC_2, *, control, 0)," &
"700 (BC_6, D2_MDQ1, bidir, 0, 699, 0, Z)," &
"701 (BC_2, *, control, 0)," &
"702 (BC_6, D2_MCK_B1, bidir, 0, 701, 0, Z)," &
"703 (BC_2, *, control, 0)," &
"704 (BC_1, D2_MCK1, output3, 0, 703, 0, Z)," &
"705 (BC_2, *, control, 0)," &
"706 (BC_6, D2_MDQ0, bidir, 0, 705, 0, Z)," &
"707 (BC_2, *, control, 0)," &
"708 (BC_6, D2_MDQ3, bidir, 0, 707, 0, Z)," &
"709 (BC_2, *, control, 0)," &
"710 (BC_6, D2_MDQ6, bidir, 0, 709, 0, Z)," &
"711 (BC_2, *, control, 0)," &
"712 (BC_6, D2_MDQ4, bidir, 0, 711, 0, Z)," &
"713 (BC_2, *, control, 0)," &
"714 (BC_6, D2_MDQ5, bidir, 0, 713, 0, Z)," &
"715 (BC_2, *, control, 0)," &
"716 (BC_6, D2_MDQ2, bidir, 0, 715, 0, Z)," &
"717 (BC_2, *, control, 0)," &
"718 (BC_6, D2_MDQS_B0, bidir, 0, 717, 0, Z)," &
"719 (BC_2, *, control, 0)," &
"720 (BC_1, D2_MDQS0, output3, 0, 719, 0, Z)," &
"721 (BC_2, *, control, 0)," &
"722 (BC_6, D2_MDQ7, bidir, 0, 721, 0, Z)," &
"723 (BC_2, *, control, 0)," &
"724 (BC_6, D2_MDQ18, bidir, 0, 723, 0, Z)," &
"725 (BC_2, *, control, 0)," &
"726 (BC_6, D2_MDQ23, bidir, 0, 725, 0, Z)," &
"727 (BC_2, *, control, 0)," &
"728 (BC_6, D2_MDM2, bidir, 0, 727, 0, Z)," &
"729 (BC_2, *, control, 0)," &
"730 (BC_6, D2_MDQ19, bidir, 0, 729, 0, Z)," &
"731 (BC_2, *, control, 0)," &
"732 (BC_6, D2_MDQ22, bidir, 0, 731, 0, Z)," &
"733 (BC_2, *, control, 0)," &
"734 (BC_6, D2_MDQ16, bidir, 0, 733, 0, Z)," &
"735 (BC_2, *, control, 0)," &
"736 (BC_6, D2_MDQS_B2, bidir, 0, 735, 0, Z)," &
"737 (BC_2, *, control, 0)," &
"738 (BC_1, D2_MDQS2, output3, 0, 737, 0, Z)," &
"739 (BC_2, *, control, 0)," &
"740 (BC_6, D2_MDQ20, bidir, 0, 739, 0, Z)," &
"741 (BC_2, *, control, 0)," &
"742 (BC_6, D2_MDQ21, bidir, 0, 741, 0, Z)," &
"743 (BC_2, *, control, 0)," &
"744 (BC_6, D2_MDQ17, bidir, 0, 743, 0, Z)," &
"745 (BC_2, *, control, 0)," &
"746 (BC_6, D1_MAPAR_ERR_B, bidir, 0, 745, 0, Z)," &
"747 (BC_2, *, control, 0)," &
"748 (BC_6, D1_MAPAR_OUT, bidir, 0, 747, 0, Z)," &
"749 (BC_2, *, control, 0)," &
"750 (BC_6, D1_MA15, bidir, 0, 749, 0, Z)," &
"751 (BC_2, *, control, 0)," &
"752 (BC_6, D1_MA13, bidir, 0, 751, 0, Z)," &
"753 (BC_2, *, control, 0)," &
"754 (BC_6, D1_MCKE3, bidir, 0, 753, 0, Z)," &
"755 (BC_2, *, control, 0)," &
"756 (BC_6, D1_MODT0, bidir, 0, 755, 0, Z)," &
"757 (BC_2, *, control, 0)," &
"758 (BC_6, D1_MODT3, bidir, 0, 757, 0, Z)," &
"759 (BC_2, *, control, 0)," &
"760 (BC_6, D1_MCS_B3, bidir, 0, 759, 0, Z)," &
"761 (BC_2, *, control, 0)," &
"762 (BC_6, D1_MDIC1, bidir, 0, 761, 0, Z)," &
"763 (BC_2, *, control, 0)," &
"764 (BC_6, D1_MODT1, bidir, 0, 763, 0, Z)," &
"765 (BC_2, *, control, 0)," &
"766 (BC_6, D1_MCKE2, bidir, 0, 765, 0, Z)," &
"767 (BC_2, *, control, 0)," &
"768 (BC_6, D1_MCS_B0, bidir, 0, 767, 0, Z)," &
"769 (BC_2, *, control, 0)," &
"770 (BC_6, D1_MCS_B1, bidir, 0, 769, 0, Z)," &
"771 (BC_2, *, control, 0)," &
"772 (BC_6, D1_MWE_B, bidir, 0, 771, 0, Z)," &
"773 (BC_2, *, control, 0)," &
"774 (BC_6, D1_MA1, bidir, 0, 773, 0, Z)," &
"775 (BC_2, *, control, 0)," &
"776 (BC_6, D1_MA4, bidir, 0, 775, 0, Z)," &
"777 (BC_2, *, control, 0)," &
"778 (BC_6, D1_MODT2, bidir, 0, 777, 0, Z)," &
"779 (BC_2, *, control, 0)," &
"780 (BC_6, D1_MA6, bidir, 0, 779, 0, Z)," &
"781 (BC_2, *, control, 0)," &
"782 (BC_6, D1_MA11, bidir, 0, 781, 0, Z)," &
"783 (BC_2, *, control, 0)," &
"784 (BC_6, D1_MA0, bidir, 0, 783, 0, Z)," &
"785 (BC_2, *, control, 0)," &
"786 (BC_6, D1_MBA1, bidir, 0, 785, 0, Z)," &
"787 (BC_2, *, control, 0)," &
"788 (BC_6, D1_MCK_B2, bidir, 0, 787, 0, Z)," &
"789 (BC_2, *, control, 0)," &
"790 (BC_1, D1_MCK2, output3, 0, 789, 0, Z)," &
"791 (BC_2, *, control, 0)," &
"792 (BC_6, D1_MDIC0, bidir, 0, 791, 0, Z)," &
"793 (BC_2, *, control, 0)," &
"794 (BC_6, D1_MRAS_B, bidir, 0, 793, 0, Z)," &
"795 (BC_2, *, control, 0)," &
"796 (BC_6, D1_MA8, bidir, 0, 795, 0, Z)," &
"797 (BC_2, *, control, 0)," &
"798 (BC_6, D1_MA14, bidir, 0, 797, 0, Z)," &
"799 (BC_2, *, control, 0)," &
"800 (BC_6, D1_MCAS_B, bidir, 0, 799, 0, Z)," &
"801 (BC_2, *, control, 0)," &
"802 (BC_6, D1_MA5, bidir, 0, 801, 0, Z)," &
"803 (BC_2, *, control, 0)," &
"804 (BC_6, D1_MBA0, bidir, 0, 803, 0, Z)," &
"805 (BC_2, *, control, 0)," &
"806 (BC_6, D1_MCKE0, bidir, 0, 805, 0, Z)," &
"807 (BC_2, *, control, 0)," &
"808 (BC_6, D1_MA10, bidir, 0, 807, 0, Z)," &
"809 (BC_2, *, control, 0)," &
"810 (BC_6, D1_MBA2, bidir, 0, 809, 0, Z)," &
"811 (BC_2, *, control, 0)," &
"812 (BC_6, D1_MA2, bidir, 0, 811, 0, Z)," &
"813 (BC_2, *, control, 0)," &
"814 (BC_6, D1_MA3, bidir, 0, 813, 0, Z)," &
"815 (BC_2, *, control, 0)," &
"816 (BC_6, D1_MA9, bidir, 0, 815, 0, Z)," &
"817 (BC_2, *, control, 0)," &
"818 (BC_6, D1_MA7, bidir, 0, 817, 0, Z)," &
"819 (BC_2, *, control, 0)," &
"820 (BC_6, D1_MCKE1, bidir, 0, 819, 0, Z)," &
"821 (BC_2, *, control, 0)," &
"822 (BC_6, D1_MCS_B2, bidir, 0, 821, 0, Z)," &
"823 (BC_2, *, control, 0)," &
"824 (BC_6, D1_MCK_B0, bidir, 0, 823, 0, Z)," &
"825 (BC_2, *, control, 0)," &
"826 (BC_1, D1_MCK0, output3, 0, 825, 0, Z)," &
"827 (BC_2, *, control, 0)," &
"828 (BC_6, D1_MA12, bidir, 0, 827, 0, Z)," &
"829 (BC_2, *, control, 0)," &
"830 (BC_6, D1_MDQ25, bidir, 0, 829, 0, Z)," &
"831 (BC_2, *, control, 0)," &
"832 (BC_6, D1_MDQ26, bidir, 0, 831, 0, Z)," &
"833 (BC_2, *, control, 0)," &
"834 (BC_6, D1_MDQ29, bidir, 0, 833, 0, Z)," &
"835 (BC_2, *, control, 0)," &
"836 (BC_6, D1_MDQ27, bidir, 0, 835, 0, Z)," &
"837 (BC_2, *, control, 0)," &
"838 (BC_6, D1_MDQ24, bidir, 0, 837, 0, Z)," &
"839 (BC_2, *, control, 0)," &
"840 (BC_6, D1_MDQ31, bidir, 0, 839, 0, Z)," &
"841 (BC_2, *, control, 0)," &
"842 (BC_6, D1_MDQS_B3, bidir, 0, 841, 0, Z)," &
"843 (BC_2, *, control, 0)," &
"844 (BC_1, D1_MDQS3, output3, 0, 843, 0, Z)," &
"845 (BC_2, *, control, 0)," &
"846 (BC_6, D1_MDQ28, bidir, 0, 845, 0, Z)," &
"847 (BC_2, *, control, 0)," &
"848 (BC_6, D1_MECC7, bidir, 0, 847, 0, Z)," &
"849 (BC_2, *, control, 0)," &
"850 (BC_6, D1_MDQ30, bidir, 0, 849, 0, Z)," &
"851 (BC_2, *, control, 0)," &
"852 (BC_6, D1_MDM8, bidir, 0, 851, 0, Z)," &
"853 (BC_2, *, control, 0)," &
"854 (BC_6, D1_MDM3, bidir, 0, 853, 0, Z)," &
"855 (BC_2, *, control, 0)," &
"856 (BC_6, D1_MECC3, bidir, 0, 855, 0, Z)," &
"857 (BC_2, *, control, 0)," &
"858 (BC_6, D1_MECC6, bidir, 0, 857, 0, Z)," &
"859 (BC_2, *, control, 0)," &
"860 (BC_6, D1_MDQS_B8, bidir, 0, 859, 0, Z)," &
"861 (BC_2, *, control, 0)," &
"862 (BC_1, D1_MDQS8, output3, 0, 861, 0, Z)," &
"863 (BC_2, *, control, 0)," &
"864 (BC_6, D1_MECC5, bidir, 0, 863, 0, Z)," &
"865 (BC_2, *, control, 0)," &
"866 (BC_6, D1_MECC4, bidir, 0, 865, 0, Z)," &
"867 (BC_2, *, control, 0)," &
"868 (BC_6, D1_MECC1, bidir, 0, 867, 0, Z)," &
"869 (BC_2, *, control, 0)," &
"870 (BC_6, D1_MECC0, bidir, 0, 869, 0, Z)," &
"871 (BC_2, *, control, 0)," &
"872 (BC_6, D1_MECC2, bidir, 0, 871, 0, Z)," &
"873 (BC_2, *, control, 0)," &
"874 (BC_6, D1_MDQ2, bidir, 0, 873, 0, Z)," &
"875 (BC_2, *, control, 0)," &
"876 (BC_6, D1_MCK_B1, bidir, 0, 875, 0, Z)," &
"877 (BC_2, *, control, 0)," &
"878 (BC_1, D1_MCK1, output3, 0, 877, 0, Z)," &
"879 (BC_2, *, control, 0)," &
"880 (BC_6, D1_MDQ3, bidir, 0, 879, 0, Z)," &
"881 (BC_2, *, control, 0)," &
"882 (BC_6, D1_MDQ7, bidir, 0, 881, 0, Z)," &
"883 (BC_2, *, control, 0)," &
"884 (BC_6, D1_MDQ1, bidir, 0, 883, 0, Z)," &
"885 (BC_2, *, control, 0)," &
"886 (BC_6, D1_MDM0, bidir, 0, 885, 0, Z)," &
"887 (BC_2, *, control, 0)," &
"888 (BC_6, D1_MDQ5, bidir, 0, 887, 0, Z)," &
"889 (BC_2, *, control, 0)," &
"890 (BC_6, D1_MDQ0, bidir, 0, 889, 0, Z)," &
"891 (BC_2, *, control, 0)," &
"892 (BC_6, D1_MDQ6, bidir, 0, 891, 0, Z)," &
"893 (BC_2, *, control, 0)," &
"894 (BC_6, D1_MDQS_B0, bidir, 0, 893, 0, Z)," &
"895 (BC_2, *, control, 0)," &
"896 (BC_1, D1_MDQS0, output3, 0, 895, 0, Z)," &
"897 (BC_2, *, control, 0)," &
"898 (BC_6, D1_MDQ4, bidir, 0, 897, 0, Z)," &
"899 (BC_2, *, control, 0)," &
"900 (BC_6, D1_MDM1, bidir, 0, 899, 0, Z)," &
"901 (BC_2, *, control, 0)," &
"902 (BC_6, D1_MDQ14, bidir, 0, 901, 0, Z)," &
"903 (BC_2, *, control, 0)," &
"904 (BC_6, D1_MDQ13, bidir, 0, 903, 0, Z)," &
"905 (BC_2, *, control, 0)," &
"906 (BC_6, D1_MDQ10, bidir, 0, 905, 0, Z)," &
"907 (BC_2, *, control, 0)," &
"908 (BC_6, D1_MDQ11, bidir, 0, 907, 0, Z)," &
"909 (BC_2, *, control, 0)," &
"910 (BC_6, D1_MDQ15, bidir, 0, 909, 0, Z)," &
"911 (BC_2, *, control, 0)," &
"912 (BC_6, D1_MDQS_B1, bidir, 0, 911, 0, Z)," &
"913 (BC_2, *, control, 0)," &
"914 (BC_1, D1_MDQS1, output3, 0, 913, 0, Z)," &
"915 (BC_2, *, control, 0)," &
"916 (BC_6, D1_MDQ9, bidir, 0, 915, 0, Z)," &
"917 (BC_2, *, control, 0)," &
"918 (BC_6, D1_MDQ12, bidir, 0, 917, 0, Z)," &
"919 (BC_2, *, control, 0)," &
"920 (BC_6, D1_MDQ8, bidir, 0, 919, 0, Z)," &
"921 (BC_2, *, control, 0)," &
"922 (BC_6, D1_MDQ18, bidir, 0, 921, 0, Z)," &
"923 (BC_2, *, control, 0)," &
"924 (BC_6, D1_MDQ23, bidir, 0, 923, 0, Z)," &
"925 (BC_2, *, control, 0)," &
"926 (BC_6, D1_MDQ22, bidir, 0, 925, 0, Z)," &
"927 (BC_2, *, control, 0)," &
"928 (BC_6, D1_MDQS_B2, bidir, 0, 927, 0, Z)," &
"929 (BC_2, *, control, 0)," &
"930 (BC_1, D1_MDQS2, output3, 0, 929, 0, Z)," &
"931 (BC_2, *, control, 0)," &
"932 (BC_6, D1_MDQ17, bidir, 0, 931, 0, Z)," &
"933 (BC_2, *, control, 0)," &
"934 (BC_6, D1_MDM2, bidir, 0, 933, 0, Z)," &
"935 (BC_2, *, control, 0)," &
"936 (BC_6, D1_MDQ21, bidir, 0, 935, 0, Z)," &
"937 (BC_2, *, control, 0)," &
"938 (BC_6, D1_MDQ19, bidir, 0, 937, 0, Z)," &
"939 (BC_2, *, control, 0)," &
"940 (BC_6, D1_MDQ20, bidir, 0, 939, 0, Z)," &
"941 (BC_2, *, control, 0)," &
"942 (BC_6, D1_MDQ16, bidir, 0, 941, 0, Z)," &
"943 (BC_2, *, control, 0)," &
"944 (BC_6, IRQ_OUT_B, bidir, 0, 943, 0, Z)," &
"945 (BC_2, *, control, 0)," &
"946 (BC_6, UDE_B, bidir, 0, 945, 0, Z)," &
"947 (BC_2, *, control, 0)," &
"948 (BC_6, IRQ4_MSRCID3, bidir, 0, 947, 0, Z)," &
"949 (BC_2, *, control, 0)," &
"950 (BC_6, ASLEEP, bidir, 0, 949, 0, Z)," &
"951 (BC_2, *, control, 0)," &
"952 (BC_6, MCP_B, bidir, 0, 951, 0, Z)," &
"953 (BC_2, *, control, 0)," &
"954 (BC_1, CLK_OUT, output3, 0, 953, 0, Z)," &
"955 (BC_2, *, internal, X)," &
"956 (BC_2, TRIG_IN, input, X)," &
"957 (BC_2, *, control, 0)," &
"958 (BC_6, RTC, bidir, 0, 957, 0, Z)";
attribute DESIGN_WARNING of MPC8569E: entity is
"WARNING: Some of the I/O on this device support multiple supply voltages "&
"and must be configured appropriately. INCORRECT VOLTAGE SELECT SETTINGS CAN "&
"LEAD TO IRREVERSIBLE DEVICE DAMAGE. Read the comments in the header of the "&
"BSDL and refer to the Hardware Spec. ";
end MPC8569E;