BSDL Files Library for JTAG

The only free public library that contains thousands of BSDL (Boundary Scan Description Language) models to use with BScan/JTAG tools

BSDL model: EPC16U88

-- Copyright (C) 1998-2007 Altera Corporation
--
-- File Name     : EPC16U88.BSD
-- Device        : EPC16U88
-- Package       : 88-Pin Ultra FineLine Ball Grid Array
-- BSDL Version  : 3.11
-- Date Created  : 2/6/2007
-- Created by    : Altera BSDL Generation Program Ver. 1.20      
-- Verification  : Software syntax checked on:
--                   Agilent Technologies 3070 BSDL Compiler
--                   ASSET ScanWorks ver. 3.1.1
--                   Corelis ScanPlus TPG ver. 4.12
--                   Genrad BSDL syntax checker ver. 4.01, a component
--                      of Scan Pathfinder(tm) and BasicSCAN(tm)
--                   GOEPEL Electronics' CASCON-GALAXY(R) ver. 4.0
--                   JTAG Technologies BSDL Converter ver. 2.4
--
-- Documentation : Enhanced Configuration Devices Family Datasheet
--                 AN39: JTAG Boundary Scan Testing for Altera Devices
--
-- *********************************************************************
-- *                           IMPORTANT NOTICE                        *
-- *********************************************************************
--
-- Altera, EPC and EPC16 are trademarks of Altera
-- Corporation.  Altera products, marketed under trademarks, are
-- protected under numerous US and foreign patents and pending
-- applications, maskwork rights, and copyrights.   Altera warrants
-- performance of its semiconductor products to current specifications
-- in accordance with Altera's standard warranty, but reserves the
-- right to make changes to any products and services at any time
-- without notice.  Altera assumes no responsibility or liability
-- arising out of the application or use of any information, product,
-- or service described herein except as expressly agreed to in
-- writing by Altera Corporation.  Altera customers are advised to
-- obtain the latest version of device specifications before relying
-- on any published information and before placing orders for products
-- or services.
--
--                      **EPC16 Test Options**
-- 
-- The EPC16 allows an external source (microprocessor or PLD)
-- to directly access the Flash memory within the device.  When
-- using this direct Flash access the user must take precaution
-- to not over-write Flash memory during 1149.1 testing.  The
-- EPC16 test options are described below.
-- 
-- I) Direct Flash access is not utilized
-- 
--    Typical EPC16 applications will not utilize the ability to
--    directly access the Flash memory; therefore, this BSDL file
--    has been written for this typical usage.  CE is left
--    unconnected on the board and this BSDL file is used as is.
-- 
-- II) Direct Flash access is utilized
-- 
--    One of two options can be used when testing with the CE
--    pin connected to the board:
-- 
--    1) Use this BSDL file as is and tri-state any pins that
--       are connected to the CE pin during testing.
-- 
--    2) Hold RP# low during testing to prevent any corruption
--       to the Flash memory, and make the following edits to
--       this file:
--        a) Under the Entity Definitions With Ports section,
--           change the definition of CE from linkage bit to
--           out bit.
--        b) Edit the CE bsc group definition as shown below.
-- 
--            BSC group 16 for untestable Family-specific pin
--            "48  (BC_4, *, internal, X)," &
--            "49  (BC_4, *, internal, 1)," &
--            "50  (BC_4, *, internal, X)," &
-- 
--           Redefined as output bsc group:
-- 
--            BSC group 16 for Family-specific output pin H7
--            "48  (BC_4, *, internal, X)," &
--            "49  (BC_1, *, control, 1)," &
--            "50  (BC_1, CE, output3, X, 49, 1, PULL1)," &
--
-- *********************************************************************
-- *                     ENTITY DEFINITION WITH PORTS                  *
-- *********************************************************************

entity EPC16U88 is
  generic (PHYSICAL_PIN_MAP : string := "UFBGA88");

port (
--EPC Family-Specific Pins
    NCS           , EXCLK         , PORSEL        , PGM0          , 
    PGM1          , PGM2          : in bit;
    A0            , A1            , A2            , A3            , 
    A4            , A5            , A6            , A7            , 
    A8            , A9            , A10           , A11           , 
    A12           , A13           , A14           , A15           , 
    A16           , A17           , A18           , A19           , 
    DCLK          , DATA0         , DATA1         , DATA2         , 
    DATA3         , DATA4         , DATA5         , DATA6         , 
    DATA7         , C_WE          , C_RP          , OEN           
    : out bit;
    DQ0           , DQ1           , DQ2           , DQ3           , 
    DQ4           , DQ5           , DQ6           , DQ7           , 
    DQ8           , DQ9           , DQ10          , DQ11          , 
    DQ12          , DQ13          , DQ14          , DQ15          
    : inout bit;
    NINIT_CONF    , OE            , TM0           , TM1           , 
    CE            , F_WE          , RYBY          , A20           , 
    F_RP          , WP            : linkage bit;
--JTAG Ports
    TCK    , TMS    , TDI    : in bit;
    TDO    : out bit;
--No Connect Pins
    NC     : linkage bit_vector (1 to 6);
--Power Pins
    VCC    : linkage bit_vector (1 to 8);
--Ground Pins
    GND    : linkage bit_vector (1 to 6)
);

use STD_1149_1_1994.all;

attribute COMPONENT_CONFORMANCE of EPC16U88 :
          entity is "STD_1149_1_1993";

-- *********************************************************************
-- *                             PIN MAPPING                           *
-- *********************************************************************

attribute PIN_MAP of EPC16U88 : entity is PHYSICAL_PIN_MAP;
constant UFBGA88 : PIN_MAP_STRING :=
--EPC Family-Specific Pins
    "NCS           : G2  , EXCLK         : H3  , PORSEL      : F6  , "&
    "PGM0          : B8  , PGM1          : C6  , PGM2        : F5  , "&
    "A0            : H6  , A1            : G9  , A2          : G8  , "&
    "A3            : G7  , A4            : H5  , A5          : H4  , "&
    "A6            : G6  , A7            : G5  , A8          : B4  , "&
    "A9            : B6  , A10           : B5  , A11         : A4  , "&
    "A12           : A8  , A13           : A7  , A14         : A6  , "&
    "A15           : A5  , A16           : B3  , A17         : G4  , "&
    "A18           : G3  , A19           : E5  , DCLK        : A10 , "&
    "DATA0         : G12 , DATA1         : F11 , DATA2       : E11 , "&
    "DATA3         : D11 , DATA4         : C11 , DATA5       : B11 , "&
    "DATA6         : B12 , DATA7         : A11 , C_WE        : B2  , "&
    "C_RP          : D8  , OEN           : H9  , DQ0         : F9  , "&
    "DQ1           : F10 , DQ2           : E9  , DQ3         : E10 , "&
    "DQ4           : C9  , DQ5           : C10 , DQ6         : C8  , "&
    "DQ7           : B10 , DQ8           : F8  , DQ9         : F7  , "&
    "DQ10          : E8  , DQ11          : E6  , DQ12        : D7  , "&
    "DQ13          : C7  , DQ14          : B9  , DQ15        : B7  , "&
    "NINIT_CONF    : C5  , OE            : B1  , TM0         : H10 , "&
    "TM1           : D5  , CE            : H7  , F_WE        : C3  , "&
    "RYBY          : C4  , A20           : A3  , F_RP        : D4  , "&
    "WP            : E3  , "&
--JTAG ports
    "TCK    : C2  , TMS    : F2  , TDI    : D2  , TDO    : E2  , "&
--No Connect Pins
    "NC     : (A1  , A12 , F3  , F4  , H1  , H12 ), "&
--Power Pins
    "VCC    : (G1  , E7  , G10 , D6  , A2  , D9  , D10 , E4  ), "&
--Ground Pins
    "GND    : (H2  , G11 , H11 , A9  , D3  , H8  )";

-- *********************************************************************
-- *                       IEEE 1149.1 TAP PORTS                       *
-- *********************************************************************

attribute TAP_SCAN_IN of TDI     : signal is true;
attribute TAP_SCAN_MODE of TMS   : signal is true;
attribute TAP_SCAN_OUT of TDO    : signal is true;
attribute TAP_SCAN_CLOCK of TCK  : signal is (10.00e6,BOTH);

-- *********************************************************************
-- *                   INSTRUCTIONS AND REGISTER ACCESS                *
-- *********************************************************************

attribute INSTRUCTION_LENGTH of EPC16U88 : entity is 10;
attribute INSTRUCTION_OPCODE of EPC16U88 : entity is
  "BYPASS            (1111111111), "&
  "EXTEST            (0000000000), "&
  "SAMPLE            (0001010101), "&
  "IDCODE            (0001011001), "&
  "USERCODE          (0001111001)";

attribute INSTRUCTION_CAPTURE of EPC16U88 : entity is "0101010X01";

attribute IDCODE_REGISTER of EPC16U88 : entity is
  "0000"&               --4-bit Version
  "0001000000001010"&   --16-bit Part Number (hex 100A)
  "00001101110"&        --11-bit Manufacturer's Identity
  "1";                  --Mandatory LSB
attribute USERCODE_REGISTER of EPC16U88 : entity is
  "XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX";
attribute REGISTER_ACCESS of EPC16U88 : entity is
  "DEVICE_ID        (IDCODE)";

-- *********************************************************************
-- *                    BOUNDARY SCAN CELL INFORMATION                 *
-- *********************************************************************

attribute BOUNDARY_LENGTH of EPC16U88 : entity is 174;
attribute BOUNDARY_REGISTER of EPC16U88 : entity is
  --BSC group 0 for Family-specific output pin E5
  "0   (BC_4, *, internal, X)," &
  "1   (BC_1, *, control, 1)," &
  "2   (BC_1, A19, output3, X, 1, 1, PULL1)," &

  --BSC group 1 for Family-specific output pin G3
  "3   (BC_4, *, internal, X)," &
  "4   (BC_1, *, control, 1)," &
  "5   (BC_1, A18, output3, X, 4, 1, PULL1)," &

  --BSC group 2 for Family-specific output pin G4
  "6   (BC_4, *, internal, X)," &
  "7   (BC_1, *, control, 1)," &
  "8   (BC_1, A17, output3, X, 7, 1, PULL1)," &

  --BSC group 3 for Family-specific output pin G5
  "9   (BC_4, *, internal, X)," &
  "10  (BC_1, *, control, 1)," &
  "11  (BC_1, A7, output3, X, 10, 1, PULL1)," &

  --BSC group 4 for Family-specific output pin G6
  "12  (BC_4, *, internal, X)," &
  "13  (BC_1, *, control, 1)," &
  "14  (BC_1, A6, output3, X, 13, 1, PULL1)," &

  --BSC group 5 for Family-specific output pin H4
  "15  (BC_4, *, internal, X)," &
  "16  (BC_1, *, control, 1)," &
  "17  (BC_1, A5, output3, X, 16, 1, PULL1)," &

  --BSC group 6 for Family-specific output pin H5
  "18  (BC_4, *, internal, X)," &
  "19  (BC_1, *, control, 1)," &
  "20  (BC_1, A4, output3, X, 19, 1, PULL1)," &

  --BSC group 7 for Family-specific output pin G7
  "21  (BC_4, *, internal, X)," &
  "22  (BC_1, *, control, 1)," &
  "23  (BC_1, A3, output3, X, 22, 1, PULL1)," &

  --BSC group 8 for Family-specific output pin G8
  "24  (BC_4, *, internal, X)," &
  "25  (BC_1, *, control, 1)," &
  "26  (BC_1, A2, output3, X, 25, 1, PULL1)," &

  --BSC group 9 for Family-specific input pin G2
  "27  (BC_4, NCS, input, X)," &
  "28  (BC_4, *, internal, X)," &
  "29  (BC_4, *, internal, X)," &

  --BSC group 10 for Family-specific input pin H3
  "30  (BC_4, EXCLK, input, X)," &
  "31  (BC_4, *, internal, X)," &
  "32  (BC_4, *, internal, X)," &

  --BSC group 11 for Family-specific output pin G9
  "33  (BC_4, *, internal, X)," &
  "34  (BC_1, *, control, 1)," &
  "35  (BC_1, A1, output3, X, 34, 1, PULL1)," &

  --BSC group 12 for Family-specific output pin H6
  "36  (BC_4, *, internal, X)," &
  "37  (BC_1, *, control, 1)," &
  "38  (BC_1, A0, output3, X, 37, 1, PULL1)," &

  --BSC group 13 for Family-specific input pin F6
  "39  (BC_4, PORSEL, input, X)," &
  "40  (BC_4, *, internal, X)," &
  "41  (BC_4, *, internal, X)," &

  --BSC group 14 for Family-specific output pin D8
  "42  (BC_4, *, internal, X)," &
  "43  (BC_1, *, control, 1)," &
  "44  (BC_1, C_RP, output3, X, 43, 1, PULL1)," &

  --BSC group 15 for Family-specific output pin G12
  "45  (BC_4, *, internal, X)," &
  "46  (BC_1, *, control, 1)," &
  "47  (BC_1, DATA0, output3, X, 46, 1, PULL1)," &

  --BSC group 16 for untestable Family-specific pin
  "48  (BC_4, *, internal, X)," &
  "49  (BC_4, *, internal, 1)," &
  "50  (BC_4, *, internal, X)," &

  --BSC group 17 for Family-specific output pin H9
  "51  (BC_4, *, internal, X)," &
  "52  (BC_1, *, control, 1)," &
  "53  (BC_1, OEN, output3, X, 52, 1, PULL1)," &

  --BSC group 18 for Family-specific bidir pin F9
  "54  (BC_4, DQ0, input, X)," &
  "55  (BC_1, *, control, 1)," &
  "56  (BC_1, DQ0, output3, X, 55, 1, Z)," &

  --BSC group 19 for Family-specific bidir pin F8
  "57  (BC_4, DQ8, input, X)," &
  "58  (BC_1, *, control, 1)," &
  "59  (BC_1, DQ8, output3, X, 58, 1, Z)," &

  --BSC group 20 for Family-specific bidir pin F10
  "60  (BC_4, DQ1, input, X)," &
  "61  (BC_1, *, control, 1)," &
  "62  (BC_1, DQ1, output3, X, 61, 1, Z)," &

  --BSC group 21 for Family-specific output pin F11
  "63  (BC_4, *, internal, X)," &
  "64  (BC_1, *, control, 1)," &
  "65  (BC_1, DATA1, output3, X, 64, 1, PULL1)," &

  --BSC group 22 for Family-specific bidir pin F7
  "66  (BC_4, DQ9, input, X)," &
  "67  (BC_1, *, control, 1)," &
  "68  (BC_1, DQ9, output3, X, 67, 1, Z)," &

  --BSC group 23 for Family-specific bidir pin E9
  "69  (BC_4, DQ2, input, X)," &
  "70  (BC_1, *, control, 1)," &
  "71  (BC_1, DQ2, output3, X, 70, 1, Z)," &

  --BSC group 24 for Family-specific bidir pin E8
  "72  (BC_4, DQ10, input, X)," &
  "73  (BC_1, *, control, 1)," &
  "74  (BC_1, DQ10, output3, X, 73, 1, Z)," &

  --BSC group 25 for Family-specific output pin E11
  "75  (BC_4, *, internal, X)," &
  "76  (BC_1, *, control, 1)," &
  "77  (BC_1, DATA2, output3, X, 76, 1, PULL1)," &

  --BSC group 26 for Family-specific bidir pin E10
  "78  (BC_4, DQ3, input, X)," &
  "79  (BC_1, *, control, 1)," &
  "80  (BC_1, DQ3, output3, X, 79, 1, Z)," &

  --BSC group 27 for Family-specific bidir pin E6
  "81  (BC_4, DQ11, input, X)," &
  "82  (BC_1, *, control, 1)," &
  "83  (BC_1, DQ11, output3, X, 82, 1, Z)," &

  --BSC group 28 for Family-specific output pin D11
  "84  (BC_4, *, internal, X)," &
  "85  (BC_1, *, control, 1)," &
  "86  (BC_1, DATA3, output3, X, 85, 1, PULL1)," &

  --BSC group 29 for Family-specific bidir pin C9
  "87  (BC_4, DQ4, input, X)," &
  "88  (BC_1, *, control, 1)," &
  "89  (BC_1, DQ4, output3, X, 88, 1, Z)," &

  --BSC group 30 for Family-specific bidir pin D7
  "90  (BC_4, DQ12, input, X)," &
  "91  (BC_1, *, control, 1)," &
  "92  (BC_1, DQ12, output3, X, 91, 1, Z)," &

  --BSC group 31 for Family-specific bidir pin C10
  "93  (BC_4, DQ5, input, X)," &
  "94  (BC_1, *, control, 1)," &
  "95  (BC_1, DQ5, output3, X, 94, 1, Z)," &

  --BSC group 32 for Family-specific output pin C11
  "96  (BC_4, *, internal, X)," &
  "97  (BC_1, *, control, 1)," &
  "98  (BC_1, DATA4, output3, X, 97, 1, PULL1)," &

  --BSC group 33 for Family-specific bidir pin C7
  "99  (BC_4, DQ13, input, X)," &
  "100 (BC_1, *, control, 1)," &
  "101 (BC_1, DQ13, output3, X, 100, 1, Z)," &

  --BSC group 34 for Family-specific bidir pin C8
  "102 (BC_4, DQ6, input, X)," &
  "103 (BC_1, *, control, 1)," &
  "104 (BC_1, DQ6, output3, X, 103, 1, Z)," &

  --BSC group 35 for Family-specific bidir pin B9
  "105 (BC_4, DQ14, input, X)," &
  "106 (BC_1, *, control, 1)," &
  "107 (BC_1, DQ14, output3, X, 106, 1, Z)," &

  --BSC group 36 for Family-specific bidir pin B10
  "108 (BC_4, DQ7, input, X)," &
  "109 (BC_1, *, control, 1)," &
  "110 (BC_1, DQ7, output3, X, 109, 1, Z)," &

  --BSC group 37 for Family-specific bidir pin B7
  "111 (BC_4, DQ15, input, X)," &
  "112 (BC_1, *, control, 1)," &
  "113 (BC_1, DQ15, output3, X, 112, 1, Z)," &

  --BSC group 38 for Family-specific output pin A11
  "114 (BC_4, *, internal, X)," &
  "115 (BC_1, *, control, 1)," &
  "116 (BC_1, DATA7, output3, X, 115, 1, PULL1)," &

  --BSC group 39 for Family-specific output pin B12
  "117 (BC_4, *, internal, X)," &
  "118 (BC_1, *, control, 1)," &
  "119 (BC_1, DATA6, output3, X, 118, 1, PULL1)," &

  --BSC group 40 for Family-specific output pin B11
  "120 (BC_4, *, internal, X)," &
  "121 (BC_1, *, control, 1)," &
  "122 (BC_1, DATA5, output3, X, 121, 1, PULL1)," &

  --BSC group 41 for Family-specific output pin A10
  "123 (BC_4, *, internal, X)," &
  "124 (BC_1, *, control, 1)," &
  "125 (BC_1, DCLK, output3, X, 124, 1, PULL1)," &

  --BSC group 42 for Family-specific input pin C6
  "126 (BC_4, PGM1, input, X)," &
  "127 (BC_4, *, internal, X)," &
  "128 (BC_4, *, internal, X)," &

  --BSC group 43 for Family-specific input pin B8
  "129 (BC_4, PGM0, input, X)," &
  "130 (BC_4, *, internal, X)," &
  "131 (BC_4, *, internal, X)," &

  --BSC group 44 for Family-specific input pin F5
  "132 (BC_4, PGM2, input, X)," &
  "133 (BC_4, *, internal, X)," &
  "134 (BC_4, *, internal, X)," &

  --BSC group 45 for untestable Family-specific pin
  "135 (BC_4, *, internal, X)," &
  "136 (BC_4, *, internal, 1)," &
  "137 (BC_4, *, internal, X)," &

  --BSC group 46 for Family-specific output pin B3
  "138 (BC_4, *, internal, X)," &
  "139 (BC_1, *, control, 1)," &
  "140 (BC_1, A16, output3, X, 139, 1, PULL1)," &

  --BSC group 47 for Family-specific output pin A5
  "141 (BC_4, *, internal, X)," &
  "142 (BC_1, *, control, 1)," &
  "143 (BC_1, A15, output3, X, 142, 1, PULL1)," &

  --BSC group 48 for untestable Family-specific pin
  "144 (BC_4, *, internal, X)," &
  "145 (BC_4, *, internal, 1)," &
  "146 (BC_4, *, internal, X)," &

  --BSC group 49 for Family-specific output pin A6
  "147 (BC_4, *, internal, X)," &
  "148 (BC_1, *, control, 1)," &
  "149 (BC_1, A14, output3, X, 148, 1, PULL1)," &

  --BSC group 50 for Family-specific output pin A7
  "150 (BC_4, *, internal, X)," &
  "151 (BC_1, *, control, 1)," &
  "152 (BC_1, A13, output3, X, 151, 1, PULL1)," &

  --BSC group 51 for Family-specific output pin A8
  "153 (BC_4, *, internal, X)," &
  "154 (BC_1, *, control, 1)," &
  "155 (BC_1, A12, output3, X, 154, 1, PULL1)," &

  --BSC group 52 for Family-specific output pin A4
  "156 (BC_4, *, internal, X)," &
  "157 (BC_1, *, control, 1)," &
  "158 (BC_1, A11, output3, X, 157, 1, PULL1)," &

  --BSC group 53 for Family-specific output pin B5
  "159 (BC_4, *, internal, X)," &
  "160 (BC_1, *, control, 1)," &
  "161 (BC_1, A10, output3, X, 160, 1, PULL1)," &

  --BSC group 54 for Family-specific output pin B6
  "162 (BC_4, *, internal, X)," &
  "163 (BC_1, *, control, 1)," &
  "164 (BC_1, A9, output3, X, 163, 1, PULL1)," &

  --BSC group 55 for Family-specific output pin B2
  "165 (BC_4, *, internal, X)," &
  "166 (BC_1, *, control, 1)," &
  "167 (BC_1, C_WE, output3, X, 166, 1, PULL1)," &

  --BSC group 56 for Family-specific output pin B4
  "168 (BC_4, *, internal, X)," &
  "169 (BC_1, *, control, 1)," &
  "170 (BC_1, A8, output3, X, 169, 1, PULL1)," &

  --BSC group 57 for untestable Family-specific pin
  "171 (BC_4, *, internal, X)," &
  "172 (BC_4, *, internal, 1)," &
  "173 (BC_4, *, internal, X)" ;

-- *********************************************************************
-- *                            DESIGN WARNING                         *
-- *********************************************************************

attribute DESIGN_WARNING of EPC16U88 : entity is
  "Designers must ensure that 1149.1 testing does not corrupt device"&
  "data. This EPC16 BSDL file is created for typical device"&
  "applications where the CE pin is left unconnected, thereby"&
  "allowing an internal pull-up to hold this signal high and prevent"&
  "accidental device corruption.  If CE is connected, refer to the"&
  "comments at the top of the BSDL file.";

end EPC16U88;