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BSDL File: LM3S2918 Download View details  


--//*****************************************************************************
--//
--// lm3s2918_ra2_lqfp_v1p0.bsdl - Boundary Scan Description Language (BSDL) file
--//                for the Texas Instruments LM3S2918 Stellaris microcontroller.
--//
--// Version 1.0    - 01/19/2010 - Initial Release of BSDL entity
--//                - LM3S2918, Revision A2, 100-pin LQFP
--//
--//
--// Copyright (c) 2010 Texas Instruments, Inc.  All rights reserved.
--//
--// Software License Agreement
--//
--// Texas Instruments, Inc. (TI) is supplying this software for use solely and
--// exclusively on TI's Stellaris Family of microcontroller products.
--//
--// The software is owned by TI and/or its suppliers, and is protected under
--// applicable copyright laws.  All rights are reserved.  Any use in violation
--// of the foregoing restrictions may subject the user to criminal sanctions
--// under applicable laws, as well as to civil liability for the breach of the
--// terms and conditions of this license.
--//
--// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
--// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
--// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
--// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
--// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
--//
--//*****************************************************************************


entity LM3S2918 is generic (PHYSICAL_PIN_MAP : string := "LQFP_100");


port  ( ADC0:           linkage bit;
        ADC1:           linkage bit;
        ADC2:           linkage bit;
        ADC3:           linkage bit;
        ADC4:           linkage bit;
        ADC5:           linkage bit;
        ADC6:           linkage bit;
        ADC7:           linkage bit;
        CMOD0:          in      bit;
        CMOD1:          in      bit;
        GND:            linkage bit_vector(0 to 12);
        GNDA:           linkage bit_vector(0 to 1);
        HIB:            linkage bit;
        LDO:            linkage bit;
        OSC0:           linkage bit;
        OSC1:           linkage bit;
        PA0_U0Rx:       inout   bit;
        PA1_U0Tx:       inout   bit;
        PA2_SSI0Clk:    inout   bit;
        PA3_SSI0Fss:    inout   bit;
        PA4_SSI0Rx:     inout   bit;
        PA5_SSI0Tx:     inout   bit;
        PA6_I2C1SCL:    inout   bit;
        PA7_I2C1SDA:    inout   bit;
        PB0_CCP0:       inout   bit;
        PB1_CCP2:       inout   bit;
        PB2_I2C0SCL:    inout   bit;
        PB3_I2C0SDA:    inout   bit;
        PB4:            inout   bit;
        PB5:            inout   bit;
        PB6:            inout   bit;
        PC4_CCP5:       inout   bit;
        PC5:            inout   bit;
        PC6_CCP3:       inout   bit;
        PC7_CCP4:       inout   bit;
        PD0_CAN0Rx:     inout   bit;
        PD1_CAN0Tx:     inout   bit;
        PD2_U1Rx:       inout   bit;
        PD3_U1Tx:       inout   bit;
        PE0_SSI1Clk:    inout   bit;
        PE1_SSI1Fss:    inout   bit;
        PE2_SSI1Rx:     inout   bit;
        PE3_SSI1Tx:     inout   bit;
        PF0:            inout   bit;
        PF1:            inout   bit;
        PF2:            inout   bit;
        PF3:            inout   bit;
        PF4_C0o:        inout   bit;
        PF5_C1o:        inout   bit;
        PF6_CCP1:       inout   bit;
        PF7:            inout   bit;
        PG0:            inout   bit;
        PG1:            inout   bit;
        PG2:            inout   bit;
        PG3:            inout   bit;
        PG4:            inout   bit;
        PG5:            inout   bit;
        PG6:            inout   bit;
        PG7:            inout   bit;
        PH0_CCP6:       inout   bit;
        PH1_CCP7:       inout   bit;
        PH2:            inout   bit;
        PH3:            inout   bit;
        RST:            in      bit;
        TCK:            in      bit;
        TDI:            in      bit;
        TDO:            out     bit;
        TMS:            in      bit;
        TRST:           in      bit;
        VBAT:           linkage bit;
        VDD:            linkage bit_vector(0 to 7);
        VDD25:          linkage bit_vector(0 to 3);
        VDDA:           linkage bit_vector(0 to 1);
        WAKE:           linkage bit;
        XOSC0:          linkage bit;
        XOSC1:          linkage bit
);


    use STD_1149_1_1994.all;   -- Get Std 1149.1-1994 attributes and definitions


    attribute COMPONENT_CONFORMANCE of LM3S2918 : entity is "STD_1149_1_1993";


    attribute PIN_MAP               of LM3S2918 : entity is PHYSICAL_PIN_MAP;


    constant LQFP_100: PIN_MAP_STRING := 
        "ADC0:             1, " &
        "ADC1:             2, " &
        "ADC2:             5, " &
        "ADC3:             6, " &
        "LDO:              7, " &
        "PD0_CAN0Rx:      10, " &
        "PD1_CAN0Tx:      11, " &
        "PD2_U1Rx:        12, " &
        "PD3_U1Tx:        13, " &
        "PG3:             16, " &
        "PG2:             17, " &
        "PG1:             18, " &
        "PG0:             19, " &
        "PC7_CCP4:        22, " &
        "PC6_CCP3:        23, " &
        "PC5:             24, " &
        "PC4_CCP5:        25, " &
        "PA0_U0Rx:        26, " &
        "PA1_U0Tx:        27, " &
        "PA2_SSI0Clk:     28, " &
        "PA3_SSI0Fss:     29, " &
        "PA4_SSI0Rx:      30, " &
        "PA5_SSI0Tx:      31, " &
        "PA6_I2C1SCL:     34, " &
        "PA7_I2C1SDA:     35, " &
        "PG7:             36, " &
        "PG6:             37, " &
        "PG5:             40, " &
        "PG4:             41, " &
        "PF7:             42, " &
        "PF6_CCP1:        43, " &
        "PF5_C1o:         46, " &
        "PF0:             47, " &
        "OSC0:            48, " &
        "OSC1:            49, " &
        "WAKE:            50, " &
        "HIB:             51, " &
        "XOSC0:           52, " &
        "XOSC1:           53, " &
        "VBAT:            55, " &
        "PF4_C0o:         58, " &
        "PF3:             59, " &
        "PF2:             60, " &
        "PF1:             61, " &
        "RST:             64, " &
        "CMOD0:           65, " &
        "PB0_CCP0:        66, " &
        "PB1_CCP2:        67, " &
        "PB2_I2C0SCL:     70, " &
        "PB3_I2C0SDA:     71, " &
        "PE0_SSI1Clk:     72, " &
        "PE1_SSI1Fss:     73, " &
        "PE2_SSI1Rx:      74, " &
        "PE3_SSI1Tx:      75, " &
        "CMOD1:           76, " &
        "TDO:             77, " &
        "TDI:             78, " &
        "TMS:             79, " &
        "TCK:             80, " &
        "PH3:             83, " &
        "PH2:             84, " &
        "PH1_CCP7:        85, " &
        "PH0_CCP6:        86, " &
        "TRST:            89, " &
        "PB6:             90, " &
        "PB5:             91, " &
        "PB4:             92, " &
        "ADC7:            95, " &
        "ADC6:            96, " &
        "ADC5:            99, " &
        "ADC4:           100, " &
        "GND:           (  9,  15,  21,  33,  39,  45,  54,  57,  63,  69,  82,  87,  94 ), " &
        "GNDA:          (  4,  97 ), " &
        "VDD:           (  8,  20,  32,  44,  56,  68,  81,  93 ), " &
        "VDD25:         ( 14,  38,  62,  88 ), " &
        "VDDA:          (  3,  98 ) " ;


    attribute TAP_SCAN_RESET of TRST  : signal is true;
    attribute TAP_SCAN_CLOCK of TCK   : signal is (10.0e6, BOTH);
    attribute TAP_SCAN_MODE  of TMS   : signal is true;
    attribute TAP_SCAN_IN    of TDI   : signal is true;
    attribute TAP_SCAN_OUT   of TDO   : signal is true; 


    attribute INSTRUCTION_LENGTH of LM3S2918 : entity is 4;


    attribute INSTRUCTION_OPCODE of LM3S2918 : entity is 
        "EXTEST (0000),"  &
        "INTEST (0001),"  &
        "SAMPLE (0010),"  &
        "BYPASS (0011),"  &
        "BYPASS (0100),"  &
        "BYPASS (0101),"  &
        "BYPASS (0110),"  &
        "BYPASS (0111),"  &
        "ABORT  (1000),"  &
        "BYPASS (1001),"  &
        "DPACC  (1010),"  &
        "APACC  (1011),"  &
        "BYPASS (1100),"  &
        "BYPASS (1101),"  &
        "IDCODE (1110),"  &
        "BYPASS (1111)";


    attribute INSTRUCTION_CAPTURE of LM3S2918 : entity is "0001";


    attribute IDCODE_REGISTER     of LM3S2918 : entity is
        "0011" &                    -- Version (Fourth Revision)
        "1011101000000000" &        -- Part number (ARM Cortex M3)
        "01000111011" &             -- Manufacturer Identity (ARM)
        "1";                        -- Mandatory LSB
                                    -- IDCODE = 3BA00477


    attribute INSTRUCTION_PRIVATE of LM3S2918 : entity is
        "ABORT, DPACC, APACC";      -- ARM Debug Access Port Instructions


    attribute BOUNDARY_LENGTH     of LM3S2918 : entity is 144;


    attribute BOUNDARY_REGISTER   of LM3S2918 : entity is 
        --  num   cell  port            function  safe  [ ccell  disval  rslt ]
        --  ---   ----  --------------  --------  ----    ------ ------ ------ 
        "     0  (BC_4, CMOD1,          CLOCK,     X ),                         " &
        "     1  (BC_1, *,              CONTROL,   1 ),                         " &
        "     2  (BC_1, PE3_SSI1Tx,     OUTPUT3,   X  ,      1,     1,     Z ), " &
        "     3  (BC_1, PE3_SSI1Tx,     INPUT,     X ),                         " &
        "     4  (BC_1, *,              CONTROL,   1 ),                         " &
        "     5  (BC_1, PE2_SSI1Rx,     OUTPUT3,   X  ,      4,     1,     Z ), " &
        "     6  (BC_1, PE2_SSI1Rx,     INPUT,     X ),                         " &
        "     7  (BC_1, *,              CONTROL,   1 ),                         " &
        "     8  (BC_1, PE1_SSI1Fss,    OUTPUT3,   X  ,      7,     1,     Z ), " &
        "     9  (BC_1, PE1_SSI1Fss,    INPUT,     X ),                         " &
        "    10  (BC_1, *,              CONTROL,   1 ),                         " &
        "    11  (BC_1, PE0_SSI1Clk,    OUTPUT3,   X  ,     10,     1,     Z ), " &
        "    12  (BC_1, PE0_SSI1Clk,    INPUT,     X ),                         " &
        "    13  (BC_1, *,              CONTROL,   1 ),                         " &
        "    14  (BC_1, PB3_I2C0SDA,    OUTPUT3,   X  ,     13,     1,     Z ), " &
        "    15  (BC_1, PB3_I2C0SDA,    INPUT,     X ),                         " &
        "    16  (BC_1, *,              CONTROL,   1 ),                         " &
        "    17  (BC_1, PB2_I2C0SCL,    OUTPUT3,   X  ,     16,     1,     Z ), " &
        "    18  (BC_1, PB2_I2C0SCL,    INPUT,     X ),                         " &
        "    19  (BC_1, *,              CONTROL,   1 ),                         " &
        "    20  (BC_1, PB1_CCP2,       OUTPUT3,   X  ,     19,     1,     Z ), " &
        "    21  (BC_1, PB1_CCP2,       INPUT,     X ),                         " &
        "    22  (BC_1, *,              CONTROL,   1 ),                         " &
        "    23  (BC_1, PB0_CCP0,       OUTPUT3,   X  ,     22,     1,     Z ), " &
        "    24  (BC_1, PB0_CCP0,       INPUT,     X ),                         " &
        "    25  (BC_4, CMOD0,          CLOCK,     X ),                         " &
        "    26  (BC_4, RST,            CLOCK,     X ),                         " &
        "    27  (BC_1, *,              CONTROL,   1 ),                         " &
        "    28  (BC_1, PF1,            OUTPUT3,   X  ,     27,     1,     Z ), " &
        "    29  (BC_1, PF1,            INPUT,     X ),                         " &
        "    30  (BC_1, *,              CONTROL,   1 ),                         " &
        "    31  (BC_1, PF2,            OUTPUT3,   X  ,     30,     1,     Z ), " &
        "    32  (BC_1, PF2,            INPUT,     X ),                         " &
        "    33  (BC_1, *,              CONTROL,   1 ),                         " &
        "    34  (BC_1, PF3,            OUTPUT3,   X  ,     33,     1,     Z ), " &
        "    35  (BC_1, PF3,            INPUT,     X ),                         " &
        "    36  (BC_1, *,              CONTROL,   1 ),                         " &
        "    37  (BC_1, PF4_C0o,        OUTPUT3,   X  ,     36,     1,     Z ), " &
        "    38  (BC_1, PF4_C0o,        INPUT,     X ),                         " &
        "    39  (BC_1, *,              CONTROL,   1 ),                         " &
        "    40  (BC_1, PF0,            OUTPUT3,   X  ,     39,     1,     Z ), " &
        "    41  (BC_1, PF0,            INPUT,     X ),                         " &
        "    42  (BC_1, *,              CONTROL,   1 ),                         " &
        "    43  (BC_1, PF5_C1o,        OUTPUT3,   X  ,     42,     1,     Z ), " &
        "    44  (BC_1, PF5_C1o,        INPUT,     X ),                         " &
        "    45  (BC_1, *,              CONTROL,   1 ),                         " &
        "    46  (BC_1, PF6_CCP1,       OUTPUT3,   X  ,     45,     1,     Z ), " &
        "    47  (BC_1, PF6_CCP1,       INPUT,     X ),                         " &
        "    48  (BC_1, *,              CONTROL,   1 ),                         " &
        "    49  (BC_1, PF7,            OUTPUT3,   X  ,     48,     1,     Z ), " &
        "    50  (BC_1, PF7,            INPUT,     X ),                         " &
        "    51  (BC_1, *,              CONTROL,   1 ),                         " &
        "    52  (BC_1, PG4,            OUTPUT3,   X  ,     51,     1,     Z ), " &
        "    53  (BC_1, PG4,            INPUT,     X ),                         " &
        "    54  (BC_1, *,              CONTROL,   1 ),                         " &
        "    55  (BC_1, PG5,            OUTPUT3,   X  ,     54,     1,     Z ), " &
        "    56  (BC_1, PG5,            INPUT,     X ),                         " &
        "    57  (BC_1, *,              CONTROL,   1 ),                         " &
        "    58  (BC_1, PG6,            OUTPUT3,   X  ,     57,     1,     Z ), " &
        "    59  (BC_1, PG6,            INPUT,     X ),                         " &
        "    60  (BC_1, *,              CONTROL,   1 ),                         " &
        "    61  (BC_1, PG7,            OUTPUT3,   X  ,     60,     1,     Z ), " &
        "    62  (BC_1, PG7,            INPUT,     X ),                         " &
        "    63  (BC_1, *,              CONTROL,   1 ),                         " &
        "    64  (BC_1, PA7_I2C1SDA,    OUTPUT3,   X  ,     63,     1,     Z ), " &
        "    65  (BC_1, PA7_I2C1SDA,    INPUT,     X ),                         " &
        "    66  (BC_1, *,              CONTROL,   1 ),                         " &
        "    67  (BC_1, PA6_I2C1SCL,    OUTPUT3,   X  ,     66,     1,     Z ), " &
        "    68  (BC_1, PA6_I2C1SCL,    INPUT,     X ),                         " &
        "    69  (BC_1, *,              CONTROL,   1 ),                         " &
        "    70  (BC_1, PA5_SSI0Tx,     OUTPUT3,   X  ,     69,     1,     Z ), " &
        "    71  (BC_1, PA5_SSI0Tx,     INPUT,     X ),                         " &
        "    72  (BC_1, *,              CONTROL,   1 ),                         " &
        "    73  (BC_1, PA4_SSI0Rx,     OUTPUT3,   X  ,     72,     1,     Z ), " &
        "    74  (BC_1, PA4_SSI0Rx,     INPUT,     X ),                         " &
        "    75  (BC_1, *,              CONTROL,   1 ),                         " &
        "    76  (BC_1, PA3_SSI0Fss,    OUTPUT3,   X  ,     75,     1,     Z ), " &
        "    77  (BC_1, PA3_SSI0Fss,    INPUT,     X ),                         " &
        "    78  (BC_1, *,              CONTROL,   1 ),                         " &
        "    79  (BC_1, PA2_SSI0Clk,    OUTPUT3,   X  ,     78,     1,     Z ), " &
        "    80  (BC_1, PA2_SSI0Clk,    INPUT,     X ),                         " &
        "    81  (BC_1, *,              CONTROL,   1 ),                         " &
        "    82  (BC_1, PA1_U0Tx,       OUTPUT3,   X  ,     81,     1,     Z ), " &
        "    83  (BC_1, PA1_U0Tx,       INPUT,     X ),                         " &
        "    84  (BC_1, *,              CONTROL,   1 ),                         " &
        "    85  (BC_1, PA0_U0Rx,       OUTPUT3,   X  ,     84,     1,     Z ), " &
        "    86  (BC_1, PA0_U0Rx,       INPUT,     X ),                         " &
        "    87  (BC_1, *,              CONTROL,   1 ),                         " &
        "    88  (BC_1, PC4_CCP5,       OUTPUT3,   X  ,     87,     1,     Z ), " &
        "    89  (BC_1, PC4_CCP5,       INPUT,     X ),                         " &
        "    90  (BC_1, *,              CONTROL,   1 ),                         " &
        "    91  (BC_1, PC5,            OUTPUT3,   X  ,     90,     1,     Z ), " &
        "    92  (BC_1, PC5,            INPUT,     X ),                         " &
        "    93  (BC_1, *,              CONTROL,   1 ),                         " &
        "    94  (BC_1, PC6_CCP3,       OUTPUT3,   X  ,     93,     1,     Z ), " &
        "    95  (BC_1, PC6_CCP3,       INPUT,     X ),                         " &
        "    96  (BC_1, *,              CONTROL,   1 ),                         " &
        "    97  (BC_1, PC7_CCP4,       OUTPUT3,   X  ,     96,     1,     Z ), " &
        "    98  (BC_1, PC7_CCP4,       INPUT,     X ),                         " &
        "    99  (BC_1, *,              CONTROL,   1 ),                         " &
        "   100  (BC_1, PG0,            OUTPUT3,   X  ,     99,     1,     Z ), " &
        "   101  (BC_1, PG0,            INPUT,     X ),                         " &
        "   102  (BC_1, *,              CONTROL,   1 ),                         " &
        "   103  (BC_1, PG1,            OUTPUT3,   X  ,    102,     1,     Z ), " &
        "   104  (BC_1, PG1,            INPUT,     X ),                         " &
        "   105  (BC_1, *,              CONTROL,   1 ),                         " &
        "   106  (BC_1, PG2,            OUTPUT3,   X  ,    105,     1,     Z ), " &
        "   107  (BC_1, PG2,            INPUT,     X ),                         " &
        "   108  (BC_1, *,              CONTROL,   1 ),                         " &
        "   109  (BC_1, PG3,            OUTPUT3,   X  ,    108,     1,     Z ), " &
        "   110  (BC_1, PG3,            INPUT,     X ),                         " &
        "   111  (BC_1, *,              CONTROL,   1 ),                         " &
        "   112  (BC_1, PD3_U1Tx,       OUTPUT3,   X  ,    111,     1,     Z ), " &
        "   113  (BC_1, PD3_U1Tx,       INPUT,     X ),                         " &
        "   114  (BC_1, *,              CONTROL,   1 ),                         " &
        "   115  (BC_1, PD2_U1Rx,       OUTPUT3,   X  ,    114,     1,     Z ), " &
        "   116  (BC_1, PD2_U1Rx,       INPUT,     X ),                         " &
        "   117  (BC_1, *,              CONTROL,   1 ),                         " &
        "   118  (BC_1, PD1_CAN0Tx,     OUTPUT3,   X  ,    117,     1,     Z ), " &
        "   119  (BC_1, PD1_CAN0Tx,     INPUT,     X ),                         " &
        "   120  (BC_1, *,              CONTROL,   1 ),                         " &
        "   121  (BC_1, PD0_CAN0Rx,     OUTPUT3,   X  ,    120,     1,     Z ), " &
        "   122  (BC_1, PD0_CAN0Rx,     INPUT,     X ),                         " &
        "   123  (BC_1, *,              CONTROL,   1 ),                         " &
        "   124  (BC_1, PB4,            OUTPUT3,   X  ,    123,     1,     Z ), " &
        "   125  (BC_1, PB4,            INPUT,     X ),                         " &
        "   126  (BC_1, *,              CONTROL,   1 ),                         " &
        "   127  (BC_1, PB5,            OUTPUT3,   X  ,    126,     1,     Z ), " &
        "   128  (BC_1, PB5,            INPUT,     X ),                         " &
        "   129  (BC_1, *,              CONTROL,   1 ),                         " &
        "   130  (BC_1, PB6,            OUTPUT3,   X  ,    129,     1,     Z ), " &
        "   131  (BC_1, PB6,            INPUT,     X ),                         " &
        "   132  (BC_1, *,              CONTROL,   1 ),                         " &
        "   133  (BC_1, PH0_CCP6,       OUTPUT3,   X  ,    132,     1,     Z ), " &
        "   134  (BC_1, PH0_CCP6,       INPUT,     X ),                         " &
        "   135  (BC_1, *,              CONTROL,   1 ),                         " &
        "   136  (BC_1, PH1_CCP7,       OUTPUT3,   X  ,    135,     1,     Z ), " &
        "   137  (BC_1, PH1_CCP7,       INPUT,     X ),                         " &
        "   138  (BC_1, *,              CONTROL,   1 ),                         " &
        "   139  (BC_1, PH2,            OUTPUT3,   X  ,    138,     1,     Z ), " &
        "   140  (BC_1, PH2,            INPUT,     X ),                         " &
        "   141  (BC_1, *,              CONTROL,   1 ),                         " &
        "   142  (BC_1, PH3,            OUTPUT3,   X  ,    141,     1,     Z ), " &
        "   143  (BC_1, PH3,            INPUT,     X )                          " ;


end LM3S2918;

This library contains 11039 BSDL files (for 7844 distinct entities) from 72 vendors
Last BSDL model (idt82v3910) was added on Sep 29, 2018 16:58
info@bsdl.info