-- Generator: DSP FlexCore system composer version: 3.0.7
-- Created at: Monday, January 8, 2001 2:35:37 PM GMT+02:00
entity dsp56321 is
generic (PHYSICAL_PIN_MAP : string := "PBGA196");
port ( DE_B: inout bit;
SC02: inout bit;
SC01: inout bit;
SC00: inout bit;
STD0: inout bit;
SCK0: inout bit;
SRD0: inout bit;
SRD1: inout bit;
SCK1: inout bit;
STD1: inout bit;
SC10: inout bit;
SC11: inout bit;
SC12: inout bit;
TXD: inout bit;
SCLK: inout bit;
RXD: inout bit;
TIO0: inout bit;
TIO1: inout bit;
TIO2: inout bit;
HAD0: inout bit;
HAD1: inout bit;
HAD2: inout bit;
HAD3: inout bit;
HAD4: inout bit;
HAD5: inout bit;
HAD6: inout bit;
HAD7: inout bit;
HREQ: inout bit;
IRQA_B: in bit;
IRQB_B: in bit;
IRQC_B: in bit;
IRQD_B: in bit;
D: inout bit_vector(0 to 23);
A: out bit_vector(0 to 17);
EXTAL: in bit;
XTAL: linkage bit;
RD_B: out bit;
WR_B: out bit;
AA: out bit_vector(0 to 3);
BR_B: buffer bit;
BG_B: in bit;
BB_B: inout bit;
RESET_B: in bit;
PINIT: in bit;
TA_B: in bit;
BCLK: out bit;
CLKOUT: buffer bit;
TRST_B: in bit;
TDO: out bit;
TDI: in bit;
TCK: in bit;
TMS: in bit;
RESERVED: linkage bit_vector(0 to 7);
SVCC: linkage bit_vector(0 to 1);
HVCC: linkage bit;
DVCC: linkage bit_vector(0 to 3);
AVCC: linkage bit_vector(0 to 2);
HACK: inout bit;
HDS: inout bit;
HRW: inout bit;
CVCC: linkage bit_vector(0 to 1);
HCS: inout bit;
HA9: inout bit;
HA8: inout bit;
HAS: inout bit;
GND: linkage bit_vector(0 to 65);
AGND: linkage bit_vector(0 to 2);
CGND: linkage bit_vector(0 to 1);
DGND: linkage bit_vector(0 to 3);
HGND: linkage bit;
SGND: linkage bit_vector(0 to 1);
QVCCL: linkage bit_vector(0 to 4);
QVCCH: linkage bit_vector(0 to 2));
use STD_1149_1_1994.all;
attribute COMPONENT_CONFORMANCE of dsp56321: entity is "STD_1149_1_1993";
attribute PIN_MAP of dsp56321 : entity is PHYSICAL_PIN_MAP;
constant PBGA196 : PIN_MAP_STRING :=
"RESERVED: (A1, A14, B14, M10, N8, P1, P5, P14), "&
"A: (N14, M13, M14, L13, L14, K13, K14, J13, J12, J14, H13, H14, G14, G12, F13, F14, " &
"E13, E12), " &
"AA: (N13, P12, P7, N7), " &
"AVCC: (H12, K12, L12), " &
"BB_B: P11," &
"BCLK: N10," &
"BG_B: P13," &
"BR_B: N11," &
"CLKOUT: M9," &
"CVCC: (N12, P9), " &
"D: (E14, D12, D13, C13, C14, B13, C12, A13, B12, A12, B11, A11, C10, B10, A10, B9, " &
"A9, B8, C8, A8, B7, B6, C6, A6), " &
"DE_B: D3," &
"DVCC: (A7, C9, C11, D14), " &
"EXTAL: M8," &
"GND: (D4, D5, D6, D7, D8, D9, D10, D11, E4, E5, E6, E7, E8, E9, E10, E11, F4, F5, F6, F7, F8, F9, F10, F11, G4, G5, G6, G7, G8, G9, G10, G11, H4, H5, H6, H7, H8, H9, H10, H11, J4, J5, J6, J7, J8, J9, J10, J11, K4, K5, K6, K7, K8, K9, K10, K11, L4, L5, L6, L7, L8, L9, L10, L11, N6, P6) ," &
"HA8: M1, " &
"HA9: M2, " &
"HACK: J1," &
"HAD0: M5," &
"HAD1: P4," &
"HAD2: N4," &
"HAD3: P3," &
"HAD4: N3," &
"HAD5: P2," &
"HAD6: N1," &
"HAD7: N2," &
"HAS: M3," &
"HCS: L1," &
"HDS: J3," &
"HREQ: K2," &
"HRW: J2," &
"HVCC: M4," &
"IRQA_B: C4," &
"IRQB_B: A5," &
"IRQC_B: C5," &
"IRQD_B: B5," &
"PINIT: D1," &
"RD_B: M12," &
"RESET_B: N5," &
"RXD: F1," &
"SC00: F3," &
"SC01: D2," &
"SC02: C1," &
"SC10: F2," &
"SC11: A2," &
"SC12: B2," &
"SCK0: H3," &
"SCK1: G1," &
"SCLK: G2," &
"SRD0: E3," &
"SRD1: B1," &
"STD0: E1," &
"STD1: C2," &
"SVCC: (E2, K1) ," &
"TA_B: P10," &
"TCK: C3," &
"TDI: B3," &
"TDO: A4," &
"TIO0: L3," &
"TIO1: L2," &
"TIO2: K3," &
"TMS: A3," &
"TRST_B: B4," &
"TXD: G3," &
"QVCCL: (C7, G13, H2, N9, M6), " &
"QVCCH: (F12, H1, M7) ," &
"WR_B: M11," &
"XTAL: P8" ;
attribute TAP_SCAN_MODE of TMS: signal is true;
attribute TAP_SCAN_CLOCK of TCK: signal is (20.0e6, BOTH);
attribute TAP_SCAN_RESET of TRST_B: signal is true;
attribute TAP_SCAN_OUT of TDO: signal is true;
attribute TAP_SCAN_IN of TDI: signal is true;
attribute INSTRUCTION_LENGTH of dsp56321: entity is 4;
attribute INSTRUCTION_OPCODE of dsp56321: entity is
"EXTEST (0000) ," &
"SAMPLE (0001) ," &
"IDCODE (0010) ," &
"CLAMP (0101) ," &
"HIGHZ (0100) ," &
"ENABLE_ONCE (0110) ," &
"DEBUG_REQUEST (0111) ," &
"BYPASS (1111)" ;
attribute INSTRUCTION_CAPTURE of dsp56321: entity is "0001";
attribute IDCODE_REGISTER of dsp56321 : entity is
"0000" & -- version
"000110" & -- Design Center Number
"0000010101" & -- sequence number
"00000001110" & -- manufacturer identity
"1" ; -- 1149.1 requirement
attribute REGISTER_ACCESS of dsp56321 : entity is
"ONCE[8] (ENABLE_ONCE,DEBUG_REQUEST)" ;
attribute BOUNDARY_LENGTH of dsp56321 : entity is 141;
attribute BOUNDARY_REGISTER of dsp56321 : entity is
-- num cell port func safe [ccell dis rslt] -- Pad name instance name
" 0 (BC_2, IRQA_B, input, X)," & -- core_0_irqa_ cell_iup_10
" 1 (BC_2, IRQB_B, input, X)," & -- core_0_irqb_ cell_iup_114
" 2 (BC_2, IRQD_B, input, X)," & -- core_0_irqd_ cell_iup_83
" 3 (BC_2, IRQC_B, input, X)," & -- core_0_irqc_ cell_iup_98
" 4 (BC_6, D(23), bidir, X, 8 , 1, Z)," & -- core_0_edb[23] cell_iup_40
" 5 (BC_6, D(21), bidir, X, 8 , 1, Z)," & -- core_0_edb[21] cell_iup_67
" 6 (BC_6, D(22), bidir, X, 8 , 1, Z)," & -- core_0_edb[22] cell_iup_57
" 7 (BC_6, D(20), bidir, X, 8 , 1, Z)," & -- core_0_edb[20] cell_iup_85
" 8 (BC_1, *, control, 1)," & -- dgnd cell_iup_96
" 9 (BC_6, D(19), bidir, X, 8 , 1, Z)," & -- core_0_edb[19] cell_iup_18
" 10 (BC_6, D(17), bidir, X, 8 , 1, Z)," & -- core_0_edb[17] cell_iup_47
" 11 (BC_6, D(18), bidir, X, 8 , 1, Z)," & -- core_0_edb[18] cell_iup_28
" 12 (BC_6, D(16), bidir, X, 8 , 1, Z)," & -- core_0_edb[16] cell_iup_60
" 13 (BC_6, D(15), bidir, X, 8 , 1, Z)," & -- core_0_edb[15] cell_iup_76
" 14 (BC_6, D(14), bidir, X, 8 , 1, Z)," & -- core_0_edb[14] cell_iup_89
" 15 (BC_6, D(13), bidir, X, 8 , 1, Z)," & -- core_0_edb[13] cell_iup_103
" 16 (BC_6, D(12), bidir, X, 8 , 1, Z)," & -- core_0_edb[12] cell_iup_1
" 17 (BC_6, D(11), bidir, X, 21 , 1, Z)," & -- core_0_edb[11] cell_iup_14
" 18 (BC_6, D(9), bidir, X, 21 , 1, Z)," & -- core_0_edb[9] cell_iup_32
" 19 (BC_6, D(7), bidir, X, 21 , 1, Z)," & -- core_0_edb[7] cell_iup_61
" 20 (BC_6, D(10), bidir, X, 21 , 1, Z)," & -- core_0_edb[10] cell_iup_22
" 21 (BC_1, *, control, 1)," & -- dgnd cell_iup_72
" 22 (BC_6, D(8), bidir, X, 21 , 1, Z)," & -- core_0_edb[8] cell_iup_48
" 23 (BC_6, D(5), bidir, X, 21 , 1, Z)," & -- core_0_edb[5] cell_iup_90
" 24 (BC_6, D(6), bidir, X, 21 , 1, Z)," & -- core_0_edb[6] cell_iup_77
" 25 (BC_6, D(3), bidir, X, 21 , 1, Z)," & -- core_0_edb[3] cell_iup_2
" 26 (BC_6, D(1), bidir, X, 21 , 1, Z)," & -- core_0_edb[1] cell_iup_23
" 27 (BC_6, D(4), bidir, X, 21 , 1, Z)," & -- core_0_edb[4] cell_iup_105
" 28 (BC_6, D(2), bidir, X, 21 , 1, Z)," & -- core_0_edb[2] cell_iup_15
" 29 (BC_6, D(0), bidir, X, 21 , 1, Z)," & -- core_0_edb[0] cell_iup_42
" 30 (BC_1, A(17), output3, X, 35 , 1, Z)," & -- core_0_eab[17] cell_iright_21
" 31 (BC_1, A(16), output3, X, 35 , 1, Z)," & -- core_0_eab[16] cell_iright_38
" 32 (BC_1, A(14), output3, X, 35 , 1, Z)," & -- core_0_eab[14] cell_iright_65
" 33 (BC_1, A(15), output3, X, 35 , 1, Z)," & -- core_0_eab[15] cell_iright_54
" 34 (BC_1, A(13), output3, X, 35 , 1, Z)," & -- core_0_eab[13] cell_iright_84
" 35 (BC_1, *, control, 1)," & -- agnd cell_iright_95
" 36 (BC_1, A(12), output3, X, 35 , 1, Z)," & -- core_0_eab[12] cell_iright_97
" 37 (BC_1, A(10), output3, X, 41 , 1, Z)," & -- core_0_eab[10] cell_iright_11
" 38 (BC_1, A(11), output3, X, 41 , 1, Z)," & -- core_0_eab[11] cell_iright_115
" 39 (BC_1, A(8), output3, X, 41 , 1, Z)," & -- core_0_eab[8] cell_iright_52
" 40 (BC_1, A(7), output3, X, 41 , 1, Z)," & -- core_0_eab[7] cell_iright_64
" 41 (BC_1, *, control, 1)," & -- agnd cell_iright_71
" 42 (BC_1, A(9), output3, X, 41 , 1, Z)," & -- core_0_eab[9] cell_iright_36
" 43 (BC_1, A(6), output3, X, 41 , 1, Z)," & -- core_0_eab[6] cell_iright_80
" 44 (BC_1, A(4), output3, X, 41 , 1, Z)," & -- core_0_eab[4] cell_iright_112
" 45 (BC_1, A(5), output3, X, 41 , 1, Z)," & -- core_0_eab[5] cell_iright_93
" 46 (BC_1, A(2), output3, X, 41 , 1, Z)," & -- core_0_eab[2] cell_iright_19
" 47 (BC_1, A(3), output3, X, 41 , 1, Z)," & -- core_0_eab[3] cell_iright_6
" 48 (BC_1, A(1), output3, X, 41 , 1, Z)," & -- core_0_eab[1] cell_iright_34
" 49 (BC_1, A(0), output3, X, 41 , 1, Z)," & -- core_0_eab[0] cell_iright_49
" 50 (BC_1, *, control, 1)," & -- core_0_aa0 cell_iright_106
" 51 (BC_1, AA(0), output3, X, 50 , 1, Z)," & -- core_0_aa0 cell_iright_106
" 52 (BC_1, RD_B, output3, X, 62 , 1, Z)," & -- core_0_rd_ cell_iright_63
" 53 (BC_2, BG_B, input, X)," & -- core_0_bg_ cell_iright_56
" 54 (BC_1, *, control, 1)," & -- core_0_aa1 cell_iright_104
" 55 (BC_1, AA(1), output3, X, 54 , 1, Z)," & -- core_0_aa1 cell_iright_104
" 56 (BC_1, WR_B, output3, X, 62 , 1, Z)," & -- core_0_wr_ cell_iright_24
" 57 (BC_2, BR_B, output2, X)," & -- core_0_br_ cell_iright_16
" 58 (BC_1, *, control, 1)," & -- core_0_bb_ cell_iright_12
" 59 (BC_6, BB_B, bidir, X, 58 , 1, Z)," & -- core_0_bb_ cell_iright_12
" 60 (BC_2, TA_B, input, X)," & -- core_0_ta_ cell_iright_107
" 61 (BC_1, BCLK, output3, X, 62 , 1, Z)," & -- core_0_bclk cell_iright_86
" 62 (BC_1, *, control, 1)," & -- cgnd cell_iright_31
" 63 (BC_2, CLKOUT, output2, X)," & -- core_0_clkout cell_iright_5
" 64 (BC_2, RESET_B, input, X)," & -- core_0_reset_ cell_iright_13
" 65 (BC_1, *, control, 1)," & -- core_0_aa2 cell_iright_102
" 66 (BC_1, AA(2), output3, X, 65 , 1, Z)," & -- core_0_aa2 cell_iright_102
" 67 (BC_1, *, control, 1)," & -- core_0_aa3 cell_iright_101
" 68 (BC_1, AA(3), output3, X, 67 , 1, Z)," & -- core_0_aa3 cell_iright_101
" 69 (BC_2, EXTAL, input, X)," & -- core_0_extal cell_ileft_99
" 70 (BC_1, *, control, 1)," & -- hdi08_0_hp[0] cell_ileft_92
" 71 (BC_6, HAD0, bidir, X, 70 , 1, Z)," & -- hdi08_0_hp[0] cell_ileft_92
" 72 (BC_1, *, control, 1)," & -- hdi08_0_hp[1] cell_ileft_79
" 73 (BC_6, HAD1, bidir, X, 72 , 1, Z)," & -- hdi08_0_hp[1] cell_ileft_79
" 74 (BC_1, *, control, 1)," & -- hdi08_0_hp[2] cell_ileft_62
" 75 (BC_6, HAD2, bidir, X, 74 , 1, Z)," & -- hdi08_0_hp[2] cell_ileft_62
" 76 (BC_1, *, control, 1)," & -- hdi08_0_hp[3] cell_ileft_51
" 77 (BC_6, HAD3, bidir, X, 76 , 1, Z)," & -- hdi08_0_hp[3] cell_ileft_51
" 78 (BC_1, *, control, 1)," & -- hdi08_0_hp[5] cell_ileft_20
" 79 (BC_6, HAD5, bidir, X, 78 , 1, Z)," & -- hdi08_0_hp[5] cell_ileft_20
" 80 (BC_1, *, control, 1)," & -- hdi08_0_hp[4] cell_ileft_35
" 81 (BC_6, HAD4, bidir, X, 80 , 1, Z)," & -- hdi08_0_hp[4] cell_ileft_35
" 82 (BC_1, *, control, 1)," & -- hdi08_0_hp[7] cell_ileft_113
" 83 (BC_6, HAD7, bidir, X, 82 , 1, Z)," & -- hdi08_0_hp[7] cell_ileft_113
" 84 (BC_1, *, control, 1)," & -- hdi08_0_hp[6] cell_ileft_7
" 85 (BC_6, HAD6, bidir, X, 84 , 1, Z)," & -- hdi08_0_hp[6] cell_ileft_7
" 86 (BC_1, *, control, 1)," & -- hdi08_0_hp[9] cell_ileft_82
" 87 (BC_6, HA8, bidir, X, 86 , 1, Z)," & -- hdi08_0_hp[9] cell_ileft_82
" 88 (BC_1, *, control, 1)," & -- hdi08_0_hp[8] cell_ileft_94
" 89 (BC_6, HAS, bidir, X, 88 , 1, Z)," & -- hdi08_0_hp[8] cell_ileft_94
" 90 (BC_1, *, control, 1)," & -- hdi08_0_hp[10] cell_ileft_75
" 91 (BC_6, HA9, bidir, X, 90 , 1, Z)," & -- hdi08_0_hp[10] cell_ileft_75
" 92 (BC_1, *, control, 1)," & -- timer_0_tio2 cell_ileft_109
" 93 (BC_6, TIO2, bidir, X, 92 , 1, Z)," & -- timer_0_tio2 cell_ileft_109
" 94 (BC_1, *, control, 1)," & -- timer_0_tio0 cell_ileft_111
" 95 (BC_6, TIO0, bidir, X, 94 , 1, Z)," & -- timer_0_tio0 cell_ileft_111
" 96 (BC_1, *, control, 1)," & -- timer_0_tio1 cell_ileft_110
" 97 (BC_6, TIO1, bidir, X, 96 , 1, Z)," & -- timer_0_tio1 cell_ileft_110
" 98 (BC_1, *, control, 1)," & -- hdi08_0_hp[13] cell_ileft_30
" 99 (BC_6, HCS, bidir, X, 98 , 1, Z)," & -- hdi08_0_hp[13] cell_ileft_30
" 100 (BC_1, *, control, 1)," & -- hdi08_0_hp[14] cell_ileft_17
" 101 (BC_6, HREQ, bidir, X, 100 , 1, Z)," & -- hdi08_0_hp[14] cell_ileft_17
" 102 (BC_1, *, control, 1)," & -- hdi08_0_hp[15] cell_ileft_4
" 103 (BC_6, HACK, bidir, X, 102 , 1, Z)," & -- hdi08_0_hp[15] cell_ileft_4
" 104 (BC_1, *, control, 1)," & -- hdi08_0_hp[11] cell_ileft_59
" 105 (BC_6, HRW, bidir, X, 104 , 1, Z)," & -- hdi08_0_hp[11] cell_ileft_59
" 106 (BC_1, *, control, 1)," & -- hdi08_0_hp[12] cell_ileft_46
" 107 (BC_6, HDS, bidir, X, 106 , 1, Z)," & -- hdi08_0_hp[12] cell_ileft_46
" 108 (BC_1, *, control, 1)," & -- sci_0_sclk cell_ileft_74
" 109 (BC_6, SCLK, bidir, X, 108 , 1, Z)," & -- sci_0_sclk cell_ileft_74
" 110 (BC_1, *, control, 1)," & -- sci_0_rxd cell_ileft_37
" 111 (BC_6, RXD, bidir, X, 110 , 1, Z)," & -- sci_0_rxd cell_ileft_37
" 112 (BC_1, *, control, 1)," & -- sci_0_txd cell_ileft_33
" 113 (BC_6, TXD, bidir, X, 112 , 1, Z)," & -- sci_0_txd cell_ileft_33
" 114 (BC_1, *, control, 1)," & -- essi_0_srd cell_iup_70
" 115 (BC_6, SRD0, bidir, X, 114 , 1, Z)," & -- essi_0_srd cell_iup_70
" 116 (BC_1, *, control, 1)," & -- essi_0_std cell_iup_41
" 117 (BC_6, STD0, bidir, X, 116 , 1, Z)," & -- essi_0_std cell_iup_41
" 118 (BC_1, *, control, 1)," & -- essi_0_sck cell_iup_50
" 119 (BC_6, SCK0, bidir, X, 118 , 1, Z)," & -- essi_0_sck cell_iup_50
" 120 (BC_1, *, control, 1)," & -- essi_1_sck cell_iup_9
" 121 (BC_6, SCK1, bidir, X, 120 , 1, Z)," & -- essi_1_sck cell_iup_9
" 122 (BC_1, *, control, 1)," & -- essi_0_sc0 cell_iup_73
" 123 (BC_6, SC00, bidir, X, 122 , 1, Z)," & -- essi_0_sc0 cell_iup_73
" 124 (BC_1, *, control, 1)," & -- essi_1_sc0 cell_iup_29
" 125 (BC_6, SC10, bidir, X, 124 , 1, Z)," & -- essi_1_sc0 cell_iup_29
" 126 (BC_2, PINIT, input, X)," & -- core_0_nmi_ cell_iup_108
" 127 (BC_1, *, control, 1)," & -- essi_0_sc2 cell_iup_68
" 128 (BC_6, SC02, bidir, X, 127 , 1, Z)," & -- essi_0_sc2 cell_iup_68
" 129 (BC_1, *, control, 1)," & -- essi_0_sc1 cell_iup_69
" 130 (BC_6, SC01, bidir, X, 129 , 1, Z)," & -- essi_0_sc1 cell_iup_69
" 131 (BC_1, *, control, 1)," & -- essi_1_srd cell_iup_27
" 132 (BC_6, SRD1, bidir, X, 131 , 1, Z)," & -- essi_1_srd cell_iup_27
" 133 (BC_1, *, control, 1)," & -- core_0_de_ cell_iup_81
" 134 (BC_6, DE_B, bidir, X, 133 , 1, Pull1)," & -- core_0_de_ cell_iup_81
" 135 (BC_1, *, control, 1)," & -- essi_1_sc1 cell_iup_26
" 136 (BC_6, SC11, bidir, X, 135 , 1, Z)," & -- essi_1_sc1 cell_iup_26
" 137 (BC_1, *, control, 1)," & -- essi_1_sc2 cell_iup_25
" 138 (BC_6, SC12, bidir, X, 137 , 1, Z)," & -- essi_1_sc2 cell_iup_25
" 139 (BC_1, *, control, 1)," & -- essi_1_std cell_iup_3
" 140 (BC_6, STD1, bidir, X, 139 , 1, Z) " ; -- essi_1_std cell_iup_3
-- End of bsdl generated file.
-- Additional data could be added here:
end dsp56321;
