--//*****************************************************************************
--//
--// lm3s615.bsdl - Boundary Scan Description Language (BSDL) file for the
--// Luminary Micro LM3S615 Stellaris microcontroller.
--//
--// Revision 1.0 - 02/02/2007 - Initial Release of BSDL entity
--// - LM3S615, Revision C, 48-pin LQFP
--//
--//
--//
--// Copyright (c) 2007 Luminary Micro, Inc. All rights reserved.
--// Luminary Micro Confidential - Advance Product Information
--//
--// Software License Agreement
--//
--// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
--// exclusively on LMI's Stellaris Family of microcontroller products.
--//
--// The software is owned by LMI and/or its suppliers, and is protected under
--// applicable copyright laws. All rights are reserved. Any use in violation
--// of the foregoing restrictions may subject the user to criminal sanctions
--// under applicable laws, as well as to civil liability for the breach of the
--// terms and conditions of this license.
--//
--// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
--// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
--// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
--// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
--// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
--//
--//*****************************************************************************
entity lm3s615 is generic (PHYSICAL_PIN_MAP : string := "LQFP_48");
port ( ADC0: linkage bit;
ADC1: linkage bit;
LDO: linkage bit;
OSC0: linkage bit;
OSC1: linkage bit;
PA0_U0Rx: inout bit;
PA1_U0Tx: inout bit;
PA2_SSIClk: inout bit;
PA3_SSIFss: inout bit;
PA4_SSIRx: inout bit;
PA5_SSITx: inout bit;
PB0_PWM2: inout bit;
PB1_PWM3: inout bit;
PB2_I2CSCL: inout bit;
PB3_I2CSDA: inout bit;
PB4: inout bit;
PB5: inout bit;
PB6: inout bit;
PC4_CCP5: inout bit;
PC5_C1o: inout bit;
PC6_CCP3: inout bit;
PC7: inout bit;
PD0_PWM0: inout bit;
PD1_PWM1: inout bit;
PD2_U1Rx: inout bit;
PD3_U1Tx: inout bit;
PD4_CCP0: inout bit;
PD5_CCP2: inout bit;
PD6_Fault: inout bit;
PD7_C0o: inout bit;
PE0_PWM4: inout bit;
PE1_PWM5: inout bit;
PE2_CCP4: inout bit;
PE3_CCP1: inout bit;
RST: in bit;
TRST: in bit;
TCK: in bit;
TMS: in bit;
TDI: in bit;
TDO: out bit;
VDD: linkage bit_vector(0 to 3);
GND: linkage bit_vector(0 to 3)
);
use STD_1149_1_1994.all; -- Get Std 1149.1-1994 attributes and definitions
attribute COMPONENT_CONFORMANCE of lm3s615 : entity is "STD_1149_1_1993";
attribute PIN_MAP of lm3s615 : entity is PHYSICAL_PIN_MAP;
constant LQFP_48: PIN_MAP_STRING :=
"ADC0: 1, " &
"ADC1: 2, " &
"PE3_CCP1: 3, " &
"PE2_CCP4: 4, " &
"RST: 5, " &
"LDO: 6, " &
"OSC0: 9, " &
"OSC1: 10, " &
"PC7: 11, " &
"PC6_CCP3: 12, " &
"PC5_C1o: 13, " &
"PC4_CCP5: 14, " &
"PA0_U0Rx: 17, " &
"PA1_U0Tx: 18, " &
"PA2_SSIClk: 19, " &
"PA3_SSIFss: 20, " &
"PA4_SSIRx: 21, " &
"PA5_SSITx: 22, " &
"PD0_PWM0: 25, " &
"PD1_PWM1: 26, " &
"PD2_U1Rx: 27, " &
"PD3_U1Tx: 28, " &
"PB0_PWM2: 29, " &
"PB1_PWM3: 30, " &
"PB2_I2CSCL: 33, " &
"PB3_I2CSDA: 34, " &
"PE0_PWM4: 35, " &
"PE1_PWM5: 36, " &
"TDO: 37, " &
"TDI: 38, " &
"TMS: 39, " &
"TCK: 40, " &
"TRST: 41, " &
"PB6: 42, " &
"PB5: 43, " &
"PB4: 44, " &
"PD4_CCP0: 45, " &
"PD5_CCP2: 46, " &
"PD6_Fault: 47, " &
"PD7_C0o: 48, " &
"VDD: ( 7, 15, 23, 32), " &
"GND: ( 8, 16, 24, 31) ";
attribute TAP_SCAN_RESET of TRST: signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (10.0e6, BOTH);
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute INSTRUCTION_LENGTH of lm3s615 : entity is 4;
attribute INSTRUCTION_OPCODE of lm3s615 : entity is
"EXTEST (0000)," &
"INTEST (0001)," &
"SAMPLE (0010)," &
"BYPASS (0011)," &
"BYPASS (0100)," &
"BYPASS (0101)," &
"BYPASS (0110)," &
"BYPASS (0111)," &
"ABORT (1000)," &
"BYPASS (1001)," &
"DPACC (1010)," &
"APACC (1011)," &
"BYPASS (1100)," &
"BYPASS (1101)," &
"IDCODE (1110)," &
"BYPASS (1111)";
attribute INSTRUCTION_CAPTURE of lm3s615 : entity is "0001";
attribute IDCODE_REGISTER of lm3s615 : entity is
"0010" & -- Version (Third Revision)
"1011101000000000" & -- Part number (ARM Cortex M3)
"01000111011" & -- Manufacturer Identity (ARM)
"1"; -- Mandatory LSB
-- IDCODE = 1BA00477
attribute INSTRUCTION_PRIVATE of lm3s615 : entity is
"ABORT, DPACC, APACC"; -- ARM Debug Access Port Instructions
attribute BOUNDARY_LENGTH of lm3s615 : entity is 88;
attribute BOUNDARY_REGISTER of lm3s615 : entity is
-- num cell port function safe [ ccell disval rslt ]
" 0 ( BC_1, * , CONTROL, 1 ), " &
" 1 ( BC_1, PE1_PWM5 , OUTPUT3, X , 0, 1, Z), " &
" 2 ( BC_1, PE1_PWM5 , INPUT, X ), " &
" 3 ( BC_1, * , CONTROL, 1 ), " &
" 4 ( BC_1, PE0_PWM4 , OUTPUT3, X , 3, 1, Z), " &
" 5 ( BC_1, PE0_PWM4 , INPUT, X ), " &
" 6 ( BC_1, * , CONTROL, 1 ), " &
" 7 ( BC_1, PB3_I2CSDA , OUTPUT3, X , 6, 1, Z), " &
" 8 ( BC_1, PB3_I2CSDA , INPUT, X ), " &
" 9 ( BC_1, * , CONTROL, 1 ), " &
" 10 ( BC_1, PB2_I2CSCL , OUTPUT3, X , 9, 1, Z), " &
" 11 ( BC_1, PB2_I2CSCL , INPUT, X ), " &
" 12 ( BC_1, * , CONTROL, 1 ), " &
" 13 ( BC_1, PB1_PWM3 , OUTPUT3, X , 12, 1, Z), " &
" 14 ( BC_1, PB1_PWM3 , INPUT, X ), " &
" 15 ( BC_1, * , CONTROL, 1 ), " &
" 16 ( BC_1, PB0_PWM2 , OUTPUT3, X , 15, 1, Z), " &
" 17 ( BC_1, PB0_PWM2 , INPUT, X ), " &
" 18 ( BC_1, * , CONTROL, 1 ), " &
" 19 ( BC_1, PD3_U1Tx , OUTPUT3, X , 18, 1, Z), " &
" 20 ( BC_1, PD3_U1Tx , INPUT, X ), " &
" 21 ( BC_1, * , CONTROL, 1 ), " &
" 22 ( BC_1, PD2_U1Rx , OUTPUT3, X , 21, 1, Z), " &
" 23 ( BC_1, PD2_U1Rx , INPUT, X ), " &
" 24 ( BC_1, * , CONTROL, 1 ), " &
" 25 ( BC_1, PD1_PWM1 , OUTPUT3, X , 24, 1, Z), " &
" 26 ( BC_1, PD1_PWM1 , INPUT, X ), " &
" 27 ( BC_1, * , CONTROL, 1 ), " &
" 28 ( BC_1, PD0_PWM0 , OUTPUT3, X , 27, 1, Z), " &
" 29 ( BC_1, PD0_PWM0 , INPUT, X ), " &
" 30 ( BC_1, * , CONTROL, 1 ), " &
" 31 ( BC_1, PA5_SSITx , OUTPUT3, X , 30, 1, Z), " &
" 32 ( BC_1, PA5_SSITx , INPUT, X ), " &
" 33 ( BC_1, * , CONTROL, 1 ), " &
" 34 ( BC_1, PA4_SSIRx , OUTPUT3, X , 33, 1, Z), " &
" 35 ( BC_1, PA4_SSIRx , INPUT, X ), " &
" 36 ( BC_1, * , CONTROL, 1 ), " &
" 37 ( BC_1, PA3_SSIFss , OUTPUT3, X , 36, 1, Z), " &
" 38 ( BC_1, PA3_SSIFss , INPUT, X ), " &
" 39 ( BC_1, * , CONTROL, 1 ), " &
" 40 ( BC_1, PA2_SSIClk , OUTPUT3, X , 39, 1, Z), " &
" 41 ( BC_1, PA2_SSIClk , INPUT, X ), " &
" 42 ( BC_1, * , CONTROL, 1 ), " &
" 43 ( BC_1, PA1_U0Tx , OUTPUT3, X , 42, 1, Z), " &
" 44 ( BC_1, PA1_U0Tx , INPUT, X ), " &
" 45 ( BC_1, * , CONTROL, 1 ), " &
" 46 ( BC_1, PA0_U0Rx , OUTPUT3, X , 45, 1, Z), " &
" 47 ( BC_1, PA0_U0Rx , INPUT, X ), " &
" 48 ( BC_1, * , CONTROL, 1 ), " &
" 49 ( BC_1, PC4_CCP5 , OUTPUT3, X , 48, 1, Z), " &
" 50 ( BC_1, PC4_CCP5 , INPUT, X ), " &
" 51 ( BC_1, * , CONTROL, 1 ), " &
" 52 ( BC_1, PC5_C1o , OUTPUT3, X , 51, 1, Z), " &
" 53 ( BC_1, PC5_C1o , INPUT, X ), " &
" 54 ( BC_1, * , CONTROL, 1 ), " &
" 55 ( BC_1, PC6_CCP3 , OUTPUT3, X , 54, 1, Z), " &
" 56 ( BC_1, PC6_CCP3 , INPUT, X ), " &
" 57 ( BC_1, * , CONTROL, 1 ), " &
" 58 ( BC_1, PC7 , OUTPUT3, X , 57, 1, Z), " &
" 59 ( BC_1, PC7 , INPUT, X ), " &
" 60 ( BC_4, RST , CLOCK, X ), " &
" 61 ( BC_1, * , CONTROL, 1 ), " &
" 62 ( BC_1, PE2_CCP4 , OUTPUT3, X , 61, 1, Z), " &
" 63 ( BC_1, PE2_CCP4 , INPUT, X ), " &
" 64 ( BC_1, * , CONTROL, 1 ), " &
" 65 ( BC_1, PE3_CCP1 , OUTPUT3, X , 64, 1, Z), " &
" 66 ( BC_1, PE3_CCP1 , INPUT, X ), " &
" 67 ( BC_1, * , CONTROL, 1 ), " &
" 68 ( BC_1, PD7_C0o , OUTPUT3, X , 67, 1, Z), " &
" 69 ( BC_1, PD7_C0o , INPUT, X ), " &
" 70 ( BC_1, * , CONTROL, 1 ), " &
" 71 ( BC_1, PD6_Fault , OUTPUT3, X , 70, 1, Z), " &
" 72 ( BC_1, PD6_Fault , INPUT, X ), " &
" 73 ( BC_1, * , CONTROL, 1 ), " &
" 74 ( BC_1, PD5_CCP2 , OUTPUT3, X , 73, 1, Z), " &
" 75 ( BC_1, PD5_CCP2 , INPUT, X ), " &
" 76 ( BC_1, * , CONTROL, 1 ), " &
" 77 ( BC_1, PD4_CCP0 , OUTPUT3, X , 76, 1, Z), " &
" 78 ( BC_1, PD4_CCP0 , INPUT, X ), " &
" 79 ( BC_1, * , CONTROL, 1 ), " &
" 80 ( BC_1, PB4 , OUTPUT3, X , 79, 1, Z), " &
" 81 ( BC_1, PB4 , INPUT, X ), " &
" 82 ( BC_1, * , CONTROL, 1 ), " &
" 83 ( BC_1, PB5 , OUTPUT3, X , 82, 1, Z), " &
" 84 ( BC_1, PB5 , INPUT, X ), " &
" 85 ( BC_1, * , CONTROL, 1 ), " &
" 86 ( BC_1, PB6 , OUTPUT3, X , 85, 1, Z), " &
" 87 ( BC_1, PB6 , INPUT, X ) " ;
end lm3s615;