BSDL Files Library for JTAG

The only free public library that contains thousands of BSDL (Boundary Scan Description Language) models to use with BScan/JTAG tools

BSDL model: TMS320C6678

---------------------------------------------------------------------------- --
-- BSDL Description for TMS320C6678 PG1.0
-- Revised 26 July 2012                                                      --
-- ------------------------------------------------------------------------- --
--  Supported Devices: tms320c6678 Revision 2.0                              --
--  Supported Devices: tms320c6674 Revision 1.0                              --
--  Supported Devices: tms320c6672 Revision 1.0                              --
--  Supported Devices: tms320c6671 Revision 1.0                              --
-- ------------------------------------------------------------------------- --
--  Created by    : Texas Instruments Incorporated                           --
--  BSDL Status   : Released                                                 --
--  Date Created  : 05 July 2011                                             --
--  Revision      : 1.4                                                      --
-- ------------------------------------------------------------------------- --
--                          IMPORTANT NOTICE                                 --
--  Texas Instruments and its subsidiaries (TI) reserve the right to make    --
--  changes to their products or to discontinue any product or service       --
--  without notice, and advise customers to obtain the latest version of     --
--  relevant information to verify, before placing orders, that information  --
--  being relied on is current and complete. All products are sold subject   --
--  to the terms and conditions of sale supplied at the time of order        --
--  acknowledgment, including those pertaining to warranty, patent infringe- --
--  ment, and limitation of liability.                                       --
--                                                                           --
--  TI warrants performance of its products to the specifications applicable --
--  at the time of sale in accordance with TI's standard warranty. Testing   --
--  and other quality control techniques are utilized to the extent TI deems --
--  necessary to support this warranty. Specific testing of all parameters   --
--  of each device is not necessarily performed, except those mandated by    --
--  government requirements.                                                 --
--                                                                           --
--  Customers are responsible for their applications using TI components.    --
--  In order to minimize risks associated with the customer's applications,  --
--  adequate design and operating safeguards must be provided by the         --
--  customer to minimize inherent or procedural hazards.                     --
--                                                                           --
--  TI assumes no liability for applications assistance or customer product  --
--  design. TI does not warrant or represent that any license, either        --
--  express or implied, is granted under any patent right, copyright, mask   --
--  work right, or other intellectual property right of TI covering or       --
--  relating to any combination, machine, or process in which such products  --
--  or services might be or are used. TI's publication of information        --
--  regarding any third party's products or services does not constitute     --
--  TI's approval, license, warranty or endorsement thereof.                 --
--                                                                           --
--  Reproduction of information in TI data books or data sheets is           --
--  permissible only if reproduction is without alteration and is            --
--  accompanied by all associated warranties, conditions, limitations and    --
--  notices.  Representation or reproduction of this information with        --
--  alteration voids all warranties provided for an associated TI product or --
--  service, is an unfair and deceptive business practice, and TI is not     --
--  responsible nor liable for any such use.                                 --
--                                                                           --
--  Resale of TI's products or services with statements different from or    --
--  beyond the parameters stated by TI for that product or service voids     --
--  all express and any implied warranties for the associated TI product or  --
--  service, is an unfair and deceptive business practice, and TI is not     --
--  responsible nor liable for any such use.                                 --
--                                                                           --
--  Also see: Standard Terms and Conditions of Sale for Semiconductor        --
--  Products. www.ti.com/sc/docs/stdterms.htm                                --
--                                                                           --
--  Mailing Address:                                                         --
--                                                                           --
--             Texas Instruments                                             --
--             Post Office Box 655303                                        --
--             Dallas, Texas 75265                                           --
--                                                                           --
--             Copyright � 2007, Texas Instruments Incorporated              --
-- ------------------------------------------------------------------------- --

entity TMS320C6678 is
  generic( PHYSICAL_PIN_MAP : string :=   "CYP" );

   PORT (
   ddrdqm0         : INOUT    BIT;
   ddrdqm1         : INOUT    BIT;
   ddrdqm2         : INOUT    BIT;
   ddrdqm3         : INOUT    BIT;
   ddrdqm4         : INOUT    BIT;
   ddrdqm5         : INOUT    BIT;
   ddrdqm6         : INOUT    BIT;
   ddrdqm7         : INOUT    BIT;
   ddrdqm8         : INOUT    BIT;
   ddrdqs0p        : INOUT    BIT;
   ddrdqs0n        : INOUT    BIT;
   ddrdqs1p        : INOUT    BIT;
   ddrdqs1n        : INOUT    BIT;
   ddrdqs2p        : INOUT    BIT;
   ddrdqs2n        : INOUT    BIT;
   ddrdqs3p        : INOUT    BIT;
   ddrdqs3n        : INOUT    BIT;
   ddrdqs4p        : INOUT    BIT;
   ddrdqs4n        : INOUT    BIT;
   ddrdqs5p        : INOUT    BIT;
   ddrdqs5n        : INOUT    BIT;
   ddrdqs6p        : INOUT    BIT;
   ddrdqs6n        : INOUT    BIT;
   ddrdqs7p        : INOUT    BIT;
   ddrdqs7n        : INOUT    BIT;
   ddrdqs8p        : INOUT    BIT;
   ddrdqs8n        : INOUT    BIT;
   ddrcb00         : INOUT    BIT;
   ddrcb01         : INOUT    BIT;
   ddrcb02         : INOUT    BIT;
   ddrcb03         : INOUT    BIT;
   ddrcb04         : INOUT    BIT;
   ddrcb05         : INOUT    BIT;
   ddrcb06         : INOUT    BIT;
   ddrcb07         : INOUT    BIT;
   ddrd00          : INOUT    BIT;
   ddrd01          : INOUT    BIT;
   ddrd02          : INOUT    BIT;
   ddrd03          : INOUT    BIT;
   ddrd04          : INOUT    BIT;
   ddrd05          : INOUT    BIT;
   ddrd06          : INOUT    BIT;
   ddrd07          : INOUT    BIT;
   ddrd08          : INOUT    BIT;
   ddrd09          : INOUT    BIT;
   ddrd10          : INOUT    BIT;
   ddrd11          : INOUT    BIT;
   ddrd12          : INOUT    BIT;
   ddrd13          : INOUT    BIT;
   ddrd14          : INOUT    BIT;
   ddrd15          : INOUT    BIT;
   ddrd16          : INOUT    BIT;
   ddrd17          : INOUT    BIT;
   ddrd18          : INOUT    BIT;
   ddrd19          : INOUT    BIT;
   ddrd20          : INOUT    BIT;
   ddrd21          : INOUT    BIT;
   ddrd22          : INOUT    BIT;
   ddrd23          : INOUT    BIT;
   ddrd24          : INOUT    BIT;
   ddrd25          : INOUT    BIT;
   ddrd26          : INOUT    BIT;
   ddrd27          : INOUT    BIT;
   ddrd28          : INOUT    BIT;
   ddrd29          : INOUT    BIT;
   ddrd30          : INOUT    BIT;
   ddrd31          : INOUT    BIT;
   ddrd32          : INOUT    BIT;
   ddrd33          : INOUT    BIT;
   ddrd34          : INOUT    BIT;
   ddrd35          : INOUT    BIT;
   ddrd36          : INOUT    BIT;
   ddrd37          : INOUT    BIT;
   ddrd38          : INOUT    BIT;
   ddrd39          : INOUT    BIT;
   ddrd40          : INOUT    BIT;
   ddrd41          : INOUT    BIT;
   ddrd42          : INOUT    BIT;
   ddrd43          : INOUT    BIT;
   ddrd44          : INOUT    BIT;
   ddrd45          : INOUT    BIT;
   ddrd46          : INOUT    BIT;
   ddrd47          : INOUT    BIT;
   ddrd48          : INOUT    BIT;
   ddrd49          : INOUT    BIT;
   ddrd50          : INOUT    BIT;
   ddrd51          : INOUT    BIT;
   ddrd52          : INOUT    BIT;
   ddrd53          : INOUT    BIT;
   ddrd54          : INOUT    BIT;
   ddrd55          : INOUT    BIT;
   ddrd56          : INOUT    BIT;
   ddrd57          : INOUT    BIT;
   ddrd58          : INOUT    BIT;
   ddrd59          : INOUT    BIT;
   ddrd60          : INOUT    BIT;
   ddrd61          : INOUT    BIT;
   ddrd62          : INOUT    BIT;
   ddrd63          : INOUT    BIT;
   ddrce0z         : INOUT    BIT;
   ddrce1z         : INOUT    BIT;
   ddrba0          : INOUT    BIT;
   ddrba1          : INOUT    BIT;
   ddrba2          : INOUT    BIT;
   ddra00          : INOUT    BIT;
   ddra01          : INOUT    BIT;
   ddra02          : INOUT    BIT;
   ddra03          : INOUT    BIT;
   ddra04          : INOUT    BIT;
   ddra05          : INOUT    BIT;
   ddra06          : INOUT    BIT;
   ddra07          : INOUT    BIT;
   ddra08          : INOUT    BIT;
   ddra09          : INOUT    BIT;
   ddra10          : INOUT    BIT;
   ddra11          : INOUT    BIT;
   ddra12          : INOUT    BIT;
   ddra13          : INOUT    BIT;
   ddra14          : INOUT    BIT;
   ddra15          : INOUT    BIT;
   ddrcasz         : INOUT    BIT;
   ddrrasz         : INOUT    BIT;
   ddrwez          : INOUT    BIT;
   ddrcke0         : INOUT    BIT;
   ddrcke1         : INOUT    BIT;
   ddrclkoutp0     : INOUT    BIT;
   ddrclkoutn0     : INOUT    BIT;
   ddrclkoutp1     : INOUT    BIT;
   ddrclkoutn1     : INOUT    BIT;
   ddrodt0         : INOUT    BIT;
   ddrodt1         : INOUT    BIT;
   ddrresetz       : INOUT    BIT;
   ddrslrate0      : INOUT    BIT;
   ddrslrate1      : INOUT    BIT;
   vrefsstl        : LINKAGE  BIT;
   gpio00          : INOUT    BIT;
   gpio01          : INOUT    BIT;
   gpio02          : INOUT    BIT;
   gpio03          : INOUT    BIT;
   gpio04          : INOUT    BIT;
   gpio05          : INOUT    BIT;
   gpio06          : INOUT    BIT;
   gpio07          : INOUT    BIT;
   gpio08          : INOUT    BIT;
   gpio09          : INOUT    BIT;
   gpio10          : INOUT    BIT;
   gpio11          : INOUT    BIT;
   gpio12          : INOUT    BIT;
   gpio13          : INOUT    BIT;
   gpio14          : INOUT    BIT;
   gpio15          : INOUT    BIT;
   tck             : IN       BIT;
   tdi             : IN       BIT;
   tdo             : OUT      BIT;
   tms             : IN       BIT;
   trstz           : IN       BIT;
   emu00           : INOUT    BIT;
   emu01           : INOUT    BIT;
   emu02           : INOUT    BIT;
   emu03           : INOUT    BIT;
   emu04           : INOUT    BIT;
   emu05           : INOUT    BIT;
   emu06           : INOUT    BIT;
   emu07           : INOUT    BIT;
   emu08           : INOUT    BIT;
   emu09           : INOUT    BIT;
   emu10           : INOUT    BIT;
   emu11           : INOUT    BIT;
   emu12           : INOUT    BIT;
   emu13           : INOUT    BIT;
   emu14           : INOUT    BIT;
   emu15           : INOUT    BIT;
   emu16           : INOUT    BIT;
   emu17           : INOUT    BIT;
   emu18           : INOUT    BIT;
   scl             : INOUT    BIT;
   sda             : INOUT    BIT;
   timi0           : INOUT    BIT;
   timi1           : INOUT    BIT;
   timo0           : INOUT    BIT;
   timo1           : INOUT    BIT;
   spiscs0         : INOUT    BIT;
   spiscs1         : INOUT    BIT;
   spiclk          : INOUT    BIT;
   spidin          : INOUT    BIT;
   spidout         : INOUT    BIT;
   coreclkp        : IN       BIT;
   coreclkn        : IN       BIT;
   sriosgmiiclkp   : IN       BIT;
   sriosgmiiclkn   : IN       BIT;
   ddrclkp         : IN       BIT;
   ddrclkn         : IN       BIT;
   pcieclkp        : IN       BIT;
   pcieclkn        : IN       BIT;
   mcmclkp         : IN       BIT;
   mcmclkn         : IN       BIT;
   passclkp        : IN       BIT;
   passclkn        : IN       BIT;
   avdda1          : LINKAGE  BIT;
   avdda2          : LINKAGE  BIT;
   avdda3          : LINKAGE  BIT;
   sysclkout       : INOUT    BIT;
   paclksel        : INOUT    BIT;
   hout            : INOUT    BIT;
   nmiz            : INOUT    BIT;
   lresetz         : INOUT    BIT;
   lresetnmienz    : INOUT    BIT;
   coresel0        : INOUT    BIT;
   coresel1        : INOUT    BIT;
   coresel2        : INOUT    BIT;
   coresel3        : INOUT    BIT;
   resetfullz      : IN       BIT;
   resetz          : IN       BIT;
   porz            : IN       BIT;
   resetstatz      : INOUT    BIT;
   bootcomplete    : INOUT    BIT;
   ptv15           : LINKAGE  BIT;
   vcl             : INOUT    BIT;
   vd              : INOUT    BIT;
   vcntl0          : OUT      BIT;
   vcntl1          : OUT      BIT;
   vcntl2          : OUT      BIT;
   vcntl3          : OUT      BIT;
   mcmrxn0         : IN       BIT;
   mcmrxp0         : IN       BIT;
   mcmrxn1         : IN       BIT;
   mcmrxp1         : IN       BIT;
   mcmrxn2         : IN       BIT;
   mcmrxp2         : IN       BIT;
   mcmrxn3         : IN       BIT;
   mcmrxp3         : IN       BIT;
   mcmtxn0         : BUFFER   BIT;
   mcmtxp0         : BUFFER   BIT;
   mcmtxn1         : BUFFER   BIT;
   mcmtxp1         : BUFFER   BIT;
   mcmtxn2         : BUFFER   BIT;
   mcmtxp2         : BUFFER   BIT;
   mcmtxn3         : BUFFER   BIT;
   mcmtxp3         : BUFFER   BIT;
   mcmrxflclk      : INOUT    BIT;
   mcmrxfldat      : INOUT    BIT;
   mcmtxflclk      : INOUT    BIT;
   mcmtxfldat      : INOUT    BIT;
   mcmrxpmclk      : INOUT    BIT;
   mcmrxpmdat      : INOUT    BIT;
   mcmtxpmclk      : INOUT    BIT;
   mcmtxpmdat      : INOUT    BIT;
   mcmrefclkoutp   : LINKAGE  BIT;
   mcmrefclkoutn   : LINKAGE  BIT;
   riorxn0         : IN       BIT;
   riorxp0         : IN       BIT;
   riorxn1         : IN       BIT;
   riorxp1         : IN       BIT;
   riorxn2         : IN       BIT;
   riorxp2         : IN       BIT;
   riorxn3         : IN       BIT;
   riorxp3         : IN       BIT;
   riotxn0         : BUFFER   BIT;
   riotxp0         : BUFFER   BIT;
   riotxn1         : BUFFER   BIT;
   riotxp1         : BUFFER   BIT;
   riotxn2         : BUFFER   BIT;
   riotxp2         : BUFFER   BIT;
   riotxn3         : BUFFER   BIT;
   riotxp3         : BUFFER   BIT;
   pcierxn0        : IN       BIT;
   pcierxp0        : IN       BIT;
   pcierxn1        : IN       BIT;
   pcierxp1        : IN       BIT;
   pcietxn0        : BUFFER   BIT;
   pcietxp0        : BUFFER   BIT;
   pcietxn1        : BUFFER   BIT;
   pcietxp1        : BUFFER   BIT;
   mdio            : INOUT    BIT;
   mdclk           : INOUT    BIT;
   sgmii0rxn       : IN       BIT;
   sgmii0rxp       : IN       BIT;
   sgmii0txn       : BUFFER   BIT;
   sgmii0txp       : BUFFER   BIT;
   sgmii1rxn       : IN       BIT;
   sgmii1rxp       : IN       BIT;
   sgmii1txn       : BUFFER   BIT;
   sgmii1txp       : BUFFER   BIT;
   uartrxd         : INOUT    BIT;
   uarttxd         : INOUT    BIT;
   uartcts         : INOUT    BIT;
   uartrts         : INOUT    BIT;
   emifrnw         : INOUT    BIT;
   emifce0z        : INOUT    BIT;
   emifce1z        : INOUT    BIT;
   emifce2z        : INOUT    BIT;
   emifce3z        : INOUT    BIT;
   emifoez         : INOUT    BIT;
   emifwez         : INOUT    BIT;
   emifbe0z        : INOUT    BIT;
   emifbe1z        : INOUT    BIT;
   emifwait0       : INOUT    BIT;
   emifwait1       : INOUT    BIT;
   emifa00         : INOUT    BIT;
   emifa01         : INOUT    BIT;
   emifa02         : INOUT    BIT;
   emifa03         : INOUT    BIT;
   emifa04         : INOUT    BIT;
   emifa05         : INOUT    BIT;
   emifa06         : INOUT    BIT;
   emifa07         : INOUT    BIT;
   emifa08         : INOUT    BIT;
   emifa09         : INOUT    BIT;
   emifa10         : INOUT    BIT;
   emifa11         : INOUT    BIT;
   emifa12         : INOUT    BIT;
   emifa13         : INOUT    BIT;
   emifa14         : INOUT    BIT;
   emifa15         : INOUT    BIT;
   emifa16         : INOUT    BIT;
   emifa17         : INOUT    BIT;
   emifa18         : INOUT    BIT;
   emifa19         : INOUT    BIT;
   emifa20         : INOUT    BIT;
   emifa21         : INOUT    BIT;
   emifa22         : INOUT    BIT;
   emifa23         : INOUT    BIT;
   emifd00         : INOUT    BIT;
   emifd01         : INOUT    BIT;
   emifd02         : INOUT    BIT;
   emifd03         : INOUT    BIT;
   emifd04         : INOUT    BIT;
   emifd05         : INOUT    BIT;
   emifd06         : INOUT    BIT;
   emifd07         : INOUT    BIT;
   emifd08         : INOUT    BIT;
   emifd09         : INOUT    BIT;
   emifd10         : INOUT    BIT;
   emifd11         : INOUT    BIT;
   emifd12         : INOUT    BIT;
   emifd13         : INOUT    BIT;
   emifd14         : INOUT    BIT;
   emifd15         : INOUT    BIT;
   clka0           : INOUT    BIT;
   clkb0           : INOUT    BIT;
   fsa0            : INOUT    BIT;
   fsb0            : INOUT    BIT;
   tr00            : INOUT    BIT;
   tr01            : INOUT    BIT;
   tr02            : INOUT    BIT;
   tr03            : INOUT    BIT;
   tr04            : INOUT    BIT;
   tr05            : INOUT    BIT;
   tr06            : INOUT    BIT;
   tr07            : INOUT    BIT;
   tx00            : INOUT    BIT;
   tx01            : INOUT    BIT;
   tx02            : INOUT    BIT;
   tx03            : INOUT    BIT;
   tx04            : INOUT    BIT;
   tx05            : INOUT    BIT;
   tx06            : INOUT    BIT;
   tx07            : INOUT    BIT;
   clka1           : INOUT    BIT;
   clkb1           : INOUT    BIT;
   fsa1            : INOUT    BIT;
   fsb1            : INOUT    BIT;
   tr10            : INOUT    BIT;
   tr11            : INOUT    BIT;
   tr12            : INOUT    BIT;
   tr13            : INOUT    BIT;
   tr14            : INOUT    BIT;
   tr15            : INOUT    BIT;
   tr16            : INOUT    BIT;
   tr17            : INOUT    BIT;
   tx10            : INOUT    BIT;
   tx11            : INOUT    BIT;
   tx12            : INOUT    BIT;
   tx13            : INOUT    BIT;
   tx14            : INOUT    BIT;
   tx15            : INOUT    BIT;
   tx16            : INOUT    BIT;
   tx17            : INOUT    BIT;
   rsv01           : INOUT    BIT;
   rsv02           : INOUT    BIT;
   rsv03           : INOUT    BIT;
   rsv04           : BUFFER   BIT;
   rsv05           : BUFFER   BIT;
   rsv06           : BUFFER   BIT;
   rsv07           : BUFFER   BIT;
   rsv08           : LINKAGE  BIT;
   rsv09           : LINKAGE  BIT;
   rsv0A           : LINKAGE  BIT;
   rsv0B           : LINKAGE  BIT;
   rsv10           : LINKAGE  BIT;
   rsv11           : LINKAGE  BIT;
   rsv12           : LINKAGE  BIT;
   rsv13           : LINKAGE  BIT;
   rsv14           : LINKAGE  BIT;
   rsv15           : LINKAGE  BIT;
   rsv16           : LINKAGE  BIT;
   rsv17           : LINKAGE  BIT;
   rsv20           : INOUT    BIT;
   rsv21           : INOUT    BIT;
   rsv22           : INOUT    BIT;
   rsv24           : BUFFER   BIT;
   rsv25           : BUFFER   BIT;
   vddr1           : LINKAGE  BIT;
   vddr2           : LINKAGE  BIT;
   vddr3           : LINKAGE  BIT;
   vddr4           : LINKAGE  BIT;
   cvdd            : LINKAGE  BIT_VECTOR(79 downto 0);
   cvdd1           : LINKAGE  BIT_VECTOR(24 downto 0);
   dvdd15          : LINKAGE  BIT_VECTOR(30 downto 0);
   dvdd18          : LINKAGE  BIT_VECTOR(21 downto 0);
   vddt1           : LINKAGE  BIT_VECTOR(6  downto 0);
   vddt2           : LINKAGE  BIT_VECTOR(17 downto 0);
   vss             : LINKAGE  BIT_VECTOR(251 downto 0)
  );
 use STD_1149_1_2001.all;

 attribute COMPONENT_CONFORMANCE of TMS320C6678 : entity is "STD_1149_1_2001";

 attribute      PIN_MAP          of TMS320C6678 : entity is PHYSICAL_PIN_MAP;
 constant CYP : PIN_MAP_STRING :=
   "avdda1                      : H22   ,"&
   "avdda2                      : AC6   ,"&
   "avdda3                      : AD5   ,"&
   "bootcomplete                : AE2   ,"&
   "clka0                       : AF25  ,"&
   "clka1                       : AJ23  ,"&
   "clkb0                       : AG25  ,"&
   "clkb1                       : AH23  ,"&
   "coreclkn                    : AG4   ,"&
   "coreclkp                    : AG3   ,"&
   "coresel0                    : AF2   ,"&
   "coresel1                    : AD4   ,"&
   "coresel2                    : AE6   ,"&
   "coresel3                    : AE5   ,"&
   "ddra00                      : A14   ,"&
   "ddra01                      : B14   ,"&
   "ddra02                      : F14   ,"&
   "ddra03                      : F13   ,"&
   "ddra04                      : A15   ,"&
   "ddra05                      : C15   ,"&
   "ddra06                      : B15   ,"&
   "ddra07                      : D15   ,"&
   "ddra08                      : F15   ,"&
   "ddra09                      : E15   ,"&
   "ddra10                      : E16   ,"&
   "ddra11                      : D16   ,"&
   "ddra12                      : E17   ,"&
   "ddra13                      : C16   ,"&
   "ddra14                      : D17   ,"&
   "ddra15                      : C17   ,"&
   "ddrba0                      : A13   ,"&
   "ddrba1                      : B13   ,"&
   "ddrba2                      : C13   ,"&
   "ddrcasz                     : D12   ,"&
   "ddrcb00                     : E19   ,"&
   "ddrcb01                     : C20   ,"&
   "ddrcb02                     : D19   ,"&
   "ddrcb03                     : B20   ,"&
   "ddrcb04                     : C19   ,"&
   "ddrcb05                     : C18   ,"&
   "ddrcb06                     : B18   ,"&
   "ddrcb07                     : A18   ,"&
   "ddrce0z                     : C11   ,"&
   "ddrce1z                     : C12   ,"&
   "ddrcke0                     : D11   ,"&
   "ddrcke1                     : E18   ,"&
   "ddrclkn                     : H29   ,"&
   "ddrclkoutn0                 : B12   ,"&
   "ddrclkoutn1                 : B16   ,"&
   "ddrclkoutp0                 : A12   ,"&
   "ddrclkoutp1                 : A16   ,"&
   "ddrclkp                     : G29   ,"&
   "ddrd00                      : E28   ,"&
   "ddrd01                      : D29   ,"&
   "ddrd02                      : E27   ,"&
   "ddrd03                      : D28   ,"&
   "ddrd04                      : D27   ,"&
   "ddrd05                      : B28   ,"&
   "ddrd06                      : E26   ,"&
   "ddrd07                      : F25   ,"&
   "ddrd08                      : F24   ,"&
   "ddrd09                      : E24   ,"&
   "ddrd10                      : E25   ,"&
   "ddrd11                      : D25   ,"&
   "ddrd12                      : D26   ,"&
   "ddrd13                      : C26   ,"&
   "ddrd14                      : B26   ,"&
   "ddrd15                      : A26   ,"&
   "ddrd16                      : F23   ,"&
   "ddrd17                      : F22   ,"&
   "ddrd18                      : D24   ,"&
   "ddrd19                      : E23   ,"&
   "ddrd20                      : A23   ,"&
   "ddrd21                      : B23   ,"&
   "ddrd22                      : C24   ,"&
   "ddrd23                      : E22   ,"&
   "ddrd24                      : D21   ,"&
   "ddrd25                      : F20   ,"&
   "ddrd26                      : E21   ,"&
   "ddrd27                      : F21   ,"&
   "ddrd28                      : D22   ,"&
   "ddrd29                      : C21   ,"&
   "ddrd30                      : B22   ,"&
   "ddrd31                      : C22   ,"&
   "ddrd32                      : E10   ,"&
   "ddrd33                      : D10   ,"&
   "ddrd34                      : B10   ,"&
   "ddrd35                      : D9    ,"&
   "ddrd36                      : E9    ,"&
   "ddrd37                      : C9    ,"&
   "ddrd38                      : B8    ,"&
   "ddrd39                      : E8    ,"&
   "ddrd40                      : A7    ,"&
   "ddrd41                      : D7    ,"&
   "ddrd42                      : E7    ,"&
   "ddrd43                      : C7    ,"&
   "ddrd44                      : B7    ,"&
   "ddrd45                      : E6    ,"&
   "ddrd46                      : D6    ,"&
   "ddrd47                      : C6    ,"&
   "ddrd48                      : C5    ,"&
   "ddrd49                      : A5    ,"&
   "ddrd50                      : B4    ,"&
   "ddrd51                      : A4    ,"&
   "ddrd52                      : D4    ,"&
   "ddrd53                      : E4    ,"&
   "ddrd54                      : C4    ,"&
   "ddrd55                      : C3    ,"&
   "ddrd56                      : F4    ,"&
   "ddrd57                      : D2    ,"&
   "ddrd58                      : E2    ,"&
   "ddrd59                      : C2    ,"&
   "ddrd60                      : F2    ,"&
   "ddrd61                      : F3    ,"&
   "ddrd62                      : E1    ,"&
   "ddrd63                      : F1    ,"&
   "ddrdqm0                     : E29   ,"&
   "ddrdqm1                     : C27   ,"&
   "ddrdqm2                     : A25   ,"&
   "ddrdqm3                     : A22   ,"&
   "ddrdqm4                     : A10   ,"&
   "ddrdqm5                     : A8    ,"&
   "ddrdqm6                     : B5    ,"&
   "ddrdqm7                     : B2    ,"&
   "ddrdqm8                     : A20   ,"&
   "ddrdqs0n                    : C29   ,"&
   "ddrdqs0p                    : C28   ,"&
   "ddrdqs1n                    : B27   ,"&
   "ddrdqs1p                    : A27   ,"&
   "ddrdqs2n                    : B24   ,"&
   "ddrdqs2p                    : A24   ,"&
   "ddrdqs3n                    : B21   ,"&
   "ddrdqs3p                    : A21   ,"&
   "ddrdqs4n                    : B9    ,"&
   "ddrdqs4p                    : A9    ,"&
   "ddrdqs5n                    : A6    ,"&
   "ddrdqs5p                    : B6    ,"&
   "ddrdqs6n                    : A3    ,"&
   "ddrdqs6p                    : B3    ,"&
   "ddrdqs7n                    : C1    ,"&
   "ddrdqs7p                    : D1    ,"&
   "ddrdqs8n                    : B19   ,"&
   "ddrdqs8p                    : A19   ,"&
   "ddrodt0                     : D13   ,"&
   "ddrodt1                     : E13   ,"&
   "ddrrasz                     : C10   ,"&
   "ddrresetz                   : E11   ,"&
   "ddrslrate0                  : G27   ,"&
   "ddrslrate1                  : H27   ,"&
   "ddrwez                      : E12   ,"&
   "emifa00                     : T27   ,"&
   "emifa01                     : T24   ,"&
   "emifa02                     : U29   ,"&
   "emifa03                     : T25   ,"&
   "emifa04                     : U27   ,"&
   "emifa05                     : U28   ,"&
   "emifa06                     : U25   ,"&
   "emifa07                     : U24   ,"&
   "emifa08                     : V28   ,"&
   "emifa09                     : V29   ,"&
   "emifa10                     : V27   ,"&
   "emifa11                     : V26   ,"&
   "emifa12                     : V25   ,"&
   "emifa13                     : V24   ,"&
   "emifa14                     : W28   ,"&
   "emifa15                     : W27   ,"&
   "emifa16                     : W29   ,"&
   "emifa17                     : W26   ,"&
   "emifa18                     : W25   ,"&
   "emifa19                     : W24   ,"&
   "emifa20                     : W23   ,"&
   "emifa21                     : Y29   ,"&
   "emifa22                     : Y28   ,"&
   "emifa23                     : U23   ,"&
   "emifbe0z                    : R24   ,"&
   "emifbe1z                    : R23   ,"&
   "emifce0z                    : P25   ,"&
   "emifce1z                    : R27   ,"&
   "emifce2z                    : R28   ,"&
   "emifce3z                    : R25   ,"&
   "emifd00                     : Y27   ,"&
   "emifd01                     : AB29  ,"&
   "emifd02                     : AA29  ,"&
   "emifd03                     : Y26   ,"&
   "emifd04                     : AA27  ,"&
   "emifd05                     : AB27  ,"&
   "emifd06                     : AA26  ,"&
   "emifd07                     : AA25  ,"&
   "emifd08                     : Y25   ,"&
   "emifd09                     : AB25  ,"&
   "emifd10                     : AA24  ,"&
   "emifd11                     : Y24   ,"&
   "emifd12                     : AB23  ,"&
   "emifd13                     : AB24  ,"&
   "emifd14                     : AB26  ,"&
   "emifd15                     : AC25  ,"&
   "emifoez                     : R26   ,"&
   "emifrnw                     : P26   ,"&
   "emifwait0                   : T29   ,"&
   "emifwait1                   : T28   ,"&
   "emifwez                     : P24   ,"&
   "emu00                       : AC29  ,"&
   "emu01                       : AC28  ,"&
   "emu02                       : AC27  ,"&
   "emu03                       : AC26  ,"&
   "emu04                       : AD29  ,"&
   "emu05                       : AD28  ,"&
   "emu06                       : AD27  ,"&
   "emu07                       : AE29  ,"&
   "emu08                       : AE28  ,"&
   "emu09                       : AF29  ,"&
   "emu10                       : AE27  ,"&
   "emu11                       : AF28  ,"&
   "emu12                       : AG29  ,"&
   "emu13                       : AD26  ,"&
   "emu14                       : AG28  ,"&
   "emu15                       : AG27  ,"&
   "emu16                       : AJ27  ,"&
   "emu17                       : AF27  ,"&
   "emu18                       : AH27  ,"&
   "fsa0                        : AJ26  ,"&
   "fsa1                        : AG23  ,"&
   "fsb0                        : AG26  ,"&
   "fsb1                        : AJ22  ,"&
   "gpio00                      : H25   ,"&
   "gpio01                      : J28   ,"&
   "gpio02                      : J29   ,"&
   "gpio03                      : J26   ,"&
   "gpio04                      : J25   ,"&
   "gpio05                      : J27   ,"&
   "gpio06                      : J24   ,"&
   "gpio07                      : K27   ,"&
   "gpio08                      : K28   ,"&
   "gpio09                      : K26   ,"&
   "gpio10                      : K29   ,"&
   "gpio11                      : L28   ,"&
   "gpio12                      : L29   ,"&
   "gpio13                      : K25   ,"&
   "gpio14                      : K24   ,"&
   "gpio15                      : L27   ,"&
   "hout                        : AD20  ,"&
   "lresetnmienz                : M27   ,"&
   "lresetz                     : N26   ,"&
   "mcmclkn                     : Y2    ,"&
   "mcmclkp                     : W2    ,"&
   "mcmrefclkoutn               : W1    ,"&
   "mcmrefclkoutp               : Y1    ,"&
   "mcmrxflclk                  : W3    ,"&
   "mcmrxfldat                  : W4    ,"&
   "mcmrxn0                     : U2    ,"&
   "mcmrxn1                     : T1    ,"&
   "mcmrxn2                     : M1    ,"&
   "mcmrxn3                     : P2    ,"&
   "mcmrxp0                     : T2    ,"&
   "mcmrxp1                     : R1    ,"&
   "mcmrxp2                     : N1    ,"&
   "mcmrxp3                     : N2    ,"&
   "mcmrxpmclk                  : Y3    ,"&
   "mcmrxpmdat                  : Y4    ,"&
   "mcmtxflclk                  : AA1   ,"&
   "mcmtxfldat                  : AA3   ,"&
   "mcmtxn0                     : M5    ,"&
   "mcmtxn1                     : T4    ,"&
   "mcmtxn2                     : R5    ,"&
   "mcmtxn3                     : N4    ,"&
   "mcmtxp0                     : N5    ,"&
   "mcmtxp1                     : U4    ,"&
   "mcmtxp2                     : T5    ,"&
   "mcmtxp3                     : P4    ,"&
   "mcmtxpmclk                  : AA2   ,"&
   "mcmtxpmdat                  : AA4   ,"&
   "mdclk                       : H26   ,"&
   "mdio                        : G26   ,"&
   "nmiz                        : M25   ,"&
   "paclksel                    : AE4   ,"&
   "passclkn                    : AJ4   ,"&
   "passclkp                    : AJ5   ,"&
   "pcieclkn                    : AH5   ,"&
   "pcieclkp                    : AG5   ,"&
   "pcierxn0                    : AH7   ,"&
   "pcierxn1                    : AJ9   ,"&
   "pcierxp0                    : AH8   ,"&
   "pcierxp1                    : AJ8   ,"&
   "pcietxn0                    : AF8   ,"&
   "pcietxn1                    : AG9   ,"&
   "pcietxp0                    : AF7   ,"&
   "pcietxp1                    : AG8   ,"&
   "porz                        : AC20  ,"&
   "ptv15                       : G22   ,"&
   "resetfullz                  : N25   ,"&
   "resetstatz                  : N27   ,"&
   "resetz                      : M29   ,"&
   "riorxn0                     : AJ11  ,"&
   "riorxn1                     : AH10  ,"&
   "riorxn2                     : AH14  ,"&
   "riorxn3                     : AJ15  ,"&
   "riorxp0                     : AJ12  ,"&
   "riorxp1                     : AH11  ,"&
   "riorxp2                     : AH13  ,"&
   "riorxp3                     : AJ14  ,"&
   "riotxn0                     : AF10  ,"&
   "riotxn1                     : AG11  ,"&
   "riotxn2                     : AG15  ,"&
   "riotxn3                     : AF14  ,"&
   "riotxp0                     : AF11  ,"&
   "riotxp1                     : AG12  ,"&
   "riotxp2                     : AG14  ,"&
   "riotxp3                     : AF13  ,"&
   "rsv01                       : AH28  ,"&
   "rsv02                       : N24   ,"&
   "rsv03                       : N23   ,"&
   "rsv04                       : AH2   ,"&
   "rsv05                       : AJ3   ,"&
   "rsv06                       : H28   ,"&
   "rsv07                       : G28   ,"&
   "rsv08                       : AH19  ,"&
   "rsv09                       : AF19  ,"&
   "rsv0A                       : AA21  ,"&
   "rsv0B                       : AA20  ,"&
   "rsv10                       : K22   ,"&
   "rsv11                       : J22   ,"&
   "rsv12                       : Y5    ,"&
   "rsv13                       : W5    ,"&
   "rsv14                       : W6    ,"&
   "rsv15                       : AE12  ,"&
   "rsv16                       : AC9   ,"&
   "rsv17                       : AD19  ,"&
   "rsv20                       : AF3   ,"&
   "rsv21                       : G25   ,"&
   "rsv22                       : AF1   ,"&
   "rsv24                       : AH4   ,"&
   "rsv25                       : AH3   ,"&
   "scl                         : AD3   ,"&
   "sda                         : AC4   ,"&
   "sgmii0rxn                   : AJ18  ,"&
   "sgmii0rxp                   : AJ17  ,"&
   "sgmii0txn                   : AG18  ,"&
   "sgmii0txp                   : AG17  ,"&
   "sgmii1rxn                   : AH17  ,"&
   "sgmii1rxp                   : AH16  ,"&
   "sgmii1txn                   : AF17  ,"&
   "sgmii1txp                   : AF16  ,"&
   "spiclk                      : AE1   ,"&
   "spidIn                      : AD2   ,"&
   "spidout                     : AB1   ,"&
   "spiscs0                     : AG1   ,"&
   "spiscs1                     : AG2   ,"&
   "sriosgmiiclkn               : AJ6   ,"&
   "sriosgmiiclkp               : AG6   ,"&
   "sysclkout                   : AE3   ,"&
   "tck                         : N29   ,"&
   "tdi                         : P27   ,"&
   "tdo                         : R29   ,"&
   "timi0                       : L24   ,"&
   "timi1                       : L26   ,"&
   "timo0                       : L25   ,"&
   "timo1                       : M26   ,"&
   "tms                         : P29   ,"&
   "tr00                        : AH26  ,"&
   "tr01                        : AJ25  ,"&
   "tr02                        : AD23  ,"&
   "tr03                        : AD24  ,"&
   "tr04                        : AC23  ,"&
   "tr05                        : AH25  ,"&
   "tr06                        : AC24  ,"&
   "tr07                        : AE25  ,"&
   "tr10                        : AE22  ,"&
   "tr11                        : AD21  ,"&
   "tr12                        : AC21  ,"&
   "tr13                        : AJ21  ,"&
   "tr14                        : AH22  ,"&
   "tr15                        : AJ20  ,"&
   "tr16                        : AH21  ,"&
   "tr17                        : AG21  ,"&
   "trstz                       : P28   ,"&
   "tx00                        : AE24  ,"&
   "tx01                        : AD25  ,"&
   "tx02                        : AJ24  ,"&
   "tx03                        : AG24  ,"&
   "tx04                        : AH24  ,"&
   "tx05                        : AF24  ,"&
   "tx06                        : AE23  ,"&
   "tx07                        : AF23  ,"&
   "tx10                        : AF21  ,"&
   "tx11                        : AD22  ,"&
   "tx12                        : AC22  ,"&
   "tx13                        : AE21  ,"&
   "tx14                        : AG20  ,"&
   "tx15                        : AE20  ,"&
   "tx16                        : AH20  ,"&
   "tx17                        : AF20  ,"&
   "uartcts                     : AB3   ,"&
   "uartrts                     : AB2   ,"&
   "uartrxd                     : AD1   ,"&
   "uarttxd                     : AC1   ,"&
   "vcl                         : M24   ,"&
   "vcntl0                      : L23   ,"&
   "vcntl1                      : K23   ,"&
   "vcntl2                      : J23   ,"&
   "vcntl3                      : H23   ,"&
   "vd                          : M23   ,"&
   "vrefsstl                    : E14   ,"&
   "cvdd                        : ( H7  , H9  , H11 , H13 , H15 , H17 , H19 , H21 , J10 , J12 ,    "&
                                   "J16 , J18 , J20 , K11 , K17 , K19 , K21 , L10 , L12 , L16 ,    "&
                                   "L18 , M11 , M13 , M15 , M17 , M19 , N8  , N10 , N12 , N14 ,    "&
                                   "N16 , N18 , P9  , P11 , P13 , P15 , P17 , P19 , P21 , R8  ,    "&
                                   "R10 , R18 , R20 , R22 , T9  , T11 , T13 , T15 , T17 , T19 ,    "&
                                   "T21 , U8  , U10 , U18 , U20 , U22 , V9  , V11 , V17 , V19 ,    "&
                                   "V21 , W8  , W10 , W18 , W20 , W22 , Y9  , Y11 , Y13 , Y15 ,    "&
                                   "Y17 , Y19 , Y21 , AA8 , AA10, AA12, AA14, AA16, AA18, AA22 ),  "&
   "cvdd1                       : ( J8  , J14 , K7  , K9  , K13 , K15 , L8  , L14 , L20 , L22 ,    "&
                                   "M9  , M21 , N20 , N22 , R12 , R14 , R16 , U12 , U14 , U16 ,    "&
                                   "V13 , V15 , W12 , W14 , W16 ),                                 "&
   "dvdd15                      : ( A2  , A11 , A17 , A28 , B1  , B29 , C14 , C25 , D5  , D8  ,    "&
                                   "D20 , D23 , E3  , F5  , F7  , F9  , F11 , F17 , F19 , F26 ,    "&
                                   "F28 , G2  , G4  , G8  , G10 , G12 , G14 , G16 , G18 , G20 ,    "&
                                   "G23 ),                                                         "&
   "dvdd18                      : ( H24 , N28 , P23 , T23 , U26 , V23 , Y7  , Y23 , AA6 , AB5 ,    "&
                                   "AB7 , AB19, AB21, AB28, AC3 , AF5 , AF26, AG22, AH1 , AH29,    "&
                                   "AJ2 , AJ28),                                                   "&
   "vddr1                       : V5    ,"&
   "vddr2                       : AE10  ,"&
   "vddr3                       : AE16  ,"&
   "vddr4                       : AE14  ,"&
   "vddt1                       : ( M7  , N6  , P7  , R6  , T7  , U6  , V7  ),                     "&
   "vddt2                       : ( AB9 , AB11, AB13, AB15, AB17, AC8 , AC10, AC12, AC14, AC16,    "&
                                   "AC18, AD7 , AD9 , AD11, AD13, AD15, AD17, AE18 ),              "&
   "vss                         : ( A1  , A29 , B11 , B17 , B25 , C8  , C23 , D3  , D14 , D18 ,    "&
                                   "E5  , E20 , F6  , F8  , F10 , F12 , F16 , F18 , F27 , F29 ,    "&
                                   "G1  , G3  , G5  , G6  , G7  , G9  , G11 , G13 , G15 , G17 ,    "&
                                   "G19 , G21 , G24 , H1  , H2  , H3  , H4  , H5  , H6  , H8  ,    "&
                                   "H10 , H12 , H14 , H16 , H18 , H20 , J1  , J2  , J3  , J4  ,    "&
                                   "J5  , J6  , J7  , J9  , J11 , J13 , J15 , J17 , J19 , J21 ,    "&
                                   "K1  , K2  , K3  , K4  , K5  , K6  , K8  , K10 , K12 , K14 ,    "&
                                   "K16 , K18 , K20 , L1  , L2  , L3  , L4  , L5  , L6  , L7  ,    "&
                                   "L9  , L11 , L13 , L15 , L17 , L19 , L21 , M2  , M3  , M4  ,    "&
                                   "M6  , M8  , M10 , M12 , M14 , M16 , M18 , M20 , M22 , M28 ,    "&
                                   "N3  , N7  , N9  , N11 , N13 , N15 , N17 , N19 , N21 , P1  ,    "&
                                   "P3  , P5  , P6  , P8  , P10 , P12 , P14 , P16 , P18 , P20 ,    "&
                                   "P22 , R2  , R3  , R4  , R7  , R9  , R11 , R13 , R15 , R17 ,    "&
                                   "R19 , R21 , T3  , T6  , T8  , T10 , T12 , T14 , T16 , T18 ,    "&
                                   "T20 , T22 , T26 , U1  , U3  , U5  , U7  , U9  , U11 , U13 ,    "&
                                   "U15 , U17 , U19 , U21 , V1  , V2  , V3  , V4  , V6  , V8  ,    "&
                                   "V10 , V12 , V14 , V16 , V18 , V20 , V22 , W7  , W9  , W11 ,    "&
                                   "W13 , W15 , W17 , W19 , W21 , Y6  , Y8  , Y10 , Y12 , Y14 ,    "&
                                   "Y16 , Y18 , Y20 , Y22 , AA5 , AA7 , AA9 , AA11, AA13, AA15,    "&
                                   "AA17, AA19, AA23, AA28, AB4 , AB6 , AB8 , AB10, AB12, AB14,    "&
                                   "AB16, AB18, AB20, AB22, AC2 , AC5 , AC7 , AC11, AC13, AC15,    "&
                                   "AC17, AC19, AD6 , AD8 , AD10, AD12, AD14, AD16, AD18, AE7 ,    "&
                                   "AE8 , AE9 , AE11, AE13, AE15, AE17, AE19, AE26, AF4 , AF6 ,    "&
                                   "AF9 , AF12, AF15, AF18, AF22, AG7 , AG10, AG13, AG16, AG19,    "&
                                   "AH6 , AH9 , AH12, AH15, AH18, AJ1 , AJ7 , AJ10, AJ13, AJ16,    "&
                                   "AJ19, AJ29 )                                                   ";

 attribute PORT_GROUPING of TMS320C6678 : entity is
    "Differential_Voltage  (        "&
    "(mcmtxp0,       mcmtxn0      ),"&
    "(mcmtxp1,       mcmtxn1      ),"&
    "(mcmtxp2,       mcmtxn2      ),"&
    "(mcmtxp3,       mcmtxn3      ),"&
    "(riotxp0,       riotxn0      ),"&
    "(riotxp1,       riotxn1      ),"&
    "(riotxp2,       riotxn2      ),"&
    "(riotxp3,       riotxn3      ),"&
    "(pcietxp0,      pcietxn0     ),"&
    "(pcietxp1,      pcietxn1     ),"&
    "(coreclkp,      coreclkn     ),"&
    "(sriosgmiiclkp, sriosgmiiclkn),"&
    "(ddrclkp,       ddrclkn      ),"&
    "(mcmclkp,       mcmclkn      ),"&
    "(pcieclkp,      pcieclkn     ),"&
    "(passclkp,      passclkn     ),"&        
    "(sgmii0txp,     sgmii0txn    ),"&  
    "(sgmii1txp,     sgmii1txn    ),"&  
    "(ddrdqs0p,      ddrdqs0n     ),"&    
    "(ddrdqs1p,      ddrdqs1n     ),"&    
    "(ddrdqs2p,      ddrdqs2n     ),"&    
    "(ddrdqs3p,      ddrdqs3n     ),"&    
    "(ddrdqs4p,      ddrdqs4n     ),"&    
    "(ddrdqs5p,      ddrdqs5n     ),"&    
    "(ddrdqs6p,      ddrdqs6n     ),"&    
    "(ddrdqs7p,      ddrdqs7n     ),"&    
    "(ddrdqs8p,      ddrdqs8n     ),"&    
    "(rsv04,         rsv05        ),"&
    "(rsv06,         rsv07        ),"&
    "(rsv24,         rsv25        ))";  

  attribute TAP_SCAN_IN    of tdi    : signal is true;
  attribute TAP_SCAN_MODE  of tms    : signal is true;
  attribute TAP_SCAN_OUT   of tdo    : signal is true;
  attribute TAP_SCAN_CLOCK of tck    : signal is (20.0e6,BOTH);
  attribute TAP_SCAN_RESET of trstz  : signal is true;

  attribute COMPLIANCE_PATTERNS of TMS320C6678 : entity is "(porz, resetfullz)(11)";
  attribute INSTRUCTION_LENGTH  of TMS320C6678 : entity is 6;
  attribute INSTRUCTION_OPCODE  of TMS320C6678 : entity is 
      "private_0       (000010),"& 
      "IDCODE          (000100),"& 
      "private_1       (000101),"& 
      "private_2       (000111),"& 
      "private_3       (001000),"& 
      "private_4       (010111),"& 
      "EXTEST          (011000),"& 
      "private_5       (011001),"& 
      "private_6       (011010),"& 
      "SAMPLE          (011011),"& 
      "PRELOAD         (011100),"& 
      "private_7       (011101),"& 
      "private_8       (011110),"& 
      "private_9       (011111),"& 
      "EXTEST_PULSE    (100100),"& 
      "EXTEST_TRAIN    (100101),"& 
      "private_a       (110001),"& 
      "BYPASS          (000000,111111)";   

  attribute INSTRUCTION_CAPTURE of TMS320C6678 : entity is "000001";

  attribute INSTRUCTION_PRIVATE of TMS320C6678 : entity is
      "private_0,    "&
      "private_1,    "&
      "private_2,    "&
      "private_3,    "&
      "private_4,    "&
      "private_5,    "&
      "private_6,    "&
      "private_7,    "&
      "private_8,    "&
      "private_9,    "&
      "EXTEST_PULSE, "&
      "EXTEST_TRAIN, "&
      "private_a      "; 

  attribute IDCODE_REGISTER     of TMS320C6678 : entity is
      "0000"            &    -- variant
      "0000000010011110"&    -- device id
      "00000010111"     &    -- mfg = Texas Instruments
      "1";    -- must end with 1
 attribute REGISTER_ACCESS of TMS320C6678 : entity is
      "BOUNDARY      (EXTEST),          "&  
      "BOUNDARY      (SAMPLE),          "&  
      "BOUNDARY      (PRELOAD),         "&  
      "DEVICE_ID     (IDCODE),          "&  
      "GEN_REG32[32] (private_1),       "&
      "GEN_REG1[1]   (private_0),       "&
      "GEN_REG8[8]   (private_2),       "&
      "GEN_REG32[32] (private_3),       "&
      "GEN_REG1[1]   (private_4),       "&
      "GEN_REG1[1]   (private_5),       "&
      "GEN_REG1[1]   (private_6),       "&
      "GEN_REG1[1]   (private_7),       "&
      "GEN_REG1[1]   (private_8),       "&
      "GEN_REG1[1]   (private_9),       "&
      "BOUNDARY      (EXTEST_PULSE),    "&
      "BOUNDARY      (EXTEST_TRAIN),    "&
      "GEN_REG1[1]   (private_a),       "&
      "BYPASS        (BYPASS)           ";     

  attribute BOUNDARY_LENGTH of TMS320C6678 : entity is 625;

  attribute BOUNDARY_REGISTER of TMS320C6678 : entity is

   " 624  (BC_4, *             ,  internal    , X                  ),"& 
   " 623  (BC_4, pcierxn0      ,  observe_only, X                  ),"& 
   " 622  (BC_4, pcierxp0      ,  observe_only, X                  ),"& 
   " 621  (BC_4, pcierxn1      ,  observe_only, X                  ),"& 
   " 620  (BC_4, pcierxp1      ,  observe_only, X                  ),"& 
   " 619  (BC_1, pcietxp0      ,  output2     , X                  ),"& 
   " 618  (BC_1, pcietxp1      ,  output2     , X                  ),"& 
   " 617  (BC_4, sgmii0rxn     ,  observe_only, X                  ),"& 
   " 616  (BC_4, sgmii0rxp     ,  observe_only, X                  ),"& 
   " 615  (BC_4, sgmii1rxn     ,  observe_only, X                  ),"& 
   " 614  (BC_4, sgmii1rxp     ,  observe_only, X                  ),"& 
   " 613  (BC_1, sgmii0txp     ,  output2     , X                  ),"& 
   " 612  (BC_1, sgmii1txp     ,  output2     , X                  ),"& 
   " 611  (BC_4, riorxn0       ,  observe_only, X                  ),"& 
   " 610  (BC_4, riorxp0       ,  observe_only, X                  ),"& 
   " 609  (BC_4, riorxn1       ,  observe_only, X                  ),"& 
   " 608  (BC_4, riorxp1       ,  observe_only, X                  ),"& 
   " 607  (BC_4, riorxn2       ,  observe_only, X                  ),"& 
   " 606  (BC_4, riorxp2       ,  observe_only, X                  ),"& 
   " 605  (BC_4, riorxn3       ,  observe_only, X                  ),"& 
   " 604  (BC_4, riorxp3       ,  observe_only, X                  ),"& 
   " 603  (BC_1, riotxp0       ,  output2     , X                  ),"& 
   " 602  (BC_1, riotxp1       ,  output2     , X                  ),"& 
   " 601  (BC_1, riotxp2       ,  output2     , X                  ),"& 
   " 600  (BC_1, riotxp3       ,  output2     , X                  ),"& 
   " 599  (BC_4, mcmrxn0       ,  observe_only, X                  ),"& 
   " 598  (BC_4, mcmrxp0       ,  observe_only, X                  ),"& 
   " 597  (BC_4, mcmrxn1       ,  observe_only, X                  ),"& 
   " 596  (BC_4, mcmrxp1       ,  observe_only, X                  ),"& 
   " 595  (BC_4, mcmrxn2       ,  observe_only, X                  ),"& 
   " 594  (BC_4, mcmrxp2       ,  observe_only, X                  ),"& 
   " 593  (BC_4, mcmrxn3       ,  observe_only, X                  ),"& 
   " 592  (BC_4, mcmrxp3       ,  observe_only, X                  ),"& 
   " 591  (BC_1, mcmtxp0       ,  output2     , X                  ),"& 
   " 590  (BC_1, mcmtxp1       ,  output2     , X                  ),"& 
   " 589  (BC_1, mcmtxp2       ,  output2     , X                  ),"& 
   " 588  (BC_1, mcmtxp3       ,  output2     , X                  ),"& 
   " 587  (BC_7, ddrslrate0    ,  bidir       , X, 586 , 1, PULL0  ),"& 
   " 586  (BC_2, *             ,  control     , 1                  ),"& 
   " 585  (BC_7, ddrslrate1    ,  bidir       , X, 584 , 1, PULL0  ),"& 
   " 584  (BC_2, *             ,  control     , 1                  ),"& 
   " 583  (BC_7, gpio00        ,  bidir       , X, 582 , 1, PULL0  ),"& 
   " 582  (BC_2, *             ,  control     , 1                  ),"& 
   " 581  (BC_7, gpio01        ,  bidir       , X, 580 , 1, PULL0  ),"& 
   " 580  (BC_2, *             ,  control     , 1                  ),"& 
   " 579  (BC_7, gpio02        ,  bidir       , X, 578 , 1, PULL0  ),"& 
   " 578  (BC_2, *             ,  control     , 1                  ),"& 
   " 577  (BC_7, gpio03        ,  bidir       , X, 576 , 1, PULL0  ),"& 
   " 576  (BC_2, *             ,  control     , 1                  ),"& 
   " 575  (BC_7, gpio04        ,  bidir       , X, 574 , 1, PULL0  ),"& 
   " 574  (BC_2, *             ,  control     , 1                  ),"& 
   " 573  (BC_7, gpio05        ,  bidir       , X, 572 , 1, PULL0  ),"& 
   " 572  (BC_2, *             ,  control     , 1                  ),"& 
   " 571  (BC_7, gpio06        ,  bidir       , X, 570 , 1, PULL0  ),"& 
   " 570  (BC_2, *             ,  control     , 1                  ),"& 
   " 569  (BC_7, gpio07        ,  bidir       , X, 568 , 1, PULL0  ),"& 
   " 568  (BC_2, *             ,  control     , 1                  ),"& 
   " 567  (BC_7, gpio08        ,  bidir       , X, 566 , 1, PULL0  ),"& 
   " 566  (BC_2, *             ,  control     , 1                  ),"& 
   " 565  (BC_7, gpio09        ,  bidir       , X, 564 , 1, PULL0  ),"& 
   " 564  (BC_2, *             ,  control     , 1                  ),"& 
   " 563  (BC_7, gpio10        ,  bidir       , X, 562 , 1, PULL0  ),"& 
   " 562  (BC_2, *             ,  control     , 1                  ),"& 
   " 561  (BC_7, gpio11        ,  bidir       , X, 560 , 1, PULL0  ),"& 
   " 560  (BC_2, *             ,  control     , 1                  ),"& 
   " 559  (BC_7, gpio12        ,  bidir       , X, 558 , 1, PULL0  ),"& 
   " 558  (BC_2, *             ,  control     , 1                  ),"& 
   " 557  (BC_7, gpio13        ,  bidir       , X, 556 , 1, PULL0  ),"& 
   " 556  (BC_2, *             ,  control     , 1                  ),"& 
   " 555  (BC_7, gpio14        ,  bidir       , X, 554 , 1, PULL0  ),"& 
   " 554  (BC_2, *             ,  control     , 1                  ),"& 
   " 553  (BC_7, gpio15        ,  bidir       , X, 552 , 1, PULL0  ),"& 
   " 552  (BC_2, *             ,  control     , 1                  ),"& 
   " 551  (BC_7, emu00         ,  bidir       , X, 550 , 1, PULL1  ),"& 
   " 550  (BC_2, *             ,  control     , 1                  ),"& 
   " 549  (BC_7, emu01         ,  bidir       , X, 548 , 1, PULL1  ),"& 
   " 548  (BC_2, *             ,  control     , 1                  ),"& 
   " 547  (BC_7, emu02         ,  bidir       , X, 546 , 1, PULL1  ),"& 
   " 546  (BC_2, *             ,  control     , 1                  ),"& 
   " 545  (BC_7, emu03         ,  bidir       , X, 544 , 1, PULL1  ),"& 
   " 544  (BC_2, *             ,  control     , 1                  ),"& 
   " 543  (BC_7, emu04         ,  bidir       , X, 542 , 1, PULL1  ),"& 
   " 542  (BC_2, *             ,  control     , 1                  ),"& 
   " 541  (BC_7, emu05         ,  bidir       , X, 540 , 1, PULL1  ),"& 
   " 540  (BC_2, *             ,  control     , 1                  ),"& 
   " 539  (BC_7, emu06         ,  bidir       , X, 538 , 1, PULL1  ),"& 
   " 538  (BC_2, *             ,  control     , 1                  ),"& 
   " 537  (BC_7, emu07         ,  bidir       , X, 536 , 1, PULL1  ),"& 
   " 536  (BC_2, *             ,  control     , 1                  ),"& 
   " 535  (BC_7, emu08         ,  bidir       , X, 534 , 1, PULL1  ),"& 
   " 534  (BC_2, *             ,  control     , 1                  ),"& 
   " 533  (BC_7, emu09         ,  bidir       , X, 532 , 1, PULL1  ),"& 
   " 532  (BC_2, *             ,  control     , 1                  ),"& 
   " 531  (BC_7, emu10         ,  bidir       , X, 530 , 1, PULL1  ),"& 
   " 530  (BC_2, *             ,  control     , 1                  ),"& 
   " 529  (BC_7, emu11         ,  bidir       , X, 528 , 1, PULL1  ),"& 
   " 528  (BC_2, *             ,  control     , 1                  ),"& 
   " 527  (BC_7, emu12         ,  bidir       , X, 526 , 1, PULL1  ),"& 
   " 526  (BC_2, *             ,  control     , 1                  ),"& 
   " 525  (BC_7, emu13         ,  bidir       , X, 524 , 1, PULL1  ),"& 
   " 524  (BC_2, *             ,  control     , 1                  ),"& 
   " 523  (BC_7, emu14         ,  bidir       , X, 522 , 1, PULL1  ),"& 
   " 522  (BC_2, *             ,  control     , 1                  ),"& 
   " 521  (BC_7, emu15         ,  bidir       , X, 520 , 1, PULL1  ),"& 
   " 520  (BC_2, *             ,  control     , 1                  ),"& 
   " 519  (BC_7, emu16         ,  bidir       , X, 518 , 1, PULL1  ),"& 
   " 518  (BC_2, *             ,  control     , 1                  ),"& 
   " 517  (BC_7, emu17         ,  bidir       , X, 516 , 1, PULL1  ),"& 
   " 516  (BC_2, *             ,  control     , 1                  ),"& 
   " 515  (BC_7, emu18         ,  bidir       , X, 514 , 1, PULL1  ),"& 
   " 514  (BC_2, *             ,  control     , 1                  ),"& 
   " 513  (BC_7, rsv01         ,  bidir       , X, 512 , 1, PULL1  ),"& 
   " 512  (BC_2, *             ,  control     , 1                  ),"& 
   " 511  (BC_7, rsv02         ,  bidir       , X, 510 , 1, PULL0  ),"& 
   " 510  (BC_2, *             ,  control     , 1                  ),"& 
   " 509  (BC_7, rsv03         ,  bidir       , X, 508 , 1, PULL0  ),"& 
   " 508  (BC_2, *             ,  control     , 1                  ),"& 
   " 507  (BC_1, scl           ,  output2     , 1, 507 , 1, WEAK1  ),"& 
   " 506  (BC_1, *             ,  internal    , 0                  ),"& 
   " 505  (BC_3, scl           ,  input       , X                  ),"& 
   " 504  (BC_1, sda           ,  output2     , 1, 504 , 1, WEAK1  ),"& 
   " 503  (BC_1, *             ,  internal    , 0                  ),"& 
   " 502  (BC_3, sda           ,  input       , X                  ),"& 
   " 501  (BC_7, timi0         ,  bidir       , X, 500 , 1, PULL0  ),"& 
   " 500  (BC_2, *             ,  control     , 1                  ),"& 
   " 499  (BC_7, timi1         ,  bidir       , X, 498 , 1, PULL0  ),"& 
   " 498  (BC_2, *             ,  control     , 1                  ),"& 
   " 497  (BC_7, timo0         ,  bidir       , X, 496 , 1, PULL0  ),"& 
   " 496  (BC_2, *             ,  control     , 1                  ),"& 
   " 495  (BC_7, timo1         ,  bidir       , X, 494 , 1, PULL0  ),"& 
   " 494  (BC_2, *             ,  control     , 1                  ),"& 
   " 493  (BC_7, spiscs0       ,  bidir       , X, 492 , 1, PULL1  ),"& 
   " 492  (BC_2, *             ,  control     , 1                  ),"& 
   " 491  (BC_7, spiscs1       ,  bidir       , X, 490 , 1, PULL1  ),"& 
   " 490  (BC_2, *             ,  control     , 1                  ),"& 
   " 489  (BC_7, spiclk        ,  bidir       , X, 488 , 1, PULL0  ),"& 
   " 488  (BC_2, *             ,  control     , 1                  ),"& 
   " 487  (BC_7, spidin        ,  bidir       , X, 486 , 1, PULL0  ),"& 
   " 486  (BC_2, *             ,  control     , 1                  ),"& 
   " 485  (BC_7, spidout       ,  bidir       , X, 484 , 1, PULL0  ),"& 
   " 484  (BC_2, *             ,  control     , 1                  ),"& 
   " 483  (BC_1, coreclkp      ,  input       , X                  ),"& 
   " 482  (BC_1, sriosgmiiclkp ,  input       , X                  ),"& 
   " 481  (BC_1, ddrclkp       ,  input       , X                  ),"& 
   " 480  (BC_1, pcieclkp      ,  input       , X                  ),"& 
   " 479  (BC_1, mcmclkp       ,  input       , X                  ),"& 
   " 478  (BC_1, passclkp      ,  input       , X                  ),"& 
   " 477  (BC_7, sysclkout     ,  bidir       , X, 476 , 1, PULL0  ),"& 
   " 476  (BC_2, *             ,  control     , 1                  ),"& 
   " 475  (BC_7, paclksel      ,  bidir       , X, 474 , 1, PULL0  ),"& 
   " 474  (BC_2, *             ,  control     , 1                  ),"& 
   " 473  (BC_7, hout          ,  bidir       , X, 472 , 1, PULL1  ),"& 
   " 472  (BC_2, *             ,  control     , 1                  ),"& 
   " 471  (BC_7, nmiz          ,  bidir       , X, 470 , 1, PULL1  ),"& 
   " 470  (BC_2, *             ,  control     , 1                  ),"& 
   " 469  (BC_7, lresetz       ,  bidir       , X, 468 , 1, PULL1  ),"& 
   " 468  (BC_2, *             ,  control     , 1                  ),"& 
   " 467  (BC_7, lresetnmienz  ,  bidir       , X, 466 , 1, PULL1  ),"& 
   " 466  (BC_2, *             ,  control     , 1                  ),"& 
   " 465  (BC_7, coresel0      ,  bidir       , X, 464 , 1, PULL0  ),"& 
   " 464  (BC_2, *             ,  control     , 1                  ),"& 
   " 463  (BC_7, coresel1      ,  bidir       , X, 462 , 1, PULL0  ),"& 
   " 462  (BC_2, *             ,  control     , 1                  ),"& 
   " 461  (BC_7, coresel2      ,  bidir       , X, 460 , 1, PULL0  ),"& 
   " 460  (BC_2, *             ,  control     , 1                  ),"& 
   " 459  (BC_7, coresel3      ,  bidir       , X, 458 , 1, PULL0  ),"& 
   " 458  (BC_2, *             ,  control     , 1                  ),"& 
   " 457  (BC_1, resetz        ,  input       , X                  ),"& 
   " 456  (BC_7, resetstatz    ,  bidir       , X, 455 , 1, PULL1  ),"& 
   " 455  (BC_2, *             ,  control     , 1                  ),"& 
   " 454  (BC_7, bootcomplete  ,  bidir       , X, 453 , 1, PULL0  ),"& 
   " 453  (BC_2, *             ,  control     , 1                  ),"& 
   " 452  (BC_1, rsv04         ,  output2     , X                  ),"& 
   " 451  (BC_1, rsv06         ,  output2     , X                  ),"& 
   " 450  (BC_1, rsv24         ,  output2     , X                  ),"& 
   " 449  (BC_7, rsv20         ,  bidir       , X, 448 , 1, PULL0  ),"& 
   " 448  (BC_2, *             ,  control     , 1                  ),"& 
   " 447  (BC_7, rsv21         ,  bidir       , X, 446 , 1, PULL0  ),"& 
   " 446  (BC_2, *             ,  control     , 1                  ),"& 
   " 445  (BC_7, rsv22         ,  bidir       , X, 444 , 1, PULL0  ),"& 
   " 444  (BC_2, *             ,  control     , 1                  ),"& 
   " 443  (BC_1, vcl           ,  output2     , 1, 443 , 1, WEAK1  ),"& 
   " 442  (BC_1, *             ,  internal    , 0                  ),"& 
   " 441  (BC_3, vcl           ,  input       , X                  ),"& 
   " 440  (BC_1, vd            ,  output2     , 1, 440 , 1, WEAK1  ),"& 
   " 439  (BC_1, *             ,  internal    , 0                  ),"& 
   " 438  (BC_3, vd            ,  input       , X                  ),"& 
   " 437  (BC_1, vcntl0        ,  output2     , 1, 437 , 1, WEAK1  ),"& 
   " 436  (BC_1, *             ,  internal    , 0                  ),"& 
   " 435  (BC_4, vcntl0        ,  observe_only, X                  ),"& 
   " 434  (BC_1, vcntl1        ,  output2     , 1, 434 , 1, WEAK1  ),"& 
   " 433  (BC_1, *             ,  internal    , 0                  ),"& 
   " 432  (BC_4, vcntl1        ,  observe_only, X                  ),"& 
   " 431  (BC_1, vcntl2        ,  output2     , 1, 431 , 1, WEAK1  ),"& 
   " 430  (BC_1, *             ,  internal    , 0                  ),"& 
   " 429  (BC_4, vcntl2        ,  observe_only, X                  ),"& 
   " 428  (BC_1, vcntl3        ,  output2     , 1, 428 , 1, WEAK1  ),"& 
   " 427  (BC_1, *             ,  internal    , 0                  ),"& 
   " 426  (BC_4, vcntl3        ,  observe_only, X                  ),"& 
   " 425  (BC_7, mcmrxflclk    ,  bidir       , X, 424 , 1, PULL0  ),"& 
   " 424  (BC_2, *             ,  control     , 1                  ),"& 
   " 423  (BC_7, mcmrxfldat    ,  bidir       , X, 422 , 1, PULL0  ),"& 
   " 422  (BC_2, *             ,  control     , 1                  ),"& 
   " 421  (BC_7, mcmtxflclk    ,  bidir       , X, 420 , 1, PULL0  ),"& 
   " 420  (BC_2, *             ,  control     , 1                  ),"& 
   " 419  (BC_7, mcmtxfldat    ,  bidir       , X, 418 , 1, PULL0  ),"& 
   " 418  (BC_2, *             ,  control     , 1                  ),"& 
   " 417  (BC_7, mcmrxpmclk    ,  bidir       , X, 416 , 1, PULL0  ),"& 
   " 416  (BC_2, *             ,  control     , 1                  ),"& 
   " 415  (BC_7, mcmrxpmdat    ,  bidir       , X, 414 , 1, PULL0  ),"& 
   " 414  (BC_2, *             ,  control     , 1                  ),"& 
   " 413  (BC_7, mcmtxpmclk    ,  bidir       , X, 412 , 1, PULL0  ),"& 
   " 412  (BC_2, *             ,  control     , 1                  ),"& 
   " 411  (BC_7, mcmtxpmdat    ,  bidir       , X, 410 , 1, PULL0  ),"& 
   " 410  (BC_2, *             ,  control     , 1                  ),"& 
   " 409  (BC_7, mdio          ,  bidir       , X, 408 , 1, PULL1  ),"& 
   " 408  (BC_2, *             ,  control     , 1                  ),"& 
   " 407  (BC_7, mdclk         ,  bidir       , X, 406 , 1, PULL0  ),"& 
   " 406  (BC_2, *             ,  control     , 1                  ),"& 
   " 405  (BC_7, uartrxd       ,  bidir       , X, 404 , 1, PULL0  ),"& 
   " 404  (BC_2, *             ,  control     , 1                  ),"& 
   " 403  (BC_7, uarttxd       ,  bidir       , X, 402 , 1, PULL0  ),"& 
   " 402  (BC_2, *             ,  control     , 1                  ),"& 
   " 401  (BC_7, uartcts       ,  bidir       , X, 400 , 1, PULL0  ),"& 
   " 400  (BC_2, *             ,  control     , 1                  ),"& 
   " 399  (BC_7, uartrts       ,  bidir       , X, 398 , 1, PULL0  ),"& 
   " 398  (BC_2, *             ,  control     , 1                  ),"& 
   " 397  (BC_7, emifrnw       ,  bidir       , X, 396 , 1, PULL1  ),"& 
   " 396  (BC_2, *             ,  control     , 1                  ),"& 
   " 395  (BC_7, emifce0z      ,  bidir       , X, 394 , 1, PULL1  ),"& 
   " 394  (BC_2, *             ,  control     , 1                  ),"& 
   " 393  (BC_7, emifce1z      ,  bidir       , X, 392 , 1, PULL1  ),"& 
   " 392  (BC_2, *             ,  control     , 1                  ),"& 
   " 391  (BC_7, emifce2z      ,  bidir       , X, 390 , 1, PULL1  ),"& 
   " 390  (BC_2, *             ,  control     , 1                  ),"& 
   " 389  (BC_7, emifce3z      ,  bidir       , X, 388 , 1, PULL1  ),"& 
   " 388  (BC_2, *             ,  control     , 1                  ),"& 
   " 387  (BC_7, emifoez       ,  bidir       , X, 386 , 1, PULL1  ),"& 
   " 386  (BC_2, *             ,  control     , 1                  ),"& 
   " 385  (BC_7, emifwez       ,  bidir       , X, 384 , 1, PULL1  ),"& 
   " 384  (BC_2, *             ,  control     , 1                  ),"& 
   " 383  (BC_7, emifbe0z      ,  bidir       , X, 382 , 1, PULL1  ),"& 
   " 382  (BC_2, *             ,  control     , 1                  ),"& 
   " 381  (BC_7, emifbe1z      ,  bidir       , X, 380 , 1, PULL1  ),"& 
   " 380  (BC_2, *             ,  control     , 1                  ),"& 
   " 379  (BC_7, emifwait0     ,  bidir       , X, 378 , 1, PULL0  ),"& 
   " 378  (BC_2, *             ,  control     , 1                  ),"& 
   " 377  (BC_7, emifwait1     ,  bidir       , X, 376 , 1, PULL0  ),"& 
   " 376  (BC_2, *             ,  control     , 1                  ),"& 
   " 375  (BC_7, emifa00       ,  bidir       , X, 374 , 1, PULL0  ),"& 
   " 374  (BC_2, *             ,  control     , 1                  ),"& 
   " 373  (BC_7, emifa01       ,  bidir       , X, 372 , 1, PULL0  ),"& 
   " 372  (BC_2, *             ,  control     , 1                  ),"& 
   " 371  (BC_7, emifa02       ,  bidir       , X, 370 , 1, PULL0  ),"& 
   " 370  (BC_2, *             ,  control     , 1                  ),"& 
   " 369  (BC_7, emifa03       ,  bidir       , X, 368 , 1, PULL0  ),"& 
   " 368  (BC_2, *             ,  control     , 1                  ),"& 
   " 367  (BC_7, emifa04       ,  bidir       , X, 366 , 1, PULL0  ),"& 
   " 366  (BC_2, *             ,  control     , 1                  ),"& 
   " 365  (BC_7, emifa05       ,  bidir       , X, 364 , 1, PULL0  ),"& 
   " 364  (BC_2, *             ,  control     , 1                  ),"& 
   " 363  (BC_7, emifa06       ,  bidir       , X, 362 , 1, PULL0  ),"& 
   " 362  (BC_2, *             ,  control     , 1                  ),"& 
   " 361  (BC_7, emifa07       ,  bidir       , X, 360 , 1, PULL0  ),"& 
   " 360  (BC_2, *             ,  control     , 1                  ),"& 
   " 359  (BC_7, emifa08       ,  bidir       , X, 358 , 1, PULL0  ),"& 
   " 358  (BC_2, *             ,  control     , 1                  ),"& 
   " 357  (BC_7, emifa09       ,  bidir       , X, 356 , 1, PULL0  ),"& 
   " 356  (BC_2, *             ,  control     , 1                  ),"& 
   " 355  (BC_7, emifa10       ,  bidir       , X, 354 , 1, PULL0  ),"& 
   " 354  (BC_2, *             ,  control     , 1                  ),"& 
   " 353  (BC_7, emifa11       ,  bidir       , X, 352 , 1, PULL0  ),"& 
   " 352  (BC_2, *             ,  control     , 1                  ),"& 
   " 351  (BC_7, emifa12       ,  bidir       , X, 350 , 1, PULL0  ),"& 
   " 350  (BC_2, *             ,  control     , 1                  ),"& 
   " 349  (BC_7, emifa13       ,  bidir       , X, 348 , 1, PULL0  ),"& 
   " 348  (BC_2, *             ,  control     , 1                  ),"& 
   " 347  (BC_7, emifa14       ,  bidir       , X, 346 , 1, PULL0  ),"& 
   " 346  (BC_2, *             ,  control     , 1                  ),"& 
   " 345  (BC_7, emifa15       ,  bidir       , X, 344 , 1, PULL0  ),"& 
   " 344  (BC_2, *             ,  control     , 1                  ),"& 
   " 343  (BC_7, emifa16       ,  bidir       , X, 342 , 1, PULL0  ),"& 
   " 342  (BC_2, *             ,  control     , 1                  ),"& 
   " 341  (BC_7, emifa17       ,  bidir       , X, 340 , 1, PULL0  ),"& 
   " 340  (BC_2, *             ,  control     , 1                  ),"& 
   " 339  (BC_7, emifa18       ,  bidir       , X, 338 , 1, PULL0  ),"& 
   " 338  (BC_2, *             ,  control     , 1                  ),"& 
   " 337  (BC_7, emifa19       ,  bidir       , X, 336 , 1, PULL0  ),"& 
   " 336  (BC_2, *             ,  control     , 1                  ),"& 
   " 335  (BC_7, emifa20       ,  bidir       , X, 334 , 1, PULL0  ),"& 
   " 334  (BC_2, *             ,  control     , 1                  ),"& 
   " 333  (BC_7, emifa21       ,  bidir       , X, 332 , 1, PULL0  ),"& 
   " 332  (BC_2, *             ,  control     , 1                  ),"& 
   " 331  (BC_7, emifa22       ,  bidir       , X, 330 , 1, PULL0  ),"& 
   " 330  (BC_2, *             ,  control     , 1                  ),"& 
   " 329  (BC_7, emifa23       ,  bidir       , X, 328 , 1, PULL0  ),"& 
   " 328  (BC_2, *             ,  control     , 1                  ),"& 
   " 327  (BC_7, emifd00       ,  bidir       , X, 326 , 1, PULL0  ),"& 
   " 326  (BC_2, *             ,  control     , 1                  ),"& 
   " 325  (BC_7, emifd01       ,  bidir       , X, 324 , 1, PULL0  ),"& 
   " 324  (BC_2, *             ,  control     , 1                  ),"& 
   " 323  (BC_7, emifd02       ,  bidir       , X, 322 , 1, PULL0  ),"& 
   " 322  (BC_2, *             ,  control     , 1                  ),"& 
   " 321  (BC_7, emifd03       ,  bidir       , X, 320 , 1, PULL0  ),"& 
   " 320  (BC_2, *             ,  control     , 1                  ),"& 
   " 319  (BC_7, emifd04       ,  bidir       , X, 318 , 1, PULL0  ),"& 
   " 318  (BC_2, *             ,  control     , 1                  ),"& 
   " 317  (BC_7, emifd05       ,  bidir       , X, 316 , 1, PULL0  ),"& 
   " 316  (BC_2, *             ,  control     , 1                  ),"& 
   " 315  (BC_7, emifd06       ,  bidir       , X, 314 , 1, PULL0  ),"& 
   " 314  (BC_2, *             ,  control     , 1                  ),"& 
   " 313  (BC_7, emifd07       ,  bidir       , X, 312 , 1, PULL0  ),"& 
   " 312  (BC_2, *             ,  control     , 1                  ),"& 
   " 311  (BC_7, emifd08       ,  bidir       , X, 310 , 1, PULL0  ),"& 
   " 310  (BC_2, *             ,  control     , 1                  ),"& 
   " 309  (BC_7, emifd09       ,  bidir       , X, 308 , 1, PULL0  ),"& 
   " 308  (BC_2, *             ,  control     , 1                  ),"& 
   " 307  (BC_7, emifd10       ,  bidir       , X, 306 , 1, PULL0  ),"& 
   " 306  (BC_2, *             ,  control     , 1                  ),"& 
   " 305  (BC_7, emifd11       ,  bidir       , X, 304 , 1, PULL0  ),"& 
   " 304  (BC_2, *             ,  control     , 1                  ),"& 
   " 303  (BC_7, emifd12       ,  bidir       , X, 302 , 1, PULL0  ),"& 
   " 302  (BC_2, *             ,  control     , 1                  ),"& 
   " 301  (BC_7, emifd13       ,  bidir       , X, 300 , 1, PULL0  ),"& 
   " 300  (BC_2, *             ,  control     , 1                  ),"& 
   " 299  (BC_7, emifd14       ,  bidir       , X, 298 , 1, PULL0  ),"& 
   " 298  (BC_2, *             ,  control     , 1                  ),"& 
   " 297  (BC_7, emifd15       ,  bidir       , X, 296 , 1, PULL0  ),"& 
   " 296  (BC_2, *             ,  control     , 1                  ),"& 
   " 295  (BC_7, clka0         ,  bidir       , X, 294 , 1, PULL0  ),"& 
   " 294  (BC_2, *             ,  control     , 1                  ),"& 
   " 293  (BC_7, clkb0         ,  bidir       , X, 292 , 1, PULL0  ),"& 
   " 292  (BC_2, *             ,  control     , 1                  ),"& 
   " 291  (BC_7, fsa0          ,  bidir       , X, 290 , 1, PULL0  ),"& 
   " 290  (BC_2, *             ,  control     , 1                  ),"& 
   " 289  (BC_7, fsb0          ,  bidir       , X, 288 , 1, PULL0  ),"& 
   " 288  (BC_2, *             ,  control     , 1                  ),"& 
   " 287  (BC_7, tr00          ,  bidir       , X, 286 , 1, PULL0  ),"& 
   " 286  (BC_2, *             ,  control     , 1                  ),"& 
   " 285  (BC_7, tr01          ,  bidir       , X, 284 , 1, PULL0  ),"& 
   " 284  (BC_2, *             ,  control     , 1                  ),"& 
   " 283  (BC_7, tr02          ,  bidir       , X, 282 , 1, PULL0  ),"& 
   " 282  (BC_2, *             ,  control     , 1                  ),"& 
   " 281  (BC_7, tr03          ,  bidir       , X, 280 , 1, PULL0  ),"& 
   " 280  (BC_2, *             ,  control     , 1                  ),"& 
   " 279  (BC_7, tr04          ,  bidir       , X, 278 , 1, PULL0  ),"& 
   " 278  (BC_2, *             ,  control     , 1                  ),"& 
   " 277  (BC_7, tr05          ,  bidir       , X, 276 , 1, PULL0  ),"& 
   " 276  (BC_2, *             ,  control     , 1                  ),"& 
   " 275  (BC_7, tr06          ,  bidir       , X, 274 , 1, PULL0  ),"& 
   " 274  (BC_2, *             ,  control     , 1                  ),"& 
   " 273  (BC_7, tr07          ,  bidir       , X, 272 , 1, PULL0  ),"& 
   " 272  (BC_2, *             ,  control     , 1                  ),"& 
   " 271  (BC_7, tx00          ,  bidir       , X, 270 , 1, PULL0  ),"& 
   " 270  (BC_2, *             ,  control     , 1                  ),"& 
   " 269  (BC_7, tx01          ,  bidir       , X, 268 , 1, PULL0  ),"& 
   " 268  (BC_2, *             ,  control     , 1                  ),"& 
   " 267  (BC_7, tx02          ,  bidir       , X, 266 , 1, PULL0  ),"& 
   " 266  (BC_2, *             ,  control     , 1                  ),"& 
   " 265  (BC_7, tx03          ,  bidir       , X, 264 , 1, PULL0  ),"& 
   " 264  (BC_2, *             ,  control     , 1                  ),"& 
   " 263  (BC_7, tx04          ,  bidir       , X, 262 , 1, PULL0  ),"& 
   " 262  (BC_2, *             ,  control     , 1                  ),"& 
   " 261  (BC_7, tx05          ,  bidir       , X, 260 , 1, PULL0  ),"& 
   " 260  (BC_2, *             ,  control     , 1                  ),"& 
   " 259  (BC_7, tx06          ,  bidir       , X, 258 , 1, PULL0  ),"& 
   " 258  (BC_2, *             ,  control     , 1                  ),"& 
   " 257  (BC_7, tx07          ,  bidir       , X, 256 , 1, PULL0  ),"& 
   " 256  (BC_2, *             ,  control     , 1                  ),"& 
   " 255  (BC_7, clka1         ,  bidir       , X, 254 , 1, PULL0  ),"& 
   " 254  (BC_2, *             ,  control     , 1                  ),"& 
   " 253  (BC_7, clkb1         ,  bidir       , X, 252 , 1, PULL0  ),"& 
   " 252  (BC_2, *             ,  control     , 1                  ),"& 
   " 251  (BC_7, fsa1          ,  bidir       , X, 250 , 1, PULL0  ),"& 
   " 250  (BC_2, *             ,  control     , 1                  ),"& 
   " 249  (BC_7, fsb1          ,  bidir       , X, 248 , 1, PULL0  ),"& 
   " 248  (BC_2, *             ,  control     , 1                  ),"& 
   " 247  (BC_7, tr10          ,  bidir       , X, 246 , 1, PULL0  ),"& 
   " 246  (BC_2, *             ,  control     , 1                  ),"& 
   " 245  (BC_7, tr11          ,  bidir       , X, 244 , 1, PULL0  ),"& 
   " 244  (BC_2, *             ,  control     , 1                  ),"& 
   " 243  (BC_7, tr12          ,  bidir       , X, 242 , 1, PULL0  ),"& 
   " 242  (BC_2, *             ,  control     , 1                  ),"& 
   " 241  (BC_7, tr13          ,  bidir       , X, 240 , 1, PULL0  ),"& 
   " 240  (BC_2, *             ,  control     , 1                  ),"& 
   " 239  (BC_7, tr14          ,  bidir       , X, 238 , 1, PULL0  ),"& 
   " 238  (BC_2, *             ,  control     , 1                  ),"& 
   " 237  (BC_7, tr15          ,  bidir       , X, 236 , 1, PULL0  ),"& 
   " 236  (BC_2, *             ,  control     , 1                  ),"& 
   " 235  (BC_7, tr16          ,  bidir       , X, 234 , 1, PULL0  ),"& 
   " 234  (BC_2, *             ,  control     , 1                  ),"& 
   " 233  (BC_7, tr17          ,  bidir       , X, 232 , 1, PULL0  ),"& 
   " 232  (BC_2, *             ,  control     , 1                  ),"& 
   " 231  (BC_7, tx10          ,  bidir       , X, 230 , 1, PULL0  ),"& 
   " 230  (BC_2, *             ,  control     , 1                  ),"& 
   " 229  (BC_7, tx11          ,  bidir       , X, 228 , 1, PULL0  ),"& 
   " 228  (BC_2, *             ,  control     , 1                  ),"& 
   " 227  (BC_7, tx12          ,  bidir       , X, 226 , 1, PULL0  ),"& 
   " 226  (BC_2, *             ,  control     , 1                  ),"& 
   " 225  (BC_7, tx13          ,  bidir       , X, 224 , 1, PULL0  ),"& 
   " 224  (BC_2, *             ,  control     , 1                  ),"& 
   " 223  (BC_7, tx14          ,  bidir       , X, 222 , 1, PULL0  ),"& 
   " 222  (BC_2, *             ,  control     , 1                  ),"& 
   " 221  (BC_7, tx15          ,  bidir       , X, 220 , 1, PULL0  ),"& 
   " 220  (BC_2, *             ,  control     , 1                  ),"& 
   " 219  (BC_7, tx16          ,  bidir       , X, 218 , 1, PULL0  ),"& 
   " 218  (BC_2, *             ,  control     , 1                  ),"& 
   " 217  (BC_7, tx17          ,  bidir       , X, 216 , 1, PULL0  ),"& 
   " 216  (BC_2, *             ,  control     , 1                  ),"& 
   " 215  (BC_7, ddrresetz     ,  bidir       , X, 214 , 1, Z      ),"& 
   " 214  (BC_2, *             ,  control     , 1                  ),"& 
   " 213  (BC_7, ddrcke0       ,  bidir       , X, 214 , 1, Z      ),"& 
   " 212  (BC_7, ddrce0z       ,  bidir       , X, 214 , 1, Z      ),"& 
   " 211  (BC_7, ddrce1z       ,  bidir       , X, 214 , 1, Z      ),"& 
   " 210  (BC_7, ddrclkoutp0   ,  bidir       , X, 214 , 1, Z      ),"& 
   " 209  (BC_7, ddrclkoutn0   ,  bidir       , X, 214 , 1, Z      ),"& 
   " 208  (BC_7, ddrrasz       ,  bidir       , X, 214 , 1, Z      ),"& 
   " 207  (BC_7, ddrcasz       ,  bidir       , X, 214 , 1, Z      ),"& 
   " 206  (BC_7, ddrwez        ,  bidir       , X, 214 , 1, Z      ),"& 
   " 205  (BC_7, ddrodt0       ,  bidir       , X, 214 , 1, Z      ),"& 
   " 204  (BC_7, ddrodt1       ,  bidir       , X, 214 , 1, Z      ),"& 
   " 203  (BC_7, ddrba0        ,  bidir       , X, 202 , 1, Z      ),"& 
   " 202  (BC_2, *             ,  control     , 1                  ),"& 
   " 201  (BC_7, ddrba1        ,  bidir       , X, 202 , 1, Z      ),"& 
   " 200  (BC_7, ddrba2        ,  bidir       , X, 202 , 1, Z      ),"& 
   " 199  (BC_7, ddra00        ,  bidir       , X, 202 , 1, Z      ),"& 
   " 198  (BC_7, ddra01        ,  bidir       , X, 202 , 1, Z      ),"& 
   " 197  (BC_7, ddra02        ,  bidir       , X, 202 , 1, Z      ),"& 
   " 196  (BC_7, ddra03        ,  bidir       , X, 202 , 1, Z      ),"& 
   " 195  (BC_7, ddra04        ,  bidir       , X, 202 , 1, Z      ),"& 
   " 194  (BC_7, ddra05        ,  bidir       , X, 202 , 1, Z      ),"& 
   " 193  (BC_7, ddra06        ,  bidir       , X, 202 , 1, Z      ),"& 
   " 192  (BC_7, ddra07        ,  bidir       , X, 202 , 1, Z      ),"& 
   " 191  (BC_7, ddra08        ,  bidir       , X, 190 , 1, Z      ),"& 
   " 190  (BC_2, *             ,  control     , 1                  ),"& 
   " 189  (BC_7, ddra09        ,  bidir       , X, 190 , 1, Z      ),"& 
   " 188  (BC_7, ddra10        ,  bidir       , X, 190 , 1, Z      ),"& 
   " 187  (BC_7, ddra11        ,  bidir       , X, 190 , 1, Z      ),"& 
   " 186  (BC_7, ddrclkoutp1   ,  bidir       , X, 190 , 1, Z      ),"& 
   " 185  (BC_7, ddrclkoutn1   ,  bidir       , X, 190 , 1, Z      ),"& 
   " 184  (BC_7, ddra12        ,  bidir       , X, 190 , 1, Z      ),"& 
   " 183  (BC_7, ddra13        ,  bidir       , X, 190 , 1, Z      ),"& 
   " 182  (BC_7, ddra14        ,  bidir       , X, 190 , 1, Z      ),"& 
   " 181  (BC_7, ddra15        ,  bidir       , X, 190 , 1, Z      ),"& 
   " 180  (BC_7, ddrcke1       ,  bidir       , X, 190 , 1, Z      ),"& 
   " 179  (BC_7, ddrd56        ,  bidir       , X, 178 , 1, Z      ),"& 
   " 178  (BC_2, *             ,  control     , 1                  ),"& 
   " 177  (BC_7, ddrd57        ,  bidir       , X, 176 , 1, Z      ),"& 
   " 176  (BC_2, *             ,  control     , 1                  ),"& 
   " 175  (BC_7, ddrd58        ,  bidir       , X, 174 , 1, Z      ),"& 
   " 174  (BC_2, *             ,  control     , 1                  ),"& 
   " 173  (BC_7, ddrd59        ,  bidir       , X, 172 , 1, Z      ),"& 
   " 172  (BC_2, *             ,  control     , 1                  ),"& 
   " 171  (BC_7, ddrd60        ,  bidir       , X, 170 , 1, Z      ),"& 
   " 170  (BC_2, *             ,  control     , 1                  ),"& 
   " 169  (BC_7, ddrd61        ,  bidir       , X, 168 , 1, Z      ),"& 
   " 168  (BC_2, *             ,  control     , 1                  ),"& 
   " 167  (BC_7, ddrd62        ,  bidir       , X, 166 , 1, Z      ),"& 
   " 166  (BC_2, *             ,  control     , 1                  ),"& 
   " 165  (BC_7, ddrd63        ,  bidir       , X, 164 , 1, Z      ),"& 
   " 164  (BC_2, *             ,  control     , 1                  ),"& 
   " 163  (BC_7, ddrdqs7p      ,  bidir       , X, 162 , 1, Z      ),"& 
   " 162  (BC_2, *             ,  control     , 1                  ),"& 
   " 161  (BC_7, ddrdqm7       ,  bidir       , X, 160 , 1, Z      ),"& 
   " 160  (BC_2, *             ,  control     , 1                  ),"& 
   " 159  (BC_7, ddrd48        ,  bidir       , X, 158 , 1, Z      ),"& 
   " 158  (BC_2, *             ,  control     , 1                  ),"& 
   " 157  (BC_7, ddrd49        ,  bidir       , X, 156 , 1, Z      ),"& 
   " 156  (BC_2, *             ,  control     , 1                  ),"& 
   " 155  (BC_7, ddrd50        ,  bidir       , X, 154 , 1, Z      ),"& 
   " 154  (BC_2, *             ,  control     , 1                  ),"& 
   " 153  (BC_7, ddrd51        ,  bidir       , X, 152 , 1, Z      ),"& 
   " 152  (BC_2, *             ,  control     , 1                  ),"& 
   " 151  (BC_7, ddrd52        ,  bidir       , X, 150 , 1, Z      ),"& 
   " 150  (BC_2, *             ,  control     , 1                  ),"& 
   " 149  (BC_7, ddrd53        ,  bidir       , X, 148 , 1, Z      ),"& 
   " 148  (BC_2, *             ,  control     , 1                  ),"& 
   " 147  (BC_7, ddrd54        ,  bidir       , X, 146 , 1, Z      ),"& 
   " 146  (BC_2, *             ,  control     , 1                  ),"& 
   " 145  (BC_7, ddrd55        ,  bidir       , X, 144 , 1, Z      ),"& 
   " 144  (BC_2, *             ,  control     , 1                  ),"& 
   " 143  (BC_7, ddrdqs6p      ,  bidir       , X, 142 , 1, Z      ),"& 
   " 142  (BC_2, *             ,  control     , 1                  ),"& 
   " 141  (BC_7, ddrdqm6       ,  bidir       , X, 140 , 1, Z      ),"& 
   " 140  (BC_2, *             ,  control     , 1                  ),"& 
   " 139  (BC_7, ddrd40        ,  bidir       , X, 138 , 1, Z      ),"& 
   " 138  (BC_2, *             ,  control     , 1                  ),"& 
   " 137  (BC_7, ddrd41        ,  bidir       , X, 136 , 1, Z      ),"& 
   " 136  (BC_2, *             ,  control     , 1                  ),"& 
   " 135  (BC_7, ddrd42        ,  bidir       , X, 134 , 1, Z      ),"& 
   " 134  (BC_2, *             ,  control     , 1                  ),"& 
   " 133  (BC_7, ddrd43        ,  bidir       , X, 132 , 1, Z      ),"& 
   " 132  (BC_2, *             ,  control     , 1                  ),"& 
   " 131  (BC_7, ddrd44        ,  bidir       , X, 130 , 1, Z      ),"& 
   " 130  (BC_2, *             ,  control     , 1                  ),"& 
   " 129  (BC_7, ddrd45        ,  bidir       , X, 128 , 1, Z      ),"& 
   " 128  (BC_2, *             ,  control     , 1                  ),"& 
   " 127  (BC_7, ddrd46        ,  bidir       , X, 126 , 1, Z      ),"& 
   " 126  (BC_2, *             ,  control     , 1                  ),"& 
   " 125  (BC_7, ddrd47        ,  bidir       , X, 124 , 1, Z      ),"& 
   " 124  (BC_2, *             ,  control     , 1                  ),"& 
   " 123  (BC_7, ddrdqs5p      ,  bidir       , X, 122 , 1, Z      ),"& 
   " 122  (BC_2, *             ,  control     , 1                  ),"& 
   " 121  (BC_7, ddrdqm5       ,  bidir       , X, 120 , 1, Z      ),"& 
   " 120  (BC_2, *             ,  control     , 1                  ),"& 
   " 119  (BC_7, ddrd32        ,  bidir       , X, 118 , 1, Z      ),"& 
   " 118  (BC_2, *             ,  control     , 1                  ),"& 
   " 117  (BC_7, ddrd33        ,  bidir       , X, 116 , 1, Z      ),"& 
   " 116  (BC_2, *             ,  control     , 1                  ),"& 
   " 115  (BC_7, ddrd34        ,  bidir       , X, 114 , 1, Z      ),"& 
   " 114  (BC_2, *             ,  control     , 1                  ),"& 
   " 113  (BC_7, ddrd35        ,  bidir       , X, 112 , 1, Z      ),"& 
   " 112  (BC_2, *             ,  control     , 1                  ),"& 
   " 111  (BC_7, ddrd36        ,  bidir       , X, 110 , 1, Z      ),"& 
   " 110  (BC_2, *             ,  control     , 1                  ),"& 
   " 109  (BC_7, ddrd37        ,  bidir       , X, 108 , 1, Z      ),"& 
   " 108  (BC_2, *             ,  control     , 1                  ),"& 
   " 107  (BC_7, ddrd38        ,  bidir       , X, 106 , 1, Z      ),"& 
   " 106  (BC_2, *             ,  control     , 1                  ),"& 
   " 105  (BC_7, ddrd39        ,  bidir       , X, 104 , 1, Z      ),"& 
   " 104  (BC_2, *             ,  control     , 1                  ),"& 
   " 103  (BC_7, ddrdqs4p      ,  bidir       , X, 102 , 1, Z      ),"& 
   " 102  (BC_2, *             ,  control     , 1                  ),"& 
   " 101  (BC_7, ddrdqm4       ,  bidir       , X, 100 , 1, Z      ),"& 
   " 100  (BC_2, *             ,  control     , 1                  ),"& 
   "  99  (BC_7, ddrd24        ,  bidir       , X,  98 , 1, Z      ),"& 
   "  98  (BC_2, *             ,  control     , 1                  ),"& 
   "  97  (BC_7, ddrd25        ,  bidir       , X,  96 , 1, Z      ),"& 
   "  96  (BC_2, *             ,  control     , 1                  ),"& 
   "  95  (BC_7, ddrd26        ,  bidir       , X,  94 , 1, Z      ),"& 
   "  94  (BC_2, *             ,  control     , 1                  ),"& 
   "  93  (BC_7, ddrd27        ,  bidir       , X,  92 , 1, Z      ),"& 
   "  92  (BC_2, *             ,  control     , 1                  ),"& 
   "  91  (BC_7, ddrd28        ,  bidir       , X,  90 , 1, Z      ),"& 
   "  90  (BC_2, *             ,  control     , 1                  ),"& 
   "  89  (BC_7, ddrd29        ,  bidir       , X,  88 , 1, Z      ),"& 
   "  88  (BC_2, *             ,  control     , 1                  ),"& 
   "  87  (BC_7, ddrd30        ,  bidir       , X,  86 , 1, Z      ),"& 
   "  86  (BC_2, *             ,  control     , 1                  ),"& 
   "  85  (BC_7, ddrd31        ,  bidir       , X,  84 , 1, Z      ),"& 
   "  84  (BC_2, *             ,  control     , 1                  ),"& 
   "  83  (BC_7, ddrdqs3p      ,  bidir       , X,  82 , 1, Z      ),"& 
   "  82  (BC_2, *             ,  control     , 1                  ),"& 
   "  81  (BC_7, ddrdqm3       ,  bidir       , X,  80 , 1, Z      ),"& 
   "  80  (BC_2, *             ,  control     , 1                  ),"& 
   "  79  (BC_7, ddrd16        ,  bidir       , X,  78 , 1, Z      ),"& 
   "  78  (BC_2, *             ,  control     , 1                  ),"& 
   "  77  (BC_7, ddrd17        ,  bidir       , X,  76 , 1, Z      ),"& 
   "  76  (BC_2, *             ,  control     , 1                  ),"& 
   "  75  (BC_7, ddrd18        ,  bidir       , X,  74 , 1, Z      ),"& 
   "  74  (BC_2, *             ,  control     , 1                  ),"& 
   "  73  (BC_7, ddrd19        ,  bidir       , X,  72 , 1, Z      ),"& 
   "  72  (BC_2, *             ,  control     , 1                  ),"& 
   "  71  (BC_7, ddrd20        ,  bidir       , X,  70 , 1, Z      ),"& 
   "  70  (BC_2, *             ,  control     , 1                  ),"& 
   "  69  (BC_7, ddrd21        ,  bidir       , X,  68 , 1, Z      ),"& 
   "  68  (BC_2, *             ,  control     , 1                  ),"& 
   "  67  (BC_7, ddrd22        ,  bidir       , X,  66 , 1, Z      ),"& 
   "  66  (BC_2, *             ,  control     , 1                  ),"& 
   "  65  (BC_7, ddrd23        ,  bidir       , X,  64 , 1, Z      ),"& 
   "  64  (BC_2, *             ,  control     , 1                  ),"& 
   "  63  (BC_7, ddrdqs2p      ,  bidir       , X,  62 , 1, Z      ),"& 
   "  62  (BC_2, *             ,  control     , 1                  ),"& 
   "  61  (BC_7, ddrdqm2       ,  bidir       , X,  60 , 1, Z      ),"& 
   "  60  (BC_2, *             ,  control     , 1                  ),"& 
   "  59  (BC_7, ddrd08        ,  bidir       , X,  58 , 1, Z      ),"& 
   "  58  (BC_2, *             ,  control     , 1                  ),"& 
   "  57  (BC_7, ddrd09        ,  bidir       , X,  56 , 1, Z      ),"& 
   "  56  (BC_2, *             ,  control     , 1                  ),"& 
   "  55  (BC_7, ddrd10        ,  bidir       , X,  54 , 1, Z      ),"& 
   "  54  (BC_2, *             ,  control     , 1                  ),"& 
   "  53  (BC_7, ddrd11        ,  bidir       , X,  52 , 1, Z      ),"& 
   "  52  (BC_2, *             ,  control     , 1                  ),"& 
   "  51  (BC_7, ddrd12        ,  bidir       , X,  50 , 1, Z      ),"& 
   "  50  (BC_2, *             ,  control     , 1                  ),"& 
   "  49  (BC_7, ddrd13        ,  bidir       , X,  48 , 1, Z      ),"& 
   "  48  (BC_2, *             ,  control     , 1                  ),"& 
   "  47  (BC_7, ddrd14        ,  bidir       , X,  46 , 1, Z      ),"& 
   "  46  (BC_2, *             ,  control     , 1                  ),"& 
   "  45  (BC_7, ddrd15        ,  bidir       , X,  44 , 1, Z      ),"& 
   "  44  (BC_2, *             ,  control     , 1                  ),"& 
   "  43  (BC_7, ddrdqs1p      ,  bidir       , X,  42 , 1, Z      ),"& 
   "  42  (BC_2, *             ,  control     , 1                  ),"& 
   "  41  (BC_7, ddrdqm1       ,  bidir       , X,  40 , 1, Z      ),"& 
   "  40  (BC_2, *             ,  control     , 1                  ),"& 
   "  39  (BC_7, ddrd00        ,  bidir       , X,  38 , 1, Z      ),"& 
   "  38  (BC_2, *             ,  control     , 1                  ),"& 
   "  37  (BC_7, ddrd01        ,  bidir       , X,  36 , 1, Z      ),"& 
   "  36  (BC_2, *             ,  control     , 1                  ),"& 
   "  35  (BC_7, ddrd02        ,  bidir       , X,  34 , 1, Z      ),"& 
   "  34  (BC_2, *             ,  control     , 1                  ),"& 
   "  33  (BC_7, ddrd03        ,  bidir       , X,  32 , 1, Z      ),"& 
   "  32  (BC_2, *             ,  control     , 1                  ),"& 
   "  31  (BC_7, ddrd04        ,  bidir       , X,  30 , 1, Z      ),"& 
   "  30  (BC_2, *             ,  control     , 1                  ),"& 
   "  29  (BC_7, ddrd05        ,  bidir       , X,  28 , 1, Z      ),"& 
   "  28  (BC_2, *             ,  control     , 1                  ),"& 
   "  27  (BC_7, ddrd06        ,  bidir       , X,  26 , 1, Z      ),"& 
   "  26  (BC_2, *             ,  control     , 1                  ),"& 
   "  25  (BC_7, ddrd07        ,  bidir       , X,  24 , 1, Z      ),"& 
   "  24  (BC_2, *             ,  control     , 1                  ),"& 
   "  23  (BC_7, ddrdqs0p      ,  bidir       , X,  22 , 1, Z      ),"& 
   "  22  (BC_2, *             ,  control     , 1                  ),"& 
   "  21  (BC_7, ddrdqm0       ,  bidir       , X,  20 , 1, Z      ),"& 
   "  20  (BC_2, *             ,  control     , 1                  ),"& 
   "  19  (BC_7, ddrcb00       ,  bidir       , X,  18 , 1, Z      ),"& 
   "  18  (BC_2, *             ,  control     , 1                  ),"& 
   "  17  (BC_7, ddrcb01       ,  bidir       , X,  16 , 1, Z      ),"& 
   "  16  (BC_2, *             ,  control     , 1                  ),"& 
   "  15  (BC_7, ddrcb02       ,  bidir       , X,  14 , 1, Z      ),"& 
   "  14  (BC_2, *             ,  control     , 1                  ),"& 
   "  13  (BC_7, ddrcb03       ,  bidir       , X,  12 , 1, Z      ),"& 
   "  12  (BC_2, *             ,  control     , 1                  ),"& 
   "  11  (BC_7, ddrcb04       ,  bidir       , X,  10 , 1, Z      ),"& 
   "  10  (BC_2, *             ,  control     , 1                  ),"& 
   "   9  (BC_7, ddrcb05       ,  bidir       , X,   8 , 1, Z      ),"& 
   "   8  (BC_2, *             ,  control     , 1                  ),"& 
   "   7  (BC_7, ddrcb06       ,  bidir       , X,   6 , 1, Z      ),"& 
   "   6  (BC_2, *             ,  control     , 1                  ),"& 
   "   5  (BC_7, ddrcb07       ,  bidir       , X,   4 , 1, Z      ),"& 
   "   4  (BC_2, *             ,  control     , 1                  ),"& 
   "   3  (BC_7, ddrdqs8p      ,  bidir       , X,   2 , 1, Z      ),"& 
   "   2  (BC_2, *             ,  control     , 1                  ),"& 
   "   1  (BC_7, ddrdqm8       ,  bidir       , X,   0 , 1, Z      ),"& 
   "   0  (BC_2, *             ,  control     , 1                  )"; 

 attribute DESIGN_WARNING of TMS320C6678 : entity is
      "According to simulation, BSD JTAG TAP may not work correctly unless  "&
      " device has completed RESET sequence first.                          "&
      "Forcing PORz and RESETFULLz low then release (no clock pulses        "&
      " required) would meet the requirement.                               "&
      "                                                                     "&
      "Note that boundary scan registers with disable result WEAK1 are      "&
      "open drain type pins, which require exteral pull-ups for tests to    "&
      "perform correctly.                                                   "&
      "                                                                     "&
      "In order to enter bscan mode correctly, TMS must be low at the       "&
      "rising edge of TRSTz and at least one cycle after TRSTz is high.     ";
end TMS320C6678;