-- BSDL listing from io_top_create.pl, Tue May 2 16:35:59 2017
--
-- pins not part of boundary scan are listed as type 'linkage'
entity LPC840 is
generic (PHYSICAL_PIN_MAP : string := "LQFP48");
port (
PIO1_8 : inout bit;
PIO0_13_ADC_10 : inout bit;
PIO1_9 : inout bit;
PIO0_12 : inout bit;
PIO0_5_nRESET : in bit;
PIO0_4_ADC_11_nTRST_WAKEUP : in bit;
PIO0_28_WKTCLKIN : inout bit;
SWDCLK_PIO0_3_TCK : in bit;
PIO0_31 : inout bit;
SWDIO_PIO0_2_TMS : in bit;
PIO1_0 : inout bit;
PIO0_11_I2C0_SDA : inout bit;
PIO0_10_I2C0_SCL : inout bit;
PIO1_1 : inout bit;
PIO0_16 : inout bit;
PIO1_2 : inout bit;
PIO0_27 : inout bit;
PIO0_26 : inout bit;
PIO0_25 : inout bit;
PIO0_24 : inout bit;
PIO1_3 : inout bit;
PIO0_15 : inout bit;
PIO1_4 : inout bit;
PIO0_1_ACMP_I2_CLKIN_TDI : in bit;
PIO0_9_XTALOUT : inout bit;
PIO0_8_XTALIN : inout bit;
PIO1_5 : inout bit;
PIO1_6 : inout bit;
VDD : linkage bit;
VSS : linkage bit;
VREFN : linkage bit;
VREFP : linkage bit;
PIO0_7_ADC_0 : inout bit;
PIO0_6_ADC_1_ACMPVREF : inout bit;
PIO1_7 : inout bit;
PIO0_0_ACMP_I1_TDO : out bit;
PIO0_14_ACMP_3_ADC_2 : inout bit;
PIO0_29_DACOUT1 : inout bit;
PIO0_23_ADC_3_ACMP_4 : inout bit;
VDDA : linkage bit;
VSSA : linkage bit;
PIO0_30_ACMP_5 : inout bit;
PIO0_22_ADC_4 : inout bit;
PIO0_21_ADC_5 : inout bit;
PIO0_20_ADC_6 : inout bit;
PIO0_19_ADC_7 : inout bit;
PIO0_18_ADC_8 : inout bit;
PIO0_17_ADC9_DACOUT0 : inout bit
);
use STD_1149_1_2001.all;
attribute COMPONENT_CONFORMANCE of LPC840 : entity is "std_1149_1_2001";
attribute PIN_MAP of LPC840 : entity is PHYSICAL_PIN_MAP;
constant LQFP48 : PIN_MAP_STRING :=
"PIO1_8 : 1," &
"PIO0_13_ADC_10 : 2," &
"PIO1_9 : 3," &
"PIO0_12 : 4," &
"PIO0_5_nRESET : 5," &
"PIO0_4_ADC_11_nTRST_WAKEUP : 6," &
"PIO0_28_WKTCLKIN : 7," &
"SWDCLK_PIO0_3_TCK : 8," &
"PIO0_31 : 9," &
"SWDIO_PIO0_2_TMS : 10," &
"PIO1_0 : 11," &
"PIO0_11_I2C0_SDA : 12," &
"PIO0_10_I2C0_SCL : 13," &
"PIO1_1 : 14," &
"PIO0_16 : 15," &
"PIO1_2 : 16," &
"PIO0_27 : 17," &
"PIO0_26 : 18," &
"PIO0_25 : 19," &
"PIO0_24 : 20," &
"PIO1_3 : 21," &
"PIO0_15 : 22," &
"PIO1_4 : 23," &
"PIO0_1_ACMP_I2_CLKIN_TDI : 24," &
"PIO0_9_XTALOUT : 25," &
"PIO0_8_XTALIN : 26," &
"PIO1_5 : 27," &
"PIO1_6 : 28," &
"VDD : 29," &
"VSS : 30," &
"VREFN : 31," &
"VREFP : 32," &
"PIO0_7_ADC_0 : 33," &
"PIO0_6_ADC_1_ACMPVREF : 34," &
"PIO1_7 : 35," &
"PIO0_0_ACMP_I1_TDO : 36," &
"PIO0_14_ACMP_3_ADC_2 : 37," &
"PIO0_29_DACOUT1 : 38," &
"PIO0_23_ADC_3_ACMP_4 : 39," &
"VDDA : 40," &
"VSSA : 41," &
"PIO0_30_ACMP_5 : 42," &
"PIO0_22_ADC_4 : 43," &
"PIO0_21_ADC_5 : 44," &
"PIO0_20_ADC_6 : 45," &
"PIO0_19_ADC_7 : 46," &
"PIO0_18_ADC_8 : 47," &
"PIO0_17_ADC9_DACOUT0 : 48";
-- *********************************************************************
-- * IEEE 1149.1 TAP PORTS *
-- *********************************************************************
-- This section specifies the TAP ports. For the TAP TCK port, the
-- parameters in the brackets are:
-- First Field : Maximum TCK frequency.
-- Second Field: Allowable states where TCK may be stopped.
attribute TAP_SCAN_CLOCK of SWDCLK_PIO0_3_TCK : signal is (10.00e+06,BOTH);
attribute TAP_SCAN_IN of PIO0_1_ACMP_I2_CLKIN_TDI : signal is true;
attribute TAP_SCAN_MODE of SWDIO_PIO0_2_TMS : signal is true;
attribute TAP_SCAN_OUT of PIO0_0_ACMP_I1_TDO : signal is true;
attribute TAP_SCAN_RESET of PIO0_4_ADC_11_nTRST_WAKEUP : signal is true;
-- Specifies the compliance enable patterns for the design. It lists a set of
-- design ports and the values that they should be set to, in order to enable
-- compliance to IEEE Std 1149.1
attribute COMPLIANCE_PATTERNS of LPC840: entity is
"(PIO0_5_nRESET) (0)";
-- *********************************************************************
-- * INSTRUCTIONS AND REGISTER ACCESS *
-- *********************************************************************
attribute INSTRUCTION_LENGTH of LPC840 : entity is 5;
attribute INSTRUCTION_OPCODE of LPC840 : entity is
"extest (00000)," &
"sample (00001)," &
"preload (00001)," &
"highz (00010)," &
"clamp (00011)," &
"idcode (00100)," &
"resrvd (00101, 00110, 00111, 01000, 01001, 01010, 01011, 01100)," &
"bypass (11111)";
attribute INSTRUCTION_CAPTURE of LPC840 : entity is "00001";
attribute INSTRUCTION_PRIVATE of LPC840 : entity is "resrvd";
attribute IDCODE_REGISTER of LPC840 : entity is
"0001" & -- Version Number
"1000010001010010" & -- Part Number 8452
"00000010101" & -- Manufacturer ID
"1"; -- Required by IEEE
attribute REGISTER_ACCESS of LPC840 : entity is
"BOUNDARY (extest, sample, preload), " &
"DEVICE_ID (idcode), " &
"BYPASS (highz, clamp, bypass)";
-- *********************************************************************
-- * BOUNDARY SCAN CELL INFORMATION *
-- *********************************************************************
attribute BOUNDARY_LENGTH of LPC840 : entity is 144;
attribute BOUNDARY_REGISTER of LPC840 : entity is
-- # cell name function safe control disable disable
-- type bit signal value result
"143 (BC_4, PIO0_9_XTALOUT , INPUT, X ),"&
"142 (BC_1, PIO0_9_XTALOUT , OUTPUT3, X, 141, 0, Z ),"&
"141 (BC_1, * , CONTROL, 0 ),"&
"140 (BC_4, PIO0_8_XTALIN , INPUT, X ),"&
"139 (BC_1, PIO0_8_XTALIN , OUTPUT3, X, 138, 0, Z ),"&
"138 (BC_1, * , CONTROL, 0 ),"&
"137 (BC_4, PIO1_5 , INPUT, X ),"&
"136 (BC_1, PIO1_5 , OUTPUT3, X, 135, 0, Z ),"&
"135 (BC_1, * , CONTROL, 0 ),"&
"134 (BC_0, * , INTERNAL, X ),"&
"133 (BC_0, * , INTERNAL, X ),"&
"132 (BC_0, * , INTERNAL, X ),"&
"131 (BC_0, * , INTERNAL, X ),"&
"130 (BC_0, * , INTERNAL, X ),"&
"129 (BC_0, * , INTERNAL, X ),"&
"128 (BC_4, PIO1_6 , INPUT, X ),"&
"127 (BC_1, PIO1_6 , OUTPUT3, X, 126, 0, Z ),"&
"126 (BC_1, * , CONTROL, 0 ),"&
"125 (BC_0, * , INTERNAL, X ),"&
"124 (BC_0, * , INTERNAL, X ),"&
"123 (BC_0, * , INTERNAL, X ),"&
"122 (BC_0, * , INTERNAL, X ),"&
"121 (BC_0, * , INTERNAL, X ),"&
"120 (BC_0, * , INTERNAL, X ),"&
"119 (BC_4, PIO0_7_ADC_0 , INPUT, X ),"&
"118 (BC_1, PIO0_7_ADC_0 , OUTPUT3, X, 117, 0, Z ),"&
"117 (BC_1, * , CONTROL, 0 ),"&
"116 (BC_4, PIO0_6_ADC_1_ACMPVREF , INPUT, X ),"&
"115 (BC_1, PIO0_6_ADC_1_ACMPVREF , OUTPUT3, X, 114, 0, Z ),"&
"114 (BC_1, * , CONTROL, 0 ),"&
"113 (BC_4, PIO1_7 , INPUT, X ),"&
"112 (BC_1, PIO1_7 , OUTPUT3, X, 111, 0, Z ),"&
"111 (BC_1, * , CONTROL, 0 ),"&
"110 (BC_4, PIO0_14_ACMP_3_ADC_2 , INPUT, X ),"&
"109 (BC_1, PIO0_14_ACMP_3_ADC_2 , OUTPUT3, X, 108, 0, Z ),"&
"108 (BC_1, * , CONTROL, 0 ),"&
"107 (BC_4, PIO0_29_DACOUT1 , INPUT, X ),"&
"106 (BC_1, PIO0_29_DACOUT1 , OUTPUT3, X, 105, 0, Z ),"&
"105 (BC_1, * , CONTROL, 0 ),"&
"104 (BC_4, PIO0_23_ADC_3_ACMP_4 , INPUT, X ),"&
"103 (BC_1, PIO0_23_ADC_3_ACMP_4 , OUTPUT3, X, 102, 0, Z ),"&
"102 (BC_1, * , CONTROL, 0 ),"&
"101 (BC_4, PIO0_30_ACMP_5 , INPUT, X ),"&
"100 (BC_1, PIO0_30_ACMP_5 , OUTPUT3, X, 99, 0, Z ),"&
" 99 (BC_1, * , CONTROL, 0 ),"&
" 98 (BC_4, PIO0_22_ADC_4 , INPUT, X ),"&
" 97 (BC_1, PIO0_22_ADC_4 , OUTPUT3, X, 96, 0, Z ),"&
" 96 (BC_1, * , CONTROL, 0 ),"&
" 95 (BC_0, * , INTERNAL, X ),"&
" 94 (BC_0, * , INTERNAL, X ),"&
" 93 (BC_0, * , INTERNAL, X ),"&
" 92 (BC_4, PIO0_21_ADC_5 , INPUT, X ),"&
" 91 (BC_1, PIO0_21_ADC_5 , OUTPUT3, X, 90, 0, Z ),"&
" 90 (BC_1, * , CONTROL, 0 ),"&
" 89 (BC_4, PIO0_20_ADC_6 , INPUT, X ),"&
" 88 (BC_1, PIO0_20_ADC_6 , OUTPUT3, X, 87, 0, Z ),"&
" 87 (BC_1, * , CONTROL, 0 ),"&
" 86 (BC_0, * , INTERNAL, X ),"&
" 85 (BC_0, * , INTERNAL, X ),"&
" 84 (BC_0, * , INTERNAL, X ),"&
" 83 (BC_4, PIO0_19_ADC_7 , INPUT, X ),"&
" 82 (BC_1, PIO0_19_ADC_7 , OUTPUT3, X, 81, 0, Z ),"&
" 81 (BC_1, * , CONTROL, 0 ),"&
" 80 (BC_4, PIO0_18_ADC_8 , INPUT, X ),"&
" 79 (BC_1, PIO0_18_ADC_8 , OUTPUT3, X, 78, 0, Z ),"&
" 78 (BC_1, * , CONTROL, 0 ),"&
" 77 (BC_0, * , INTERNAL, X ),"&
" 76 (BC_0, * , INTERNAL, X ),"&
" 75 (BC_0, * , INTERNAL, X ),"&
" 74 (BC_4, PIO0_17_ADC9_DACOUT0 , INPUT, X ),"&
" 73 (BC_1, PIO0_17_ADC9_DACOUT0 , OUTPUT3, X, 72, 0, Z ),"&
" 72 (BC_1, * , CONTROL, 0 ),"&
" 71 (BC_0, * , INTERNAL, X ),"&
" 70 (BC_0, * , INTERNAL, X ),"&
" 69 (BC_0, * , INTERNAL, X ),"&
" 68 (BC_4, PIO1_8 , INPUT, X ),"&
" 67 (BC_1, PIO1_8 , OUTPUT3, X, 66, 0, Z ),"&
" 66 (BC_1, * , CONTROL, 0 ),"&
" 65 (BC_4, PIO0_13_ADC_10 , INPUT, X ),"&
" 64 (BC_1, PIO0_13_ADC_10 , OUTPUT3, X, 63, 0, Z ),"&
" 63 (BC_1, * , CONTROL, 0 ),"&
" 62 (BC_4, PIO1_9 , INPUT, X ),"&
" 61 (BC_1, PIO1_9 , OUTPUT3, X, 60, 0, Z ),"&
" 60 (BC_1, * , CONTROL, 0 ),"&
" 59 (BC_4, PIO0_12 , INPUT, X ),"&
" 58 (BC_1, PIO0_12 , OUTPUT3, X, 57, 0, Z ),"&
" 57 (BC_1, * , CONTROL, 0 ),"&
" 56 (BC_0, * , INTERNAL, X ),"&
" 55 (BC_0, * , INTERNAL, X ),"&
" 54 (BC_0, * , INTERNAL, X ),"&
" 53 (BC_4, PIO0_28_WKTCLKIN , INPUT, X ),"&
" 52 (BC_1, PIO0_28_WKTCLKIN , OUTPUT3, X, 51, 0, Z ),"&
" 51 (BC_1, * , CONTROL, 0 ),"&
" 50 (BC_0, * , INTERNAL, X ),"&
" 49 (BC_0, * , INTERNAL, X ),"&
" 48 (BC_0, * , INTERNAL, X ),"&
" 47 (BC_4, PIO0_31 , INPUT, X ),"&
" 46 (BC_1, PIO0_31 , OUTPUT3, X, 45, 0, Z ),"&
" 45 (BC_1, * , CONTROL, 0 ),"&
" 44 (BC_4, PIO1_0 , INPUT, X ),"&
" 43 (BC_1, PIO1_0 , OUTPUT3, X, 42, 0, Z ),"&
" 42 (BC_1, * , CONTROL, 0 ),"&
" 41 (BC_4, PIO0_11_I2C0_SDA , INPUT, X ),"&
" 40 (BC_1, PIO0_11_I2C0_SDA , OUTPUT3, X, 39, 0, WEAK1 ),"&
" 39 (BC_1, * , CONTROL, 0 ),"&
" 38 (BC_4, PIO0_10_I2C0_SCL , INPUT, X ),"&
" 37 (BC_1, PIO0_10_I2C0_SCL , OUTPUT3, X, 36, 0, WEAK1 ),"&
" 36 (BC_1, * , CONTROL, 0 ),"&
" 35 (BC_4, PIO1_1 , INPUT, X ),"&
" 34 (BC_1, PIO1_1 , OUTPUT3, X, 33, 0, Z ),"&
" 33 (BC_1, * , CONTROL, 0 ),"&
" 32 (BC_4, PIO0_16 , INPUT, X ),"&
" 31 (BC_1, PIO0_16 , OUTPUT3, X, 30, 0, Z ),"&
" 30 (BC_1, * , CONTROL, 0 ),"&
" 29 (BC_4, PIO1_2 , INPUT, X ),"&
" 28 (BC_1, PIO1_2 , OUTPUT3, X, 27, 0, Z ),"&
" 27 (BC_1, * , CONTROL, 0 ),"&
" 26 (BC_4, PIO0_27 , INPUT, X ),"&
" 25 (BC_1, PIO0_27 , OUTPUT3, X, 24, 0, Z ),"&
" 24 (BC_1, * , CONTROL, 0 ),"&
" 23 (BC_0, * , INTERNAL, X ),"&
" 22 (BC_0, * , INTERNAL, X ),"&
" 21 (BC_0, * , INTERNAL, X ),"&
" 20 (BC_4, PIO0_26 , INPUT, X ),"&
" 19 (BC_1, PIO0_26 , OUTPUT3, X, 18, 0, Z ),"&
" 18 (BC_1, * , CONTROL, 0 ),"&
" 17 (BC_0, * , INTERNAL, X ),"&
" 16 (BC_0, * , INTERNAL, X ),"&
" 15 (BC_0, * , INTERNAL, X ),"&
" 14 (BC_4, PIO0_25 , INPUT, X ),"&
" 13 (BC_1, PIO0_25 , OUTPUT3, X, 12, 0, Z ),"&
" 12 (BC_1, * , CONTROL, 0 ),"&
" 11 (BC_4, PIO0_24 , INPUT, X ),"&
" 10 (BC_1, PIO0_24 , OUTPUT3, X, 9, 0, Z ),"&
" 9 (BC_1, * , CONTROL, 0 ),"&
" 8 (BC_4, PIO1_3 , INPUT, X ),"&
" 7 (BC_1, PIO1_3 , OUTPUT3, X, 6, 0, Z ),"&
" 6 (BC_1, * , CONTROL, 0 ),"&
" 5 (BC_4, PIO0_15 , INPUT, X ),"&
" 4 (BC_1, PIO0_15 , OUTPUT3, X, 3, 0, Z ),"&
" 3 (BC_1, * , CONTROL, 0 ),"&
" 2 (BC_4, PIO1_4 , INPUT, X ),"&
" 1 (BC_1, PIO1_4 , OUTPUT3, X, 0, 0, Z ),"&
" 0 (BC_1, * , CONTROL, 0 )";
end LPC840;