-- C:\Documents and Settings\nguyend\workspace_backup\BSDL\src\Work/9_0_0_17_rel9/9_0_0_17_rel9_bsdl/common/A54SX16A_FG256.bsd
-- FAMILY: 54SXA
-- DEVICE: A54SX16A
-- PACKAGE: 256 FBGA
-- DESIGNER VERSION: 9.0.0.17
-- RESTRICT JTAG: 0
-- RESTRICT TRST: 0
--
-- This is a preliminary BSDL file which has not been verified.
-- This BSDL file reflects the pre-programming JTAG
-- behavior. To reflect the post-programming JTAG
-- behavior, edit this file as described below:
-- If the I/O is unused or configured as an output,
-- the input boundary scan cell becomes internal only.
-- The input buffer is turned off, and you can not
-- transfer data from the I/O pad into the input scan
-- cell. For example:
-- IO(1) is an output, the BSDL entry would be modified
-- from:
-- " 0 (BC_1, IO(1), input, X), "&
-- " 1 (BC_1, IO(1), output3, X, 2, 0, Z), "&
-- " 2 (BC_1, *, control, 0), "&
-- to:
-- " 0 (BC_1, *, internal, X), "&
-- " 1 (BC_1, IO(1), output3, X, 2, 0, Z), "&
-- " 2 (BC_1, *, control, 0), "&
-- No modification is necessary when the I/O is
-- configured as an input.
entity A54SX16Abga256 is
generic (PHYSICAL_PIN_MAP : string := "bga256");
port(
CLKA :in bit;
CLKB :in bit;
GND :linkage bit_vector (0 to 28 );
HCLK :in bit;
IO_A3 :out bit;
IO_A4 :out bit;
IO_A5 :out bit;
IO_A6 :out bit;
IO_A7 :out bit;
IO_A8 :out bit;
IO_B1 :out bit;
IO_B3 :out bit;
IO_B4 :out bit;
IO_B5 :out bit;
IO_B7 :out bit;
IO_B9 :out bit;
IO_C1 :out bit;
IO_C4 :out bit;
IO_C6 :out bit;
IO_C7 :out bit;
IO_C8 :out bit;
IO_D1 :out bit;
IO_D2 :out bit;
IO_D3 :out bit;
IO_D4 :out bit;
IO_D5 :out bit;
IO_D6 :out bit;
IO_D7 :out bit;
IO_D8 :out bit;
IO_D9 :out bit;
IO_E1 :out bit;
IO_E2 :out bit;
IO_E3 :out bit;
IO_E4 :out bit;
IO_E5 :out bit;
IO_E6 :out bit;
IO_E7 :out bit;
IO_E8 :out bit;
IO_E9 :out bit;
IO_F1 :out bit;
IO_F2 :out bit;
IO_F3 :out bit;
IO_F5 :out bit;
IO_F6 :out bit;
IO_G2 :out bit;
IO_G4 :out bit;
IO_G5 :out bit;
IO_H1 :out bit;
IO_H2 :out bit;
IO_H4 :out bit;
IO_H5 :out bit;
IO_J4 :out bit;
IO_J5 :out bit;
IO_K1 :out bit;
IO_K2 :out bit;
IO_K5 :out bit;
IO_L1 :out bit;
IO_L2 :out bit;
IO_L3 :out bit;
IO_L4 :out bit;
IO_L5 :out bit;
IO_L6 :out bit;
IO_M1 :out bit;
IO_M2 :out bit;
IO_M3 :out bit;
IO_M4 :out bit;
IO_M5 :out bit;
IO_M6 :out bit;
IO_M7 :out bit;
IO_M8 :out bit;
IO_M9 :out bit;
IO_N1 :out bit;
IO_N2 :out bit;
IO_N3 :out bit;
IO_N4 :out bit;
IO_N5 :out bit;
IO_N6 :out bit;
IO_N7 :out bit;
IO_N8 :out bit;
IO_N9 :out bit;
IO_P1 :out bit;
IO_P3 :out bit;
IO_P4 :out bit;
IO_P6 :out bit;
IO_P7 :out bit;
IO_P8 :out bit;
IO_P9 :out bit;
IO_R1 :out bit;
IO_R3 :out bit;
IO_R5 :out bit;
IO_R6 :out bit;
IO_R7 :out bit;
IO_R8 :out bit;
IO_T2 :out bit;
IO_T3 :out bit;
IO_T5 :out bit;
IO_T6 :out bit;
IO_T7 :out bit;
IO_T8 :out bit;
IO_A10 :out bit;
IO_A11 :out bit;
IO_A13 :out bit;
IO_A14 :out bit;
IO_B10 :out bit;
IO_B12 :out bit;
IO_B13 :out bit;
IO_B14 :out bit;
IO_B16 :out bit;
IO_C10 :out bit;
IO_C11 :out bit;
IO_C12 :out bit;
IO_C13 :out bit;
IO_C14 :out bit;
IO_C15 :out bit;
IO_C16 :out bit;
IO_D10 :out bit;
IO_D12 :out bit;
IO_D13 :out bit;
IO_D14 :out bit;
IO_D15 :out bit;
IO_D16 :out bit;
IO_E10 :out bit;
IO_E11 :out bit;
IO_E12 :out bit;
IO_E14 :out bit;
IO_E15 :out bit;
IO_E16 :out bit;
IO_F11 :out bit;
IO_F13 :out bit;
IO_F14 :out bit;
IO_F15 :out bit;
IO_F16 :out bit;
IO_G12 :out bit;
IO_G16 :out bit;
IO_H12 :out bit;
IO_H13 :out bit;
IO_H14 :out bit;
IO_H15 :out bit;
IO_J12 :out bit;
IO_J13 :out bit;
IO_J14 :out bit;
IO_J15 :out bit;
IO_J16 :out bit;
IO_K12 :out bit;
IO_K13 :out bit;
IO_K14 :out bit;
IO_K16 :out bit;
IO_L11 :out bit;
IO_L12 :out bit;
IO_L13 :out bit;
IO_L14 :out bit;
IO_L15 :out bit;
IO_M10 :out bit;
IO_M11 :out bit;
IO_M13 :out bit;
IO_M15 :out bit;
IO_M16 :out bit;
IO_N10 :out bit;
IO_N11 :out bit;
IO_N12 :out bit;
IO_N13 :out bit;
IO_N14 :out bit;
IO_N15 :out bit;
IO_N16 :out bit;
IO_P11 :out bit;
IO_P12 :out bit;
IO_P14 :out bit;
IO_P15 :out bit;
IO_P16 :out bit;
IO_R10 :out bit;
IO_R11 :out bit;
IO_R12 :out bit;
IO_R13 :out bit;
IO_R14 :out bit;
IO_T10 :out bit;
IO_T11 :out bit;
IO_T13 :out bit;
IO_T14 :out bit;
NC :linkage bit_vector (0 to 22 );
TCK :in bit;
TDI :in bit;
TDO :out bit;
TMS :in bit;
VCC :linkage bit_vector (0 to 22 )
);
use STD_1149_1_1990.all;
attribute PIN_MAP of A54SX16Abga256 : entity is PHYSICAL_PIN_MAP;
constant bga256 : PIN_MAP_STRING:=
"CLKA :C9, "&
"CLKB :A9, "&
"GND :(A1, A15, A16, B15, B2, C3, G10, "&
"G13, G7, G8, G9, H10, H7, H8, "&
"H9, J10, J7, J8, J9, K10, K7, "&
"K8, K9, P2, R15, R16, R2, T1, "&
"T16), "&
"HCLK :R9, "&
"IO_A3 :A3, "&
"IO_A4 :A4, "&
"IO_A5 :A5, "&
"IO_A6 :A6, "&
"IO_A7 :A7, "&
"IO_A8 :A8, "&
"IO_B1 :B1, "&
"IO_B3 :B3, "&
"IO_B4 :B4, "&
"IO_B5 :B5, "&
"IO_B7 :B7, "&
"IO_B9 :B9, "&
"IO_C1 :C1, "&
"IO_C4 :C4, "&
"IO_C6 :C6, "&
"IO_C7 :C7, "&
"IO_C8 :C8, "&
"IO_D1 :D1, "&
"IO_D2 :D2, "&
"IO_D3 :D3, "&
"IO_D4 :D4, "&
"IO_D5 :D5, "&
"IO_D6 :D6, "&
"IO_D7 :D7, "&
"IO_D8 :D8, "&
"IO_D9 :D9, "&
"IO_E1 :E1, "&
"IO_E2 :E2, "&
"IO_E3 :E3, "&
"IO_E4 :E4, "&
"IO_E5 :E5, "&
"IO_E6 :E6, "&
"IO_E7 :E7, "&
"IO_E8 :E8, "&
"IO_E9 :E9, "&
"IO_F1 :F1, "&
"IO_F2 :F2, "&
"IO_F3 :F3, "&
"IO_F5 :F5, "&
"IO_F6 :F6, "&
"IO_G2 :G2, "&
"IO_G4 :G4, "&
"IO_G5 :G5, "&
"IO_H1 :H1, "&
"IO_H2 :H2, "&
"IO_H4 :H4, "&
"IO_H5 :H5, "&
"IO_J4 :J4, "&
"IO_J5 :J5, "&
"IO_K1 :K1, "&
"IO_K2 :K2, "&
"IO_K5 :K5, "&
"IO_L1 :L1, "&
"IO_L2 :L2, "&
"IO_L3 :L3, "&
"IO_L4 :L4, "&
"IO_L5 :L5, "&
"IO_L6 :L6, "&
"IO_M1 :M1, "&
"IO_M2 :M2, "&
"IO_M3 :M3, "&
"IO_M4 :M4, "&
"IO_M5 :M5, "&
"IO_M6 :M6, "&
"IO_M7 :M7, "&
"IO_M8 :M8, "&
"IO_M9 :M9, "&
"IO_N1 :N1, "&
"IO_N2 :N2, "&
"IO_N3 :N3, "&
"IO_N4 :N4, "&
"IO_N5 :N5, "&
"IO_N6 :N6, "&
"IO_N7 :N7, "&
"IO_N8 :N8, "&
"IO_N9 :N9, "&
"IO_P1 :P1, "&
"IO_P3 :P3, "&
"IO_P4 :P4, "&
"IO_P6 :P6, "&
"IO_P7 :P7, "&
"IO_P8 :P8, "&
"IO_P9 :P9, "&
"IO_R1 :R1, "&
"IO_R3 :R3, "&
"IO_R5 :R5, "&
"IO_R6 :R6, "&
"IO_R7 :R7, "&
"IO_R8 :R8, "&
"IO_T2 :T2, "&
"IO_T3 :T3, "&
"IO_T5 :T5, "&
"IO_T6 :T6, "&
"IO_T7 :T7, "&
"IO_T8 :T8, "&
"IO_A10 :A10, "&
"IO_A11 :A11, "&
"IO_A13 :A13, "&
"IO_A14 :A14, "&
"IO_B10 :B10, "&
"IO_B12 :B12, "&
"IO_B13 :B13, "&
"IO_B14 :B14, "&
"IO_B16 :B16, "&
"IO_C10 :C10, "&
"IO_C11 :C11, "&
"IO_C12 :C12, "&
"IO_C13 :C13, "&
"IO_C14 :C14, "&
"IO_C15 :C15, "&
"IO_C16 :C16, "&
"IO_D10 :D10, "&
"IO_D12 :D12, "&
"IO_D13 :D13, "&
"IO_D14 :D14, "&
"IO_D15 :D15, "&
"IO_D16 :D16, "&
"IO_E10 :E10, "&
"IO_E11 :E11, "&
"IO_E12 :E12, "&
"IO_E14 :E14, "&
"IO_E15 :E15, "&
"IO_E16 :E16, "&
"IO_F11 :F11, "&
"IO_F13 :F13, "&
"IO_F14 :F14, "&
"IO_F15 :F15, "&
"IO_F16 :F16, "&
"IO_G12 :G12, "&
"IO_G16 :G16, "&
"IO_H12 :H12, "&
"IO_H13 :H13, "&
"IO_H14 :H14, "&
"IO_H15 :H15, "&
"IO_J12 :J12, "&
"IO_J13 :J13, "&
"IO_J14 :J14, "&
"IO_J15 :J15, "&
"IO_J16 :J16, "&
"IO_K12 :K12, "&
"IO_K13 :K13, "&
"IO_K14 :K14, "&
"IO_K16 :K16, "&
"IO_L11 :L11, "&
"IO_L12 :L12, "&
"IO_L13 :L13, "&
"IO_L14 :L14, "&
"IO_L15 :L15, "&
"IO_M10 :M10, "&
"IO_M11 :M11, "&
"IO_M13 :M13, "&
"IO_M15 :M15, "&
"IO_M16 :M16, "&
"IO_N10 :N10, "&
"IO_N11 :N11, "&
"IO_N12 :N12, "&
"IO_N13 :N13, "&
"IO_N14 :N14, "&
"IO_N15 :N15, "&
"IO_N16 :N16, "&
"IO_P11 :P11, "&
"IO_P12 :P12, "&
"IO_P14 :P14, "&
"IO_P15 :P15, "&
"IO_P16 :P16, "&
"IO_R10 :R10, "&
"IO_R11 :R11, "&
"IO_R12 :R12, "&
"IO_R13 :R13, "&
"IO_R14 :R14, "&
"IO_T10 :T10, "&
"IO_T11 :T11, "&
"IO_T13 :T13, "&
"IO_T14 :T14, "&
"NC :(A12, B11, B6, C5, D11, E13, G1, "&
"G14, G3, H16, J1, J2, J3, K15, "&
"K3, L16, M12, M14, P10, P5, R4, "&
"T12, T4), "&
"TCK :A2, "&
"TDI :C2, "&
"TDO :T15, "&
"TMS :F4, "&
"VCC :(B8, F10, F12, F7, F8, F9, G11, "&
"G15, G6, H11, H3, H6, J11, J6, "&
"K11, K4, K6, L10, L7, L8, L9, "&
"P13, T9) ";
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_CLOCK of TCK :
signal is ( 1.00e+007, BOTH);
attribute INSTRUCTION_LENGTH of A54SX16Abga256 : entity is 5;
attribute INSTRUCTION_OPCODE of A54SX16Abga256 : entity is
"EXTEST (00000), "&
"SAMPLE (00001), "&
"INTEST (00010), "&
"USERCODE (00011), "&
"IDCODE (00100), "&
"HIGHZ (01110), "&
"CLAMP (01111), "&
"PROBE (10000), "&
"BYPASS (11111) ";
attribute INSTRUCTION_CAPTURE of A54SX16Abga256 : entity is "XXX01";
attribute INSTRUCTION_DISABLE of A54SX16Abga256 : entity is
"HIGHZ";
attribute INSTRUCTION_GUARD of A54SX16Abga256 : entity is
"CLAMP";
attribute INSTRUCTION_PRIVATE of A54SX16Abga256 : entity is
"PROBE";
attribute IDCODE_REGISTER of A54SX16Abga256 : entity is
"XXXX"& -- Version
"XXXXXXXXXXXXXXXX"& -- Device
"00000101111"& -- Manufacturer
"1"; -- Required
attribute USERCODE_REGISTER of A54SX16Abga256 : entity is
"00000000000000000000000000000000";
attribute REGISTER_ACCESS of A54SX16Abga256 : entity is
"BYPASS(HIGHZ, CLAMP)";
attribute BOUNDARY_CELLS of A54SX16Abga256 : entity is "BC_1";
attribute BOUNDARY_LENGTH of A54SX16Abga256 : entity is 525;
attribute BOUNDARY_REGISTER of A54SX16Abga256 : entity is
-- num cell port function safe [ccell disval rslt]
--BSR IO_N3 N3
" 0 (BC_1, *,internal, X), "&
" 1 (BC_1, IO_N3, output3, X, 2, 0, Z), "&
" 2 (BC_1, *, control, 0), "&
--BSR IO_M4 M4
" 3 (BC_1, *,internal, X), "&
" 4 (BC_1, IO_M4, output3, X, 5, 0, Z), "&
" 5 (BC_1, *, control, 0), "&
--BSR IO_M3 M3
" 6 (BC_1, *,internal, X), "&
" 7 (BC_1, IO_M3, output3, X, 8, 0, Z), "&
" 8 (BC_1, *, control, 0), "&
--BSR IO_R1 R1
" 9 (BC_1, *,internal, X), "&
" 10 (BC_1, IO_R1, output3, X, 11, 0, Z), "&
" 11 (BC_1, *, control, 0), "&
--BSR IO_P1 P1
" 12 (BC_1, *,internal, X), "&
" 13 (BC_1, IO_P1, output3, X, 14, 0, Z), "&
" 14 (BC_1, *, control, 0), "&
--BSR IO_P3 P3
" 15 (BC_1, *,internal, X), "&
" 16 (BC_1, IO_P3, output3, X, 17, 0, Z), "&
" 17 (BC_1, *, control, 0), "&
--BSR IO_N2 N2
" 18 (BC_1, *,internal, X), "&
" 19 (BC_1, IO_N2, output3, X, 20, 0, Z), "&
" 20 (BC_1, *, control, 0), "&
--BSR IO_L4 L4
" 21 (BC_1, *,internal, X), "&
" 22 (BC_1, IO_L4, output3, X, 23, 0, Z), "&
" 23 (BC_1, *, control, 0), "&
--BSR IO_M2 M2
" 24 (BC_1, *,internal, X), "&
" 25 (BC_1, IO_M2, output3, X, 26, 0, Z), "&
" 26 (BC_1, *, control, 0), "&
--BSR IO_L5 L5
" 27 (BC_1, *,internal, X), "&
" 28 (BC_1, IO_L5, output3, X, 29, 0, Z), "&
" 29 (BC_1, *, control, 0), "&
--BSR IO_L3 L3
" 30 (BC_1, *,internal, X), "&
" 31 (BC_1, IO_L3, output3, X, 32, 0, Z), "&
" 32 (BC_1, *, control, 0), "&
--BSR IO_N1 N1
" 33 (BC_1, *,internal, X), "&
" 34 (BC_1, IO_N1, output3, X, 35, 0, Z), "&
" 35 (BC_1, *, control, 0), "&
--BSR IO_K5 K5
" 36 (BC_1, *,internal, X), "&
" 37 (BC_1, IO_K5, output3, X, 38, 0, Z), "&
" 38 (BC_1, *, control, 0), "&
--BSR IO_L2 L2
" 39 (BC_1, *,internal, X), "&
" 40 (BC_1, IO_L2, output3, X, 41, 0, Z), "&
" 41 (BC_1, *, control, 0), "&
--BSR IO_K2 K2
" 42 (BC_1, *,internal, X), "&
" 43 (BC_1, IO_K2, output3, X, 44, 0, Z), "&
" 44 (BC_1, *, control, 0), "&
--BSR IO_M1 M1
" 45 (BC_1, *,internal, X), "&
" 46 (BC_1, IO_M1, output3, X, 47, 0, Z), "&
" 47 (BC_1, *, control, 0), "&
--BSR IO_J4 J4
" 48 (BC_1, *,internal, X), "&
" 49 (BC_1, IO_J4, output3, X, 50, 0, Z), "&
" 50 (BC_1, *, control, 0), "&
--BSR IO_J5 J5
" 51 (BC_1, *,internal, X), "&
" 52 (BC_1, IO_J5, output3, X, 53, 0, Z), "&
" 53 (BC_1, *, control, 0), "&
--BSR IO_H5 H5
" 54 (BC_1, *,internal, X), "&
" 55 (BC_1, IO_H5, output3, X, 56, 0, Z), "&
" 56 (BC_1, *, control, 0), "&
--BSR IO_L1 L1
" 57 (BC_1, *,internal, X), "&
" 58 (BC_1, IO_L1, output3, X, 59, 0, Z), "&
" 59 (BC_1, *, control, 0), "&
--BSR IO_H4 H4
" 60 (BC_1, *,internal, X), "&
" 61 (BC_1, IO_H4, output3, X, 62, 0, Z), "&
" 62 (BC_1, *, control, 0), "&
--BSR IO_K1 K1
" 63 (BC_1, *,internal, X), "&
" 64 (BC_1, IO_K1, output3, X, 65, 0, Z), "&
" 65 (BC_1, *, control, 0), "&
--BSR IO_H2 H2
" 66 (BC_1, *,internal, X), "&
" 67 (BC_1, IO_H2, output3, X, 68, 0, Z), "&
" 68 (BC_1, *, control, 0), "&
--BSR IO_H1 H1
" 69 (BC_1, *,internal, X), "&
" 70 (BC_1, IO_H1, output3, X, 71, 0, Z), "&
" 71 (BC_1, *, control, 0), "&
--BSR IO_F6 F6
" 72 (BC_1, *,internal, X), "&
" 73 (BC_1, IO_F6, output3, X, 74, 0, Z), "&
" 74 (BC_1, *, control, 0), "&
--BSR IO_G4 G4
" 75 (BC_1, *,internal, X), "&
" 76 (BC_1, IO_G4, output3, X, 77, 0, Z), "&
" 77 (BC_1, *, control, 0), "&
--BSR IO_G2 G2
" 78 (BC_1, *,internal, X), "&
" 79 (BC_1, IO_G2, output3, X, 80, 0, Z), "&
" 80 (BC_1, *, control, 0), "&
--BSR IO_G5 G5
" 81 (BC_1, *,internal, X), "&
" 82 (BC_1, IO_G5, output3, X, 83, 0, Z), "&
" 83 (BC_1, *, control, 0), "&
--BSR IO_F3 F3
" 84 (BC_1, *,internal, X), "&
" 85 (BC_1, IO_F3, output3, X, 86, 0, Z), "&
" 86 (BC_1, *, control, 0), "&
--BSR IO_F5 F5
" 87 (BC_1, *,internal, X), "&
" 88 (BC_1, IO_F5, output3, X, 89, 0, Z), "&
" 89 (BC_1, *, control, 0), "&
--BSR IO_F2 F2
" 90 (BC_1, *,internal, X), "&
" 91 (BC_1, IO_F2, output3, X, 92, 0, Z), "&
" 92 (BC_1, *, control, 0), "&
--BSR IO_F1 F1
" 93 (BC_1, *,internal, X), "&
" 94 (BC_1, IO_F1, output3, X, 95, 0, Z), "&
" 95 (BC_1, *, control, 0), "&
--BSR IO_E1 E1
" 96 (BC_1, *,internal, X), "&
" 97 (BC_1, IO_E1, output3, X, 98, 0, Z), "&
" 98 (BC_1, *, control, 0), "&
--BSR IO_E2 E2
" 99 (BC_1, *,internal, X), "&
" 100 (BC_1, IO_E2, output3, X, 101, 0, Z), "&
" 101 (BC_1, *, control, 0), "&
--BSR IO_D1 D1
" 102 (BC_1, *,internal, X), "&
" 103 (BC_1, IO_D1, output3, X, 104, 0, Z), "&
" 104 (BC_1, *, control, 0), "&
--BSR IO_E4 E4
" 105 (BC_1, *,internal, X), "&
" 106 (BC_1, IO_E4, output3, X, 107, 0, Z), "&
" 107 (BC_1, *, control, 0), "&
--BSR IO_D3 D3
" 108 (BC_1, *,internal, X), "&
" 109 (BC_1, IO_D3, output3, X, 110, 0, Z), "&
" 110 (BC_1, *, control, 0), "&
--BSR IO_E3 E3
" 111 (BC_1, *,internal, X), "&
" 112 (BC_1, IO_E3, output3, X, 113, 0, Z), "&
" 113 (BC_1, *, control, 0), "&
--BSR IO_D2 D2
" 114 (BC_1, *,internal, X), "&
" 115 (BC_1, IO_D2, output3, X, 116, 0, Z), "&
" 116 (BC_1, *, control, 0), "&
--BSR IO_D4 D4
" 117 (BC_1, *,internal, X), "&
" 118 (BC_1, IO_D4, output3, X, 119, 0, Z), "&
" 119 (BC_1, *, control, 0), "&
--BSR IO_C1 C1
" 120 (BC_1, *,internal, X), "&
" 121 (BC_1, IO_C1, output3, X, 122, 0, Z), "&
" 122 (BC_1, *, control, 0), "&
--BSR IO_E5 E5
" 123 (BC_1, *,internal, X), "&
" 124 (BC_1, IO_E5, output3, X, 125, 0, Z), "&
" 125 (BC_1, *, control, 0), "&
--BSR IO_A3 A3
" 126 (BC_1, *,internal, X), "&
" 127 (BC_1, IO_A3, output3, X, 128, 0, Z), "&
" 128 (BC_1, *, control, 0), "&
--BSR IO_B3 B3
" 129 (BC_1, *,internal, X), "&
" 130 (BC_1, IO_B3, output3, X, 131, 0, Z), "&
" 131 (BC_1, *, control, 0), "&
--BSR IO_B4 B4
" 132 (BC_1, *,internal, X), "&
" 133 (BC_1, IO_B4, output3, X, 134, 0, Z), "&
" 134 (BC_1, *, control, 0), "&
--BSR IO_C4 C4
" 135 (BC_1, *,internal, X), "&
" 136 (BC_1, IO_C4, output3, X, 137, 0, Z), "&
" 137 (BC_1, *, control, 0), "&
--BSR IO_A4 A4
" 138 (BC_1, *,internal, X), "&
" 139 (BC_1, IO_A4, output3, X, 140, 0, Z), "&
" 140 (BC_1, *, control, 0), "&
--BSR IO_D5 D5
" 141 (BC_1, *,internal, X), "&
" 142 (BC_1, IO_D5, output3, X, 143, 0, Z), "&
" 143 (BC_1, *, control, 0), "&
--BSR IO_B5 B5
" 144 (BC_1, *,internal, X), "&
" 145 (BC_1, IO_B5, output3, X, 146, 0, Z), "&
" 146 (BC_1, *, control, 0), "&
--BSR IO_C6 C6
" 147 (BC_1, *,internal, X), "&
" 148 (BC_1, IO_C6, output3, X, 149, 0, Z), "&
" 149 (BC_1, *, control, 0), "&
--BSR IO_D6 D6
" 150 (BC_1, *,internal, X), "&
" 151 (BC_1, IO_D6, output3, X, 152, 0, Z), "&
" 152 (BC_1, *, control, 0), "&
--BSR IO_A5 A5
" 153 (BC_1, *,internal, X), "&
" 154 (BC_1, IO_A5, output3, X, 155, 0, Z), "&
" 155 (BC_1, *, control, 0), "&
--BSR IO_B1 B1
" 156 (BC_1, *,internal, X), "&
" 157 (BC_1, IO_B1, output3, X, 158, 0, Z), "&
" 158 (BC_1, *, control, 0), "&
--BSR IO_E6 E6
" 159 (BC_1, *,internal, X), "&
" 160 (BC_1, IO_E6, output3, X, 161, 0, Z), "&
" 161 (BC_1, *, control, 0), "&
--BSR IO_C7 C7
" 162 (BC_1, *,internal, X), "&
" 163 (BC_1, IO_C7, output3, X, 164, 0, Z), "&
" 164 (BC_1, *, control, 0), "&
--BSR IO_A6 A6
" 165 (BC_1, *,internal, X), "&
" 166 (BC_1, IO_A6, output3, X, 167, 0, Z), "&
" 167 (BC_1, *, control, 0), "&
--BSR IO_D7 D7
" 168 (BC_1, *,internal, X), "&
" 169 (BC_1, IO_D7, output3, X, 170, 0, Z), "&
" 170 (BC_1, *, control, 0), "&
--BSR IO_B7 B7
" 171 (BC_1, *,internal, X), "&
" 172 (BC_1, IO_B7, output3, X, 173, 0, Z), "&
" 173 (BC_1, *, control, 0), "&
--BSR IO_E7 E7
" 174 (BC_1, *,internal, X), "&
" 175 (BC_1, IO_E7, output3, X, 176, 0, Z), "&
" 176 (BC_1, *, control, 0), "&
--BSR IO_A7 A7
" 177 (BC_1, *,internal, X), "&
" 178 (BC_1, IO_A7, output3, X, 179, 0, Z), "&
" 179 (BC_1, *, control, 0), "&
--BSR IO_E8 E8
" 180 (BC_1, *,internal, X), "&
" 181 (BC_1, IO_E8, output3, X, 182, 0, Z), "&
" 182 (BC_1, *, control, 0), "&
--BSR IO_C8 C8
" 183 (BC_1, *,internal, X), "&
" 184 (BC_1, IO_C8, output3, X, 185, 0, Z), "&
" 185 (BC_1, *, control, 0), "&
--BSR IO_D8 D8
" 186 (BC_1, *,internal, X), "&
" 187 (BC_1, IO_D8, output3, X, 188, 0, Z), "&
" 188 (BC_1, *, control, 0), "&
--BSR IO_A8 A8
" 189 (BC_1, *,internal, X), "&
" 190 (BC_1, IO_A8, output3, X, 191, 0, Z), "&
" 191 (BC_1, *, control, 0), "&
--BSR CLKB A9
" 192 (BC_1, CLKB, input, X), "&
--BSR CLKA C9
" 193 (BC_1, CLKA, input, X), "&
--BSR IO_E9 E9
" 194 (BC_1, *,internal, X), "&
" 195 (BC_1, IO_E9, output3, X, 196, 0, Z), "&
" 196 (BC_1, *, control, 0), "&
--BSR IO_B9 B9
" 197 (BC_1, *,internal, X), "&
" 198 (BC_1, IO_B9, output3, X, 199, 0, Z), "&
" 199 (BC_1, *, control, 0), "&
--BSR IO_A10 A10
" 200 (BC_1, *,internal, X), "&
" 201 (BC_1, IO_A10, output3, X, 202, 0, Z), "&
" 202 (BC_1, *, control, 0), "&
--BSR IO_B10 B10
" 203 (BC_1, *,internal, X), "&
" 204 (BC_1, IO_B10, output3, X, 205, 0, Z), "&
" 205 (BC_1, *, control, 0), "&
--BSR IO_E10 E10
" 206 (BC_1, *,internal, X), "&
" 207 (BC_1, IO_E10, output3, X, 208, 0, Z), "&
" 208 (BC_1, *, control, 0), "&
--BSR IO_C10 C10
" 209 (BC_1, *,internal, X), "&
" 210 (BC_1, IO_C10, output3, X, 211, 0, Z), "&
" 211 (BC_1, *, control, 0), "&
--BSR IO_D9 D9
" 212 (BC_1, *,internal, X), "&
" 213 (BC_1, IO_D9, output3, X, 214, 0, Z), "&
" 214 (BC_1, *, control, 0), "&
--BSR IO_A11 A11
" 215 (BC_1, *,internal, X), "&
" 216 (BC_1, IO_A11, output3, X, 217, 0, Z), "&
" 217 (BC_1, *, control, 0), "&
--BSR IO_E11 E11
" 218 (BC_1, *,internal, X), "&
" 219 (BC_1, IO_E11, output3, X, 220, 0, Z), "&
" 220 (BC_1, *, control, 0), "&
--BSR IO_C14 C14
" 221 (BC_1, *,internal, X), "&
" 222 (BC_1, IO_C14, output3, X, 223, 0, Z), "&
" 223 (BC_1, *, control, 0), "&
--BSR IO_C11 C11
" 224 (BC_1, *,internal, X), "&
" 225 (BC_1, IO_C11, output3, X, 226, 0, Z), "&
" 226 (BC_1, *, control, 0), "&
--BSR IO_D10 D10
" 227 (BC_1, *,internal, X), "&
" 228 (BC_1, IO_D10, output3, X, 229, 0, Z), "&
" 229 (BC_1, *, control, 0), "&
--BSR IO_B12 B12
" 230 (BC_1, *,internal, X), "&
" 231 (BC_1, IO_B12, output3, X, 232, 0, Z), "&
" 232 (BC_1, *, control, 0), "&
--BSR IO_D13 D13
" 233 (BC_1, *,internal, X), "&
" 234 (BC_1, IO_D13, output3, X, 235, 0, Z), "&
" 235 (BC_1, *, control, 0), "&
--BSR IO_A13 A13
" 236 (BC_1, *,internal, X), "&
" 237 (BC_1, IO_A13, output3, X, 238, 0, Z), "&
" 238 (BC_1, *, control, 0), "&
--BSR IO_B13 B13
" 239 (BC_1, *,internal, X), "&
" 240 (BC_1, IO_B13, output3, X, 241, 0, Z), "&
" 241 (BC_1, *, control, 0), "&
--BSR IO_C12 C12
" 242 (BC_1, *,internal, X), "&
" 243 (BC_1, IO_C12, output3, X, 244, 0, Z), "&
" 244 (BC_1, *, control, 0), "&
--BSR IO_A14 A14
" 245 (BC_1, *,internal, X), "&
" 246 (BC_1, IO_A14, output3, X, 247, 0, Z), "&
" 247 (BC_1, *, control, 0), "&
--BSR IO_D12 D12
" 248 (BC_1, *,internal, X), "&
" 249 (BC_1, IO_D12, output3, X, 250, 0, Z), "&
" 250 (BC_1, *, control, 0), "&
--BSR IO_B14 B14
" 251 (BC_1, *,internal, X), "&
" 252 (BC_1, IO_B14, output3, X, 253, 0, Z), "&
" 253 (BC_1, *, control, 0), "&
--BSR IO_C13 C13
" 254 (BC_1, *,internal, X), "&
" 255 (BC_1, IO_C13, output3, X, 256, 0, Z), "&
" 256 (BC_1, *, control, 0), "&
--BSR IO_B16 B16
" 257 (BC_1, *,internal, X), "&
" 258 (BC_1, IO_B16, output3, X, 259, 0, Z), "&
" 259 (BC_1, *, control, 0), "&
--BSR IO_C16 C16
" 260 (BC_1, *,internal, X), "&
" 261 (BC_1, IO_C16, output3, X, 262, 0, Z), "&
" 262 (BC_1, *, control, 0), "&
--BSR IO_D15 D15
" 263 (BC_1, *,internal, X), "&
" 264 (BC_1, IO_D15, output3, X, 265, 0, Z), "&
" 265 (BC_1, *, control, 0), "&
--BSR IO_E14 E14
" 266 (BC_1, *,internal, X), "&
" 267 (BC_1, IO_E14, output3, X, 268, 0, Z), "&
" 268 (BC_1, *, control, 0), "&
--BSR IO_D16 D16
" 269 (BC_1, *,internal, X), "&
" 270 (BC_1, IO_D16, output3, X, 271, 0, Z), "&
" 271 (BC_1, *, control, 0), "&
--BSR IO_E15 E15
" 272 (BC_1, *,internal, X), "&
" 273 (BC_1, IO_E15, output3, X, 274, 0, Z), "&
" 274 (BC_1, *, control, 0), "&
--BSR IO_E16 E16
" 275 (BC_1, *,internal, X), "&
" 276 (BC_1, IO_E16, output3, X, 277, 0, Z), "&
" 277 (BC_1, *, control, 0), "&
--BSR IO_F14 F14
" 278 (BC_1, *,internal, X), "&
" 279 (BC_1, IO_F14, output3, X, 280, 0, Z), "&
" 280 (BC_1, *, control, 0), "&
--BSR IO_F15 F15
" 281 (BC_1, *,internal, X), "&
" 282 (BC_1, IO_F15, output3, X, 283, 0, Z), "&
" 283 (BC_1, *, control, 0), "&
--BSR IO_F16 F16
" 284 (BC_1, *,internal, X), "&
" 285 (BC_1, IO_F16, output3, X, 286, 0, Z), "&
" 286 (BC_1, *, control, 0), "&
--BSR IO_C15 C15
" 287 (BC_1, *,internal, X), "&
" 288 (BC_1, IO_C15, output3, X, 289, 0, Z), "&
" 289 (BC_1, *, control, 0), "&
--BSR IO_F13 F13
" 290 (BC_1, *,internal, X), "&
" 291 (BC_1, IO_F13, output3, X, 292, 0, Z), "&
" 292 (BC_1, *, control, 0), "&
--BSR IO_G16 G16
" 293 (BC_1, *,internal, X), "&
" 294 (BC_1, IO_G16, output3, X, 295, 0, Z), "&
" 295 (BC_1, *, control, 0), "&
--BSR IO_D14 D14
" 296 (BC_1, *,internal, X), "&
" 297 (BC_1, IO_D14, output3, X, 298, 0, Z), "&
" 298 (BC_1, *, control, 0), "&
--BSR IO_H13 H13
" 299 (BC_1, *,internal, X), "&
" 300 (BC_1, IO_H13, output3, X, 301, 0, Z), "&
" 301 (BC_1, *, control, 0), "&
--BSR IO_G12 G12
" 302 (BC_1, *,internal, X), "&
" 303 (BC_1, IO_G12, output3, X, 304, 0, Z), "&
" 304 (BC_1, *, control, 0), "&
--BSR IO_H14 H14
" 305 (BC_1, *,internal, X), "&
" 306 (BC_1, IO_H14, output3, X, 307, 0, Z), "&
" 307 (BC_1, *, control, 0), "&
--BSR IO_E12 E12
" 308 (BC_1, *,internal, X), "&
" 309 (BC_1, IO_E12, output3, X, 310, 0, Z), "&
" 310 (BC_1, *, control, 0), "&
--BSR IO_H15 H15
" 311 (BC_1, *,internal, X), "&
" 312 (BC_1, IO_H15, output3, X, 313, 0, Z), "&
" 313 (BC_1, *, control, 0), "&
--BSR IO_H12 H12
" 314 (BC_1, *,internal, X), "&
" 315 (BC_1, IO_H12, output3, X, 316, 0, Z), "&
" 316 (BC_1, *, control, 0), "&
--BSR IO_J14 J14
" 317 (BC_1, *,internal, X), "&
" 318 (BC_1, IO_J14, output3, X, 319, 0, Z), "&
" 319 (BC_1, *, control, 0), "&
--BSR IO_J13 J13
" 320 (BC_1, *,internal, X), "&
" 321 (BC_1, IO_J13, output3, X, 322, 0, Z), "&
" 322 (BC_1, *, control, 0), "&
--BSR IO_J15 J15
" 323 (BC_1, *,internal, X), "&
" 324 (BC_1, IO_J15, output3, X, 325, 0, Z), "&
" 325 (BC_1, *, control, 0), "&
--BSR IO_J12 J12
" 326 (BC_1, *,internal, X), "&
" 327 (BC_1, IO_J12, output3, X, 328, 0, Z), "&
" 328 (BC_1, *, control, 0), "&
--BSR IO_J16 J16
" 329 (BC_1, *,internal, X), "&
" 330 (BC_1, IO_J16, output3, X, 331, 0, Z), "&
" 331 (BC_1, *, control, 0), "&
--BSR IO_F11 F11
" 332 (BC_1, *,internal, X), "&
" 333 (BC_1, IO_F11, output3, X, 334, 0, Z), "&
" 334 (BC_1, *, control, 0), "&
--BSR IO_K14 K14
" 335 (BC_1, *,internal, X), "&
" 336 (BC_1, IO_K14, output3, X, 337, 0, Z), "&
" 337 (BC_1, *, control, 0), "&
--BSR IO_K13 K13
" 338 (BC_1, *,internal, X), "&
" 339 (BC_1, IO_K13, output3, X, 340, 0, Z), "&
" 340 (BC_1, *, control, 0), "&
--BSR IO_K16 K16
" 341 (BC_1, *,internal, X), "&
" 342 (BC_1, IO_K16, output3, X, 343, 0, Z), "&
" 343 (BC_1, *, control, 0), "&
--BSR IO_K12 K12
" 344 (BC_1, *,internal, X), "&
" 345 (BC_1, IO_K12, output3, X, 346, 0, Z), "&
" 346 (BC_1, *, control, 0), "&
--BSR IO_L14 L14
" 347 (BC_1, *,internal, X), "&
" 348 (BC_1, IO_L14, output3, X, 349, 0, Z), "&
" 349 (BC_1, *, control, 0), "&
--BSR IO_L12 L12
" 350 (BC_1, *,internal, X), "&
" 351 (BC_1, IO_L12, output3, X, 352, 0, Z), "&
" 352 (BC_1, *, control, 0), "&
--BSR IO_L13 L13
" 353 (BC_1, *,internal, X), "&
" 354 (BC_1, IO_L13, output3, X, 355, 0, Z), "&
" 355 (BC_1, *, control, 0), "&
--BSR IO_L15 L15
" 356 (BC_1, *,internal, X), "&
" 357 (BC_1, IO_L15, output3, X, 358, 0, Z), "&
" 358 (BC_1, *, control, 0), "&
--BSR IO_M16 M16
" 359 (BC_1, *,internal, X), "&
" 360 (BC_1, IO_M16, output3, X, 361, 0, Z), "&
" 361 (BC_1, *, control, 0), "&
--BSR IO_M13 M13
" 362 (BC_1, *,internal, X), "&
" 363 (BC_1, IO_M13, output3, X, 364, 0, Z), "&
" 364 (BC_1, *, control, 0), "&
--BSR IO_M15 M15
" 365 (BC_1, *,internal, X), "&
" 366 (BC_1, IO_M15, output3, X, 367, 0, Z), "&
" 367 (BC_1, *, control, 0), "&
--BSR IO_N16 N16
" 368 (BC_1, *,internal, X), "&
" 369 (BC_1, IO_N16, output3, X, 370, 0, Z), "&
" 370 (BC_1, *, control, 0), "&
--BSR IO_N15 N15
" 371 (BC_1, *,internal, X), "&
" 372 (BC_1, IO_N15, output3, X, 373, 0, Z), "&
" 373 (BC_1, *, control, 0), "&
--BSR IO_P16 P16
" 374 (BC_1, *,internal, X), "&
" 375 (BC_1, IO_P16, output3, X, 376, 0, Z), "&
" 376 (BC_1, *, control, 0), "&
--BSR IO_N14 N14
" 377 (BC_1, *,internal, X), "&
" 378 (BC_1, IO_N14, output3, X, 379, 0, Z), "&
" 379 (BC_1, *, control, 0), "&
--BSR IO_P15 P15
" 380 (BC_1, *,internal, X), "&
" 381 (BC_1, IO_P15, output3, X, 382, 0, Z), "&
" 382 (BC_1, *, control, 0), "&
--BSR IO_P14 P14
" 383 (BC_1, *,internal, X), "&
" 384 (BC_1, IO_P14, output3, X, 385, 0, Z), "&
" 385 (BC_1, *, control, 0), "&
--BSR IO_R14 R14
" 386 (BC_1, *,internal, X), "&
" 387 (BC_1, IO_R14, output3, X, 388, 0, Z), "&
" 388 (BC_1, *, control, 0), "&
--BSR IO_R13 R13
" 389 (BC_1, *,internal, X), "&
" 390 (BC_1, IO_R13, output3, X, 391, 0, Z), "&
" 391 (BC_1, *, control, 0), "&
--BSR IO_T14 T14
" 392 (BC_1, *,internal, X), "&
" 393 (BC_1, IO_T14, output3, X, 394, 0, Z), "&
" 394 (BC_1, *, control, 0), "&
--BSR IO_N12 N12
" 395 (BC_1, *,internal, X), "&
" 396 (BC_1, IO_N12, output3, X, 397, 0, Z), "&
" 397 (BC_1, *, control, 0), "&
--BSR IO_P12 P12
" 398 (BC_1, *,internal, X), "&
" 399 (BC_1, IO_P12, output3, X, 400, 0, Z), "&
" 400 (BC_1, *, control, 0), "&
--BSR IO_T13 T13
" 401 (BC_1, *,internal, X), "&
" 402 (BC_1, IO_T13, output3, X, 403, 0, Z), "&
" 403 (BC_1, *, control, 0), "&
--BSR IO_N13 N13
" 404 (BC_1, *,internal, X), "&
" 405 (BC_1, IO_N13, output3, X, 406, 0, Z), "&
" 406 (BC_1, *, control, 0), "&
--BSR IO_R12 R12
" 407 (BC_1, *,internal, X), "&
" 408 (BC_1, IO_R12, output3, X, 409, 0, Z), "&
" 409 (BC_1, *, control, 0), "&
--BSR IO_P11 P11
" 410 (BC_1, *,internal, X), "&
" 411 (BC_1, IO_P11, output3, X, 412, 0, Z), "&
" 412 (BC_1, *, control, 0), "&
--BSR IO_N10 N10
" 413 (BC_1, *,internal, X), "&
" 414 (BC_1, IO_N10, output3, X, 415, 0, Z), "&
" 415 (BC_1, *, control, 0), "&
--BSR IO_R11 R11
" 416 (BC_1, *,internal, X), "&
" 417 (BC_1, IO_R11, output3, X, 418, 0, Z), "&
" 418 (BC_1, *, control, 0), "&
--BSR IO_M11 M11
" 419 (BC_1, *,internal, X), "&
" 420 (BC_1, IO_M11, output3, X, 421, 0, Z), "&
" 421 (BC_1, *, control, 0), "&
--BSR IO_N11 N11
" 422 (BC_1, *,internal, X), "&
" 423 (BC_1, IO_N11, output3, X, 424, 0, Z), "&
" 424 (BC_1, *, control, 0), "&
--BSR IO_T11 T11
" 425 (BC_1, *,internal, X), "&
" 426 (BC_1, IO_T11, output3, X, 427, 0, Z), "&
" 427 (BC_1, *, control, 0), "&
--BSR IO_N9 N9
" 428 (BC_1, *,internal, X), "&
" 429 (BC_1, IO_N9, output3, X, 430, 0, Z), "&
" 430 (BC_1, *, control, 0), "&
--BSR IO_R10 R10
" 431 (BC_1, *,internal, X), "&
" 432 (BC_1, IO_R10, output3, X, 433, 0, Z), "&
" 433 (BC_1, *, control, 0), "&
--BSR IO_M10 M10
" 434 (BC_1, *,internal, X), "&
" 435 (BC_1, IO_M10, output3, X, 436, 0, Z), "&
" 436 (BC_1, *, control, 0), "&
--BSR IO_P9 P9
" 437 (BC_1, *,internal, X), "&
" 438 (BC_1, IO_P9, output3, X, 439, 0, Z), "&
" 439 (BC_1, *, control, 0), "&
--BSR IO_L11 L11
" 440 (BC_1, *,internal, X), "&
" 441 (BC_1, IO_L11, output3, X, 442, 0, Z), "&
" 442 (BC_1, *, control, 0), "&
--BSR IO_T10 T10
" 443 (BC_1, *,internal, X), "&
" 444 (BC_1, IO_T10, output3, X, 445, 0, Z), "&
" 445 (BC_1, *, control, 0), "&
--BSR IO_M9 M9
" 446 (BC_1, *,internal, X), "&
" 447 (BC_1, IO_M9, output3, X, 448, 0, Z), "&
" 448 (BC_1, *, control, 0), "&
--BSR HCLK R9
" 449 (BC_1, HCLK, input, X), "&
--BSR IO_N8 N8
" 450 (BC_1, *,internal, X), "&
" 451 (BC_1, IO_N8, output3, X, 452, 0, Z), "&
" 452 (BC_1, *, control, 0), "&
--BSR IO_R8 R8
" 453 (BC_1, *,internal, X), "&
" 454 (BC_1, IO_R8, output3, X, 455, 0, Z), "&
" 455 (BC_1, *, control, 0), "&
--BSR IO_M8 M8
" 456 (BC_1, *,internal, X), "&
" 457 (BC_1, IO_M8, output3, X, 458, 0, Z), "&
" 458 (BC_1, *, control, 0), "&
--BSR IO_P8 P8
" 459 (BC_1, *,internal, X), "&
" 460 (BC_1, IO_P8, output3, X, 461, 0, Z), "&
" 461 (BC_1, *, control, 0), "&
--BSR IO_T8 T8
" 462 (BC_1, *,internal, X), "&
" 463 (BC_1, IO_T8, output3, X, 464, 0, Z), "&
" 464 (BC_1, *, control, 0), "&
--BSR IO_R7 R7
" 465 (BC_1, *,internal, X), "&
" 466 (BC_1, IO_R7, output3, X, 467, 0, Z), "&
" 467 (BC_1, *, control, 0), "&
--BSR IO_L6 L6
" 468 (BC_1, *,internal, X), "&
" 469 (BC_1, IO_L6, output3, X, 470, 0, Z), "&
" 470 (BC_1, *, control, 0), "&
--BSR IO_P7 P7
" 471 (BC_1, *,internal, X), "&
" 472 (BC_1, IO_P7, output3, X, 473, 0, Z), "&
" 473 (BC_1, *, control, 0), "&
--BSR IO_M7 M7
" 474 (BC_1, *,internal, X), "&
" 475 (BC_1, IO_M7, output3, X, 476, 0, Z), "&
" 476 (BC_1, *, control, 0), "&
--BSR IO_T7 T7
" 477 (BC_1, *,internal, X), "&
" 478 (BC_1, IO_T7, output3, X, 479, 0, Z), "&
" 479 (BC_1, *, control, 0), "&
--BSR IO_R6 R6
" 480 (BC_1, *,internal, X), "&
" 481 (BC_1, IO_R6, output3, X, 482, 0, Z), "&
" 482 (BC_1, *, control, 0), "&
--BSR IO_T6 T6
" 483 (BC_1, *,internal, X), "&
" 484 (BC_1, IO_T6, output3, X, 485, 0, Z), "&
" 485 (BC_1, *, control, 0), "&
--BSR IO_N7 N7
" 486 (BC_1, *,internal, X), "&
" 487 (BC_1, IO_N7, output3, X, 488, 0, Z), "&
" 488 (BC_1, *, control, 0), "&
--BSR IO_P6 P6
" 489 (BC_1, *,internal, X), "&
" 490 (BC_1, IO_P6, output3, X, 491, 0, Z), "&
" 491 (BC_1, *, control, 0), "&
--BSR IO_M6 M6
" 492 (BC_1, *,internal, X), "&
" 493 (BC_1, IO_M6, output3, X, 494, 0, Z), "&
" 494 (BC_1, *, control, 0), "&
--BSR IO_T5 T5
" 495 (BC_1, *,internal, X), "&
" 496 (BC_1, IO_T5, output3, X, 497, 0, Z), "&
" 497 (BC_1, *, control, 0), "&
--BSR IO_N4 N4
" 498 (BC_1, *,internal, X), "&
" 499 (BC_1, IO_N4, output3, X, 500, 0, Z), "&
" 500 (BC_1, *, control, 0), "&
--BSR IO_R5 R5
" 501 (BC_1, *,internal, X), "&
" 502 (BC_1, IO_R5, output3, X, 503, 0, Z), "&
" 503 (BC_1, *, control, 0), "&
--BSR IO_N6 N6
" 504 (BC_1, *,internal, X), "&
" 505 (BC_1, IO_N6, output3, X, 506, 0, Z), "&
" 506 (BC_1, *, control, 0), "&
--BSR IO_P4 P4
" 507 (BC_1, *,internal, X), "&
" 508 (BC_1, IO_P4, output3, X, 509, 0, Z), "&
" 509 (BC_1, *, control, 0), "&
--BSR IO_M5 M5
" 510 (BC_1, *,internal, X), "&
" 511 (BC_1, IO_M5, output3, X, 512, 0, Z), "&
" 512 (BC_1, *, control, 0), "&
--BSR IO_T3 T3
" 513 (BC_1, *,internal, X), "&
" 514 (BC_1, IO_T3, output3, X, 515, 0, Z), "&
" 515 (BC_1, *, control, 0), "&
--BSR IO_N5 N5
" 516 (BC_1, *,internal, X), "&
" 517 (BC_1, IO_N5, output3, X, 518, 0, Z), "&
" 518 (BC_1, *, control, 0), "&
--BSR IO_T2 T2
" 519 (BC_1, *,internal, X), "&
" 520 (BC_1, IO_T2, output3, X, 521, 0, Z), "&
" 521 (BC_1, *, control, 0), "&
--BSR IO_R3 R3
" 522 (BC_1, *,internal, X), "&
" 523 (BC_1, IO_R3, output3, X, 524, 0, Z), "&
" 524 (BC_1, *, control, 0) ";
end A54SX16Abga256;