BSDL Files Library for JTAG

The only free public library that contains thousands of BSDL (Boundary Scan Description Language) models to use with BScan/JTAG tools

BSDL model: TI66AK2H06_12

-------------------------------------------------------------------------------
--  TI 66AK2H06/12 Fixed & Floating Point DSP with Boundary Scan             --
-------------------------------------------------------------------------------
--  Supported Devices: 66AK2H06 & 66AK2H12 Revision 1.0                      --
-------------------------------------------------------------------------------
--  Created by    : Texas Instruments Incorporated                           --
--  Documentation : 66AK2H06/12 Users Guide                                 --
--  BSDL Revision : 0.5 Corrected LP_time value (1/28/2013)                  --
--  BSDL Revision : 0.4 Updated to the latest BGA package                    --
--  BSDL Revision : 0.3 Replaced BC_1 with BC_4 for Serdes inputs            --
--  BSDL Revision : 0.2 Added differential voltage pair for inputs           --
--  BSDL Revision : 0.1 originally created                                   --
--                                                                           --
--  BSDL Status   : Preliminary                                              --
--  Date Created  : 05/14/2012                                               --
--                                                                           --
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
--                                                                           --
--                          IMPORTANT NOTICE                                 --
--  Texas Instruments and its subsidiaries (TI) reserve the right to make    --
--  changes to their products or to discontinue any product or service       --
--  without notice, and advise customers to obtain the latest version of     --
--  relevant information to verify, before placing orders, that information  --
--  being relied on is current and complete. All products are sold subject   --
--  to the terms and conditions of sale supplied at the time of order        --
--  acknowledgment, including those pertaining to warranty, patent infringe- --
--  ment, and limitation of liability.                                       --
--                                                                           --
--  TI warrants performance of its products to the specifications applicable --
--  at the time of sale in accordance with TI's standard warranty. Testing   --
--  and other quality control techniques are utilized to the extent TI deems --
--  necessary to support this warranty. Specific testing of all parameters   --
--  of each device is not necessarily performed, except those mandated by    --
--  government requirements.                                                 --
--                                                                           --
--  Customers are responsible for their applications using TI components.    --
--  In order to minimize risks associated with the customer's applications,  --
--  adequate design and operating safeguards must be provided by the         --
--  customer to minimize inherent or procedural hazards.                     --
--                                                                           --
--  TI assumes no liability for applications assistance or customer product  --
--  design. TI does not warrant or represent that any license, either        --
--  express or implied, is granted under any patent right, copyright, mask   --
--  work right, or other intellectual property right of TI covering or       --
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--  responsible nor liable for any such use.                                 --
--                                                                           --
--  Resale of TI's products or services with statements different from or    --
--  beyond the parameters stated by TI for that product or service voids     --
--  all express and any implied warranties for the associated TI product or  --
--  service, is an unfair and deceptive business practice, and TI is not     --
--  responsible nor liable for any such use.                                 --
--                                                                           --
--  Also see: Standard Terms and Conditions of Sale for Semiconductor        --
--  Products. www.ti.com/sc/docs/stdterms.htm                                --
--                                                                           --
--  Mailing Address:                                                         --
--                                                                           --
--             Texas Instruments                                             --
--             Post Office Box 655303                                        --
--             Dallas, Texas 75265                                           --
--                                                                           --
--             Copyright � 2007, Texas Instruments Incorporated              --
-- ------------------------------------------------------------------------- --


entity TI66AK2H06_12 is

  generic(PHYSICAL_PIN_MAP : string := "AAW");

  port(
   rsv024              : linkage     bit;
   rsv025              : linkage     bit;
   rsv185              : linkage     bit;
   rsv099              : linkage     bit;
   rsv161              : in          bit;
   rsv163              : in          bit;
   rsv165              : in          bit;
   rsv167              : in          bit;
   rsv169              : in          bit;
   rsv171              : in          bit;
   rsv162              : in          bit;
   rsv164              : in          bit;
   rsv166              : in          bit;
   rsv168              : in          bit;
   rsv170              : in          bit;
   rsv172              : in          bit;
   rsv173              : buffer      bit;
   rsv175              : buffer      bit;
   rsv177              : buffer      bit;
   rsv179              : buffer      bit;
   rsv181              : buffer      bit;
   rsv183              : buffer      bit;
   rsv174              : buffer      bit;
   rsv176              : buffer      bit;
   rsv178              : buffer      bit;
   rsv180              : buffer      bit;
   rsv182              : buffer      bit;
   rsv184              : buffer      bit;
   altcoreclkn         : in          bit;
   altcoreclkp         : in          bit;
   bootcomplete        : inout       bit;
   coreclksel          : in          bit;
   rsv012              : inout       bit;
   rsv003              : buffer      bit;
   rsv002              : buffer      bit;
   coresel0            : inout       bit;
   coresel1            : inout       bit;
   coresel2            : inout       bit;
   coresel3            : inout       bit;
   ddr3aa00            : inout       bit;
   ddr3aa01            : inout       bit;
   ddr3aa02            : inout       bit;
   ddr3aa03            : inout       bit;
   ddr3aa04            : inout       bit;
   ddr3aa05            : inout       bit;
   ddr3aa06            : inout       bit;
   ddr3aa07            : inout       bit;
   ddr3aa08            : inout       bit;
   ddr3aa09            : inout       bit;
   ddr3aa10            : inout       bit;
   ddr3aa11            : inout       bit;
   ddr3aa12            : inout       bit;
   ddr3aa13            : inout       bit;
   ddr3aa14            : inout       bit;
   ddr3aa15            : inout       bit;
   rsv029              : linkage     bit;
   ddr3aba0            : inout       bit;
   ddr3aba1            : inout       bit;
   ddr3aba2            : inout       bit;
   ddr3acas            : inout       bit;
   ddr3acb00           : inout       bit;
   ddr3acb01           : inout       bit;
   ddr3acb02           : inout       bit;
   ddr3acb03           : inout       bit;
   ddr3acb04           : inout       bit;
   ddr3acb05           : inout       bit;
   ddr3acb06           : inout       bit;
   ddr3acb07           : inout       bit;
   ddr3ace0            : inout       bit;
   ddr3ace1            : inout       bit;
   ddr3acke0           : inout       bit;
   ddr3acke1           : inout       bit;
   ddr3aclkn           : in          bit;
   ddr3aclkp           : in          bit;
   ddr3aclkoutn0       : inout       bit;
   ddr3aclkoutn1       : inout       bit;
   ddr3aclkoutp0       : inout       bit;
   ddr3aclkoutp1       : inout       bit;
   ddr3ad00            : inout       bit;
   ddr3ad01            : inout       bit;
   ddr3ad02            : inout       bit;
   ddr3ad03            : inout       bit;
   ddr3ad04            : inout       bit;
   ddr3ad05            : inout       bit;
   ddr3ad06            : inout       bit;
   ddr3ad07            : inout       bit;
   ddr3ad08            : inout       bit;
   ddr3ad09            : inout       bit;
   ddr3ad10            : inout       bit;
   ddr3ad11            : inout       bit;
   ddr3ad12            : inout       bit;
   ddr3ad13            : inout       bit;
   ddr3ad14            : inout       bit;
   ddr3ad15            : inout       bit;
   ddr3ad16            : inout       bit;
   ddr3ad17            : inout       bit;
   ddr3ad18            : inout       bit;
   ddr3ad19            : inout       bit;
   ddr3ad20            : inout       bit;
   ddr3ad21            : inout       bit;
   ddr3ad22            : inout       bit;
   ddr3ad23            : inout       bit;
   ddr3ad24            : inout       bit;
   ddr3ad25            : inout       bit;
   ddr3ad26            : inout       bit;
   ddr3ad27            : inout       bit;
   ddr3ad28            : inout       bit;
   ddr3ad29            : inout       bit;
   ddr3ad30            : inout       bit;
   ddr3ad31            : inout       bit;
   ddr3ad32            : inout       bit;
   ddr3ad33            : inout       bit;
   ddr3ad34            : inout       bit;
   ddr3ad35            : inout       bit;
   ddr3ad36            : inout       bit;
   ddr3ad37            : inout       bit;
   ddr3ad38            : inout       bit;
   ddr3ad39            : inout       bit;
   ddr3ad40            : inout       bit;
   ddr3ad41            : inout       bit;
   ddr3ad42            : inout       bit;
   ddr3ad43            : inout       bit;
   ddr3ad44            : inout       bit;
   ddr3ad45            : inout       bit;
   ddr3ad46            : inout       bit;
   ddr3ad47            : inout       bit;
   ddr3ad48            : inout       bit;
   ddr3ad49            : inout       bit;
   ddr3ad50            : inout       bit;
   ddr3ad51            : inout       bit;
   ddr3ad52            : inout       bit;
   ddr3ad53            : inout       bit;
   ddr3ad54            : inout       bit;
   ddr3ad55            : inout       bit;
   ddr3ad56            : inout       bit;
   ddr3ad57            : inout       bit;
   ddr3ad58            : inout       bit;
   ddr3ad59            : inout       bit;
   ddr3ad60            : inout       bit;
   ddr3ad61            : inout       bit;
   ddr3ad62            : inout       bit;
   ddr3ad63            : inout       bit;
   ddr3adqm0           : inout       bit;
   ddr3adqm1           : inout       bit;
   ddr3adqm2           : inout       bit;
   ddr3adqm3           : inout       bit;
   ddr3adqm4           : inout       bit;
   ddr3adqm5           : inout       bit;
   ddr3adqm6           : inout       bit;
   ddr3adqm7           : inout       bit;
   ddr3adqm8           : inout       bit;
   ddr3adqs0n          : inout       bit;
   ddr3adqs0p          : inout       bit;
   ddr3adqs1n          : inout       bit;
   ddr3adqs1p          : inout       bit;
   ddr3adqs2n          : inout       bit;
   ddr3adqs2p          : inout       bit;
   ddr3adqs3n          : inout       bit;
   ddr3adqs3p          : inout       bit;
   ddr3adqs4n          : inout       bit;
   ddr3adqs4p          : inout       bit;
   ddr3adqs5n          : inout       bit;
   ddr3adqs5p          : inout       bit;
   ddr3adqs6n          : inout       bit;
   ddr3adqs6p          : inout       bit;
   ddr3adqs7n          : inout       bit;
   ddr3adqs7p          : inout       bit;
   ddr3adqs8n          : inout       bit;
   ddr3adqs8p          : inout       bit;
   rsv027              : inout       bit;
   rsv028              : inout       bit;
   ddr3aodt0           : inout       bit;
   ddr3aodt1           : inout       bit;
   rsv005              : buffer      bit;
   rsv004              : buffer      bit;
   ddr3aras            : inout       bit;
   ddr3areset          : inout       bit;
   ddr3arzq0           : linkage     bit;
   ddr3arzq1           : linkage     bit;
   ddr3arzq2           : linkage     bit;
   ddr3avrefsstl       : linkage     bit;
   ddr3awe             : inout       bit;
   ddr3ba00            : inout       bit;
   ddr3ba01            : inout       bit;
   ddr3ba02            : inout       bit;
   ddr3ba03            : inout       bit;
   ddr3ba04            : inout       bit;
   ddr3ba05            : inout       bit;
   ddr3ba06            : inout       bit;
   ddr3ba07            : inout       bit;
   ddr3ba08            : inout       bit;
   ddr3ba09            : inout       bit;
   ddr3ba10            : inout       bit;
   ddr3ba11            : inout       bit;
   ddr3ba12            : inout       bit;
   ddr3ba13            : inout       bit;
   ddr3ba14            : inout       bit;
   ddr3ba15            : inout       bit;
   rsv032              : linkage     bit;
   ddr3bba0            : inout       bit;
   ddr3bba1            : inout       bit;
   ddr3bba2            : inout       bit;
   ddr3bcas            : inout       bit;
   ddr3bcb00           : inout       bit;
   ddr3bcb01           : inout       bit;
   ddr3bcb02           : inout       bit;
   ddr3bcb03           : inout       bit;
   ddr3bcb04           : inout       bit;
   ddr3bcb05           : inout       bit;
   ddr3bcb06           : inout       bit;
   ddr3bcb07           : inout       bit;
   ddr3bce0            : inout       bit;
   ddr3bce1            : inout       bit;
   ddr3bcke0           : inout       bit;
   ddr3bcke1           : inout       bit;
   ddr3bclkn           : in          bit;
   ddr3bclkp           : in          bit;
   ddr3bclkoutn0       : inout       bit;
   ddr3bclkoutn1       : inout       bit;
   ddr3bclkoutp0       : inout       bit;
   ddr3bclkoutp1       : inout       bit;
   ddr3bd00            : inout       bit;
   ddr3bd01            : inout       bit;
   ddr3bd02            : inout       bit;
   ddr3bd03            : inout       bit;
   ddr3bd04            : inout       bit;
   ddr3bd05            : inout       bit;
   ddr3bd06            : inout       bit;
   ddr3bd07            : inout       bit;
   ddr3bd08            : inout       bit;
   ddr3bd09            : inout       bit;
   ddr3bd10            : inout       bit;
   ddr3bd11            : inout       bit;
   ddr3bd12            : inout       bit;
   ddr3bd13            : inout       bit;
   ddr3bd14            : inout       bit;
   ddr3bd15            : inout       bit;
   ddr3bd16            : inout       bit;
   ddr3bd17            : inout       bit;
   ddr3bd18            : inout       bit;
   ddr3bd19            : inout       bit;
   ddr3bd20            : inout       bit;
   ddr3bd21            : inout       bit;
   ddr3bd22            : inout       bit;
   ddr3bd23            : inout       bit;
   ddr3bd24            : inout       bit;
   ddr3bd25            : inout       bit;
   ddr3bd26            : inout       bit;
   ddr3bd27            : inout       bit;
   ddr3bd28            : inout       bit;
   ddr3bd29            : inout       bit;
   ddr3bd30            : inout       bit;
   ddr3bd31            : inout       bit;
   ddr3bd32            : inout       bit;
   ddr3bd33            : inout       bit;
   ddr3bd34            : inout       bit;
   ddr3bd35            : inout       bit;
   ddr3bd36            : inout       bit;
   ddr3bd37            : inout       bit;
   ddr3bd38            : inout       bit;
   ddr3bd39            : inout       bit;
   ddr3bd40            : inout       bit;
   ddr3bd41            : inout       bit;
   ddr3bd42            : inout       bit;
   ddr3bd43            : inout       bit;
   ddr3bd44            : inout       bit;
   ddr3bd45            : inout       bit;
   ddr3bd46            : inout       bit;
   ddr3bd47            : inout       bit;
   ddr3bd48            : inout       bit;
   ddr3bd49            : inout       bit;
   ddr3bd50            : inout       bit;
   ddr3bd51            : inout       bit;
   ddr3bd52            : inout       bit;
   ddr3bd53            : inout       bit;
   ddr3bd54            : inout       bit;
   ddr3bd55            : inout       bit;
   ddr3bd56            : inout       bit;
   ddr3bd57            : inout       bit;
   ddr3bd58            : inout       bit;
   ddr3bd59            : inout       bit;
   ddr3bd60            : inout       bit;
   ddr3bd61            : inout       bit;
   ddr3bd62            : inout       bit;
   ddr3bd63            : inout       bit;
   ddr3bdqm0           : inout       bit;
   ddr3bdqm1           : inout       bit;
   ddr3bdqm2           : inout       bit;
   ddr3bdqm3           : inout       bit;
   ddr3bdqm4           : inout       bit;
   ddr3bdqm5           : inout       bit;
   ddr3bdqm6           : inout       bit;
   ddr3bdqm7           : inout       bit;
   ddr3bdqm8           : inout       bit;
   ddr3bdqs0n          : inout       bit;
   ddr3bdqs0p          : inout       bit;
   ddr3bdqs1n          : inout       bit;
   ddr3bdqs1p          : inout       bit;
   ddr3bdqs2n          : inout       bit;
   ddr3bdqs2p          : inout       bit;
   ddr3bdqs3n          : inout       bit;
   ddr3bdqs3p          : inout       bit;
   ddr3bdqs4n          : inout       bit;
   ddr3bdqs4p          : inout       bit;
   ddr3bdqs5n          : inout       bit;
   ddr3bdqs5p          : inout       bit;
   ddr3bdqs6n          : inout       bit;
   ddr3bdqs6p          : inout       bit;
   ddr3bdqs7n          : inout       bit;
   ddr3bdqs7p          : inout       bit;
   ddr3bdqs8n          : inout       bit;
   ddr3bdqs8p          : inout       bit;
   rsv030              : inout       bit;
   rsv031              : inout       bit;
   ddr3bodt0           : inout       bit;
   ddr3bodt1           : inout       bit;
   rsv007              : buffer      bit;
   rsv006              : buffer      bit;
   ddr3bras            : inout       bit;
   ddr3breset          : inout       bit;
   ddr3brzq0           : linkage     bit;
   ddr3brzq1           : linkage     bit;
   ddr3brzq2           : linkage     bit;
   ddr3bvrefsstl       : linkage     bit;
   ddr3bwe             : inout       bit;
   rsv000              : inout       bit;
   emifa00             : inout       bit;
   emifa01             : inout       bit;
   emifa02             : inout       bit;
   emifa03             : inout       bit;
   emifa04             : inout       bit;
   emifa05             : inout       bit;
   emifa06             : inout       bit;
   emifa07             : inout       bit;
   emifa08             : inout       bit;
   emifa09             : inout       bit;
   emifa10             : inout       bit;
   emifa11             : inout       bit;
   emifa12             : inout       bit;
   emifa13             : inout       bit;
   emifa14             : inout       bit;
   emifa15             : inout       bit;
   emifa16             : inout       bit;
   emifa17             : inout       bit;
   emifa18             : inout       bit;
   emifa19             : inout       bit;
   emifa20             : inout       bit;
   emifa21             : inout       bit;
   emifa22             : inout       bit;
   emifa23             : inout       bit;
   emifbe0             : inout       bit;
   emifbe1             : inout       bit;
   emifce0             : inout       bit;
   emifce1             : inout       bit;
   emifce2             : inout       bit;
   emifce3             : inout       bit;
   emifd00             : inout       bit;
   emifd01             : inout       bit;
   emifd02             : inout       bit;
   emifd03             : inout       bit;
   emifd04             : inout       bit;
   emifd05             : inout       bit;
   emifd06             : inout       bit;
   emifd07             : inout       bit;
   emifd08             : inout       bit;
   emifd09             : inout       bit;
   emifd10             : inout       bit;
   emifd11             : inout       bit;
   emifd12             : inout       bit;
   emifd13             : inout       bit;
   emifd14             : inout       bit;
   emifd15             : inout       bit;
   emifoe              : inout       bit;
   emifrnw             : inout       bit;
   emifwait0           : inout       bit;
   emifwait1           : inout       bit;
   emifwe              : inout       bit;
   emu00               : inout       bit;
   emu01               : inout       bit;
   emu02               : inout       bit;
   emu03               : inout       bit;
   emu04               : inout       bit;
   emu05               : inout       bit;
   emu06               : inout       bit;
   emu07               : inout       bit;
   emu08               : inout       bit;
   emu09               : inout       bit;
   emu10               : inout       bit;
   emu11               : inout       bit;
   emu12               : inout       bit;
   emu13               : inout       bit;
   emu14               : inout       bit;
   emu15               : inout       bit;
   emu16               : inout       bit;
   emu17               : inout       bit;
   emu18               : inout       bit;
   rsv188              : inout       bit;
   gpio00              : inout       bit;
   gpio01              : inout       bit;
   gpio02              : inout       bit;
   gpio03              : inout       bit;
   gpio04              : inout       bit;
   gpio05              : inout       bit;
   gpio06              : inout       bit;
   gpio07              : inout       bit;
   gpio08              : inout       bit;
   gpio09              : inout       bit;
   gpio10              : inout       bit;
   gpio11              : inout       bit;
   gpio12              : inout       bit;
   gpio13              : inout       bit;
   gpio14              : inout       bit;
   gpio15              : inout       bit;
   gpio16              : inout       bit;
   gpio17              : inout       bit;
   gpio18              : inout       bit;
   gpio19              : inout       bit;
   gpio20              : inout       bit;
   gpio21              : inout       bit;
   gpio22              : inout       bit;
   gpio23              : inout       bit;
   gpio24              : inout       bit;
   gpio25              : inout       bit;
   gpio26              : inout       bit;
   gpio27              : inout       bit;
   gpio28              : inout       bit;
   gpio29              : inout       bit;
   gpio30              : inout       bit;
   gpio31              : inout       bit;
   hout                : inout       bit;
   rsv019              : linkage     bit;
   hyp0refres          : linkage     bit;
   hyp0rxflclk         : inout       bit;
   hyp0rxfldat         : inout       bit;
   hyp0rxn0            : in          bit;
   hyp0rxn1            : in          bit;
   hyp0rxn2            : in          bit;
   hyp0rxn3            : in          bit;
   hyp0rxp0            : in          bit;
   hyp0rxp1            : in          bit;
   hyp0rxp2            : in          bit;
   hyp0rxp3            : in          bit;
   hyp0rxpmclk         : inout       bit;
   hyp0rxpmdat         : inout       bit;
   hyp0txflclk         : inout       bit;
   hyp0txfldat         : inout       bit;
   hyp0txn0            : buffer      bit;
   hyp0txn1            : buffer      bit;
   hyp0txn2            : buffer      bit;
   hyp0txn3            : buffer      bit;
   hyp0txp0            : buffer      bit;
   hyp0txp1            : buffer      bit;
   hyp0txp2            : buffer      bit;
   hyp0txp3            : buffer      bit;
   hyp0txpmclk         : inout       bit;
   hyp0txpmdat         : inout       bit;
   hyp0clkn            : linkage     bit;
   hyp0clkp            : linkage     bit;
   rsv020              : linkage     bit;
   hyp1refres          : linkage     bit;
   hyp1rxflclk         : inout       bit;
   hyp1rxfldat         : inout       bit;
   hyp1rxn0            : in          bit;
   hyp1rxn1            : in          bit;
   hyp1rxn2            : in          bit;
   hyp1rxn3            : in          bit;
   hyp1rxp0            : in          bit;
   hyp1rxp1            : in          bit;
   hyp1rxp2            : in          bit;
   hyp1rxp3            : in          bit;
   hyp1rxpmclk         : inout       bit;
   hyp1rxpmdat         : inout       bit;
   hyp1txflclk         : inout       bit;
   hyp1txfldat         : inout       bit;
   hyp1txn0            : buffer      bit;
   hyp1txn1            : buffer      bit;
   hyp1txn2            : buffer      bit;
   hyp1txn3            : buffer      bit;
   hyp1txp0            : buffer      bit;
   hyp1txp1            : buffer      bit;
   hyp1txp2            : buffer      bit;
   hyp1txp3            : buffer      bit;
   hyp1txpmclk         : inout       bit;
   hyp1txpmdat         : inout       bit;
   hyp1clkn            : linkage     bit;
   hyp1clkp            : linkage     bit;
   mdclk               : inout       bit;
   mdio                : inout       bit;
   nmi                 : inout       bit;
   por                 : in          bit;
   reset               : in          bit;
   resetfull           : in          bit;
   resetstat           : inout       bit;
   lresetnmien         : inout       bit;
   lreset              : inout       bit;
   passclkn            : in          bit;
   passclkp            : in          bit;
   paclksel            : in          bit;
   rsv009              : buffer      bit;
   rsv008              : buffer      bit;
   rsv001              : inout       bit;
   rsv022              : linkage     bit;
   pcieclkn            : linkage     bit;
   pcieclkp            : linkage     bit;
   pcierefres          : linkage     bit;
   pcierxn0            : in          bit;
   pcierxn1            : in          bit;
   pcierxp0            : in          bit;
   pcierxp1            : in          bit;
   pcietxn0            : buffer      bit;
   pcietxn1            : buffer      bit;
   pcietxp0            : buffer      bit;
   pcietxp1            : buffer      bit;
   rsv191              : inout       bit;
   rsv192              : inout       bit;
   rsv013              : linkage     bit;
   rsv014              : linkage     bit;
   rsv021              : linkage     bit;
   riorefres           : linkage     bit;
   riorxn0             : in          bit;
   riorxn1             : in          bit;
   riorxn2             : in          bit;
   riorxn3             : in          bit;
   riorxp0             : in          bit;
   riorxp1             : in          bit;
   riorxp2             : in          bit;
   riorxp3             : in          bit;
   riotxn0             : buffer      bit;
   riotxn1             : buffer      bit;
   riotxn2             : buffer      bit;
   riotxn3             : buffer      bit;
   riotxp0             : buffer      bit;
   riotxp1             : buffer      bit;
   riotxp2             : buffer      bit;
   riotxp3             : buffer      bit;
   rsv187              : in          bit;
   rsv186              : in          bit;
   rsv190              : in          bit;
   rsv189              : in          bit;
   scl0                : inout       bit;
   scl1                : inout       bit;
   scl2                : inout       bit;
   sda0                : inout       bit;
   sda1                : inout       bit;
   sda2                : inout       bit;
   rsv023              : linkage     bit;
   sgmiirefres         : linkage     bit;
   sgmii0rxn           : in          bit;
   sgmii1rxn           : in          bit;
   sgmii2rxn           : in          bit;
   sgmii3rxn           : in          bit;
   sgmii0rxp           : in          bit;
   sgmii1rxp           : in          bit;
   sgmii2rxp           : in          bit;
   sgmii3rxp           : in          bit;
   sgmii0txn           : buffer      bit;
   sgmii1txn           : buffer      bit;
   sgmii2txn           : buffer      bit;
   sgmii3txn           : buffer      bit;
   sgmii0txp           : buffer      bit;
   sgmii1txp           : buffer      bit;
   sgmii2txp           : buffer      bit;
   sgmii3txp           : buffer      bit;
   spi0clk             : inout       bit;
   spi0scs0            : inout       bit;
   spi0scs1            : inout       bit;
   spi0scs2            : inout       bit;
   spi0scs3            : inout       bit;
   spi0dout            : inout       bit;
   spi0din             : inout       bit;
   spi1clk             : inout       bit;
   spi1scs0            : inout       bit;
   spi1scs1            : inout       bit;
   spi1scs2            : inout       bit;
   spi1scs3            : inout       bit;
   spi1dout            : inout       bit;
   spi1din             : inout       bit;
   spi2clk             : inout       bit;
   spi2scs0            : inout       bit;
   spi2scs1            : inout       bit;
   spi2scs2            : inout       bit;
   spi2scs3            : inout       bit;
   spi2dout            : inout       bit;
   spi2din             : inout       bit;
   sriosgmiiclkn       : in          bit;
   sriosgmiiclkp       : in          bit;
   sysclkn             : in          bit;
   sysclkp             : in          bit;
   sysclkout           : inout       bit;
   tck                 : in          bit;
   tdi                 : in          bit;
   tms                 : in          bit;
   trst                : in          bit;
   tdo                 : out         bit;
   armclkn             : in          bit;
   armclkp             : in          bit;
   tscompout           : inout       bit;
   tspushevt0          : inout       bit;
   tspushevt1          : inout       bit;
   tsrefclkn           : in          bit;
   tsrefclkp           : in          bit;
   tsrxclkout0n        : buffer      bit;
   tsrxclkout0p        : buffer      bit;
   tsrxclkout1n        : buffer      bit;
   tsrxclkout1p        : buffer      bit;
   tssyncevt           : inout       bit;
   rsv011              : linkage     bit;
   rsv010              : linkage     bit;
   rsv015              : linkage     bit;
   rsv017              : linkage     bit;
   rsv016              : linkage     bit;
   rsv018              : linkage     bit;
   timi0               : inout       bit;
   timi1               : inout       bit;
   timo0               : inout       bit;
   timo1               : inout       bit;
   uart0cts            : inout       bit;
   uart0rts            : inout       bit;
   uart0rxd            : inout       bit;
   uart0txd            : inout       bit;
   uart1cts            : inout       bit;
   uart1rts            : inout       bit;
   uart1rxd            : inout       bit;
   uart1txd            : inout       bit;
   usbresref           : linkage     bit;
   usbclkm             : linkage     bit;
   usbclkp             : linkage     bit;
   usbid0              : linkage     bit;
   usbvbus             : linkage     bit;
   usbdp               : linkage     bit;
   usbdm               : linkage     bit;
   usbrx0m             : linkage     bit;
   usbrx0p             : linkage     bit;
   usbtx0m             : linkage     bit;
   usbtx0p             : linkage     bit;
   usbdrvvbus          : inout       bit;
   rsv194              : inout       bit;
   rsv195              : inout       bit;
   rsv193              : inout       bit;
   vcl                 : inout       bit;
   rsv74               : inout       bit;
   vcntl0              : inout       bit;
   rsv76               : inout       bit;
   vcntl1              : inout       bit;
   rsv77               : inout       bit;
   vcntl2              : inout       bit;
   rsv78               : inout       bit;
   vcntl3              : inout       bit;
   rsv79               : inout       bit;
   vcntl4              : inout       bit;
   rsv80               : inout       bit;
   vcntl5              : inout       bit;
   rsv81               : inout       bit;
   vd                  : inout       bit;
   rsv75               : inout       bit;
   rsv026              : linkage     bit;
   rsv071              : linkage     bit;
   rsv070              : linkage     bit;
   rsv068              : linkage     bit;
   rsv069              : linkage     bit;
   rsv073              : inout       bit;
   rsv072              : inout       bit;
   rsv060              : in          bit;
   rsv064              : in          bit;
   rsv061              : in          bit;
   rsv065              : in          bit;
   rsv062              : buffer      bit;
   rsv066              : buffer      bit;
   rsv063              : buffer      bit;
   rsv067              : buffer      bit;

-- paamux              : linkage     bit;  This pin is not routed to BGA socket
-- coreamux            : linkage     bit;  This pin is not routed to BGA socket
-- ddr3aamux           : linkage     bit;  This pin is not routed to BGA socket
-- ddr3bamux           : linkage     bit;  This pin is not routed to BGA socket
-- armamux             : linkage     bit;  This pin is not routed to BGA socket

   vp                  : linkage     bit;
   vph                 : linkage     bit;
   vptx                : linkage     bit;
   dvdd33              : linkage     bit;
   vpp                 : linkage bit_vector(1 to 2);
   vnwa1               : linkage     bit;
   vnwa2               : linkage     bit;
   vnwa3               : linkage     bit;
   vnwa4               : linkage     bit;
   avdda1              : linkage     bit;
   avdda2              : linkage     bit;
   avdda3              : linkage     bit;
   avdda4              : linkage     bit;
   avdda5              : linkage     bit;
   avdda6              : linkage     bit;
   avdda7              : linkage     bit;
   avdda8              : linkage     bit;
   avdda9              : linkage     bit;
   avdda10             : linkage     bit;
   avdda11             : linkage     bit;
   avdda12             : linkage     bit;
   avdda13             : linkage     bit;
   avdda14             : linkage     bit;
   avdda15             : linkage     bit;
   vddahv              : linkage bit_vector(1 to 16);
   cvdd                : linkage bit_vector(1 to 136);
   cvdd1               : linkage bit_vector(1 to 12);
   cvddt1              : linkage bit_vector(1 to 3);
   dvdd15              : linkage bit_vector(1 to 68);
   vddusb              : linkage     bit;
   dvdd18              : linkage bit_vector(1 to 35);
   vddalv              : linkage bit_vector(1 to 27);
   vss                 : linkage bit_vector(1 to 524));

 use STD_1149_1_2001.all;
 use STD_1149_6_2003.all;

 attribute COMPONENT_CONFORMANCE of TI66AK2H06_12 : entity is "STD_1149_1_2001";

 attribute      PIN_MAP          of TI66AK2H06_12 : entity is PHYSICAL_PIN_MAP;
 constant AAW : PIN_MAP_STRING :=

   "rsv024              :  AM16," &
   "rsv025              :  AM14," &
   "rsv185              :  AM15," &
   "rsv099              :  AM11," &
   "rsv161              :  AW16," &
   "rsv163              :  AU16," &
   "rsv165              :  AV15," &
   "rsv167              :  AW13," &
   "rsv169              :  AU13," &
   "rsv171              :  AV12," &
   "rsv162              :  AW17," &
   "rsv164              :  AU17," &
   "rsv166              :  AV16," &
   "rsv168              :  AW14," &
   "rsv170              :  AU14," &
   "rsv172              :  AV13," &
   "rsv173              :  AP17," &
   "rsv175              :  AR16," &
   "rsv177              :  AT15," &
   "rsv179              :  AP14," &
   "rsv181              :  AR13," &
   "rsv183              :  AT12," &
   "rsv174              :  AP18," &
   "rsv176              :  AR17," &
   "rsv178              :  AT16," &
   "rsv180              :  AP15," &
   "rsv182              :  AR14," &
   "rsv184              :  AT13," &
   "altcoreclkn         :  AL2," &
   "altcoreclkp         :  AM2," &
   "bootcomplete        :  AF5," &
   "coreclksel          :  AL4," &
   "rsv003              :  AM4," &
   "rsv002              :  AN4," &
   "coresel0            :  F24," &
   "coresel1            :  E24," &
   "coresel2            :  D24," &
   "coresel3            :  G24," &
   "ddr3aa00            :  E8," &
   "ddr3aa01            :  G9," &
   "ddr3aa02            :  G8," &
   "ddr3aa03            :  G10," &
   "ddr3aa04            :  F9," &
   "ddr3aa05            :  F8," &
   "ddr3aa06            :  C9," &
   "ddr3aa07            :  D9," &
   "ddr3aa08            :  B9," &
   "ddr3aa09            :  D8," &
   "ddr3aa10            :  F10," &
   "ddr3aa11            :  A9," &
   "ddr3aa12            :  E10," &
   "ddr3aa13            :  A10," &
   "ddr3aa14            :  B10," &
   "ddr3aa15            :  D10," &
   "rsv029              :  F13," &
   "ddr3aba0            :  B11," &
   "ddr3aba1            :  C11," &
   "ddr3aba2            :  G11," &
   "ddr3acas            :  C13," &
   "ddr3acb00           :  A16," &
   "ddr3acb01           :  C15," &
   "ddr3acb02           :  B16," &
   "ddr3acb03           :  F15," &
   "ddr3acb04           :  D15," &
   "ddr3acb05           :  F14," &
   "ddr3acb06           :  D14," &
   "ddr3acb07           :  G15," &
   "ddr3ace0            :  D11," &
   "ddr3ace1            :  F11," &
   "ddr3acke0           :  G12," &
   "ddr3acke1           :  A11," &
   "ddr3aclkn           :  A25," &
   "ddr3aclkoutn0       :  B12," &
   "ddr3aclkoutn1       :  B13," &
   "ddr3aclkoutp0       :  A12," &
   "ddr3aclkoutp1       :  A13," &
   "ddr3aclkp           :  B25," &
   "ddr3ad00            :  G1," &
   "ddr3ad01            :  H2," &
   "ddr3ad02            :  F1," &
   "ddr3ad03            :  G2," &
   "ddr3ad04            :  H1," &
   "ddr3ad05            :  E2," &
   "ddr3ad06            :  F2," &
   "ddr3ad07            :  D2," &
   "ddr3ad08            :  E4," &
   "ddr3ad09            :  F4," &
   "ddr3ad10            :  G3," &
   "ddr3ad11            :  A4," &
   "ddr3ad12            :  B4," &
   "ddr3ad13            :  H3," &
   "ddr3ad14            :  D3," &
   "ddr3ad15            :  D4," &
   "ddr3ad16            :  G4," &
   "ddr3ad17            :  H5," &
   "ddr3ad18            :  D5," &
   "ddr3ad19            :  F5," &
   "ddr3ad20            :  G5," &
   "ddr3ad21            :  D6," &
   "ddr3ad22            :  C5," &
   "ddr3ad23            :  B6," &
   "ddr3ad24            :  C7," &
   "ddr3ad25            :  F7," &
   "ddr3ad26            :  F6," &
   "ddr3ad27            :  A8," &
   "ddr3ad28            :  B8," &
   "ddr3ad29            :  G6," &
   "ddr3ad30            :  G7," &
   "ddr3ad31            :  D7," &
   "ddr3ad32            :  E16," &
   "ddr3ad33            :  G16," &
   "ddr3ad34            :  F16," &
   "ddr3ad35            :  G17," &
   "ddr3ad36            :  D16," &
   "ddr3ad37            :  D17," &
   "ddr3ad38            :  F17," &
   "ddr3ad39            :  E18," &
   "ddr3ad40            :  C19," &
   "ddr3ad41            :  D19," &
   "ddr3ad42            :  G18," &
   "ddr3ad43            :  F19," &
   "ddr3ad44            :  G19," &
   "ddr3ad45            :  B18," &
   "ddr3ad46            :  D18," &
   "ddr3ad47            :  F18," &
   "ddr3ad48            :  A20," &
   "ddr3ad49            :  B20," &
   "ddr3ad50            :  D20," &
   "ddr3ad51            :  G20," &
   "ddr3ad52            :  C21," &
   "ddr3ad53            :  E20," &
   "ddr3ad54            :  F20," &
   "ddr3ad55            :  G21," &
   "ddr3ad56            :  C23," &
   "ddr3ad57            :  G22," &
   "ddr3ad58            :  D23," &
   "ddr3ad59            :  F22," &
   "ddr3ad60            :  E22," &
   "ddr3ad61            :  B22," &
   "ddr3ad62            :  F21," &
   "ddr3ad63            :  D22," &
   "ddr3adqm0           :  C2," &
   "ddr3adqm1           :  F3," &
   "ddr3adqm2           :  A6," &
   "ddr3adqm3           :  E6," &
   "ddr3adqm4           :  C17," &
   "ddr3adqm5           :  A18," &
   "ddr3adqm6           :  D21," &
   "ddr3adqm7           :  A22," &
   "ddr3adqm8           :  E14," &
   "ddr3adqs0n          :  D1," &
   "ddr3adqs0p          :  E1," &
   "ddr3adqs1n          :  C3," &
   "ddr3adqs1p          :  B3," &
   "ddr3adqs2n          :  B5," &
   "ddr3adqs2p          :  A5," &
   "ddr3adqs3n          :  A7," &
   "ddr3adqs3p          :  B7," &
   "ddr3adqs4n          :  B17," &
   "ddr3adqs4p          :  A17," &
   "ddr3adqs5n          :  A19," &
   "ddr3adqs5p          :  B19," &
   "ddr3adqs6n          :  B21," &
   "ddr3adqs6p          :  A21," &
   "ddr3adqs7n          :  B23," &
   "ddr3adqs7p          :  A23," &
   "ddr3adqs8n          :  A15," &
   "ddr3adqs8p          :  B15," &
   "rsv027              :  D12," &
   "rsv028              :  D13," &
   "ddr3aodt0           :  E12," &
   "ddr3aodt1           :  G13," &
   "rsv005              :  A24," &
   "rsv004              :  B24," &
   "ddr3aras            :  A14," &
   "ddr3areset          :  B14," &
   "ddr3arzq0           :  H16," &
   "ddr3arzq1           :  H10," &
   "ddr3arzq2           :  H22," &
   "ddr3avrefsstl       :  G14," &
   "ddr3awe             :  F12," &
   "ddr3ba00            :  AA32," &
   "ddr3ba01            :  W33," &
   "ddr3ba02            :  W32," &
   "ddr3ba03            :  Y34," &
   "ddr3ba04            :  W34," &
   "ddr3ba05            :  V34," &
   "ddr3ba06            :  W36," &
   "ddr3ba07            :  W37," &
   "ddr3ba08            :  AA33," &
   "ddr3ba09            :  Y32," &
   "ddr3ba10            :  Y38," &
   "ddr3ba11            :  AA39," &
   "ddr3ba12            :  Y35," &
   "ddr3ba13            :  Y39," &
   "ddr3ba14            :  AA38," &
   "ddr3ba15            :  Y36," &
   "rsv032              :  AB32," &
   "ddr3bba0            :  AA37," &
   "ddr3bba1            :  AA34," &
   "ddr3bba2            :  AB35," &
   "ddr3bcas            :  AC36," &
   "ddr3bcb00           :  AF32," &
   "ddr3bcb01           :  AF34," &
   "ddr3bcb02           :  AE32," &
   "ddr3bcb03           :  AF35," &
   "ddr3bcb04           :  AE33," &
   "ddr3bcb05           :  AE36," &
   "ddr3bcb06           :  AD36," &
   "ddr3bcb07           :  AE34," &
   "ddr3bce0            :  AB34," &
   "ddr3bce1            :  AA36," &
   "ddr3bcke0           :  AB39," &
   "ddr3bcke1           :  AB38," &
   "ddr3bclkn           :  AR39," &
   "ddr3bclkoutn0       :  AD39," &
   "ddr3bclkoutn1       :  AC38," &
   "ddr3bclkoutp0       :  AD38," &
   "ddr3bclkoutp1       :  AC39," &
   "ddr3bclkp           :  AR38," &
   "ddr3bd00            :  L38," &
   "ddr3bd01            :  N34," &
   "ddr3bd02            :  M37," &
   "ddr3bd03            :  L39," &
   "ddr3bd04            :  N33," &
   "ddr3bd05            :  N37," &
   "ddr3bd06            :  N36," &
   "ddr3bd07            :  N38," &
   "ddr3bd08            :  T32," &
   "ddr3bd09            :  R32," &
   "ddr3bd10            :  P35," &
   "ddr3bd11            :  R39," &
   "ddr3bd12            :  R38," &
   "ddr3bd13            :  N32," &
   "ddr3bd14            :  R33," &
   "ddr3bd15            :  P36," &
   "ddr3bd16            :  T34," &
   "ddr3bd17            :  R34," &
   "ddr3bd18            :  T35," &
   "ddr3bd19            :  R37," &
   "ddr3bd20            :  R36," &
   "ddr3bd21            :  U37," &
   "ddr3bd22            :  T36," &
   "ddr3bd23            :  U38," &
   "ddr3bd24            :  V35," &
   "ddr3bd25            :  U36," &
   "ddr3bd26            :  U34," &
   "ddr3bd27            :  W38," &
   "ddr3bd28            :  W39," &
   "ddr3bd29            :  U33," &
   "ddr3bd30            :  V32," &
   "ddr3bd31            :  V36," &
   "ddr3bd32            :  AG37," &
   "ddr3bd33            :  AF36," &
   "ddr3bd34            :  AG38," &
   "ddr3bd35            :  AG34," &
   "ddr3bd36            :  AG36," &
   "ddr3bd37            :  AH34," &
   "ddr3bd38            :  AH35," &
   "ddr3bd39            :  AG32," &
   "ddr3bd40            :  AH32," &
   "ddr3bd41            :  AJ33," &
   "ddr3bd42            :  AH36," &
   "ddr3bd43            :  AJ34," &
   "ddr3bd44            :  AJ36," &
   "ddr3bd45            :  AH39," &
   "ddr3bd46            :  AH38," &
   "ddr3bd47            :  AJ37," &
   "ddr3bd48            :  AK39," &
   "ddr3bd49            :  AK38," &
   "ddr3bd50            :  AK36," &
   "ddr3bd51            :  AK35," &
   "ddr3bd52            :  AL34," &
   "ddr3bd53            :  AL36," &
   "ddr3bd54            :  AL37," &
   "ddr3bd55            :  AL33," &
   "ddr3bd56            :  AN34," &
   "ddr3bd57            :  AN36," &
   "ddr3bd58            :  AN33," &
   "ddr3bd59            :  AM34," &
   "ddr3bd60            :  AM35," &
   "ddr3bd61            :  AM38," &
   "ddr3bd62            :  AM36," &
   "ddr3bd63            :  AN37," &
   "ddr3bdqm0           :  N39," &
   "ddr3bdqm1           :  P34," &
   "ddr3bdqm2           :  U39," &
   "ddr3bdqm3           :  U32," &
   "ddr3bdqm4           :  AG33," &
   "ddr3bdqm5           :  AG39," &
   "ddr3bdqm6           :  AK34," &
   "ddr3bdqm7           :  AM39," &
   "ddr3bdqm8           :  AE37," &
   "ddr3bdqs0n          :  M39," &
   "ddr3bdqs0p          :  M38," &
   "ddr3bdqs1n          :  P38," &
   "ddr3bdqs1p          :  P39," &
   "ddr3bdqs2n          :  T38," &
   "ddr3bdqs2p          :  T39," &
   "ddr3bdqs3n          :  V38," &
   "ddr3bdqs3p          :  V39," &
   "ddr3bdqs4n          :  AF39," &
   "ddr3bdqs4p          :  AF38," &
   "ddr3bdqs5n          :  AJ38," &
   "ddr3bdqs5p          :  AJ39," &
   "ddr3bdqs6n          :  AL38," &
   "ddr3bdqs6p          :  AL39," &
   "ddr3bdqs7n          :  AN39," &
   "ddr3bdqs7p          :  AN38," &
   "ddr3bdqs8n          :  AE38," &
   "ddr3bdqs8p          :  AE39," &
   "rsv030              :  AD35," &
   "rsv031              :  AC34," &
   "ddr3bodt0           :  AC33," &
   "ddr3bodt1           :  AD34," &
   "rsv007              :  AP39," &
   "rsv006              :  AP38," &
   "ddr3bras            :  AD32," &
   "ddr3breset          :  AC32," &
   "ddr3brzq0           :  AA31," &
   "ddr3brzq1           :  P32," &
   "ddr3brzq2           :  AK32," &
   "ddr3bvrefsstl       :  AC31," &
   "ddr3bwe             :  AC37," &
   "rsv000              :  P2," &
   "emifa00             :  F34," &
   "emifa01             :  F37," &
   "emifa02             :  G36," &
   "emifa03             :  E39," &
   "emifa04             :  E34," &
   "emifa05             :  J34," &
   "emifa06             :  H35," &
   "emifa07             :  K33," &
   "emifa08             :  C35," &
   "emifa09             :  G37," &
   "emifa10             :  F38," &
   "emifa11             :  D35," &
   "emifa12             :  H36," &
   "emifa13             :  E35," &
   "emifa14             :  G38," &
   "emifa15             :  F39," &
   "emifa16             :  K34," &
   "emifa17             :  F35," &
   "emifa18             :  J35," &
   "emifa19             :  G39," &
   "emifa20             :  C36," &
   "emifa21             :  J36," &
   "emifa22             :  H38," &
   "emifa23             :  D36," &
   "emifbe0             :  H34," &
   "emifbe1             :  H33," &
   "emifce0             :  G33," &
   "emifce1             :  G32," &
   "emifce2             :  G34," &
   "emifce3             :  E36," &
   "emifd00             :  M32," &
   "emifd01             :  J37," &
   "emifd02             :  L33," &
   "emifd03             :  L34," &
   "emifd04             :  H39," &
   "emifd05             :  J38," &
   "emifd06             :  K37," &
   "emifd07             :  J39," &
   "emifd08             :  K39," &
   "emifd09             :  K38," &
   "emifd10             :  K36," &
   "emifd11             :  L36," &
   "emifd12             :  L35," &
   "emifd13             :  M34," &
   "emifd14             :  M36," &
   "emifd15             :  M35," &
   "emifoe              :  E37," &
   "emifrnw             :  F33," &
   "emifwait0           :  E38," &
   "emifwait1           :  D39," &
   "emifwe              :  F36," &
   "emu00               :  AA2," &
   "emu01               :  AB2," &
   "emu02               :  Y3," &
   "emu03               :  Y4," &
   "emu04               :  W3," &
   "emu05               :  W4," &
   "emu06               :  V4," &
   "emu07               :  U4," &
   "emu08               :  U3," &
   "emu09               :  T3," &
   "emu10               :  AB4," &
   "emu11               :  AA3," &
   "emu12               :  U5," &
   "emu13               :  T4," &
   "emu14               :  AB3," &
   "emu15               :  R3," &
   "emu16               :  T5," &
   "emu17               :  R4," &
   "emu18               :  AA4," &
   "rsv188              :  AC4," &
   "gpio00              :  F29," &
   "gpio01              :  B30," &
   "gpio02              :  D29," &
   "gpio03              :  A35," &
   "gpio04              :  B29," &
   "gpio05              :  E29," &
   "gpio06              :  D30," &
   "gpio07              :  C30," &
   "gpio08              :  A30," &
   "gpio09              :  G30," &
   "gpio10              :  F31," &
   "gpio11              :  E30," &
   "gpio12              :  F30," &
   "gpio13              :  A31," &
   "gpio14              :  E32," &
   "gpio15              :  B31," &
   "gpio16              :  A36," &
   "gpio17              :  A32," &
   "gpio18              :  C31," &
   "gpio19              :  B32," &
   "gpio20              :  A33," &
   "gpio21              :  D33," &
   "gpio22              :  D31," &
   "gpio23              :  B35," &
   "gpio24              :  B33," &
   "gpio25              :  E31," &
   "gpio26              :  A34," &
   "gpio27              :  D32," &
   "gpio28              :  C33," &
   "gpio29              :  C34," &
   "gpio30              :  B36," &
   "gpio31              :  B34," &
   "hout                :  AE5," &
   "lresetnmien         :  AD4," &
   "lreset              :  AE4," &
   "rsv019              :  AN10," &
   "hyp0clkn            :  AT10," &
   "hyp0clkp            :  AT9," &
   "hyp0refres          :  AM9," &
   "hyp0rxflclk         :  AJ5," &
   "hyp0rxfldat         :  AJ4," &
   "hyp0rxn0            :  AW10," &
   "hyp0rxn1            :  AU10," &
   "hyp0rxn2            :  AV9," &
   "hyp0rxn3            :  AW7," &
   "hyp0rxp0            :  AW11," &
   "hyp0rxp1            :  AU11," &
   "hyp0rxp2            :  AV10," &
   "hyp0rxp3            :  AW8," &
   "hyp0rxpmclk         :  AJ2," &
   "hyp0rxpmdat         :  AG3," &
   "hyp0txflclk         :  AJ3," &
   "hyp0txfldat         :  AG5," &
   "hyp0txn0            :  AP11," &
   "hyp0txn1            :  AR10," &
   "hyp0txn2            :  AP8," &
   "hyp0txn3            :  AR7," &
   "hyp0txp0            :  AP12," &
   "hyp0txp1            :  AR11," &
   "hyp0txp2            :  AP9," &
   "hyp0txp3            :  AR8," &
   "hyp0txpmclk         :  AH5," &
   "hyp0txpmdat         :  AJ1," &
   "rsv020              :  AM7," &
   "hyp1clkn            :  AW5," &
   "hyp1clkp            :  AW4," &
   "hyp1refres          :  AM6," &
   "hyp1rxflclk         :  AH4," &
   "hyp1rxfldat         :  AG2," &
   "hyp1rxn0            :  AU7," &
   "hyp1rxn1            :  AV6," &
   "hyp1rxn2            :  AU4," &
   "hyp1rxn3            :  AV3," &
   "hyp1rxp0            :  AU8," &
   "hyp1rxp1            :  AV7," &
   "hyp1rxp2            :  AU5," &
   "hyp1rxp3            :  AV4," &
   "hyp1rxpmclk         :  AF3," &
   "hyp1rxpmdat         :  AF4," &
   "hyp1txflclk         :  AH3," &
   "hyp1txfldat         :  AH2," &
   "hyp1txn0            :  AT6," &
   "hyp1txn1            :  AP5," &
   "hyp1txn2            :  AR4," &
   "hyp1txn3            :  AT3," &
   "hyp1txp0            :  AT7," &
   "hyp1txp1            :  AP6," &
   "hyp1txp2            :  AR5," &
   "hyp1txp3            :  AT4," &
   "hyp1txpmclk         :  AH1," &
   "hyp1txpmdat         :  AF2," &
   "mdclk               :  AP31," &
   "mdio                :  AR32," &
   "nmi                 :  AD5," &
   "passclkn            :  AV34," &
   "passclkp            :  AV33," &
   "paclksel            :  AN30," &
   "rsv009              :  AT34," &
   "rsv008              :  AU34," &
   "rsv001              :  P1," &
   "rsv022              :  AM28," &
   "pcieclkn            :  AW32," &
   "pcieclkp            :  AW31," &
   "pcierefres          :  AM26," &
   "pcierxn0            :  AU31," &
   "pcierxn1            :  AV30," &
   "pcierxp0            :  AU32," &
   "pcierxp1            :  AV31," &
   "pcietxn0            :  AT30," &
   "pcietxn1            :  AR29," &
   "pcietxp0            :  AT31," &
   "pcietxp1            :  AR30," &
   "rsv191              :  AP34," &
   "rsv012              :  AK5," &
   "rsv013              :  F23," &
   "rsv014              :  E23," &
   "por                 :  AK4," &
   "rsv192              :  AM30," &
   "resetfull           :  AD3," &
   "resetstat           :  AC5," &
   "reset               :  AD2," &
   "rsv021              :  AM23," &
   "riorefres           :  AM21," &
   "riorxn0             :  AV24," &
   "riorxn1             :  AU22," &
   "riorxn2             :  AW22," &
   "riorxn3             :  AV21," &
   "riorxp0             :  AV25," &
   "riorxp1             :  AU23," &
   "riorxp2             :  AW23," &
   "riorxp3             :  AV22," &
   "riotxn0             :  AT24," &
   "riotxn1             :  AR23," &
   "riotxn2             :  AP22," &
   "riotxn3             :  AT21," &
   "riotxp0             :  AT25," &
   "riotxp1             :  AR24," &
   "riotxp2             :  AP23," &
   "riotxp3             :  AT22," &
   "rsv187              :  AP2," &
   "rsv186              :  AR2," &
   "rsv190              :  AT1," &
   "rsv189              :  AR1," &
   "scl0                :  N1," &
   "scl1                :  N4," &
   "scl2                :  P4," &
   "sda0                :  P3," &
   "sda1                :  N2," &
   "sda2                :  N3," &
   "rsv023              :  AM25," &
   "sgmiirefres         :  AM24," &
   "sgmii0rxn           :  AW28," &
   "sgmii1rxn           :  AV27," &
   "sgmii2rxn           :  AU25," &
   "sgmii3rxn           :  AW25," &
   "sgmii0rxp           :  AW29," &
   "sgmii1rxp           :  AV28," &
   "sgmii2rxp           :  AU26," &
   "sgmii3rxp           :  AW26," &
   "sgmii0txn           :  AU28," &
   "sgmii1txn           :  AT27," &
   "sgmii2txn           :  AR26," &
   "sgmii3txn           :  AP25," &
   "sgmii0txp           :  AU29," &
   "sgmii1txp           :  AT28," &
   "sgmii2txp           :  AR27," &
   "sgmii3txp           :  AP26," &
   "spi0clk             :  B26," &
   "spi0scs0            :  F25," &
   "spi0scs1            :  C25," &
   "spi0scs2            :  E26," &
   "spi0scs3            :  D26," &
   "spi0dout            :  A27," &
   "spi0din             :  A26," &
   "spi1clk             :  C28," &
   "spi1scs0            :  B27," &
   "spi1scs1            :  C27," &
   "spi1scs2            :  D27," &
   "spi1scs3            :  E27," &
   "spi1dout            :  A28," &
   "spi1din             :  F27," &
   "spi2clk             :  D25," &
   "spi2scs0            :  B28," &
   "spi2scs1            :  D28," &
   "spi2scs2            :  A29," &
   "spi2scs3            :  E25," &
   "spi2dout            :  G28," &
   "spi2din             :  F28," &
   "sriosgmiiclkn       :  AW35," &
   "sriosgmiiclkp       :  AW34," &
   "sysclkn             :  AK3," &
   "sysclkout           :  AK1," &
   "sysclkp             :  AL3," &
   "tck                 :  AE1," &
   "tdi                 :  AG1," &
   "tdo                 :  AF1," &
   "armclkn             :  B37," &
   "armclkp             :  C37," &
   "rsv011              :  D38," &
   "rsv010              :  C38," &
   "rsv015              :  E33," &
   "rsv017              :  F26," &
   "rsv016              :  F32," &
   "rsv018              :  G26," &
   "timi0               :  M2," &
   "timi1               :  M1," &
   "timo0               :  M3," &
   "timo1               :  M4," &
   "tms                 :  AE2," &
   "trst                :  AD1," &
   "tscompout           :  AB1," &
   "tspushevt0          :  AC2," &
   "tspushevt1          :  AC1," &
   "tsrefclkn           :  AL1," &
   "tsrefclkp           :  AM1," &
   "tsrxclkout0n        :  AP1," &
   "tsrxclkout0p        :  AN1," &
   "tsrxclkout1n        :  AP3," &
   "tsrxclkout1p        :  AN3," &
   "tssyncevt           :  AC3," &
   "uart0cts            :  L1," &
   "uart0rts            :  L4," &
   "uart0rxd            :  K4," &
   "uart0txd            :  K2," &
   "uart1cts            :  K1," &
   "uart1rts            :  M5," &
   "uart1rxd            :  L2," &
   "uart1txd            :  K3," &
   "usbclkm             :  V2," &
   "usbclkp             :  W2," &
   "usbdm               :  T2," &
   "usbdp               :  U2," &
   "usbdrvvbus          :  L3," &
   "usbid0              :  R1," &
   "usbresref           :  AA1," &
   "usbrx0m             :  Y1," &
   "usbrx0p             :  W1," &
   "usbtx0m             :  V1," &
   "usbtx0p             :  U1," &
   "usbvbus             :  T1," &
   "rsv194              :  AN32," &
   "rsv195              :  AP33," &
   "rsv193              :  AP32," &
   "vcl                 :  AP36," &
   "rsv74               :  AT37," &
   "vcntl0              :  AT39," &
   "rsv76               :  AU36," &
   "vcntl1              :  AR37," &
   "rsv77               :  AV37," &
   "vcntl2              :  AR36," &
   "rsv78               :  AU37," &
   "vcntl3              :  AT38," &
   "rsv79               :  AV36," &
   "vcntl4              :  AU38," &
   "rsv80               :  AU35," &
   "vcntl5              :  AR35," &
   "rsv81               :  AW36," &
   "vd                  :  AP35," &
   "rsv75               :  AT35," &
   "rsv026              :  AN19," &
   "rsv071              :  AU20," &
   "rsv070              :  AU19," &
   "rsv073              :  AR34," &
   "rsv072              :  AT33," &
   "rsv068              :  AN16," &
   "rsv069              :  AM19," &
   "rsv060              :  AV19," &
   "rsv064              :  AW20," &
   "rsv061              :  AV18," &
   "rsv065              :  AW19," &
   "rsv062              :  AT19," &
   "rsv066              :  AR20," &
   "rsv063              :  AT18," &
   "rsv067              :  AR19," &

   "vp     : (AA12)," &
   "vph    : (Y13)," &
   "vptx   : (Y11)," &
   "dvdd33 : (AA14)," &
   "vpp    : (L22, M21)," &
   "vnwa1  : (AG24)," &
   "vnwa2  : (AD11)," &
   "vnwa3  : (M23)," &
   "vnwa4  : (V11)," &
   "avdda1 : (AF11)," &
   "avdda2 : (N20)," &
   "avdda3 : (N28)," &
   "avdda4 : (AH29)," &
   "avdda5 : (AG26)," &
   "avdda6 : (P11)," &
   "avdda7 : (M13)," &
   "avdda8 : (M15)," &
   "avdda9 : (M18)," &
   "avdda10 : (M20)," &
   "avdda11 : (Y28)," &
   "avdda12 : (AB28)," &
   "avdda13 : (AC28)," &
   "avdda14: (AD28)," &
   "avdda15 : (AE28)," &
   "vddahv : (AK11, AK13, AK15, AK17, AK19, AK21, AK23, AK25, AL10, AL12, AL14, AL16, AL18, AL20, AL22, AL24)," &
   "cvdd   : (H31, J30, K29, L28, M27, N24, N26, P23, P25, R24, R26, T23, T25, U24, U26, V23, V25, W24, W26," &
             "AA10, AA16, AA18, AA20, AA22, AA24, AA26, AA8, AB11, AB15, AB17, AB19, AB21, AB23, AB25, AB27, AB9, AC10, AC12," &
             "AC14, AC16, AC20, AC22, AC24, AC26, AC8, AD13, AD15, AD21, AD23, AD25, AD27, AD9, AE10, AE12, AE14, AE16, AE18," &
             "AE20, AE22, AE24, AE26, AE8, AF25, AF27, AF9, AG10, AG28, AG8, AH27, AH9, AJ10, AJ28, AJ8, AK29, AK7, AK9, AL30," &
             "AL6, AL8, AM31, AM5, L6, M25, M7, M9, N10, N12, N14, N16, N18, N22, N6, N8, P13, P15, P17, P19, P21, P27, P7, P9," &
             "R10, R12, R14, R16, R18, R20, R8, T11, T15, T17, T19, T27, T9, U10, U12, U18, U8, V15, V19, V27, V9, W10, W12, W14," &
             "W18, W20, W8, Y15, Y17, Y19, Y21, Y23, Y25, Y27, Y9)," &
   "cvdd1  : (T13, U14, V13, U16, V17, W16, T21, U20, V21, AC18, AD17, AD19)," &
   "cvddt1 : (R22, U22, W22)," &
   "dvdd15 : (H11, H13, H15, H17, H19, H21, H23, H7, H9, J10, J12, J14, J16, J18, J20, J22, J6, J8, K11, K13, K15, K17, K19, Y31," &
             "K21, K23, K7, K9, L10, L12, L14, L16, L18, L20, L8, M11, M17, M19, AA28, AA30, AB29, AB31, AC30, AD29, AD31, AE30," &
             "AF29, AF31, AG30, AH31, AJ30, AK31, AL32, L32, M31, P29, P31, R28, R30, T29, T31, U28, U30, V29, V31, W28, W30, Y29)," &
   "vddusb : (AB13)," &
   "dvdd18 : (H25, H27, J26, J28, K25, K27, L24, L26, AJ26, AK27, AL26, AL28, AM27, AM29, AA6, AB5, AB7, AC6, AD7, AE6, AF7, AG6," &
             "R6, T7, U6, V5, V7, W6, Y5, Y7, J32, K31, L30, M29, N30)," &
   "vddalv : (AF13, AF15, AF17, AF19, AF21, AF23, AG12, AG14, AG16, AG18, AG20, AG22, AH11, AH13, AH15, AH17, AH19, AH21, AH23," &
             "AH25, AJ12, AJ14, AJ16, AJ18, AJ20, AJ22, AJ24)," &

   "vss  : (A2, A3, A37, A38, AA11, AA13, AA15, AA17, AA19, AA21, AA23, AA25, AA27, AA29, AA35, AA5, AA7, AA9, AB10, AB12, AB14," &
           "AB16, AB18, AB20, AB22, AB24, AB26, AB30, AB33, AB36, AB37, AB6, AB8, AC11, AC13, AC15, AC17, AC19, AC21, AC23, AC25," &
           "AC27, AC29, AC35, AC7, AC9, AD10, AD12, AD14, AD16, AD18, AD20, AD22, AD24, AD26, AD30, AD33, AD37, AD6, AD8, AE11," &
           "AE13, AE15, AE17, AE19, AE21, AE23, AE25, AE27, AE29, AE3, AE31, AE35, AE7, AE9, AF10, AF12, AF14, AF16, AF18, AF20," &
           "AF22, AF24, AF26, AF28, AF30, AF33, AF37, AF6, AF8, AG11, AG13, AG15, AG17, AG19, AG21, AG23, AG25, AG27, AG29, AG31," &
           "AG35, AG4, AG7, AG9, AH10, AH12, AH14, AH16, AH18, AH20, AH22, AH24, AH26, AH28, AH30, AH33, AH37, AH6, AH7, AH8, AJ11," &
           "AJ13, AJ15, AJ17, AJ19, AJ21, AJ23, AJ25, AJ27, AJ29, AJ31, AJ32, AJ35, AJ6, AJ7, AJ9, AK10, AK12, AK14, AK16, AK18," &
           "AK2, AK20, AK22, AK24, AK26, AK28, AK30, AK33, AK37, AK6, AK8, AL11, AL13, AL15, AL17, AL19, AL21, AL23, AL25, AL27," &
           "AL29, AL31, AL35, AL5, AL7, AL9, AM10, AM12, AM13, AM17, AM18, AM20, AM22, AM3, AM32, AM33, AM37, AM8, AN11, AN12, AN13," &
           "AN14, AN15, AN17, AN18, AN2, AN20, AN21, AN22, AN23, AN24, AN25, AN26, AN27, AN28, AN29, AN31, AN35, AN5, AN6, AN7, AN8," &
           "AN9, AP10, AP13, AP16, AP19, AP20, AP21, AP24, AP27, AP28, AP29, AP30, AP37, AP4, AP7, AR12, AR15, AR18, AR21, AR22," &
           "AR25, AR28, AR3, AR31, AR33, AR6, AR9, AT11, AT14, AT17, AT2, AT20, AT23, AT26, AT29, AT32, AT36, AT5, AT8, AU1, AU12," &
           "AU15, AU18, AU2, AU21, AU24, AU27, AU3, AU30, AU33, AU39, AU6, AU9, AV1, AV11, AV14, AV17, AV2, AV20, AV23, AV26, AV29," &
           "AV32, AV35, AV38, AV39, AV5, AV8, AW12, AW15, AW18, AW2, AW21, AW24, AW27, AW3, AW30, AW33, AW37, AW38, AW6, AW9, B1," &
           "B2, B38, B39, C1, C10, C12, C14, C16, C18, C20, C22, C24, C26, C29, C32, C39, C4, C6, C8, D34, D37, E11, E13, E15, E17," &
           "E19, E21, E28, E3, E5, E7, E9, G23, G25, G27, G29, G31, G35, H12, H14, H18, H20, H24, H26, H28, H29, H30, H32, H37, H4," &
           "H6, H8, J1, J11, J13, J15, J17, J19, J2, J21, J23, J24, J25, J27, J29, J3, J31, J33, J4, J5, J7, J9, K10, K12, K14, K16," &
           "K18, K20, K22, K24, K26, K28, K30, K32, K35, K5, K6, K8, L11, L13, L15, L17, L19, L21, L23, L25, L27, L29, L31, L37, L5," &
           "L7, L9, M10, M12, M14, M16, M22, M24, M26, M28, M30, M33, M6, M8, N11, N13, N15, N17, N19, N21, N23, N25, N27, N29, N31," &
           "N35, N5, N7, N9, P10, P12, P14, P16, P18, P20, P22, P24, P26, P28, P30, P33, P37, P5, P6, P8, R11, R13, R15, R17, R19," &
           "R2, R21, R23, R25, R27, R29, R31, R35, R5, R7, R9, T10, T12, T14, T16, T18, T20, T22, T24, T26, T28, T30, T33, T37, T6," &
           "T8, U11, U13, U15, U17, U19, U21, U23, U25, U27, U29, U31, U35, U7, U9, V10, V12, V14, V16, V18, V20, V22, V24, V26, V28," &
           "V3, V30, V33, V37, V6, V8, W11, W13, W15, W17, W19, W21, W23, W25, W27, W29, W31, W35, W5, W7, W9, Y10, Y12, Y14, Y16, Y18," &
           "Y2, Y20, Y22, Y24, Y26, Y30, Y33, Y37, Y6, Y8)";

 attribute PORT_GROUPING of TI66AK2H06_12 : entity is
    "Differential_Voltage  (                "&
    "(hyp0txp0, hyp0txn0),                  "&
    "(hyp0txp1, hyp0txn1),                  "&
    "(hyp0txp2, hyp0txn2),                  "&
    "(hyp0txp3, hyp0txn3),                  "&
    "(hyp1txp0, hyp1txn0),                  "&
    "(hyp1txp1, hyp1txn1),                  "&
    "(hyp1txp2, hyp1txn2),                  "&
    "(hyp1txp3, hyp1txn3),                  "&
    "(hyp0rxp0, hyp0rxn0),                  "&
    "(hyp0rxp1, hyp0rxn1),                  "&
    "(hyp0rxp2, hyp0rxn2),                  "&
    "(hyp0rxp3, hyp0rxn3),                  "&
    "(hyp1rxp0, hyp1rxn0),                  "&
    "(hyp1rxp1, hyp1rxn1),                  "&
    "(hyp1rxp2, hyp1rxn2),                  "&
    "(hyp1rxp3, hyp1rxn3),                  "&
    "(riotxp0, riotxn0),                    "&
    "(riotxp1, riotxn1),                    "&
    "(riotxp2, riotxn2),                    "&
    "(riotxp3, riotxn3),                    "&
    "(riorxp0, riorxn0),                    "&
    "(riorxp1, riorxn1),                    "&
    "(riorxp2, riorxn2),                    "&
    "(riorxp3, riorxn3),                    "&
    "(pcietxp0, pcietxn0),                  "&
    "(pcietxp1, pcietxn1),                  "&
    "(pcierxp0, pcierxn0),                  "&
    "(pcierxp1, pcierxn1),                  "&
    "(sgmii0txp, sgmii0txn),                "&
    "(sgmii1txp, sgmii1txn),                "&
    "(sgmii2txp, sgmii2txn),                "&
    "(sgmii3txp, sgmii3txn),                "&
    "(sgmii0rxp, sgmii0rxn),                "&
    "(sgmii1rxp, sgmii1rxn),                "&
    "(sgmii2rxp, sgmii2rxn),                "&
    "(sgmii3rxp, sgmii3rxn),                "&
    "(rsv063, rsv062),                      "&
    "(rsv067, rsv066),                      "&
    "(rsv061, rsv060),                      "&
    "(rsv065, rsv064),                      "&
    "(rsv174, rsv173),                      "&
    "(rsv176, rsv175),                      "&
    "(rsv178, rsv177),                      "&
    "(rsv180, rsv179),                      "&
    "(rsv182, rsv181),                      "&
    "(rsv184, rsv183),                      "&
    "(rsv162, rsv161),                      "&
    "(rsv164, rsv163),                      "&
    "(rsv166, rsv165),                      "&
    "(rsv168, rsv167),                      "&
    "(rsv170, rsv169),                      "&
    "(rsv172, rsv171),                      "&
    "(altcoreclkp, altcoreclkn),            "&
    "(rsv002, rsv003),                      "&
    "(rsv004, rsv005),                      "&
    "(rsv006, rsv007),                      "&
    "(sriosgmiiclkp, sriosgmiiclkn),        "&
    "(sysclkp, sysclkn),                    "&
    "(ddr3aclkp, ddr3aclkn),                "&
    "(ddr3bclkp, ddr3bclkn),                "&
    "(passclkp, passclkn),                  "&
    "(rsv186, rsv187),                      "&
    "(rsv189, rsv190),                      "&
    "(tsrefclkp, tsrefclkn),                "&
    "(armclkp, armclkn),                    "&
    "(tsrxclkout0p, tsrxclkout0n),          "&
    "(tsrxclkout1p, tsrxclkout1n),          "&
    "(rsv008, rsv009))                      ";

attribute TAP_SCAN_IN    of tdi    : signal is true;
attribute TAP_SCAN_MODE  of tms    : signal is true;
attribute TAP_SCAN_OUT   of tdo    : signal is true;
attribute TAP_SCAN_CLOCK of tck    : signal is (20.0e6,BOTH);
attribute TAP_SCAN_RESET of trst   : signal is true;

attribute COMPLIANCE_PATTERNS of TI66AK2H06_12 : entity is "(por, resetfull)(11)";
attribute INSTRUCTION_LENGTH  of TI66AK2H06_12 : entity is 6;
attribute INSTRUCTION_OPCODE  of TI66AK2H06_12 : entity is
      "private_0       (000010),      "&
      "IDCODE          (000100),      "&
      "private_1       (000101),      "&
      "private_2       (000111),      "&
      "private_3       (001000),      "&
      "private_4       (010111),      "&
      "EXTEST          (011000),      "&
      "private_5       (011001),      "&
      "private_6       (011010),      "&
      "SAMPLE          (011011),      "&
      "PRELOAD         (011100),      "&
      "private_7       (011101),      "&
      "private_8       (011110),      "&
      "private_9       (011111),      "&
      "EXTEST_PULSE    (100100),      "&
      "EXTEST_TRAIN    (100101),      "&
      "private_a       (110001),      "&
      "BYPASS          (000000,111111)";

 attribute INSTRUCTION_CAPTURE of TI66AK2H06_12 : entity is "000001";

 attribute INSTRUCTION_PRIVATE of TI66AK2H06_12 : entity is
      "private_0,    " &
      "private_1,    " &
      "private_2,    " &
      "private_3,    " &
      "private_4,    " &
      "private_5,    " &
      "private_6,    " &
      "private_7,    " &
      "private_8,    " &
      "private_9,    " &
      "private_a";

 attribute IDCODE_REGISTER     of TI66AK2H06_12 : entity is
      "0000" &
      "1011100110000001" &
      "00000010111" &
      "1";
 attribute REGISTER_ACCESS of TI66AK2H06_12 : entity is
      "BOUNDARY      (EXTEST),         "&
      "BOUNDARY      (SAMPLE),         "&
      "BOUNDARY      (PRELOAD),        "&
      "DEVICE_ID     (IDCODE),         "&
      "GEN_REG1[1]   (private_0),      "&
      "GEN_REG32[32] (private_1),      "&
      "GEN_REG8[8]   (private_2),      "&
      "GEN_REG32[32] (private_3),      "&
      "GEN_REG1[1]   (private_4),      "&
      "GEN_REG1[1]   (private_5),      "&
      "GEN_REG1[1]   (private_6),      "&
      "GEN_REG1[1]   (private_7),      "&
      "GEN_REG1[1]   (private_8),      "&
      "GEN_REG1[1]   (private_9),      "&
      "BOUNDARY      (EXTEST_PULSE),   "&
      "BOUNDARY      (EXTEST_TRAIN),   "&
      "GEN_REG1[1]   (private_a),      "&
      "BYPASS        (BYPASS)          ";

  attribute BOUNDARY_LENGTH of TI66AK2H06_12 : entity is 1060;

attribute BOUNDARY_REGISTER of TI66AK2H06_12 : entity is

     " 1059 (AC_SELU, *              ,  internal       , 0                  ),"&
     " 1058 (AC_1, rsv182            ,  output2        , X                  ),"&
     " 1057 (BC_4, rsv169            ,  observe_only   , X                  ),"&
     " 1056 (BC_4, rsv170            ,  observe_only   , X                  ),"&
     " 1055 (AC_1, rsv184            ,  output2        , X                  ),"&
     " 1054 (BC_4, rsv171            ,  observe_only   , X                  ),"&
     " 1053 (BC_4, rsv172            ,  observe_only   , X                  ),"&
     " 1052 (AC_1, rsv174            ,  output2        , X                  ),"&
     " 1051 (BC_4, rsv161            ,  observe_only   , X                  ),"&
     " 1050 (BC_4, rsv162            ,  observe_only   , X                  ),"&
     " 1049 (AC_1, rsv176            ,  output2        , X                  ),"&
     " 1048 (BC_4, rsv163            ,  observe_only   , X                  ),"&
     " 1047 (BC_4, rsv164            ,  observe_only   , X                  ),"&
     " 1046 (AC_1, rsv178            ,  output2        , X                  ),"&
     " 1045 (BC_4, rsv165            ,  observe_only   , X                  ),"&
     " 1044 (BC_4, rsv166            ,  observe_only   , X                  ),"&
     " 1043 (AC_1, rsv180            ,  output2        , X                  ),"&
     " 1042 (BC_4, rsv167            ,  observe_only   , X                  ),"&
     " 1041 (BC_4, rsv168            ,  observe_only   , X                  ),"&
     " 1040 (AC_1, pcietxp0          ,  output2        , X                  ),"&
     " 1039 (BC_4, pcierxn0          ,  observe_only   , X                  ),"&
     " 1038 (BC_4, pcierxp0          ,  observe_only   , X                  ),"&
     " 1037 (AC_1, pcietxp1          ,  output2        , X                  ),"&
     " 1036 (BC_4, pcierxn1          ,  observe_only   , X                  ),"&
     " 1035 (BC_4, pcierxp1          ,  observe_only   , X                  ),"&
     " 1034 (AC_1, sgmii0txp         ,  output2        , X                  ),"&
     " 1033 (BC_4, sgmii0rxn         ,  observe_only   , X                  ),"&
     " 1032 (BC_4, sgmii0rxp         ,  observe_only   , X                  ),"&
     " 1031 (AC_1, sgmii1txp         ,  output2        , X                  ),"&
     " 1030 (BC_4, sgmii1rxn         ,  observe_only   , X                  ),"&
     " 1029 (BC_4, sgmii1rxp         ,  observe_only   , X                  ),"&
     " 1028 (AC_1, sgmii2txp         ,  output2        , X                  ),"&
     " 1027 (BC_4, sgmii2rxn         ,  observe_only   , X                  ),"&
     " 1026 (BC_4, sgmii2rxp         ,  observe_only   , X                  ),"&
     " 1025 (AC_1, sgmii3txp         ,  output2        , X                  ),"&
     " 1024 (BC_4, sgmii3rxn         ,  observe_only   , X                  ),"&
     " 1023 (BC_4, sgmii3rxp         ,  observe_only   , X                  ),"&
     " 1022 (AC_1, riotxp0           ,  output2        , X                  ),"&
     " 1021 (BC_4, riorxn0           ,  observe_only   , X                  ),"&
     " 1020 (BC_4, riorxp0           ,  observe_only   , X                  ),"&
     " 1019 (AC_1, riotxp1           ,  output2        , X                  ),"&
     " 1018 (BC_4, riorxn1           ,  observe_only   , X                  ),"&
     " 1017 (BC_4, riorxp1           ,  observe_only   , X                  ),"&
     " 1016 (BC_1, riotxp2           ,  output2        , X                  ),"&
     " 1015 (BC_4, riorxn2           ,  observe_only   , X                  ),"&
     " 1014 (BC_4, riorxp2           ,  observe_only   , X                  ),"&
     " 1013 (AC_1, riotxp3           ,  output2        , X                  ),"&
     " 1012 (BC_4, riorxn3           ,  observe_only   , X                  ),"&
     " 1011 (BC_4, riorxp3           ,  observe_only   , X                  ),"&
     " 1010 (AC_1, hyp0txp0          ,  output2        , X                  ),"&
     " 1009 (BC_4, hyp0rxn0          ,  observe_only   , X                  ),"&
     " 1008 (BC_4, hyp0rxp0          ,  observe_only   , X                  ),"&
     " 1007 (AC_1, hyp0txp1          ,  output2        , X                  ),"&
     " 1006 (BC_4, hyp0rxn1          ,  observe_only   , X                  ),"&
     " 1005 (BC_4, hyp0rxp1          ,  observe_only   , X                  ),"&
     " 1004 (AC_1, hyp0txp2          ,  output2        , X                  ),"&
     " 1003 (BC_4, hyp0rxn2          ,  observe_only   , X                  ),"&
     " 1002 (BC_4, hyp0rxp2          ,  observe_only   , X                  ),"&
     " 1001 (AC_1, hyp0txp3          ,  output2        , X                  ),"&
     " 1000 (BC_4, hyp0rxn3          ,  observe_only   , X                  ),"&
     "  999 (BC_4, hyp0rxp3          ,  observe_only   , X                  ),"&
     "  998 (AC_1, hyp1txp0          ,  output2        , X                  ),"&
     "  997 (BC_4, hyp1rxn0          ,  observe_only   , X                  ),"&
     "  996 (BC_4, hyp1rxp0          ,  observe_only   , X                  ),"&
     "  995 (AC_1, hyp1txp1          ,  output2        , X                  ),"&
     "  994 (BC_4, hyp1rxn1          ,  observe_only   , X                  ),"&
     "  993 (BC_4, hyp1rxp1          ,  observe_only   , X                  ),"&
     "  992 (AC_1, hyp1txp2          ,  output2        , X                  ),"&
     "  991 (BC_4, hyp1rxn2          ,  observe_only   , X                  ),"&
     "  990 (BC_4, hyp1rxp2          ,  observe_only   , X                  ),"&
     "  989 (AC_1, hyp1txp3          ,  output2        , X                  ),"&
     "  988 (BC_4, hyp1rxn3          ,  observe_only   , X                  ),"&
     "  987 (BC_4, hyp1rxp3          ,  observe_only   , X                  ),"&
     "  986 (AC_1, rsv063            ,  output2        , X                  ),"&
     "  985 (BC_4, rsv060            ,  observe_only   , X                  ),"&
     "  984 (BC_4, rsv061            ,  observe_only   , X                  ),"&
     "  983 (AC_1, rsv067            ,  output2        , X                  ),"&
     "  982 (BC_4, rsv064            ,  observe_only   , X                  ),"&
     "  981 (BC_4, rsv065            ,  observe_only   , X                  ),"&
     "  980 (BC_7, gpio00            ,  bidir          , X,  979, 1, PULL1  ),"&
     "  979 (BC_2, *                 ,  control        , 1                  ),"&
     "  978 (BC_7, gpio01            ,  bidir          , X,  977, 1, PULL0  ),"&
     "  977 (BC_2, *                 ,  control        , 1                  ),"&
     "  976 (BC_7, gpio02            ,  bidir          , X,  975, 1, PULL0  ),"&
     "  975 (BC_2, *                 ,  control        , 1                  ),"&
     "  974 (BC_7, gpio03            ,  bidir          , X,  973, 1, PULL0  ),"&
     "  973 (BC_2, *                 ,  control        , 1                  ),"&
     "  972 (BC_7, gpio04            ,  bidir          , X,  971, 1, PULL0  ),"&
     "  971 (BC_2, *                 ,  control        , 1                  ),"&
     "  970 (BC_7, gpio05            ,  bidir          , X,  969, 1, PULL0  ),"&
     "  969 (BC_2, *                 ,  control        , 1                  ),"&
     "  968 (BC_7, gpio06            ,  bidir          , X,  967, 1, PULL0  ),"&
     "  967 (BC_2, *                 ,  control        , 1                  ),"&
     "  966 (BC_7, gpio07            ,  bidir          , X,  965, 1, PULL0  ),"&
     "  965 (BC_2, *                 ,  control        , 1                  ),"&
     "  964 (BC_7, gpio08            ,  bidir          , X,  963, 1, PULL0  ),"&
     "  963 (BC_2, *                 ,  control        , 1                  ),"&
     "  962 (BC_7, gpio09            ,  bidir          , X,  961, 1, PULL0  ),"&
     "  961 (BC_2, *                 ,  control        , 1                  ),"&
     "  960 (BC_7, gpio10            ,  bidir          , X,  959, 1, PULL0  ),"&
     "  959 (BC_2, *                 ,  control        , 1                  ),"&
     "  958 (BC_7, gpio11            ,  bidir          , X,  957, 1, PULL0  ),"&
     "  957 (BC_2, *                 ,  control        , 1                  ),"&
     "  956 (BC_7, gpio12            ,  bidir          , X,  955, 1, PULL0  ),"&
     "  955 (BC_2, *                 ,  control        , 1                  ),"&
     "  954 (BC_7, gpio13            ,  bidir          , X,  953, 1, PULL0  ),"&
     "  953 (BC_2, *                 ,  control        , 1                  ),"&
     "  952 (BC_7, gpio14            ,  bidir          , X,  951, 1, PULL0  ),"&
     "  951 (BC_2, *                 ,  control        , 1                  ),"&
     "  950 (BC_7, gpio15            ,  bidir          , X,  949, 1, PULL0  ),"&
     "  949 (BC_2, *                 ,  control        , 1                  ),"&
     "  948 (BC_7, gpio16            ,  bidir          , X,  947, 1, PULL0  ),"&
     "  947 (BC_2, *                 ,  control        , 1                  ),"&
     "  946 (BC_7, gpio17            ,  bidir          , X,  945, 1, PULL0  ),"&
     "  945 (BC_2, *                 ,  control        , 1                  ),"&
     "  944 (BC_7, gpio18            ,  bidir          , X,  943, 1, PULL0  ),"&
     "  943 (BC_2, *                 ,  control        , 1                  ),"&
     "  942 (BC_7, gpio19            ,  bidir          , X,  941, 1, PULL0  ),"&
     "  941 (BC_2, *                 ,  control        , 1                  ),"&
     "  940 (BC_7, gpio20            ,  bidir          , X,  939, 1, PULL0  ),"&
     "  939 (BC_2, *                 ,  control        , 1                  ),"&
     "  938 (BC_7, gpio21            ,  bidir          , X,  937, 1, PULL0  ),"&
     "  937 (BC_2, *                 ,  control        , 1                  ),"&
     "  936 (BC_7, gpio22            ,  bidir          , X,  935, 1, PULL0  ),"&
     "  935 (BC_2, *                 ,  control        , 1                  ),"&
     "  934 (BC_7, gpio23            ,  bidir          , X,  933, 1, PULL0  ),"&
     "  933 (BC_2, *                 ,  control        , 1                  ),"&
     "  932 (BC_7, gpio24            ,  bidir          , X,  931, 1, PULL0  ),"&
     "  931 (BC_2, *                 ,  control        , 1                  ),"&
     "  930 (BC_7, gpio25            ,  bidir          , X,  929, 1, PULL0  ),"&
     "  929 (BC_2, *                 ,  control        , 1                  ),"&
     "  928 (BC_7, gpio26            ,  bidir          , X,  927, 1, PULL0  ),"&
     "  927 (BC_2, *                 ,  control        , 1                  ),"&
     "  926 (BC_7, gpio27            ,  bidir          , X,  925, 1, PULL0  ),"&
     "  925 (BC_2, *                 ,  control        , 1                  ),"&
     "  924 (BC_7, gpio28            ,  bidir          , X,  923, 1, PULL0  ),"&
     "  923 (BC_2, *                 ,  control        , 1                  ),"&
     "  922 (BC_7, gpio29            ,  bidir          , X,  921, 1, PULL0  ),"&
     "  921 (BC_2, *                 ,  control        , 1                  ),"&
     "  920 (BC_7, gpio30            ,  bidir          , X,  919, 1, PULL0  ),"&
     "  919 (BC_2, *                 ,  control        , 1                  ),"&
     "  918 (BC_7, gpio31            ,  bidir          , X,  917, 1, PULL0  ),"&
     "  917 (BC_2, *                 ,  control        , 1                  ),"&
     "  916 (BC_7, emu00             ,  bidir          , X,  915, 1, PULL1  ),"&
     "  915 (BC_2, *                 ,  control        , 1                  ),"&
     "  914 (BC_7, emu01             ,  bidir          , X,  913, 1, PULL1  ),"&
     "  913 (BC_2, *                 ,  control        , 1                  ),"&
     "  912 (BC_7, emu02             ,  bidir          , X,  911, 1, PULL1  ),"&
     "  911 (BC_2, *                 ,  control        , 1                  ),"&
     "  910 (BC_7, emu03             ,  bidir          , X,  909, 1, PULL1  ),"&
     "  909 (BC_2, *                 ,  control        , 1                  ),"&
     "  908 (BC_7, emu04             ,  bidir          , X,  907, 1, PULL1  ),"&
     "  907 (BC_2, *                 ,  control        , 1                  ),"&
     "  906 (BC_7, emu05             ,  bidir          , X,  905, 1, PULL1  ),"&
     "  905 (BC_2, *                 ,  control        , 1                  ),"&
     "  904 (BC_7, emu06             ,  bidir          , X,  903, 1, PULL1  ),"&
     "  903 (BC_2, *                 ,  control        , 1                  ),"&
     "  902 (BC_7, emu07             ,  bidir          , X,  901, 1, PULL1  ),"&
     "  901 (BC_2, *                 ,  control        , 1                  ),"&
     "  900 (BC_7, emu08             ,  bidir          , X,  899, 1, PULL1  ),"&
     "  899 (BC_2, *                 ,  control        , 1                  ),"&
     "  898 (BC_7, emu09             ,  bidir          , X,  897, 1, PULL1  ),"&
     "  897 (BC_2, *                 ,  control        , 1                  ),"&
     "  896 (BC_7, emu10             ,  bidir          , X,  895, 1, PULL1  ),"&
     "  895 (BC_2, *                 ,  control        , 1                  ),"&
     "  894 (BC_7, emu11             ,  bidir          , X,  893, 1, PULL1  ),"&
     "  893 (BC_2, *                 ,  control        , 1                  ),"&
     "  892 (BC_7, emu12             ,  bidir          , X,  891, 1, PULL1  ),"&
     "  891 (BC_2, *                 ,  control        , 1                  ),"&
     "  890 (BC_7, emu13             ,  bidir          , X,  889, 1, PULL1  ),"&
     "  889 (BC_2, *                 ,  control        , 1                  ),"&
     "  888 (BC_7, emu14             ,  bidir          , X,  887, 1, PULL1  ),"&
     "  887 (BC_2, *                 ,  control        , 1                  ),"&
     "  886 (BC_7, emu15             ,  bidir          , X,  885, 1, PULL1  ),"&
     "  885 (BC_2, *                 ,  control        , 1                  ),"&
     "  884 (BC_7, emu16             ,  bidir          , X,  883, 1, PULL1  ),"&
     "  883 (BC_2, *                 ,  control        , 1                  ),"&
     "  882 (BC_7, emu17             ,  bidir          , X,  881, 1, PULL1  ),"&
     "  881 (BC_2, *                 ,  control        , 1                  ),"&
     "  880 (BC_7, emu18             ,  bidir          , X,  879, 1, PULL1  ),"&
     "  879 (BC_2, *                 ,  control        , 1                  ),"&
     "  878 (BC_7, rsv000            ,  bidir          , X,  877, 1, PULL0  ),"&
     "  877 (BC_2, *                 ,  control        , 1                  ),"&
     "  876 (BC_7, rsv001            ,  bidir          , X,  875, 1, PULL0  ),"&
     "  875 (BC_2, *                 ,  control        , 1                  ),"&
     "  874 (BC_1, scl0              ,  output2        , 1,  874, 1, WEAK1  ),"&
     "  873 (BC_1, *                 ,  internal       , 0                  ),"&
     "  872 (BC_3, scl0              ,  input          , X                  ),"&
     "  871 (BC_1, sda0              ,  output2        , 1,  871, 1, WEAK1  ),"&
     "  870 (BC_1, *                 ,  internal       , 0                  ),"&
     "  869 (BC_3, sda0              ,  input          , X                  ),"&
     "  868 (BC_1, scl1              ,  output2        , 1,  868, 1, WEAK1  ),"&
     "  867 (BC_1, *                 ,  internal       , 0                  ),"&
     "  866 (BC_3, scl1              ,  input          , X                  ),"&
     "  865 (BC_1, sda1              ,  output2        , 1,  865, 1, WEAK1  ),"&
     "  864 (BC_1, *                 ,  internal       , 0                  ),"&
     "  863 (BC_3, sda1              ,  input          , X                  ),"&
     "  862 (BC_1, scl2              ,  output2        , 1,  862, 1, WEAK1  ),"&
     "  861 (BC_1, *                 ,  internal       , 0                  ),"&
     "  860 (BC_3, scl2              ,  input          , X                  ),"&
     "  859 (BC_1, sda2              ,  output2        , 1,  859, 1, WEAK1  ),"&
     "  858 (BC_1, *                 ,  internal       , 0                  ),"&
     "  857 (BC_3, sda2              ,  input          , X                  ),"&
     "  856 (BC_7, timi0             ,  bidir          , X,  855, 1, PULL0  ),"&
     "  855 (BC_2, *                 ,  control        , 1                  ),"&
     "  854 (BC_7, timi1             ,  bidir          , X,  853, 1, PULL0  ),"&
     "  853 (BC_2, *                 ,  control        , 1                  ),"&
     "  852 (BC_7, timo0             ,  bidir          , X,  851, 1, PULL0  ),"&
     "  851 (BC_2, *                 ,  control        , 1                  ),"&
     "  850 (BC_7, timo1             ,  bidir          , X,  849, 1, PULL0  ),"&
     "  849 (BC_2, *                 ,  control        , 1                  ),"&
     "  848 (BC_7, spi0scs0          ,  bidir          , X,  847, 1, PULL1  ),"&
     "  847 (BC_2, *                 ,  control        , 1                  ),"&
     "  846 (BC_7, spi0scs1          ,  bidir          , X,  845, 1, PULL1  ),"&
     "  845 (BC_2, *                 ,  control        , 1                  ),"&
     "  844 (BC_7, spi0scs2          ,  bidir          , X,  843, 1, PULL1  ),"&
     "  843 (BC_2, *                 ,  control        , 1                  ),"&
     "  842 (BC_7, spi0scs3          ,  bidir          , X,  841, 1, PULL1  ),"&
     "  841 (BC_2, *                 ,  control        , 1                  ),"&
     "  840 (BC_7, spi0clk           ,  bidir          , X,  839, 1, PULL0  ),"&
     "  839 (BC_2, *                 ,  control        , 1                  ),"&
     "  838 (BC_7, spi0din           ,  bidir          , X,  837, 1, PULL0  ),"&
     "  837 (BC_2, *                 ,  control        , 1                  ),"&
     "  836 (BC_7, spi0dout          ,  bidir          , X,  835, 1, PULL0  ),"&
     "  835 (BC_2, *                 ,  control        , 1                  ),"&
     "  834 (BC_7, spi1scs0          ,  bidir          , X,  833, 1, PULL1  ),"&
     "  833 (BC_2, *                 ,  control        , 1                  ),"&
     "  832 (BC_7, spi1scs1          ,  bidir          , X,  831, 1, PULL1  ),"&
     "  831 (BC_2, *                 ,  control        , 1                  ),"&
     "  830 (BC_7, spi1scs2          ,  bidir          , X,  829, 1, PULL1  ),"&
     "  829 (BC_2, *                 ,  control        , 1                  ),"&
     "  828 (BC_7, spi1scs3          ,  bidir          , X,  827, 1, PULL1  ),"&
     "  827 (BC_2, *                 ,  control        , 1                  ),"&
     "  826 (BC_7, spi1clk           ,  bidir          , X,  825, 1, PULL0  ),"&
     "  825 (BC_2, *                 ,  control        , 1                  ),"&
     "  824 (BC_7, spi1din           ,  bidir          , X,  823, 1, PULL0  ),"&
     "  823 (BC_2, *                 ,  control        , 1                  ),"&
     "  822 (BC_7, spi1dout          ,  bidir          , X,  821, 1, PULL0  ),"&
     "  821 (BC_2, *                 ,  control        , 1                  ),"&
     "  820 (BC_7, spi2scs0          ,  bidir          , X,  819, 1, PULL1  ),"&
     "  819 (BC_2, *                 ,  control        , 1                  ),"&
     "  818 (BC_7, spi2scs1          ,  bidir          , X,  817, 1, PULL1  ),"&
     "  817 (BC_2, *                 ,  control        , 1                  ),"&
     "  816 (BC_7, spi2scs2          ,  bidir          , X,  815, 1, PULL1  ),"&
     "  815 (BC_2, *                 ,  control        , 1                  ),"&
     "  814 (BC_7, spi2scs3          ,  bidir          , X,  813, 1, PULL1  ),"&
     "  813 (BC_2, *                 ,  control        , 1                  ),"&
     "  812 (BC_7, spi2clk           ,  bidir          , X,  811, 1, PULL0  ),"&
     "  811 (BC_2, *                 ,  control        , 1                  ),"&
     "  810 (BC_7, spi2din           ,  bidir          , X,  809, 1, PULL0  ),"&
     "  809 (BC_2, *                 ,  control        , 1                  ),"&
     "  808 (BC_7, spi2dout          ,  bidir          , X,  807, 1, PULL0  ),"&
     "  807 (BC_2, *                 ,  control        , 1                  ),"&
     "  806 (BC_1, sysclkp           ,  input          , X                  ),"&
     "  805 (BC_1, passclkp          ,  input          , X                  ),"&
     "  804 (BC_1, altcoreclkp       ,  input          , X                  ),"&
     "  803 (BC_1, sriosgmiiclkp     ,  input          , X                  ),"&
     "  802 (BC_1, ddr3aclkp         ,  input          , X                  ),"&
     "  801 (BC_1, ddr3bclkp         ,  input          , X                  ),"&
     "  800 (BC_1, armclkp           ,  input          , X                  ),"&
     "  799 (BC_7, sysclkout         ,  bidir          , X,  798, 1, PULL0  ),"&
     "  798 (BC_2, *                 ,  control        , 1                  ),"&
     "  797 (BC_1, coreclksel        ,  input          , X                  ),"&
     "  796 (BC_1, paclksel          ,  input          , X                  ),"&
     "  795 (BC_7, hout              ,  bidir          , X,  794, 1, PULL1  ),"&
     "  794 (BC_2, *                 ,  control        , 1                  ),"&
     "  793 (BC_7, nmi               ,  bidir          , X,  792, 1, PULL1  ),"&
     "  792 (BC_2, *                 ,  control        , 1                  ),"&
     "  791 (BC_7, lreset            ,  bidir          , X,  790, 1, PULL1  ),"&
     "  790 (BC_2, *                 ,  control        , 1                  ),"&
     "  789 (BC_7, lresetnmien       ,  bidir          , X,  788, 1, PULL1  ),"&
     "  788 (BC_2, *                 ,  control        , 1                  ),"&
     "  787 (BC_7, coresel0          ,  bidir          , X,  786, 1, PULL0  ),"&
     "  786 (BC_2, *                 ,  control        , 1                  ),"&
     "  785 (BC_7, coresel1          ,  bidir          , X,  784, 1, PULL0  ),"&
     "  784 (BC_2, *                 ,  control        , 1                  ),"&
     "  783 (BC_7, coresel2          ,  bidir          , X,  782, 1, PULL0  ),"&
     "  782 (BC_2, *                 ,  control        , 1                  ),"&
     "  781 (BC_7, coresel3          ,  bidir          , X,  780, 1, PULL0  ),"&
     "  780 (BC_2, *                 ,  control        , 1                  ),"&
     "  779 (BC_1, reset             ,  input          , X                  ),"&
     "  778 (BC_7, resetstat         ,  bidir          , X,  777, 1, PULL1  ),"&
     "  777 (BC_2, *                 ,  control        , 1                  ),"&
     "  776 (BC_7, bootcomplete      ,  bidir          , X,  775, 1, PULL0  ),"&
     "  775 (BC_2, *                 ,  control        , 1                  ),"&
     "  774 (BC_1, rsv002            ,  output2        , X                  ),"&
     "  773 (BC_1, rsv004            ,  output2        , X                  ),"&
     "  772 (BC_1, rsv006            ,  output2        , X                  ),"&
     "  771 (BC_1, rsv008            ,  output2        , X                  ),"&
     "  770 (BC_7, rsv012            ,  bidir          , X,  769, 1, PULL0  ),"&
     "  769 (BC_2, *                 ,  control        , 1                  ),"&
     "  768 (BC_1, vcl               ,  output2        , 1,  768, 1, WEAK1  ),"&
     "  767 (BC_1, *                 ,  internal       , 0                  ),"&
     "  766 (BC_3, vcl               ,  input          , X                  ),"&
     "  765 (BC_1, vd                ,  output2        , 1,  765, 1, WEAK1  ),"&
     "  764 (BC_1, *                 ,  internal       , 0                  ),"&
     "  763 (BC_3, vd                ,  input          , X                  ),"&
     "  762 (BC_1, vcntl0            ,  output2        , 1,  762, 1, WEAK1  ),"&
     "  761 (BC_1, *                 ,  internal       , 0                  ),"&
     "  760 (BC_4, vcntl0            ,  observe_only   , X                  ),"&
     "  759 (BC_1, vcntl1            ,  output2        , 1,  759, 1, WEAK1  ),"&
     "  758 (BC_1, *                 ,  internal       , 0                  ),"&
     "  757 (BC_4, vcntl1            ,  observe_only   , X                  ),"&
     "  756 (BC_1, vcntl2            ,  output2        , 1,  756, 1, WEAK1  ),"&
     "  755 (BC_1, *                 ,  internal       , 0                  ),"&
     "  754 (BC_4, vcntl2            ,  observe_only   , X                  ),"&
     "  753 (BC_1, vcntl3            ,  output2        , 1,  753, 1, WEAK1  ),"&
     "  752 (BC_1, *                 ,  internal       , 0                  ),"&
     "  751 (BC_4, vcntl3            ,  observe_only   , X                  ),"&
     "  750 (BC_1, vcntl4            ,  output2        , 1,  750, 1, WEAK1  ),"&
     "  749 (BC_1, *                 ,  internal       , 0                  ),"&
     "  748 (BC_4, vcntl4            ,  observe_only   , X                  ),"&
     "  747 (BC_1, vcntl5            ,  output2        , 1,  747, 1, WEAK1  ),"&
     "  746 (BC_1, *                 ,  internal       , 0                  ),"&
     "  745 (BC_4, vcntl5            ,  observe_only   , X                  ),"&
     "  744 (BC_1, rsv74             ,  output2        , 1,  744, 1, WEAK1  ),"&
     "  743 (BC_1, *                 ,  internal       , 0                  ),"&
     "  742 (BC_3, rsv74             ,  input          , X                  ),"&
     "  741 (BC_1, rsv75             ,  output2        , 1,  741, 1, WEAK1  ),"&
     "  740 (BC_1, *                 ,  internal       , 0                  ),"&
     "  739 (BC_3, rsv75             ,  input          , X                  ),"&
     "  738 (BC_1, rsv76             ,  output2        , 1,  738, 1, WEAK1  ),"&
     "  737 (BC_1, *                 ,  internal       , 0                  ),"&
     "  736 (BC_4, rsv76             ,  observe_only   , X                  ),"&
     "  735 (BC_1, rsv77             ,  output2        , 1,  735, 1, WEAK1  ),"&
     "  734 (BC_1, *                 ,  internal       , 0                  ),"&
     "  733 (BC_4, rsv77             ,  observe_only   , X                  ),"&
     "  732 (BC_1, rsv78             ,  output2        , 1,  732, 1, WEAK1  ),"&
     "  731 (BC_1, *                 ,  internal       , 0                  ),"&
     "  730 (BC_4, rsv78             ,  observe_only   , X                  ),"&
     "  729 (BC_1, rsv79             ,  output2        , 1,  729, 1, WEAK1  ),"&
     "  728 (BC_1, *                 ,  internal       , 0                  ),"&
     "  727 (BC_4, rsv79             ,  observe_only   , X                  ),"&
     "  726 (BC_1, rsv80             ,  output2        , 1,  726, 1, WEAK1  ),"&
     "  725 (BC_1, *                 ,  internal       , 0                  ),"&
     "  724 (BC_4, rsv80             ,  observe_only   , X                  ),"&
     "  723 (BC_1, rsv81             ,  output2        , 1,  723, 1, WEAK1  ),"&
     "  722 (BC_1, *                 ,  internal       , 0                  ),"&
     "  721 (BC_4, rsv81             ,  observe_only   , X                  ),"&
     "  720 (BC_7, hyp0rxflclk       ,  bidir          , X,  719 , 1, PULL0 ),"&
     "  719 (BC_2, *                 ,  control        , 1                  ),"&
     "  718 (BC_7, hyp0rxfldat       ,  bidir          , X,  717 , 1, PULL0 ),"&
     "  717 (BC_2, *                 ,  control        , 1                  ),"&
     "  716 (BC_7, hyp0txflclk       ,  bidir          , X,  715 , 1, PULL0 ),"&
     "  715 (BC_2, *                 ,  control        , 1                  ),"&
     "  714 (BC_7, hyp0txfldat       ,  bidir          , X,  713 , 1, PULL0 ),"&
     "  713 (BC_2, *                 ,  control        , 1                  ),"&
     "  712 (BC_7, hyp0rxpmclk       ,  bidir          , X,  711 , 1, PULL0 ),"&
     "  711 (BC_2, *                 ,  control        , 1                  ),"&
     "  710 (BC_7, hyp0rxpmdat       ,  bidir          , X,  709 , 1, PULL0 ),"&
     "  709 (BC_2, *                 ,  control        , 1                  ),"&
     "  708 (BC_7, hyp0txpmclk       ,  bidir          , X,  707 , 1, PULL0 ),"&
     "  707 (BC_2, *                 ,  control        , 1                  ),"&
     "  706 (BC_7, hyp0txpmdat       ,  bidir          , X,  705 , 1, PULL0 ),"&
     "  705 (BC_2, *                 ,  control        , 1                  ),"&
     "  704 (BC_7, hyp1rxflclk       ,  bidir          , X,  703 , 1, PULL0 ),"&
     "  703 (BC_2, *                 ,  control        , 1                  ),"&
     "  702 (BC_7, hyp1rxfldat       ,  bidir          , X,  701 , 1, PULL0 ),"&
     "  701 (BC_2, *                 ,  control        , 1                  ),"&
     "  700 (BC_7, hyp1txflclk       ,  bidir          , X,  699 , 1, PULL0 ),"&
     "  699 (BC_2, *                 ,  control        , 1                  ),"&
     "  698 (BC_7, hyp1txfldat       ,  bidir          , X,  697 , 1, PULL0 ),"&
     "  697 (BC_2, *                 ,  control        , 1                  ),"&
     "  696 (BC_7, hyp1rxpmclk       ,  bidir          , X,  695 , 1, PULL0 ),"&
     "  695 (BC_2, *                 ,  control        , 1                  ),"&
     "  694 (BC_7, hyp1rxpmdat       ,  bidir          , X,  693 , 1, PULL0 ),"&
     "  693 (BC_2, *                 ,  control        , 1                  ),"&
     "  692 (BC_7, hyp1txpmclk       ,  bidir          , X,  691 , 1, PULL0 ),"&
     "  691 (BC_2, *                 ,  control        , 1                  ),"&
     "  690 (BC_7, hyp1txpmdat       ,  bidir          , X,  689 , 1, PULL0 ),"&
     "  689 (BC_2, *                 ,  control        , 1                  ),"&
     "  688 (BC_7, mdio              ,  bidir          , X,  687 , 1, PULL1 ),"&
     "  687 (BC_2, *                 ,  control        , 1                  ),"&
     "  686 (BC_7, mdclk             ,  bidir          , X,  685 , 1, PULL0 ),"&
     "  685 (BC_2, *                 ,  control        , 1                  ),"&
     "  684 (BC_7, uart0rxd          ,  bidir          , X,  683 , 1, PULL0 ),"&
     "  683 (BC_2, *                 ,  control        , 1                  ),"&
     "  682 (BC_7, uart0txd          ,  bidir          , X,  681 , 1, PULL0 ),"&
     "  681 (BC_2, *                 ,  control        , 1                  ),"&
     "  680 (BC_7, uart0cts          ,  bidir          , X,  679 , 1, PULL0 ),"&
     "  679 (BC_2, *                 ,  control        , 1                  ),"&
     "  678 (BC_7, uart0rts          ,  bidir          , X,  677 , 1, PULL0 ),"&
     "  677 (BC_2, *                 ,  control        , 1                  ),"&
     "  676 (BC_7, uart1rxd          ,  bidir          , X,  675 , 1, PULL0 ),"&
     "  675 (BC_2, *                 ,  control        , 1                  ),"&
     "  674 (BC_7, uart1txd          ,  bidir          , X,  673 , 1, PULL0 ),"&
     "  673 (BC_2, *                 ,  control        , 1                  ),"&
     "  672 (BC_7, uart1cts          ,  bidir          , X,  671 , 1, PULL0 ),"&
     "  671 (BC_2, *                 ,  control        , 1                  ),"&
     "  670 (BC_7, uart1rts          ,  bidir          , X,  669 , 1, PULL0 ),"&
     "  669 (BC_2, *                 ,  control        , 1                  ),"&
     "  668 (BC_1, rsv186            ,  input          , X                  ),"&
     "  667 (BC_7, rsv188            ,  bidir          , X,  666 , 1, PULL0 ),"&
     "  666 (BC_2, *                 ,  control        , 1                  ),"&
     "  665 (BC_1, rsv189            ,  input          , X                  ),"&
     "  664 (BC_7, rsv191            ,  bidir          , X,  663 , 1, PULL0 ),"&
     "  663 (BC_2, *                 ,  control        , 1                  ),"&
     "  662 (BC_7, rsv192            ,  bidir          , X,  661 , 1, PULL0 ),"&
     "  661 (BC_2, *                 ,  control        , 1                  ),"&
     "  660 (BC_7, rsv072            ,  bidir          , X,  659 , 1, PULL1 ),"&
     "  659 (BC_2, *                 ,  control        , 1                  ),"&
     "  658 (BC_7, rsv073            ,  bidir          , X,  657 , 1, PULL0 ),"&
     "  657 (BC_2, *                 ,  control        , 1                  ),"&
     "  656 (BC_7, emifrnw           ,  bidir          , X,  655 , 1, PULL1 ),"&
     "  655 (BC_2, *                 ,  control        , 1                  ),"&
     "  654 (BC_7, emifce0           ,  bidir          , X,  653 , 1, PULL1 ),"&
     "  653 (BC_2, *                 ,  control        , 1                  ),"&
     "  652 (BC_7, emifce1           ,  bidir          , X,  651 , 1, PULL1 ),"&
     "  651 (BC_2, *                 ,  control        , 1                  ),"&
     "  650 (BC_7, emifce2           ,  bidir          , X,  649 , 1, PULL1 ),"&
     "  649 (BC_2, *                 ,  control        , 1                  ),"&
     "  648 (BC_7, emifce3           ,  bidir          , X,  647 , 1, PULL1 ),"&
     "  647 (BC_2, *                 ,  control        , 1                  ),"&
     "  646 (BC_7, emifoe            ,  bidir          , X,  645 , 1, PULL1 ),"&
     "  645 (BC_2, *                 ,  control        , 1                  ),"&
     "  644 (BC_7, emifwe            ,  bidir          , X,  643 , 1, PULL1 ),"&
     "  643 (BC_2, *                 ,  control        , 1                  ),"&
     "  642 (BC_7, emifbe0           ,  bidir          , X,  641 , 1, PULL1 ),"&
     "  641 (BC_2, *                 ,  control        , 1                  ),"&
     "  640 (BC_7, emifbe1           ,  bidir          , X,  639 , 1, PULL1 ),"&
     "  639 (BC_2, *                 ,  control        , 1                  ),"&
     "  638 (BC_7, emifwait0         ,  bidir          , X,  637 , 1, PULL0 ),"&
     "  637 (BC_2, *                 ,  control        , 1                  ),"&
     "  636 (BC_7, emifwait1         ,  bidir          , X,  635 , 1, PULL0 ),"&
     "  635 (BC_2, *                 ,  control        , 1                  ),"&
     "  634 (BC_7, emifa00           ,  bidir          , X,  633 , 1, PULL0 ),"&
     "  633 (BC_2, *                 ,  control        , 1                  ),"&
     "  632 (BC_7, emifa01           ,  bidir          , X,  631 , 1, PULL0 ),"&
     "  631 (BC_2, *                 ,  control        , 1                  ),"&
     "  630 (BC_7, emifa02           ,  bidir          , X,  629 , 1, PULL0 ),"&
     "  629 (BC_2, *                 ,  control        , 1                  ),"&
     "  628 (BC_7, emifa03           ,  bidir          , X,  627 , 1, PULL0 ),"&
     "  627 (BC_2, *                 ,  control        , 1                  ),"&
     "  626 (BC_7, emifa04           ,  bidir          , X,  625 , 1, PULL0 ),"&
     "  625 (BC_2, *                 ,  control        , 1                  ),"&
     "  624 (BC_7, emifa05           ,  bidir          , X,  623 , 1, PULL0 ),"&
     "  623 (BC_2, *                 ,  control        , 1                  ),"&
     "  622 (BC_7, emifa06           ,  bidir          , X,  621 , 1, PULL0 ),"&
     "  621 (BC_2, *                 ,  control        , 1                  ),"&
     "  620 (BC_7, emifa07           ,  bidir          , X,  619 , 1, PULL0 ),"&
     "  619 (BC_2, *                 ,  control        , 1                  ),"&
     "  618 (BC_7, emifa08           ,  bidir          , X,  617 , 1, PULL0 ),"&
     "  617 (BC_2, *                 ,  control        , 1                  ),"&
     "  616 (BC_7, emifa09           ,  bidir          , X,  615 , 1, PULL0 ),"&
     "  615 (BC_2, *                 ,  control        , 1                  ),"&
     "  614 (BC_7, emifa10           ,  bidir          , X,  613 , 1, PULL0 ),"&
     "  613 (BC_2, *                 ,  control        , 1                  ),"&
     "  612 (BC_7, emifa11           ,  bidir          , X,  611 , 1, PULL0 ),"&
     "  611 (BC_2, *                 ,  control        , 1                  ),"&
     "  610 (BC_7, emifa12           ,  bidir          , X,  609 , 1, PULL0 ),"&
     "  609 (BC_2, *                 ,  control        , 1                  ),"&
     "  608 (BC_7, emifa13           ,  bidir          , X,  607 , 1, PULL0 ),"&
     "  607 (BC_2, *                 ,  control        , 1                  ),"&
     "  606 (BC_7, emifa14           ,  bidir          , X,  605 , 1, PULL0 ),"&
     "  605 (BC_2, *                 ,  control        , 1                  ),"&
     "  604 (BC_7, emifa15           ,  bidir          , X,  603 , 1, PULL0 ),"&
     "  603 (BC_2, *                 ,  control        , 1                  ),"&
     "  602 (BC_7, emifa16           ,  bidir          , X,  601 , 1, PULL0 ),"&
     "  601 (BC_2, *                 ,  control        , 1                  ),"&
     "  600 (BC_7, emifa17           ,  bidir          , X,  599 , 1, PULL0 ),"&
     "  599 (BC_2, *                 ,  control        , 1                  ),"&
     "  598 (BC_7, emifa18           ,  bidir          , X,  597 , 1, PULL0 ),"&
     "  597 (BC_2, *                 ,  control        , 1                  ),"&
     "  596 (BC_7, emifa19           ,  bidir          , X,  595 , 1, PULL0 ),"&
     "  595 (BC_2, *                 ,  control        , 1                  ),"&
     "  594 (BC_7, emifa20           ,  bidir          , X,  593 , 1, PULL0 ),"&
     "  593 (BC_2, *                 ,  control        , 1                  ),"&
     "  592 (BC_7, emifa21           ,  bidir          , X,  591 , 1, PULL0 ),"&
     "  591 (BC_2, *                 ,  control        , 1                  ),"&
     "  590 (BC_7, emifa22           ,  bidir          , X,  589 , 1, PULL0 ),"&
     "  589 (BC_2, *                 ,  control        , 1                  ),"&
     "  588 (BC_7, emifa23           ,  bidir          , X,  587 , 1, PULL0 ),"&
     "  587 (BC_2, *                 ,  control        , 1                  ),"&
     "  586 (BC_7, emifd00           ,  bidir          , X,  585 , 1, PULL0 ),"&
     "  585 (BC_2, *                 ,  control        , 1                  ),"&
     "  584 (BC_7, emifd01           ,  bidir          , X,  583 , 1, PULL0 ),"&
     "  583 (BC_2, *                 ,  control        , 1                  ),"&
     "  582 (BC_7, emifd02           ,  bidir          , X,  581 , 1, PULL0 ),"&
     "  581 (BC_2, *                 ,  control        , 1                  ),"&
     "  580 (BC_7, emifd03           ,  bidir          , X,  579 , 1, PULL0 ),"&
     "  579 (BC_2, *                 ,  control        , 1                  ),"&
     "  578 (BC_7, emifd04           ,  bidir          , X,  577 , 1, PULL0 ),"&
     "  577 (BC_2, *                 ,  control        , 1                  ),"&
     "  576 (BC_7, emifd05           ,  bidir          , X,  575 , 1, PULL0 ),"&
     "  575 (BC_2, *                 ,  control        , 1                  ),"&
     "  574 (BC_7, emifd06           ,  bidir          , X,  573 , 1, PULL0 ),"&
     "  573 (BC_2, *                 ,  control        , 1                  ),"&
     "  572 (BC_7, emifd07           ,  bidir          , X,  571 , 1, PULL0 ),"&
     "  571 (BC_2, *                 ,  control        , 1                  ),"&
     "  570 (BC_7, emifd08           ,  bidir          , X,  569 , 1, PULL0 ),"&
     "  569 (BC_2, *                 ,  control        , 1                  ),"&
     "  568 (BC_7, emifd09           ,  bidir          , X,  567 , 1, PULL0 ),"&
     "  567 (BC_2, *                 ,  control        , 1                  ),"&
     "  566 (BC_7, emifd10           ,  bidir          , X,  565 , 1, PULL0 ),"&
     "  565 (BC_2, *                 ,  control        , 1                  ),"&
     "  564 (BC_7, emifd11           ,  bidir          , X,  563 , 1, PULL0 ),"&
     "  563 (BC_2, *                 ,  control        , 1                  ),"&
     "  562 (BC_7, emifd12           ,  bidir          , X,  561 , 1, PULL0 ),"&
     "  561 (BC_2, *                 ,  control        , 1                  ),"&
     "  560 (BC_7, emifd13           ,  bidir          , X,  559 , 1, PULL0 ),"&
     "  559 (BC_2, *                 ,  control        , 1                  ),"&
     "  558 (BC_7, emifd14           ,  bidir          , X,  557 , 1, PULL0 ),"&
     "  557 (BC_2, *                 ,  control        , 1                  ),"&
     "  556 (BC_7, emifd15           ,  bidir          , X,  555 , 1, PULL0 ),"&
     "  555 (BC_2, *                 ,  control        , 1                  ),"&
     "  554 (BC_7, rsv193            ,  bidir          , X,  553 , 1, PULL0 ),"&
     "  553 (BC_2, *                 ,  control        , 1                  ),"&
     "  552 (BC_7, rsv194            ,  bidir          , X,  551 , 1, PULL0 ),"&
     "  551 (BC_2, *                 ,  control        , 1                  ),"&
     "  550 (BC_7, rsv195            ,  bidir          , X,  549 , 1, PULL1 ),"&
     "  549 (BC_2, *                 ,  control        , 1                  ),"&
     "  548 (BC_7, tspushevt0        ,  bidir          , X,  547 , 1, PULL0 ),"&
     "  547 (BC_2, *                 ,  control        , 1                  ),"&
     "  546 (BC_7, tspushevt1        ,  bidir          , X,  545 , 1, PULL0 ),"&
     "  545 (BC_2, *                 ,  control        , 1                  ),"&
     "  544 (BC_1, tsrefclkp         ,  input          , X                  ),"&
     "  543 (BC_7, tssyncevt         ,  bidir          , X,  542 , 1, PULL0 ),"&
     "  542 (BC_2, *                 ,  control        , 1                  ),"&
     "  541 (BC_7, tscompout         ,  bidir          , X,  540 , 1, PULL0 ),"&
     "  540 (BC_2, *                 ,  control        , 1                  ),"&
     "  539 (BC_1, tsrxclkout0p      ,  output2        , X                  ),"&
     "  538 (BC_1, tsrxclkout1p      ,  output2        , X                  ),"&
     "  537 (BC_7, usbdrvvbus        ,  bidir          , X,  536 , 1, PULL0 ),"&
     "  536 (BC_2, *                 ,  control        , 1                  ),"&
     "  535 (BC_7, ddr3areset        ,  bidir          , X,  534 , 1, Z     ),"&
     "  534 (BC_2, *                 ,  control        , 1                  ),"&
     "  533 (BC_7, ddr3aclkoutp0     ,  bidir          , X,  532 , 1, Z     ),"&
     "  532 (BC_2, *                 ,  control        , 1                  ),"&
     "  531 (BC_7, ddr3aclkoutp1     ,  bidir          , X,  530 , 1, Z     ),"&
     "  530 (BC_2, *                 ,  control        , 1                  ),"&
     "  529 (BC_7, ddr3aclkoutn0     ,  bidir          , X,  528 , 1, Z     ),"&
     "  528 (BC_2, *                 ,  control        , 1                  ),"&
     "  527 (BC_7, ddr3aclkoutn1     ,  bidir          , X,  526 , 1, Z     ),"&
     "  526 (BC_2, *                 ,  control        , 1                  ),"&
     "  525 (BC_7, ddr3acke0         ,  bidir          , X,  524 , 1, Z     ),"&
     "  524 (BC_2, *                 ,  control        , 1                  ),"&
     "  523 (BC_7, ddr3acke1         ,  bidir          , X,  522 , 1, Z     ),"&
     "  522 (BC_2, *                 ,  control        , 1                  ),"&
     "  521 (BC_7, ddr3aodt0         ,  bidir          , X,  520 , 1, Z     ),"&
     "  520 (BC_2, *                 ,  control        , 1                  ),"&
     "  519 (BC_7, ddr3aodt1         ,  bidir          , X,  518 , 1, Z     ),"&
     "  518 (BC_2, *                 ,  control        , 1                  ),"&
     "  517 (BC_7, ddr3ace0          ,  bidir          , X,  516 , 1, Z     ),"&
     "  516 (BC_2, *                 ,  control        , 1                  ),"&
     "  515 (BC_7, ddr3ace1          ,  bidir          , X,  514 , 1, Z     ),"&
     "  514 (BC_2, *                 ,  control        , 1                  ),"&
     "  513 (BC_7, ddr3aras          ,  bidir          , X,  512 , 1, Z     ),"&
     "  512 (BC_2, *                 ,  control        , 1                  ),"&
     "  511 (BC_7, ddr3acas          ,  bidir          , X,  510 , 1, Z     ),"&
     "  510 (BC_2, *                 ,  control        , 1                  ),"&
     "  509 (BC_7, ddr3awe           ,  bidir          , X,  508 , 1, Z     ),"&
     "  508 (BC_2, *                 ,  control        , 1                  ),"&
     "  507 (BC_7, ddr3aba0          ,  bidir          , X,  506 , 1, Z     ),"&
     "  506 (BC_2, *                 ,  control        , 1                  ),"&
     "  505 (BC_7, ddr3aba1          ,  bidir          , X,  504 , 1, Z     ),"&
     "  504 (BC_2, *                 ,  control        , 1                  ),"&
     "  503 (BC_7, ddr3aba2          ,  bidir          , X,  502 , 1, Z     ),"&
     "  502 (BC_2, *                 ,  control        , 1                  ),"&
     "  501 (BC_7, ddr3aa00          ,  bidir          , X,  500 , 1, Z     ),"&
     "  500 (BC_2, *                 ,  control        , 1                  ),"&
     "  499 (BC_7, ddr3aa01          ,  bidir          , X,  498 , 1, Z     ),"&
     "  498 (BC_2, *                 ,  control        , 1                  ),"&
     "  497 (BC_7, ddr3aa02          ,  bidir          , X,  496 , 1, Z     ),"&
     "  496 (BC_2, *                 ,  control        , 1                  ),"&
     "  495 (BC_7, ddr3aa03          ,  bidir          , X,  494 , 1, Z     ),"&
     "  494 (BC_2, *                 ,  control        , 1                  ),"&
     "  493 (BC_7, ddr3aa04          ,  bidir          , X,  492 , 1, Z     ),"&
     "  492 (BC_2, *                 ,  control        , 1                  ),"&
     "  491 (BC_7, ddr3aa05          ,  bidir          , X,  490 , 1, Z     ),"&
     "  490 (BC_2, *                 ,  control        , 1                  ),"&
     "  489 (BC_7, ddr3aa06          ,  bidir          , X,  488 , 1, Z     ),"&
     "  488 (BC_2, *                 ,  control        , 1                  ),"&
     "  487 (BC_7, ddr3aa07          ,  bidir          , X,  486 , 1, Z     ),"&
     "  486 (BC_2, *                 ,  control        , 1                  ),"&
     "  485 (BC_7, ddr3aa08          ,  bidir          , X,  484 , 1, Z     ),"&
     "  484 (BC_2, *                 ,  control        , 1                  ),"&
     "  483 (BC_7, ddr3aa09          ,  bidir          , X,  482 , 1, Z     ),"&
     "  482 (BC_2, *                 ,  control        , 1                  ),"&
     "  481 (BC_7, ddr3aa10          ,  bidir          , X,  480 , 1, Z     ),"&
     "  480 (BC_2, *                 ,  control        , 1                  ),"&
     "  479 (BC_7, ddr3aa11          ,  bidir          , X,  478 , 1, Z     ),"&
     "  478 (BC_2, *                 ,  control        , 1                  ),"&
     "  477 (BC_7, ddr3aa12          ,  bidir          , X,  476 , 1, Z     ),"&
     "  476 (BC_2, *                 ,  control        , 1                  ),"&
     "  475 (BC_7, ddr3aa13          ,  bidir          , X,  474 , 1, Z     ),"&
     "  474 (BC_2, *                 ,  control        , 1                  ),"&
     "  473 (BC_7, ddr3aa14          ,  bidir          , X,  472 , 1, Z     ),"&
     "  472 (BC_2, *                 ,  control        , 1                  ),"&
     "  471 (BC_7, ddr3aa15          ,  bidir          , X,  470 , 1, Z     ),"&
     "  470 (BC_2, *                 ,  control        , 1                  ),"&
     "  469 (BC_7, ddr3adqs0p        ,  bidir          , X,  468 , 1, PULL0 ),"&
     "  468 (BC_2, *                 ,  control        , 1                  ),"&
     "  467 (BC_7, ddr3adqs1p        ,  bidir          , X,  466 , 1, PULL0 ),"&
     "  466 (BC_2, *                 ,  control        , 1                  ),"&
     "  465 (BC_7, ddr3adqs2p        ,  bidir          , X,  464 , 1, PULL0 ),"&
     "  464 (BC_2, *                 ,  control        , 1                  ),"&
     "  463 (BC_7, ddr3adqs3p        ,  bidir          , X,  462 , 1, PULL0 ),"&
     "  462 (BC_2, *                 ,  control        , 1                  ),"&
     "  461 (BC_7, ddr3adqs4p        ,  bidir          , X,  460 , 1, PULL0 ),"&
     "  460 (BC_2, *                 ,  control        , 1                  ),"&
     "  459 (BC_7, ddr3adqs5p        ,  bidir          , X,  458 , 1, PULL0 ),"&
     "  458 (BC_2, *                 ,  control        , 1                  ),"&
     "  457 (BC_7, ddr3adqs6p        ,  bidir          , X,  456 , 1, PULL0 ),"&
     "  456 (BC_2, *                 ,  control        , 1                  ),"&
     "  455 (BC_7, ddr3adqs7p        ,  bidir          , X,  454 , 1, PULL0 ),"&
     "  454 (BC_2, *                 ,  control        , 1                  ),"&
     "  453 (BC_7, ddr3adqs8p        ,  bidir          , X,  452 , 1, PULL0 ),"&
     "  452 (BC_2, *                 ,  control        , 1                  ),"&
     "  451 (BC_7, ddr3adqs0n        ,  bidir          , X,  450 , 1, PULL1 ),"&
     "  450 (BC_2, *                 ,  control        , 1                  ),"&
     "  449 (BC_7, ddr3adqs1n        ,  bidir          , X,  448 , 1, PULL1 ),"&
     "  448 (BC_2, *                 ,  control        , 1                  ),"&
     "  447 (BC_7, ddr3adqs2n        ,  bidir          , X,  446 , 1, PULL1 ),"&
     "  446 (BC_2, *                 ,  control        , 1                  ),"&
     "  445 (BC_7, ddr3adqs3n        ,  bidir          , X,  444 , 1, PULL1 ),"&
     "  444 (BC_2, *                 ,  control        , 1                  ),"&
     "  443 (BC_7, ddr3adqs4n        ,  bidir          , X,  442 , 1, PULL1 ),"&
     "  442 (BC_2, *                 ,  control        , 1                  ),"&
     "  441 (BC_7, ddr3adqs5n        ,  bidir          , X,  440 , 1, PULL1 ),"&
     "  440 (BC_2, *                 ,  control        , 1                  ),"&
     "  439 (BC_7, ddr3adqs6n        ,  bidir          , X,  438 , 1, PULL1 ),"&
     "  438 (BC_2, *                 ,  control        , 1                  ),"&
     "  437 (BC_7, ddr3adqs7n        ,  bidir          , X,  436 , 1, PULL1 ),"&
     "  436 (BC_2, *                 ,  control        , 1                  ),"&
     "  435 (BC_7, ddr3adqs8n        ,  bidir          , X,  434 , 1, PULL1 ),"&
     "  434 (BC_2, *                 ,  control        , 1                  ),"&
     "  433 (BC_7, ddr3adqm0         ,  bidir          , X,  432 , 1, Z     ),"&
     "  432 (BC_2, *                 ,  control        , 1                  ),"&
     "  431 (BC_7, ddr3adqm1         ,  bidir          , X,  430 , 1, Z     ),"&
     "  430 (BC_2, *                 ,  control        , 1                  ),"&
     "  429 (BC_7, ddr3adqm2         ,  bidir          , X,  428 , 1, Z     ),"&
     "  428 (BC_2, *                 ,  control        , 1                  ),"&
     "  427 (BC_7, ddr3adqm3         ,  bidir          , X,  426 , 1, Z     ),"&
     "  426 (BC_2, *                 ,  control        , 1                  ),"&
     "  425 (BC_7, ddr3adqm4         ,  bidir          , X,  424 , 1, Z     ),"&
     "  424 (BC_2, *                 ,  control        , 1                  ),"&
     "  423 (BC_7, ddr3adqm5         ,  bidir          , X,  422 , 1, Z     ),"&
     "  422 (BC_2, *                 ,  control        , 1                  ),"&
     "  421 (BC_7, ddr3adqm6         ,  bidir          , X,  420 , 1, Z     ),"&
     "  420 (BC_2, *                 ,  control        , 1                  ),"&
     "  419 (BC_7, ddr3adqm7         ,  bidir          , X,  418 , 1, Z     ),"&
     "  418 (BC_2, *                 ,  control        , 1                  ),"&
     "  417 (BC_7, ddr3adqm8         ,  bidir          , X,  416 , 1, Z     ),"&
     "  416 (BC_2, *                 ,  control        , 1                  ),"&
     "  415 (BC_7, ddr3ad00          ,  bidir          , X,  414 , 1, Z     ),"&
     "  414 (BC_2, *                 ,  control        , 1                  ),"&
     "  413 (BC_7, ddr3ad01          ,  bidir          , X,  412 , 1, Z     ),"&
     "  412 (BC_2, *                 ,  control        , 1                  ),"&
     "  411 (BC_7, ddr3ad02          ,  bidir          , X,  410 , 1, Z     ),"&
     "  410 (BC_2, *                 ,  control        , 1                  ),"&
     "  409 (BC_7, ddr3ad03          ,  bidir          , X,  408 , 1, Z     ),"&
     "  408 (BC_2, *                 ,  control        , 1                  ),"&
     "  407 (BC_7, ddr3ad04          ,  bidir          , X,  406 , 1, Z     ),"&
     "  406 (BC_2, *                 ,  control        , 1                  ),"&
     "  405 (BC_7, ddr3ad05          ,  bidir          , X,  404 , 1, Z     ),"&
     "  404 (BC_2, *                 ,  control        , 1                  ),"&
     "  403 (BC_7, ddr3ad06          ,  bidir          , X,  402 , 1, Z     ),"&
     "  402 (BC_2, *                 ,  control        , 1                  ),"&
     "  401 (BC_7, ddr3ad07          ,  bidir          , X,  400 , 1, Z     ),"&
     "  400 (BC_2, *                 ,  control        , 1                  ),"&
     "  399 (BC_7, ddr3ad08          ,  bidir          , X,  398 , 1, Z     ),"&
     "  398 (BC_2, *                 ,  control        , 1                  ),"&
     "  397 (BC_7, ddr3ad09          ,  bidir          , X,  396 , 1, Z     ),"&
     "  396 (BC_2, *                 ,  control        , 1                  ),"&
     "  395 (BC_7, ddr3ad10          ,  bidir          , X,  394 , 1, Z     ),"&
     "  394 (BC_2, *                 ,  control        , 1                  ),"&
     "  393 (BC_7, ddr3ad11          ,  bidir          , X,  392 , 1, Z     ),"&
     "  392 (BC_2, *                 ,  control        , 1                  ),"&
     "  391 (BC_7, ddr3ad12          ,  bidir          , X,  390 , 1, Z     ),"&
     "  390 (BC_2, *                 ,  control        , 1                  ),"&
     "  389 (BC_7, ddr3ad13          ,  bidir          , X,  388 , 1, Z     ),"&
     "  388 (BC_2, *                 ,  control        , 1                  ),"&
     "  387 (BC_7, ddr3ad14          ,  bidir          , X,  386 , 1, Z     ),"&
     "  386 (BC_2, *                 ,  control        , 1                  ),"&
     "  385 (BC_7, ddr3ad15          ,  bidir          , X,  384 , 1, Z     ),"&
     "  384 (BC_2, *                 ,  control        , 1                  ),"&
     "  383 (BC_7, ddr3ad16          ,  bidir          , X,  382 , 1, Z     ),"&
     "  382 (BC_2, *                 ,  control        , 1                  ),"&
     "  381 (BC_7, ddr3ad17          ,  bidir          , X,  380 , 1, Z     ),"&
     "  380 (BC_2, *                 ,  control        , 1                  ),"&
     "  379 (BC_7, ddr3ad18          ,  bidir          , X,  378 , 1, Z     ),"&
     "  378 (BC_2, *                 ,  control        , 1                  ),"&
     "  377 (BC_7, ddr3ad19          ,  bidir          , X,  376 , 1, Z     ),"&
     "  376 (BC_2, *                 ,  control        , 1                  ),"&
     "  375 (BC_7, ddr3ad20          ,  bidir          , X,  374 , 1, Z     ),"&
     "  374 (BC_2, *                 ,  control        , 1                  ),"&
     "  373 (BC_7, ddr3ad21          ,  bidir          , X,  372 , 1, Z     ),"&
     "  372 (BC_2, *                 ,  control        , 1                  ),"&
     "  371 (BC_7, ddr3ad22          ,  bidir          , X,  370 , 1, Z     ),"&
     "  370 (BC_2, *                 ,  control        , 1                  ),"&
     "  369 (BC_7, ddr3ad23          ,  bidir          , X,  368 , 1, Z     ),"&
     "  368 (BC_2, *                 ,  control        , 1                  ),"&
     "  367 (BC_7, ddr3ad24          ,  bidir          , X,  366 , 1, Z     ),"&
     "  366 (BC_2, *                 ,  control        , 1                  ),"&
     "  365 (BC_7, ddr3ad25          ,  bidir          , X,  364 , 1, Z     ),"&
     "  364 (BC_2, *                 ,  control        , 1                  ),"&
     "  363 (BC_7, ddr3ad26          ,  bidir          , X,  362 , 1, Z     ),"&
     "  362 (BC_2, *                 ,  control        , 1                  ),"&
     "  361 (BC_7, ddr3ad27          ,  bidir          , X,  360 , 1, Z     ),"&
     "  360 (BC_2, *                 ,  control        , 1                  ),"&
     "  359 (BC_7, ddr3ad28          ,  bidir          , X,  358 , 1, Z     ),"&
     "  358 (BC_2, *                 ,  control        , 1                  ),"&
     "  357 (BC_7, ddr3ad29          ,  bidir          , X,  356 , 1, Z     ),"&
     "  356 (BC_2, *                 ,  control        , 1                  ),"&
     "  355 (BC_7, ddr3ad30          ,  bidir          , X,  354 , 1, Z     ),"&
     "  354 (BC_2, *                 ,  control        , 1                  ),"&
     "  353 (BC_7, ddr3ad31          ,  bidir          , X,  352 , 1, Z     ),"&
     "  352 (BC_2, *                 ,  control        , 1                  ),"&
     "  351 (BC_7, ddr3ad32          ,  bidir          , X,  350 , 1, Z     ),"&
     "  350 (BC_2, *                 ,  control        , 1                  ),"&
     "  349 (BC_7, ddr3ad33          ,  bidir          , X,  348 , 1, Z     ),"&
     "  348 (BC_2, *                 ,  control        , 1                  ),"&
     "  347 (BC_7, ddr3ad34          ,  bidir          , X,  346 , 1, Z     ),"&
     "  346 (BC_2, *                 ,  control        , 1                  ),"&
     "  345 (BC_7, ddr3ad35          ,  bidir          , X,  344 , 1, Z     ),"&
     "  344 (BC_2, *                 ,  control        , 1                  ),"&
     "  343 (BC_7, ddr3ad36          ,  bidir          , X,  342 , 1, Z     ),"&
     "  342 (BC_2, *                 ,  control        , 1                  ),"&
     "  341 (BC_7, ddr3ad37          ,  bidir          , X,  340 , 1, Z     ),"&
     "  340 (BC_2, *                 ,  control        , 1                  ),"&
     "  339 (BC_7, ddr3ad38          ,  bidir          , X,  338 , 1, Z     ),"&
     "  338 (BC_2, *                 ,  control        , 1                  ),"&
     "  337 (BC_7, ddr3ad39          ,  bidir          , X,  336 , 1, Z     ),"&
     "  336 (BC_2, *                 ,  control        , 1                  ),"&
     "  335 (BC_7, ddr3ad40          ,  bidir          , X,  334 , 1, Z     ),"&
     "  334 (BC_2, *                 ,  control        , 1                  ),"&
     "  333 (BC_7, ddr3ad41          ,  bidir          , X,  332 , 1, Z     ),"&
     "  332 (BC_2, *                 ,  control        , 1                  ),"&
     "  331 (BC_7, ddr3ad42          ,  bidir          , X,  330 , 1, Z     ),"&
     "  330 (BC_2, *                 ,  control        , 1                  ),"&
     "  329 (BC_7, ddr3ad43          ,  bidir          , X,  328 , 1, Z     ),"&
     "  328 (BC_2, *                 ,  control        , 1                  ),"&
     "  327 (BC_7, ddr3ad44          ,  bidir          , X,  326 , 1, Z     ),"&
     "  326 (BC_2, *                 ,  control        , 1                  ),"&
     "  325 (BC_7, ddr3ad45          ,  bidir          , X,  324 , 1, Z     ),"&
     "  324 (BC_2, *                 ,  control        , 1                  ),"&
     "  323 (BC_7, ddr3ad46          ,  bidir          , X,  322 , 1, Z     ),"&
     "  322 (BC_2, *                 ,  control        , 1                  ),"&
     "  321 (BC_7, ddr3ad47          ,  bidir          , X,  320 , 1, Z     ),"&
     "  320 (BC_2, *                 ,  control        , 1                  ),"&
     "  319 (BC_7, ddr3ad48          ,  bidir          , X,  318 , 1, Z     ),"&
     "  318 (BC_2, *                 ,  control        , 1                  ),"&
     "  317 (BC_7, ddr3ad49          ,  bidir          , X,  316 , 1, Z     ),"&
     "  316 (BC_2, *                 ,  control        , 1                  ),"&
     "  315 (BC_7, ddr3ad50          ,  bidir          , X,  314 , 1, Z     ),"&
     "  314 (BC_2, *                 ,  control        , 1                  ),"&
     "  313 (BC_7, ddr3ad51          ,  bidir          , X,  312 , 1, Z     ),"&
     "  312 (BC_2, *                 ,  control        , 1                  ),"&
     "  311 (BC_7, ddr3ad52          ,  bidir          , X,  310 , 1, Z     ),"&
     "  310 (BC_2, *                 ,  control        , 1                  ),"&
     "  309 (BC_7, ddr3ad53          ,  bidir          , X,  308 , 1, Z     ),"&
     "  308 (BC_2, *                 ,  control        , 1                  ),"&
     "  307 (BC_7, ddr3ad54          ,  bidir          , X,  306 , 1, Z     ),"&
     "  306 (BC_2, *                 ,  control        , 1                  ),"&
     "  305 (BC_7, ddr3ad55          ,  bidir          , X,  304 , 1, Z     ),"&
     "  304 (BC_2, *                 ,  control        , 1                  ),"&
     "  303 (BC_7, ddr3ad56          ,  bidir          , X,  302 , 1, Z     ),"&
     "  302 (BC_2, *                 ,  control        , 1                  ),"&
     "  301 (BC_7, ddr3ad57          ,  bidir          , X,  300 , 1, Z     ),"&
     "  300 (BC_2, *                 ,  control        , 1                  ),"&
     "  299 (BC_7, ddr3ad58          ,  bidir          , X,  298 , 1, Z     ),"&
     "  298 (BC_2, *                 ,  control        , 1                  ),"&
     "  297 (BC_7, ddr3ad59          ,  bidir          , X,  296 , 1, Z     ),"&
     "  296 (BC_2, *                 ,  control        , 1                  ),"&
     "  295 (BC_7, ddr3ad60          ,  bidir          , X,  294 , 1, Z     ),"&
     "  294 (BC_2, *                 ,  control        , 1                  ),"&
     "  293 (BC_7, ddr3ad61          ,  bidir          , X,  292 , 1, Z     ),"&
     "  292 (BC_2, *                 ,  control        , 1                  ),"&
     "  291 (BC_7, ddr3ad62          ,  bidir          , X,  290 , 1, Z     ),"&
     "  290 (BC_2, *                 ,  control        , 1                  ),"&
     "  289 (BC_7, ddr3ad63          ,  bidir          , X,  288 , 1, Z     ),"&
     "  288 (BC_2, *                 ,  control        , 1                  ),"&
     "  287 (BC_7, ddr3acb00         ,  bidir          , X,  286 , 1, Z     ),"&
     "  286 (BC_2, *                 ,  control        , 1                  ),"&
     "  285 (BC_7, ddr3acb01         ,  bidir          , X,  284 , 1, Z     ),"&
     "  284 (BC_2, *                 ,  control        , 1                  ),"&
     "  283 (BC_7, ddr3acb02         ,  bidir          , X,  282 , 1, Z     ),"&
     "  282 (BC_2, *                 ,  control        , 1                  ),"&
     "  281 (BC_7, ddr3acb03         ,  bidir          , X,  280 , 1, Z     ),"&
     "  280 (BC_2, *                 ,  control        , 1                  ),"&
     "  279 (BC_7, ddr3acb04         ,  bidir          , X,  278 , 1, Z     ),"&
     "  278 (BC_2, *                 ,  control        , 1                  ),"&
     "  277 (BC_7, ddr3acb05         ,  bidir          , X,  276 , 1, Z     ),"&
     "  276 (BC_2, *                 ,  control        , 1                  ),"&
     "  275 (BC_7, ddr3acb06         ,  bidir          , X,  274 , 1, Z     ),"&
     "  274 (BC_2, *                 ,  control        , 1                  ),"&
     "  273 (BC_7, ddr3acb07         ,  bidir          , X,  272 , 1, Z     ),"&
     "  272 (BC_2, *                 ,  control        , 1                  ),"&
     "  271 (BC_7, rsv027            ,  bidir          , X,  270 , 1, Z     ),"&
     "  270 (BC_2, *                 ,  control        , 1                  ),"&
     "  269 (BC_7, rsv028            ,  bidir          , X,  268 , 1, Z     ),"&
     "  268 (BC_2, *                 ,  control        , 1                  ),"&
     "  267 (BC_7, ddr3breset        ,  bidir          , X,  266 , 1, Z     ),"&
     "  266 (BC_2, *                 ,  control        , 1                  ),"&
     "  265 (BC_7, ddr3bclkoutp0     ,  bidir          , X,  264 , 1, Z     ),"&
     "  264 (BC_2, *                 ,  control        , 1                  ),"&
     "  263 (BC_7, ddr3bclkoutp1     ,  bidir          , X,  262 , 1, Z     ),"&
     "  262 (BC_2, *                 ,  control        , 1                  ),"&
     "  261 (BC_7, ddr3bclkoutn0     ,  bidir          , X,  260 , 1, Z     ),"&
     "  260 (BC_2, *                 ,  control        , 1                  ),"&
     "  259 (BC_7, ddr3bclkoutn1     ,  bidir          , X,  258 , 1, Z     ),"&
     "  258 (BC_2, *                 ,  control        , 1                  ),"&
     "  257 (BC_7, ddr3bcke0         ,  bidir          , X,  256 , 1, Z     ),"&
     "  256 (BC_2, *                 ,  control        , 1                  ),"&
     "  255 (BC_7, ddr3bcke1         ,  bidir          , X,  254 , 1, Z     ),"&
     "  254 (BC_2, *                 ,  control        , 1                  ),"&
     "  253 (BC_7, ddr3bodt0         ,  bidir          , X,  252 , 1, Z     ),"&
     "  252 (BC_2, *                 ,  control        , 1                  ),"&
     "  251 (BC_7, ddr3bodt1         ,  bidir          , X,  250 , 1, Z     ),"&
     "  250 (BC_2, *                 ,  control        , 1                  ),"&
     "  249 (BC_7, ddr3bce0          ,  bidir          , X,  248 , 1, Z     ),"&
     "  248 (BC_2, *                 ,  control        , 1                  ),"&
     "  247 (BC_7, ddr3bce1          ,  bidir          , X,  246 , 1, Z     ),"&
     "  246 (BC_2, *                 ,  control        , 1                  ),"&
     "  245 (BC_7, ddr3bras          ,  bidir          , X,  244 , 1, Z     ),"&
     "  244 (BC_2, *                 ,  control        , 1                  ),"&
     "  243 (BC_7, ddr3bcas          ,  bidir          , X,  242 , 1, Z     ),"&
     "  242 (BC_2, *                 ,  control        , 1                  ),"&
     "  241 (BC_7, ddr3bwe           ,  bidir          , X,  240 , 1, Z     ),"&
     "  240 (BC_2, *                 ,  control        , 1                  ),"&
     "  239 (BC_7, ddr3bba0          ,  bidir          , X,  238 , 1, Z     ),"&
     "  238 (BC_2, *                 ,  control        , 1                  ),"&
     "  237 (BC_7, ddr3bba1          ,  bidir          , X,  236 , 1, Z     ),"&
     "  236 (BC_2, *                 ,  control        , 1                  ),"&
     "  235 (BC_7, ddr3bba2          ,  bidir          , X,  234 , 1, Z     ),"&
     "  234 (BC_2, *                 ,  control        , 1                  ),"&
     "  233 (BC_7, ddr3ba00          ,  bidir          , X,  232 , 1, Z     ),"&
     "  232 (BC_2, *                 ,  control        , 1                  ),"&
     "  231 (BC_7, ddr3ba01          ,  bidir          , X,  230 , 1, Z     ),"&
     "  230 (BC_2, *                 ,  control        , 1                  ),"&
     "  229 (BC_7, ddr3ba02          ,  bidir          , X,  228 , 1, Z     ),"&
     "  228 (BC_2, *                 ,  control        , 1                  ),"&
     "  227 (BC_7, ddr3ba03          ,  bidir          , X,  226 , 1, Z     ),"&
     "  226 (BC_2, *                 ,  control        , 1                  ),"&
     "  225 (BC_7, ddr3ba04          ,  bidir          , X,  224 , 1, Z     ),"&
     "  224 (BC_2, *                 ,  control        , 1                  ),"&
     "  223 (BC_7, ddr3ba05          ,  bidir          , X,  222 , 1, Z     ),"&
     "  222 (BC_2, *                 ,  control        , 1                  ),"&
     "  221 (BC_7, ddr3ba06          ,  bidir          , X,  220 , 1, Z     ),"&
     "  220 (BC_2, *                 ,  control        , 1                  ),"&
     "  219 (BC_7, ddr3ba07          ,  bidir          , X,  218 , 1, Z     ),"&
     "  218 (BC_2, *                 ,  control        , 1                  ),"&
     "  217 (BC_7, ddr3ba08          ,  bidir          , X,  216 , 1, Z     ),"&
     "  216 (BC_2, *                 ,  control        , 1                  ),"&
     "  215 (BC_7, ddr3ba09          ,  bidir          , X,  214 , 1, Z     ),"&
     "  214 (BC_2, *                 ,  control        , 1                  ),"&
     "  213 (BC_7, ddr3ba10          ,  bidir          , X,  212 , 1, Z     ),"&
     "  212 (BC_2, *                 ,  control        , 1                  ),"&
     "  211 (BC_7, ddr3ba11          ,  bidir          , X,  210 , 1, Z     ),"&
     "  210 (BC_2, *                 ,  control        , 1                  ),"&
     "  209 (BC_7, ddr3ba12          ,  bidir          , X,  208 , 1, Z     ),"&
     "  208 (BC_2, *                 ,  control        , 1                  ),"&
     "  207 (BC_7, ddr3ba13          ,  bidir          , X,  206 , 1, Z     ),"&
     "  206 (BC_2, *                 ,  control        , 1                  ),"&
     "  205 (BC_7, ddr3ba14          ,  bidir          , X,  204 , 1, Z     ),"&
     "  204 (BC_2, *                 ,  control        , 1                  ),"&
     "  203 (BC_7, ddr3ba15          ,  bidir          , X,  202 , 1, Z     ),"&
     "  202 (BC_2, *                 ,  control        , 1                  ),"&
     "  201 (BC_7, ddr3bdqs0p        ,  bidir          , X,  200 , 1, PULL0 ),"&
     "  200 (BC_2, *                 ,  control        , 1                  ),"&
     "  199 (BC_7, ddr3bdqs1p        ,  bidir          , X,  198 , 1, PULL0 ),"&
     "  198 (BC_2, *                 ,  control        , 1                  ),"&
     "  197 (BC_7, ddr3bdqs2p        ,  bidir          , X,  196 , 1, PULL0 ),"&
     "  196 (BC_2, *                 ,  control        , 1                  ),"&
     "  195 (BC_7, ddr3bdqs3p        ,  bidir          , X,  194 , 1, PULL0 ),"&
     "  194 (BC_2, *                 ,  control        , 1                  ),"&
     "  193 (BC_7, ddr3bdqs4p        ,  bidir          , X,  192 , 1, PULL0 ),"&
     "  192 (BC_2, *                 ,  control        , 1                  ),"&
     "  191 (BC_7, ddr3bdqs5p        ,  bidir          , X,  190 , 1, PULL0 ),"&
     "  190 (BC_2, *                 ,  control        , 1                  ),"&
     "  189 (BC_7, ddr3bdqs6p        ,  bidir          , X,  188 , 1, PULL0 ),"&
     "  188 (BC_2, *                 ,  control        , 1                  ),"&
     "  187 (BC_7, ddr3bdqs7p        ,  bidir          , X,  186 , 1, PULL0 ),"&
     "  186 (BC_2, *                 ,  control        , 1                  ),"&
     "  185 (BC_7, ddr3bdqs8p        ,  bidir          , X,  184 , 1, PULL0 ),"&
     "  184 (BC_2, *                 ,  control        , 1                  ),"&
     "  183 (BC_7, ddr3bdqs0n        ,  bidir          , X,  182 , 1, PULL1 ),"&
     "  182 (BC_2, *                 ,  control        , 1                  ),"&
     "  181 (BC_7, ddr3bdqs1n        ,  bidir          , X,  180 , 1, PULL1 ),"&
     "  180 (BC_2, *                 ,  control        , 1                  ),"&
     "  179 (BC_7, ddr3bdqs2n        ,  bidir          , X,  178 , 1, PULL1 ),"&
     "  178 (BC_2, *                 ,  control        , 1                  ),"&
     "  177 (BC_7, ddr3bdqs3n        ,  bidir          , X,  176 , 1, PULL1 ),"&
     "  176 (BC_2, *                 ,  control        , 1                  ),"&
     "  175 (BC_7, ddr3bdqs4n        ,  bidir          , X,  174 , 1, PULL1 ),"&
     "  174 (BC_2, *                 ,  control        , 1                  ),"&
     "  173 (BC_7, ddr3bdqs5n        ,  bidir          , X,  172 , 1, PULL1 ),"&
     "  172 (BC_2, *                 ,  control        , 1                  ),"&
     "  171 (BC_7, ddr3bdqs6n        ,  bidir          , X,  170 , 1, PULL1 ),"&
     "  170 (BC_2, *                 ,  control        , 1                  ),"&
     "  169 (BC_7, ddr3bdqs7n        ,  bidir          , X,  168 , 1, PULL1 ),"&
     "  168 (BC_2, *                 ,  control        , 1                  ),"&
     "  167 (BC_7, ddr3bdqs8n        ,  bidir          , X,  166 , 1, PULL1 ),"&
     "  166 (BC_2, *                 ,  control        , 1                  ),"&
     "  165 (BC_7, ddr3bdqm0         ,  bidir          , X,  164 , 1, Z     ),"&
     "  164 (BC_2, *                 ,  control        , 1                  ),"&
     "  163 (BC_7, ddr3bdqm1         ,  bidir          , X,  162 , 1, Z     ),"&
     "  162 (BC_2, *                 ,  control        , 1                  ),"&
     "  161 (BC_7, ddr3bdqm2         ,  bidir          , X,  160 , 1, Z     ),"&
     "  160 (BC_2, *                 ,  control        , 1                  ),"&
     "  159 (BC_7, ddr3bdqm3         ,  bidir          , X,  158 , 1, Z     ),"&
     "  158 (BC_2, *                 ,  control        , 1                  ),"&
     "  157 (BC_7, ddr3bdqm4         ,  bidir          , X,  156 , 1, Z     ),"&
     "  156 (BC_2, *                 ,  control        , 1                  ),"&
     "  155 (BC_7, ddr3bdqm5         ,  bidir          , X,  154 , 1, Z     ),"&
     "  154 (BC_2, *                 ,  control        , 1                  ),"&
     "  153 (BC_7, ddr3bdqm6         ,  bidir          , X,  152 , 1, Z     ),"&
     "  152 (BC_2, *                 ,  control        , 1                  ),"&
     "  151 (BC_7, ddr3bdqm7         ,  bidir          , X,  150 , 1, Z     ),"&
     "  150 (BC_2, *                 ,  control        , 1                  ),"&
     "  149 (BC_7, ddr3bdqm8         ,  bidir          , X,  148 , 1, Z     ),"&
     "  148 (BC_2, *                 ,  control        , 1                  ),"&
     "  147 (BC_7, ddr3bd00          ,  bidir          , X,  146 , 1, Z     ),"&
     "  146 (BC_2, *                 ,  control        , 1                  ),"&
     "  145 (BC_7, ddr3bd01          ,  bidir          , X,  144 , 1, Z     ),"&
     "  144 (BC_2, *                 ,  control        , 1                  ),"&
     "  143 (BC_7, ddr3bd02          ,  bidir          , X,  142 , 1, Z     ),"&
     "  142 (BC_2, *                 ,  control        , 1                  ),"&
     "  141 (BC_7, ddr3bd03          ,  bidir          , X,  140 , 1, Z     ),"&
     "  140 (BC_2, *                 ,  control        , 1                  ),"&
     "  139 (BC_7, ddr3bd04          ,  bidir          , X,  138 , 1, Z     ),"&
     "  138 (BC_2, *                 ,  control        , 1                  ),"&
     "  137 (BC_7, ddr3bd05          ,  bidir          , X,  136 , 1, Z     ),"&
     "  136 (BC_2, *                 ,  control        , 1                  ),"&
     "  135 (BC_7, ddr3bd06          ,  bidir          , X,  134 , 1, Z     ),"&
     "  134 (BC_2, *                 ,  control        , 1                  ),"&
     "  133 (BC_7, ddr3bd07          ,  bidir          , X,  132 , 1, Z     ),"&
     "  132 (BC_2, *                 ,  control        , 1                  ),"&
     "  131 (BC_7, ddr3bd08          ,  bidir          , X,  130 , 1, Z     ),"&
     "  130 (BC_2, *                 ,  control        , 1                  ),"&
     "  129 (BC_7, ddr3bd09          ,  bidir          , X,  128 , 1, Z     ),"&
     "  128 (BC_2, *                 ,  control        , 1                  ),"&
     "  127 (BC_7, ddr3bd10          ,  bidir          , X,  126 , 1, Z     ),"&
     "  126 (BC_2, *                 ,  control        , 1                  ),"&
     "  125 (BC_7, ddr3bd11          ,  bidir          , X,  124 , 1, Z     ),"&
     "  124 (BC_2, *                 ,  control        , 1                  ),"&
     "  123 (BC_7, ddr3bd12          ,  bidir          , X,  122 , 1, Z     ),"&
     "  122 (BC_2, *                 ,  control        , 1                  ),"&
     "  121 (BC_7, ddr3bd13          ,  bidir          , X,  120 , 1, Z     ),"&
     "  120 (BC_2, *                 ,  control        , 1                  ),"&
     "  119 (BC_7, ddr3bd14          ,  bidir          , X,  118 , 1, Z     ),"&
     "  118 (BC_2, *                 ,  control        , 1                  ),"&
     "  117 (BC_7, ddr3bd15          ,  bidir          , X,  116 , 1, Z     ),"&
     "  116 (BC_2, *                 ,  control        , 1                  ),"&
     "  115 (BC_7, ddr3bd16          ,  bidir          , X,  114 , 1, Z     ),"&
     "  114 (BC_2, *                 ,  control        , 1                  ),"&
     "  113 (BC_7, ddr3bd17          ,  bidir          , X,  112 , 1, Z     ),"&
     "  112 (BC_2, *                 ,  control        , 1                  ),"&
     "  111 (BC_7, ddr3bd18          ,  bidir          , X,  110 , 1, Z     ),"&
     "  110 (BC_2, *                 ,  control        , 1                  ),"&
     "  109 (BC_7, ddr3bd19          ,  bidir          , X,  108 , 1, Z     ),"&
     "  108 (BC_2, *                 ,  control        , 1                  ),"&
     "  107 (BC_7, ddr3bd20          ,  bidir          , X,  106 , 1, Z     ),"&
     "  106 (BC_2, *                 ,  control        , 1                  ),"&
     "  105 (BC_7, ddr3bd21          ,  bidir          , X,  104 , 1, Z     ),"&
     "  104 (BC_2, *                 ,  control        , 1                  ),"&
     "  103 (BC_7, ddr3bd22          ,  bidir          , X,  102 , 1, Z     ),"&
     "  102 (BC_2, *                 ,  control        , 1                  ),"&
     "  101 (BC_7, ddr3bd23          ,  bidir          , X,  100 , 1, Z     ),"&
     "  100 (BC_2, *                 ,  control        , 1                  ),"&
     "   99 (BC_7, ddr3bd24          ,  bidir          , X,    98 , 1, Z    ),"&
     "   98 (BC_2, *                 ,  control        , 1                  ),"&
     "   97 (BC_7, ddr3bd25          ,  bidir          , X,    96 , 1, Z    ),"&
     "   96 (BC_2, *                 ,  control        , 1                  ),"&
     "   95 (BC_7, ddr3bd26          ,  bidir          , X,    94 , 1, Z    ),"&
     "   94 (BC_2, *                 ,  control        , 1                  ),"&
     "   93 (BC_7, ddr3bd27          ,  bidir          , X,    92 , 1, Z    ),"&
     "   92 (BC_2, *                 ,  control        , 1                  ),"&
     "   91 (BC_7, ddr3bd28          ,  bidir          , X,    90 , 1, Z    ),"&
     "   90 (BC_2, *                 ,  control        , 1                  ),"&
     "   89 (BC_7, ddr3bd29          ,  bidir          , X,    88 , 1, Z    ),"&
     "   88 (BC_2, *                 ,  control        , 1                  ),"&
     "   87 (BC_7, ddr3bd30          ,  bidir          , X,    86 , 1, Z    ),"&
     "   86 (BC_2, *                 ,  control        , 1                  ),"&
     "   85 (BC_7, ddr3bd31          ,  bidir          , X,    84 , 1, Z    ),"&
     "   84 (BC_2, *                 ,  control        , 1                  ),"&
     "   83 (BC_7, ddr3bd32          ,  bidir          , X,    82 , 1, Z    ),"&
     "   82 (BC_2, *                 ,  control        , 1                  ),"&
     "   81 (BC_7, ddr3bd33          ,  bidir          , X,    80 , 1, Z    ),"&
     "   80 (BC_2, *                 ,  control        , 1                  ),"&
     "   79 (BC_7, ddr3bd34          ,  bidir          , X,    78 , 1, Z    ),"&
     "   78 (BC_2, *                 ,  control        , 1                  ),"&
     "   77 (BC_7, ddr3bd35          ,  bidir          , X,    76 , 1, Z    ),"&
     "   76 (BC_2, *                 ,  control        , 1                  ),"&
     "   75 (BC_7, ddr3bd36          ,  bidir          , X,    74 , 1, Z    ),"&
     "   74 (BC_2, *                 ,  control        , 1                  ),"&
     "   73 (BC_7, ddr3bd37          ,  bidir          , X,    72 , 1, Z    ),"&
     "   72 (BC_2, *                 ,  control        , 1                  ),"&
     "   71 (BC_7, ddr3bd38          ,  bidir          , X,    70 , 1, Z    ),"&
     "   70 (BC_2, *                 ,  control        , 1                  ),"&
     "   69 (BC_7, ddr3bd39          ,  bidir          , X,    68 , 1, Z    ),"&
     "   68 (BC_2, *                 ,  control        , 1                  ),"&
     "   67 (BC_7, ddr3bd40          ,  bidir          , X,    66 , 1, Z    ),"&
     "   66 (BC_2, *                 ,  control        , 1                  ),"&
     "   65 (BC_7, ddr3bd41          ,  bidir          , X,    64 , 1, Z    ),"&
     "   64 (BC_2, *                 ,  control        , 1                  ),"&
     "   63 (BC_7, ddr3bd42          ,  bidir          , X,    62 , 1, Z    ),"&
     "   62 (BC_2, *                 ,  control        , 1                  ),"&
     "   61 (BC_7, ddr3bd43          ,  bidir          , X,    60 , 1, Z    ),"&
     "   60 (BC_2, *                 ,  control        , 1                  ),"&
     "   59 (BC_7, ddr3bd44          ,  bidir          , X,    58 , 1, Z    ),"&
     "   58 (BC_2, *                 ,  control        , 1                  ),"&
     "   57 (BC_7, ddr3bd45          ,  bidir          , X,    56 , 1, Z    ),"&
     "   56 (BC_2, *                 ,  control        , 1                  ),"&
     "   55 (BC_7, ddr3bd46          ,  bidir          , X,    54 , 1, Z    ),"&
     "   54 (BC_2, *                 ,  control        , 1                  ),"&
     "   53 (BC_7, ddr3bd47          ,  bidir          , X,    52 , 1, Z    ),"&
     "   52 (BC_2, *                 ,  control        , 1                  ),"&
     "   51 (BC_7, ddr3bd48          ,  bidir          , X,    50 , 1, Z    ),"&
     "   50 (BC_2, *                 ,  control        , 1                  ),"&
     "   49 (BC_7, ddr3bd49          ,  bidir          , X,    48 , 1, Z    ),"&
     "   48 (BC_2, *                 ,  control        , 1                  ),"&
     "   47 (BC_7, ddr3bd50          ,  bidir          , X,    46 , 1, Z    ),"&
     "   46 (BC_2, *                 ,  control        , 1                  ),"&
     "   45 (BC_7, ddr3bd51          ,  bidir          , X,    44 , 1, Z    ),"&
     "   44 (BC_2, *                 ,  control        , 1                  ),"&
     "   43 (BC_7, ddr3bd52          ,  bidir          , X,    42 , 1, Z    ),"&
     "   42 (BC_2, *                 ,  control        , 1                  ),"&
     "   41 (BC_7, ddr3bd53          ,  bidir          , X,    40 , 1, Z    ),"&
     "   40 (BC_2, *                 ,  control        , 1                  ),"&
     "   39 (BC_7, ddr3bd54          ,  bidir          , X,    38 , 1, Z    ),"&
     "   38 (BC_2, *                 ,  control        , 1                  ),"&
     "   37 (BC_7, ddr3bd55          ,  bidir          , X,    36 , 1, Z    ),"&
     "   36 (BC_2, *                 ,  control        , 1                  ),"&
     "   35 (BC_7, ddr3bd56          ,  bidir          , X,    34 , 1, Z    ),"&
     "   34 (BC_2, *                 ,  control        , 1                  ),"&
     "   33 (BC_7, ddr3bd57          ,  bidir          , X,    32 , 1, Z    ),"&
     "   32 (BC_2, *                 ,  control        , 1                  ),"&
     "   31 (BC_7, ddr3bd58          ,  bidir          , X,    30 , 1, Z    ),"&
     "   30 (BC_2, *                 ,  control        , 1                  ),"&
     "   29 (BC_7, ddr3bd59          ,  bidir          , X,    28 , 1, Z    ),"&
     "   28 (BC_2, *                 ,  control        , 1                  ),"&
     "   27 (BC_7, ddr3bd60          ,  bidir          , X,    26 , 1, Z    ),"&
     "   26 (BC_2, *                 ,  control        , 1                  ),"&
     "   25 (BC_7, ddr3bd61          ,  bidir          , X,    24 , 1, Z    ),"&
     "   24 (BC_2, *                 ,  control        , 1                  ),"&
     "   23 (BC_7, ddr3bd62          ,  bidir          , X,    22 , 1, Z    ),"&
     "   22 (BC_2, *                 ,  control        , 1                  ),"&
     "   21 (BC_7, ddr3bd63          ,  bidir          , X,    20 , 1, Z    ),"&
     "   20 (BC_2, *                 ,  control        , 1                  ),"&
     "   19 (BC_7, ddr3bcb00         ,  bidir          , X,    18 , 1, Z    ),"&
     "   18 (BC_2, *                 ,  control        , 1                  ),"&
     "   17 (BC_7, ddr3bcb01         ,  bidir          , X,    16 , 1, Z    ),"&
     "   16 (BC_2, *                 ,  control        , 1                  ),"&
     "   15 (BC_7, ddr3bcb02         ,  bidir          , X,    14 , 1, Z    ),"&
     "   14 (BC_2, *                 ,  control        , 1                  ),"&
     "   13 (BC_7, ddr3bcb03         ,  bidir          , X,    12 , 1, Z    ),"&
     "   12 (BC_2, *                 ,  control        , 1                  ),"&
     "   11 (BC_7, ddr3bcb04         ,  bidir          , X,    10 , 1, Z    ),"&
     "   10 (BC_2, *                 ,  control        , 1                  ),"&
     "    9 (BC_7, ddr3bcb05         ,  bidir          , X,     8 , 1, Z    ),"&
     "    8 (BC_2, *                 ,  control        , 1                  ),"&
     "    7 (BC_7, ddr3bcb06         ,  bidir          , X,     6 , 1, Z    ),"&
     "    6 (BC_2, *                 ,  control        , 1                  ),"&
     "    5 (BC_7, ddr3bcb07         ,  bidir          , X,     4 , 1, Z    ),"&
     "    4 (BC_2, *                 ,  control        , 1                  ),"&
     "    3 (BC_7, rsv030            ,  bidir          , X,     2 , 1, Z    ),"&
     "    2 (BC_2, *                 ,  control        , 1                  ),"&
     "    1 (BC_7, rsv031            ,  bidir          , X,     0 , 1, Z    ),"&
     "    0 (BC_2, *                 ,  control        , 1                  )";

 attribute AIO_COMPONENT_CONFORMANCE  of TI66AK2H06_12 : entity is "STD_1149_6_2003";
 attribute AIO_EXTEST_Pulse_Execution of TI66AK2H06_12 : entity is "Wait_Duration tck 15";
 attribute AIO_EXTEST_Train_Execution of TI66AK2H06_12 : entity is "train 30, maximum_time 120.0e-6";
 attribute AIO_Pin_Behavior           of TI66AK2H06_12 : entity is
        "rsv174, rsv176, rsv178, rsv180, rsv182, rsv184,                                     "&
        "pcietxp0, pcietxp1, sgmii0txp, sgmii1txp, sgmii2txp, sgmii3txp,                           "&
        "riotxp0, riotxp1, riotxp2, riotxp3,                                                       "&
        "hyp0txp0, hyp0txp1, hyp0txp2, hyp0txp3,                                                   "&
        "hyp1txp0, hyp1txp1, hyp1txp2, hyp1txp3,                                                    "&
        "rsv063, rsv067               : AC_Select = 1059;                  "&
        "rsv162, rsv164, rsv166, rsv168, rsv170, rsv172,                                     "&
        "pcierxp0, pcierxp1, sgmii0rxp, sgmii1rxp, sgmii2rxp, sgmii3rxp,                           "&
        "riorxp0, riorxp1, riorxp2, riorxp3,                                                       "&
        "hyp0rxp0, hyp0rxp1, hyp0rxp2, hyp0rxp3,                                                   "&
        "hyp1rxp0, hyp1rxp1, hyp1rxp2, hyp1rxp3,                                                    "&
        "rsv065, rsv061               : LP_time=10.0e-9 HP_time=500.0e-9";
		
 attribute DESIGN_WARNING of TI66AK2H06_12 : entity is
        " According to simulation, BSD JTAG TAP may not work correctly unless  "&
        " device has completed RESET sequence first.                           "&
        " Forcing POR  low then release (no clock pulses required) would meet  "&
        " the requirement.                                                     "&
        "                                                                      "&
        " Note that boundary scan registers with disable result WEAK1 are      "&
        " open drain type pins, which will require external pull-ups for       "&
        " tests to perform correctly.                                          "&
        "                                                                      "&
        " In order to enter bscan mode correctly, TMS must be low at the       "&
        " rising edge of TRST  and at least one cycle after TRST  is high.     "&
        "                                                                      "&
        " Once device is programmed for IEEE1149.6 operations, AC coupling RX  "&
        " pins' comparators become edge sensitive. Therefore their boundary    "&
        " scan captured values are indeterministic until an edge/transition    "&
        " is detected.                                                         ";

end TI66AK2H06_12;