--$ XILINX$RCSfile: xc2s30_tq144.bsd,v $
--$ XILINX$Revision: 1.1 $
--
-- BSDL file for device XC2S30, package TQ144
-- Xilinx, Inc. $State: PRELIMINARY $ $Date: 2000-07-11 10:24:54-07 $
-- Generated by createBSDL 2.20
--
-- For technical support, contact Xilinx as follows:
-- North America 1-800-255-7778 hotline@xilinx.com
-- United Kingdom (44) 1932 820821 ukhelp@xilinx.com
-- France (33) 1 3463 0100 frhelp@xilinx.com
-- Germany (49) 89 991 54930 dlhelp@xilinx.com
-- Japan (81) 3-3297-9163 jhotline@xilinx.com
--
-- This BSDL file reflects the pre-configuration JTAG behavior. To reflect
-- the post-configuration JTAG behavior (if any), edit this file as described
-- below. Many of these changes are demonstrated by commented-out template
-- lines preceeding the lines they would replace:
--
-- 1. Enable USER instructions as appropriate (see below).
-- 2. Set disable result of all pads as configured.
-- 3. Set safe state of boundary cells as necessary.
-- 4. Rename entity if necessary to avoid name collisions.
-- 5. Modify USERCODE value in USERCODE_REGISTER declaration.
--
-- The boundary scan test vectors must keep the PROGRAM pin either 3-stated
-- or driving high. If the PROGRAM pin is driven low through any means,
-- the TAP controller will reset.
--
-- All IOBs prior to configuration, and unused and output-only IOBs following
-- configuration, will sense their pad values during boundary-scan with an LVTTL
-- input buffer. In order to properly capture a logic high value driven from one
-- of these IOBs into an input boundary scan cell, VCCO must be
-- at least 2V (Vih for LVTTL).
--
-- For post-configuration boundary scan only: If an IOB is configured to use
-- an input standard that uses VREF pins, then the boundary scan test vectors
-- must keep the used VREF pins 3-stated.
--
-- The disable value of a 3-stated I/O is set to PULL0 - the proper value
-- for configuration modes without the pre-configuration
-- pullups (M2,M1,M0 set to 000, 101, 110, or 111). If not in one of
-- these modes, all PULL0's should be PULL1's. Additionally, when in
-- EXTEST updating the values for M2, M1, and M0 will directly affect
-- the existence of the pre-configuration pullup.
-- It is therefore recommended to shift in the same mode being driven
-- externally when relying upon the these values.
entity XC2S30_TQ144 is
generic (PHYSICAL_PIN_MAP : string := "TQ144" );
port (
CCLK_P37: inout bit;
DONE_P72: inout bit;
GCK0_P88: in bit;
GCK1_P91: in bit;
GCK2_P18: in bit;
GCK3_P15: in bit;
GND: linkage bit_vector (1 to 16);
INIT_P68: inout bit; -- PAD72
M0_P109: in bit;
M1_P111: in bit;
M2_P106: in bit;
PROGRAM: in bit;
PWDNB: in bit;
STATUSB: linkage bit;
TCK: in bit;
TDI: in bit;
TDO: out bit;
TMS: in bit;
VCCINT: linkage bit_vector (1 to 8);
VCCO01: linkage bit_vector (1 to 3);
VCCO23: linkage bit_vector (1 to 3);
VCCO45: linkage bit_vector (1 to 3);
VCCO67: linkage bit_vector (1 to 3);
IO_P3: inout bit; -- PAD2
IO_P4: inout bit; -- PAD3
IO_P5: inout bit; -- PAD5
IO_P6: inout bit; -- PAD7
IO_P7: inout bit; -- PAD8
IO_P10: inout bit; -- PAD9
IO_P11: inout bit; -- PAD10
IO_P12: inout bit; -- PAD14
IO_P13: inout bit; -- PAD16
IO_P19: inout bit; -- PAD20
IO_P20: inout bit; -- PAD21
IO_P21: inout bit; -- PAD23
IO_P22: inout bit; -- PAD27
IO_P23: inout bit; -- PAD28
IO_P26: inout bit; -- PAD29
IO_P27: inout bit; -- PAD30
IO_P28: inout bit; -- PAD32
IO_P29: inout bit; -- PAD34
IO_P30: inout bit; -- PAD35
IO_P31: inout bit; -- PAD36
IO_P38: inout bit; -- PAD37
IO_P39: inout bit; -- PAD38
IO_P40: inout bit; -- PAD39
IO_P41: inout bit; -- PAD41
IO_P42: inout bit; -- PAD42
IO_P43: inout bit; -- PAD43
IO_P44: inout bit; -- PAD44
IO_P46: inout bit; -- PAD45
IO_P47: inout bit; -- PAD46
IO_P48: inout bit; -- PAD50
IO_P49: inout bit; -- PAD51
IO_P50: inout bit; -- PAD52
IO_P51: inout bit; -- PAD54
IO_P54: inout bit; -- PAD55
IO_P56: inout bit; -- PAD57
IO_P57: inout bit; -- PAD58
IO_P58: inout bit; -- PAD59
IO_P59: inout bit; -- PAD63
IO_P60: inout bit; -- PAD64
IO_P62: inout bit; -- PAD65
IO_P63: inout bit; -- PAD66
IO_P64: inout bit; -- PAD67
IO_P65: inout bit; -- PAD68
IO_P66: inout bit; -- PAD70
IO_P67: inout bit; -- PAD71
IO_P74: inout bit; -- PAD73
IO_P75: inout bit; -- PAD74
IO_P76: inout bit; -- PAD75
IO_P77: inout bit; -- PAD77
IO_P78: inout bit; -- PAD78
IO_P79: inout bit; -- PAD79
IO_P80: inout bit; -- PAD80
IO_P83: inout bit; -- PAD81
IO_P84: inout bit; -- PAD82
IO_P85: inout bit; -- PAD86
IO_P86: inout bit; -- PAD88
IO_P87: inout bit; -- PAD89
IO_P93: inout bit; -- PAD93
IO_P94: inout bit; -- PAD95
IO_P95: inout bit; -- PAD99
IO_P96: inout bit; -- PAD100
IO_P99: inout bit; -- PAD101
IO_P100: inout bit; -- PAD102
IO_P101: inout bit; -- PAD103
IO_P102: inout bit; -- PAD104
IO_P103: inout bit; -- PAD106
IO_P112: inout bit; -- PAD109
IO_P113: inout bit; -- PAD110
IO_P114: inout bit; -- PAD111
IO_P115: inout bit; -- PAD113
IO_P116: inout bit; -- PAD114
IO_P117: inout bit; -- PAD115
IO_P118: inout bit; -- PAD116
IO_P120: inout bit; -- PAD117
IO_P121: inout bit; -- PAD118
IO_P122: inout bit; -- PAD122
IO_P123: inout bit; -- PAD123
IO_P124: inout bit; -- PAD124
IO_P126: inout bit; -- PAD126
IO_P129: inout bit; -- PAD127
IO_P130: inout bit; -- PAD129
IO_P131: inout bit; -- PAD130
IO_P132: inout bit; -- PAD131
IO_P133: inout bit; -- PAD135
IO_P134: inout bit; -- PAD136
IO_P136: inout bit; -- PAD137
IO_P137: inout bit; -- PAD138
IO_P138: inout bit; -- PAD139
IO_P139: inout bit; -- PAD140
IO_P140: inout bit; -- PAD142
IO_P141: inout bit -- PAD143
); --end port list
use STD_1149_1_1994.all;
attribute COMPONENT_CONFORMANCE of XC2S30_TQ144 : entity is
"STD_1149_1_1993";
attribute PIN_MAP of XC2S30_TQ144 : entity is PHYSICAL_PIN_MAP;
constant TQ144: PIN_MAP_STRING:=
"CCLK_P37:P37," &
"DONE_P72:P72," &
"GCK0_P88:P88," &
"GCK1_P91:P91," &
"GCK2_P18:P18," &
"GCK3_P15:P15," &
"GND:(P8,P17,P25,P33,P45,P52,P61,P73,P81,P89," &
"P98,P110,P119,P128,P135,P143)," &
"INIT_P68:P68," &
"M0_P109:P109," &
"M1_P111:P111," &
"M2_P106:P106," &
"PROGRAM:P69," &
"PWDNB:P105," &
"STATUSB:P104," &
"TCK:P2," &
"TDI:P32," &
"TDO:P34," &
"TMS:P142," &
"VCCINT:(P9,P14,P24,P55,P82,P92,P97,P125)," &
"VCCO01:(P1,P16,P35)," &
"VCCO23:(P36,P53,P70)," &
"VCCO45:(P71,P90,P107)," &
"VCCO67:(P108,P127,P144)," &
"IO_P3:P3," &
"IO_P4:P4," &
"IO_P5:P5," &
"IO_P6:P6," &
"IO_P7:P7," &
"IO_P10:P10," &
"IO_P11:P11," &
"IO_P12:P12," &
"IO_P13:P13," &
"IO_P19:P19," &
"IO_P20:P20," &
"IO_P21:P21," &
"IO_P22:P22," &
"IO_P23:P23," &
"IO_P26:P26," &
"IO_P27:P27," &
"IO_P28:P28," &
"IO_P29:P29," &
"IO_P30:P30," &
"IO_P31:P31," &
"IO_P38:P38," &
"IO_P39:P39," &
"IO_P40:P40," &
"IO_P41:P41," &
"IO_P42:P42," &
"IO_P43:P43," &
"IO_P44:P44," &
"IO_P46:P46," &
"IO_P47:P47," &
"IO_P48:P48," &
"IO_P49:P49," &
"IO_P50:P50," &
"IO_P51:P51," &
"IO_P54:P54," &
"IO_P56:P56," &
"IO_P57:P57," &
"IO_P58:P58," &
"IO_P59:P59," &
"IO_P60:P60," &
"IO_P62:P62," &
"IO_P63:P63," &
"IO_P64:P64," &
"IO_P65:P65," &
"IO_P66:P66," &
"IO_P67:P67," &
"IO_P74:P74," &
"IO_P75:P75," &
"IO_P76:P76," &
"IO_P77:P77," &
"IO_P78:P78," &
"IO_P79:P79," &
"IO_P80:P80," &
"IO_P83:P83," &
"IO_P84:P84," &
"IO_P85:P85," &
"IO_P86:P86," &
"IO_P87:P87," &
"IO_P93:P93," &
"IO_P94:P94," &
"IO_P95:P95," &
"IO_P96:P96," &
"IO_P99:P99," &
"IO_P100:P100," &
"IO_P101:P101," &
"IO_P102:P102," &
"IO_P103:P103," &
"IO_P112:P112," &
"IO_P113:P113," &
"IO_P114:P114," &
"IO_P115:P115," &
"IO_P116:P116," &
"IO_P117:P117," &
"IO_P118:P118," &
"IO_P120:P120," &
"IO_P121:P121," &
"IO_P122:P122," &
"IO_P123:P123," &
"IO_P124:P124," &
"IO_P126:P126," &
"IO_P129:P129," &
"IO_P130:P130," &
"IO_P131:P131," &
"IO_P132:P132," &
"IO_P133:P133," &
"IO_P134:P134," &
"IO_P136:P136," &
"IO_P137:P137," &
"IO_P138:P138," &
"IO_P139:P139," &
"IO_P140:P140," &
"IO_P141:P141";
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (33.0e6, BOTH);
attribute COMPLIANCE_PATTERNS of XC2S30_TQ144 : entity is
"(PROGRAM, PWDNB) (11)";
attribute INSTRUCTION_LENGTH of XC2S30_TQ144 : entity is 5;
attribute INSTRUCTION_OPCODE of XC2S30_TQ144 : entity is
"SAMPLE (00001)," &
"INTEST (00111)," &
"USERCODE (01000)," &
"IDCODE (01001)," &
"HIGHZ (01010)," &
"JSTART (01100)," & -- Not available during configuration with another mode.
"RESERVED (00110)," &
"CFG_OUT (00100)," & -- Not available during configuration with another mode.
"CFG_IN (00101)," & -- Not available during configuration with another mode.
"USER2 (00011)," & -- Not available until after configuration
"USER1 (00010)," & -- Not available until after configuration
"EXTEST (00000)," &
"BYPASS (11111)";
attribute INSTRUCTION_CAPTURE of XC2S30_TQ144 : entity is "XXX01";
-- Bit 4 of instruction capture is PROGRAM. Bit 3 is INIT. Bit 2 is DONE.
-- If the device is configured, and a USER instruction is implemented
-- and not private to the FPGA designer, then it should be removed
-- from INSTRUCTION_PRIVATE, and the target register should be defined
-- in REGISTER_ACCESS.
attribute INSTRUCTION_PRIVATE of XC2S30_TQ144 : entity is
"USER1," &
"USER2," &
"JSTART," &
"CFG_IN," &
"RESERVED," &
"CFG_OUT";
attribute IDCODE_REGISTER of XC2S30_TQ144 : entity is
"XXXX" & -- version
"0000011" & -- family
"000001100" & -- array size
"00001001001" & -- manufacturer
"1"; -- required by 1149.1
attribute USERCODE_REGISTER of XC2S30_TQ144 : entity is
"XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX";
attribute REGISTER_ACCESS of XC2S30_TQ144 : entity is
-- "<reg_name>[<length>] (USER1)," &
-- "<reg_name>[<length>] (USER2)," &
"BYPASS (HIGHZ,BYPASS)," &
"DEVICE_ID (USERCODE,IDCODE)," &
"BOUNDARY (SAMPLE,INTEST,EXTEST)";
attribute BOUNDARY_LENGTH of XC2S30_TQ144 : entity is 446;
attribute BOUNDARY_REGISTER of XC2S30_TQ144 : entity is
-- cellnum (type, port, function, safe[, ccell, disval, disrslt])
" 0 (BC_1, *, controlr, 1)," &
" 1 (BC_1, IO_P31, output3, X, 0, 1, PULL0)," & -- PAD36
" 2 (BC_1, IO_P31, input, X)," & -- PAD36
" 3 (BC_1, *, controlr, 1)," &
" 4 (BC_1, IO_P30, output3, X, 3, 1, PULL0)," & -- PAD35
" 5 (BC_1, IO_P30, input, X)," & -- PAD35
" 6 (BC_1, *, controlr, 1)," &
" 7 (BC_1, IO_P29, output3, X, 6, 1, PULL0)," & -- PAD34
" 8 (BC_1, IO_P29, input, X)," & -- PAD34
" 9 (BC_1, *, internal, 1)," & -- PAD33.T
" 10 (BC_1, *, internal, X)," & -- PAD33.O
" 11 (BC_1, *, internal, X)," & -- PAD33.I
" 12 (BC_1, *, controlr, 1)," &
" 13 (BC_1, IO_P28, output3, X, 12, 1, PULL0)," & -- PAD32
" 14 (BC_1, IO_P28, input, X)," & -- PAD32
" 15 (BC_1, *, internal, 1)," & -- PAD31.T
" 16 (BC_1, *, internal, X)," & -- PAD31.O
" 17 (BC_1, *, internal, X)," & -- PAD31.I
" 18 (BC_1, *, controlr, 1)," &
" 19 (BC_1, IO_P27, output3, X, 18, 1, PULL0)," & -- PAD30
" 20 (BC_1, IO_P27, input, X)," & -- PAD30
" 21 (BC_1, *, controlr, 1)," &
" 22 (BC_1, IO_P26, output3, X, 21, 1, PULL0)," & -- PAD29
" 23 (BC_1, IO_P26, input, X)," & -- PAD29
" 24 (BC_1, *, controlr, 1)," &
" 25 (BC_1, IO_P23, output3, X, 24, 1, PULL0)," & -- PAD28
" 26 (BC_1, IO_P23, input, X)," & -- PAD28
" 27 (BC_1, *, controlr, 1)," &
" 28 (BC_1, IO_P22, output3, X, 27, 1, PULL0)," & -- PAD27
" 29 (BC_1, IO_P22, input, X)," & -- PAD27
" 30 (BC_1, *, internal, 1)," & -- PAD26.T
" 31 (BC_1, *, internal, X)," & -- PAD26.O
" 32 (BC_1, *, internal, X)," & -- PAD26.I
" 33 (BC_1, *, internal, 1)," & -- PAD25.T
" 34 (BC_1, *, internal, X)," & -- PAD25.O
" 35 (BC_1, *, internal, X)," & -- PAD25.I
" 36 (BC_1, *, internal, 1)," & -- PAD24.T
" 37 (BC_1, *, internal, X)," & -- PAD24.O
" 38 (BC_1, *, internal, X)," & -- PAD24.I
" 39 (BC_1, *, controlr, 1)," &
" 40 (BC_1, IO_P21, output3, X, 39, 1, PULL0)," & -- PAD23
" 41 (BC_1, IO_P21, input, X)," & -- PAD23
" 42 (BC_1, *, internal, 1)," & -- PAD22.T
" 43 (BC_1, *, internal, X)," & -- PAD22.O
" 44 (BC_1, *, internal, X)," & -- PAD22.I
" 45 (BC_1, *, controlr, 1)," &
" 46 (BC_1, IO_P20, output3, X, 45, 1, PULL0)," & -- PAD21
" 47 (BC_1, IO_P20, input, X)," & -- PAD21
" 48 (BC_1, *, controlr, 1)," &
" 49 (BC_1, IO_P19, output3, X, 48, 1, PULL0)," & -- PAD20
" 50 (BC_1, IO_P19, input, X)," & -- PAD20
" 51 (BC_1, *, internal, 1)," & -- PAD19.T
" 52 (BC_1, *, internal, X)," & -- PAD19.O
" 53 (BC_1, *, internal, X)," & -- PAD19.I
" 54 (BC_1, GCK2_P18, input, X)," &
" 55 (BC_1, GCK3_P15, input, X)," &
" 56 (BC_1, *, internal, 1)," & -- PAD18.T
" 57 (BC_1, *, internal, X)," & -- PAD18.O
" 58 (BC_1, *, internal, X)," & -- PAD18.I
" 59 (BC_1, *, internal, 1)," & -- PAD17.T
" 60 (BC_1, *, internal, X)," & -- PAD17.O
" 61 (BC_1, *, internal, X)," & -- PAD17.I
" 62 (BC_1, *, controlr, 1)," &
" 63 (BC_1, IO_P13, output3, X, 62, 1, PULL0)," & -- PAD16
" 64 (BC_1, IO_P13, input, X)," & -- PAD16
" 65 (BC_1, *, internal, 1)," & -- PAD15.T
" 66 (BC_1, *, internal, X)," & -- PAD15.O
" 67 (BC_1, *, internal, X)," & -- PAD15.I
" 68 (BC_1, *, controlr, 1)," &
" 69 (BC_1, IO_P12, output3, X, 68, 1, PULL0)," & -- PAD14
" 70 (BC_1, IO_P12, input, X)," & -- PAD14
" 71 (BC_1, *, internal, 1)," & -- PAD13.T
" 72 (BC_1, *, internal, X)," & -- PAD13.O
" 73 (BC_1, *, internal, X)," & -- PAD13.I
" 74 (BC_1, *, internal, 1)," & -- PAD12.T
" 75 (BC_1, *, internal, X)," & -- PAD12.O
" 76 (BC_1, *, internal, X)," & -- PAD12.I
" 77 (BC_1, *, internal, 1)," & -- PAD11.T
" 78 (BC_1, *, internal, X)," & -- PAD11.O
" 79 (BC_1, *, internal, X)," & -- PAD11.I
" 80 (BC_1, *, controlr, 1)," &
" 81 (BC_1, IO_P11, output3, X, 80, 1, PULL0)," & -- PAD10
" 82 (BC_1, IO_P11, input, X)," & -- PAD10
" 83 (BC_1, *, controlr, 1)," &
" 84 (BC_1, IO_P10, output3, X, 83, 1, PULL0)," & -- PAD9
" 85 (BC_1, IO_P10, input, X)," & -- PAD9
" 86 (BC_1, *, controlr, 1)," &
" 87 (BC_1, IO_P7, output3, X, 86, 1, PULL0)," & -- PAD8
" 88 (BC_1, IO_P7, input, X)," & -- PAD8
" 89 (BC_1, *, controlr, 1)," &
" 90 (BC_1, IO_P6, output3, X, 89, 1, PULL0)," & -- PAD7
" 91 (BC_1, IO_P6, input, X)," & -- PAD7
" 92 (BC_1, *, internal, 1)," & -- PAD6.T
" 93 (BC_1, *, internal, X)," & -- PAD6.O
" 94 (BC_1, *, internal, X)," & -- PAD6.I
" 95 (BC_1, *, controlr, 1)," &
" 96 (BC_1, IO_P5, output3, X, 95, 1, PULL0)," & -- PAD5
" 97 (BC_1, IO_P5, input, X)," & -- PAD5
" 98 (BC_1, *, internal, 1)," & -- PAD4.T
" 99 (BC_1, *, internal, X)," & -- PAD4.O
" 100 (BC_1, *, internal, X)," & -- PAD4.I
" 101 (BC_1, *, controlr, 1)," &
" 102 (BC_1, IO_P4, output3, X, 101, 1, PULL0)," & -- PAD3
" 103 (BC_1, IO_P4, input, X)," & -- PAD3
" 104 (BC_1, *, controlr, 1)," &
" 105 (BC_1, IO_P3, output3, X, 104, 1, PULL0)," & -- PAD2
" 106 (BC_1, IO_P3, input, X)," & -- PAD2
" 107 (BC_1, *, internal, 1)," & -- PAD1.T
" 108 (BC_1, *, internal, X)," & -- PAD1.O
" 109 (BC_1, *, internal, X)," & -- PAD1.I
" 110 (BC_1, *, internal, 1)," & -- PAD144.T
" 111 (BC_1, *, internal, X)," & -- PAD144.O
" 112 (BC_1, *, internal, X)," & -- PAD144.I
" 113 (BC_1, *, controlr, 1)," &
" 114 (BC_1, IO_P141, output3, X, 113, 1, PULL0)," & -- PAD143
" 115 (BC_1, IO_P141, input, X)," & -- PAD143
" 116 (BC_1, *, controlr, 1)," &
" 117 (BC_1, IO_P140, output3, X, 116, 1, PULL0)," & -- PAD142
" 118 (BC_1, IO_P140, input, X)," & -- PAD142
" 119 (BC_1, *, internal, 1)," & -- PAD141.T
" 120 (BC_1, *, internal, X)," & -- PAD141.O
" 121 (BC_1, *, internal, X)," & -- PAD141.I
" 122 (BC_1, *, controlr, 1)," &
" 123 (BC_1, IO_P139, output3, X, 122, 1, PULL0)," & -- PAD140
" 124 (BC_1, IO_P139, input, X)," & -- PAD140
" 125 (BC_1, *, controlr, 1)," &
" 126 (BC_1, IO_P138, output3, X, 125, 1, PULL0)," & -- PAD139
" 127 (BC_1, IO_P138, input, X)," & -- PAD139
" 128 (BC_1, *, controlr, 1)," &
" 129 (BC_1, IO_P137, output3, X, 128, 1, PULL0)," & -- PAD138
" 130 (BC_1, IO_P137, input, X)," & -- PAD138
" 131 (BC_1, *, controlr, 1)," &
" 132 (BC_1, IO_P136, output3, X, 131, 1, PULL0)," & -- PAD137
" 133 (BC_1, IO_P136, input, X)," & -- PAD137
" 134 (BC_1, *, controlr, 1)," &
" 135 (BC_1, IO_P134, output3, X, 134, 1, PULL0)," & -- PAD136
" 136 (BC_1, IO_P134, input, X)," & -- PAD136
" 137 (BC_1, *, controlr, 1)," &
" 138 (BC_1, IO_P133, output3, X, 137, 1, PULL0)," & -- PAD135
" 139 (BC_1, IO_P133, input, X)," & -- PAD135
" 140 (BC_1, *, internal, 1)," & -- PAD134.T
" 141 (BC_1, *, internal, X)," & -- PAD134.O
" 142 (BC_1, *, internal, X)," & -- PAD134.I
" 143 (BC_1, *, internal, 1)," & -- PAD133.T
" 144 (BC_1, *, internal, X)," & -- PAD133.O
" 145 (BC_1, *, internal, X)," & -- PAD133.I
" 146 (BC_1, *, internal, 1)," & -- PAD132.T
" 147 (BC_1, *, internal, X)," & -- PAD132.O
" 148 (BC_1, *, internal, X)," & -- PAD132.I
" 149 (BC_1, *, controlr, 1)," &
" 150 (BC_1, IO_P132, output3, X, 149, 1, PULL0)," & -- PAD131
" 151 (BC_1, IO_P132, input, X)," & -- PAD131
" 152 (BC_1, *, controlr, 1)," &
" 153 (BC_1, IO_P131, output3, X, 152, 1, PULL0)," & -- PAD130
" 154 (BC_1, IO_P131, input, X)," & -- PAD130
" 155 (BC_1, *, controlr, 1)," &
" 156 (BC_1, IO_P130, output3, X, 155, 1, PULL0)," & -- PAD129
" 157 (BC_1, IO_P130, input, X)," & -- PAD129
" 158 (BC_1, *, internal, 1)," & -- PAD128.T
" 159 (BC_1, *, internal, X)," & -- PAD128.O
" 160 (BC_1, *, internal, X)," & -- PAD128.I
" 161 (BC_1, *, controlr, 1)," &
" 162 (BC_1, IO_P129, output3, X, 161, 1, PULL0)," & -- PAD127
" 163 (BC_1, IO_P129, input, X)," & -- PAD127
" 164 (BC_1, *, controlr, 1)," &
" 165 (BC_1, IO_P126, output3, X, 164, 1, PULL0)," & -- PAD126
" 166 (BC_1, IO_P126, input, X)," & -- PAD126
" 167 (BC_1, *, internal, 1)," & -- PAD125.T
" 168 (BC_1, *, internal, X)," & -- PAD125.O
" 169 (BC_1, *, internal, X)," & -- PAD125.I
" 170 (BC_1, *, controlr, 1)," &
" 171 (BC_1, IO_P124, output3, X, 170, 1, PULL0)," & -- PAD124
" 172 (BC_1, IO_P124, input, X)," & -- PAD124
" 173 (BC_1, *, controlr, 1)," &
" 174 (BC_1, IO_P123, output3, X, 173, 1, PULL0)," & -- PAD123
" 175 (BC_1, IO_P123, input, X)," & -- PAD123
" 176 (BC_1, *, controlr, 1)," &
" 177 (BC_1, IO_P122, output3, X, 176, 1, PULL0)," & -- PAD122
" 178 (BC_1, IO_P122, input, X)," & -- PAD122
" 179 (BC_1, *, internal, 1)," & -- PAD121.T
" 180 (BC_1, *, internal, X)," & -- PAD121.O
" 181 (BC_1, *, internal, X)," & -- PAD121.I
" 182 (BC_1, *, internal, 1)," & -- PAD120.T
" 183 (BC_1, *, internal, X)," & -- PAD120.O
" 184 (BC_1, *, internal, X)," & -- PAD120.I
" 185 (BC_1, *, internal, 1)," & -- PAD119.T
" 186 (BC_1, *, internal, X)," & -- PAD119.O
" 187 (BC_1, *, internal, X)," & -- PAD119.I
" 188 (BC_1, *, controlr, 1)," &
" 189 (BC_1, IO_P121, output3, X, 188, 1, PULL0)," & -- PAD118
" 190 (BC_1, IO_P121, input, X)," & -- PAD118
" 191 (BC_1, *, controlr, 1)," &
" 192 (BC_1, IO_P120, output3, X, 191, 1, PULL0)," & -- PAD117
" 193 (BC_1, IO_P120, input, X)," & -- PAD117
" 194 (BC_1, *, controlr, 1)," &
" 195 (BC_1, IO_P118, output3, X, 194, 1, PULL0)," & -- PAD116
" 196 (BC_1, IO_P118, input, X)," & -- PAD116
" 197 (BC_1, *, controlr, 1)," &
" 198 (BC_1, IO_P117, output3, X, 197, 1, PULL0)," & -- PAD115
" 199 (BC_1, IO_P117, input, X)," & -- PAD115
" 200 (BC_1, *, controlr, 1)," &
" 201 (BC_1, IO_P116, output3, X, 200, 1, PULL0)," & -- PAD114
" 202 (BC_1, IO_P116, input, X)," & -- PAD114
" 203 (BC_1, *, controlr, 1)," &
" 204 (BC_1, IO_P115, output3, X, 203, 1, PULL0)," & -- PAD113
" 205 (BC_1, IO_P115, input, X)," & -- PAD113
" 206 (BC_1, *, internal, 1)," & -- PAD112.T
" 207 (BC_1, *, internal, X)," & -- PAD112.O
" 208 (BC_1, *, internal, X)," & -- PAD112.I
" 209 (BC_1, *, controlr, 1)," &
" 210 (BC_1, IO_P114, output3, X, 209, 1, PULL0)," & -- PAD111
" 211 (BC_1, IO_P114, input, X)," & -- PAD111
" 212 (BC_1, *, controlr, 1)," &
" 213 (BC_1, IO_P113, output3, X, 212, 1, PULL0)," & -- PAD110
" 214 (BC_1, IO_P113, input, X)," & -- PAD110
" 215 (BC_1, *, controlr, 1)," &
" 216 (BC_1, IO_P112, output3, X, 215, 1, PULL0)," & -- PAD109
" 217 (BC_1, IO_P112, input, X)," & -- PAD109
" 218 (BC_1, M1_P111, input, X)," &
" 219 (BC_1, M0_P109, input, X)," &
" 220 (BC_1, M2_P106, input, X)," &
" 221 (BC_1, *, internal, 1)," & -- PAD108.T
" 222 (BC_1, *, internal, X)," & -- PAD108.O
" 223 (BC_1, *, internal, X)," & -- PAD108.I
" 224 (BC_1, *, internal, 1)," & -- PAD107.T
" 225 (BC_1, *, internal, X)," & -- PAD107.O
" 226 (BC_1, *, internal, X)," & -- PAD107.I
" 227 (BC_1, *, controlr, 1)," &
" 228 (BC_1, IO_P103, output3, X, 227, 1, PULL0)," & -- PAD106
" 229 (BC_1, IO_P103, input, X)," & -- PAD106
" 230 (BC_1, *, internal, 1)," & -- PAD105.T
" 231 (BC_1, *, internal, X)," & -- PAD105.O
" 232 (BC_1, *, internal, X)," & -- PAD105.I
" 233 (BC_1, *, controlr, 1)," &
" 234 (BC_1, IO_P102, output3, X, 233, 1, PULL0)," & -- PAD104
" 235 (BC_1, IO_P102, input, X)," & -- PAD104
" 236 (BC_1, *, controlr, 1)," &
" 237 (BC_1, IO_P101, output3, X, 236, 1, PULL0)," & -- PAD103
" 238 (BC_1, IO_P101, input, X)," & -- PAD103
" 239 (BC_1, *, controlr, 1)," &
" 240 (BC_1, IO_P100, output3, X, 239, 1, PULL0)," & -- PAD102
" 241 (BC_1, IO_P100, input, X)," & -- PAD102
" 242 (BC_1, *, controlr, 1)," &
" 243 (BC_1, IO_P99, output3, X, 242, 1, PULL0)," & -- PAD101
" 244 (BC_1, IO_P99, input, X)," & -- PAD101
" 245 (BC_1, *, controlr, 1)," &
" 246 (BC_1, IO_P96, output3, X, 245, 1, PULL0)," & -- PAD100
" 247 (BC_1, IO_P96, input, X)," & -- PAD100
" 248 (BC_1, *, controlr, 1)," &
" 249 (BC_1, IO_P95, output3, X, 248, 1, PULL0)," & -- PAD99
" 250 (BC_1, IO_P95, input, X)," & -- PAD99
" 251 (BC_1, *, internal, 1)," & -- PAD98.T
" 252 (BC_1, *, internal, X)," & -- PAD98.O
" 253 (BC_1, *, internal, X)," & -- PAD98.I
" 254 (BC_1, *, internal, 1)," & -- PAD97.T
" 255 (BC_1, *, internal, X)," & -- PAD97.O
" 256 (BC_1, *, internal, X)," & -- PAD97.I
" 257 (BC_1, *, internal, 1)," & -- PAD96.T
" 258 (BC_1, *, internal, X)," & -- PAD96.O
" 259 (BC_1, *, internal, X)," & -- PAD96.I
" 260 (BC_1, *, controlr, 1)," &
" 261 (BC_1, IO_P94, output3, X, 260, 1, PULL0)," & -- PAD95
" 262 (BC_1, IO_P94, input, X)," & -- PAD95
" 263 (BC_1, *, internal, 1)," & -- PAD94.T
" 264 (BC_1, *, internal, X)," & -- PAD94.O
" 265 (BC_1, *, internal, X)," & -- PAD94.I
" 266 (BC_1, *, controlr, 1)," &
" 267 (BC_1, IO_P93, output3, X, 266, 1, PULL0)," & -- PAD93
" 268 (BC_1, IO_P93, input, X)," & -- PAD93
" 269 (BC_1, *, internal, 1)," & -- PAD92.T
" 270 (BC_1, *, internal, X)," & -- PAD92.O
" 271 (BC_1, *, internal, X)," & -- PAD92.I
" 272 (BC_1, *, internal, 1)," & -- PAD91.T
" 273 (BC_1, *, internal, X)," & -- PAD91.O
" 274 (BC_1, *, internal, X)," & -- PAD91.I
" 275 (BC_1, GCK1_P91, input, X)," &
" 276 (BC_1, GCK0_P88, input, X)," &
" 277 (BC_1, *, internal, 1)," & -- PAD90.T
" 278 (BC_1, *, internal, X)," & -- PAD90.O
" 279 (BC_1, *, internal, X)," & -- PAD90.I
" 280 (BC_1, *, controlr, 1)," &
" 281 (BC_1, IO_P87, output3, X, 280, 1, PULL0)," & -- PAD89
" 282 (BC_1, IO_P87, input, X)," & -- PAD89
" 283 (BC_1, *, controlr, 1)," &
" 284 (BC_1, IO_P86, output3, X, 283, 1, PULL0)," & -- PAD88
" 285 (BC_1, IO_P86, input, X)," & -- PAD88
" 286 (BC_1, *, internal, 1)," & -- PAD87.T
" 287 (BC_1, *, internal, X)," & -- PAD87.O
" 288 (BC_1, *, internal, X)," & -- PAD87.I
" 289 (BC_1, *, controlr, 1)," &
" 290 (BC_1, IO_P85, output3, X, 289, 1, PULL0)," & -- PAD86
" 291 (BC_1, IO_P85, input, X)," & -- PAD86
" 292 (BC_1, *, internal, 1)," & -- PAD85.T
" 293 (BC_1, *, internal, X)," & -- PAD85.O
" 294 (BC_1, *, internal, X)," & -- PAD85.I
" 295 (BC_1, *, internal, 1)," & -- PAD84.T
" 296 (BC_1, *, internal, X)," & -- PAD84.O
" 297 (BC_1, *, internal, X)," & -- PAD84.I
" 298 (BC_1, *, internal, 1)," & -- PAD83.T
" 299 (BC_1, *, internal, X)," & -- PAD83.O
" 300 (BC_1, *, internal, X)," & -- PAD83.I
" 301 (BC_1, *, controlr, 1)," &
" 302 (BC_1, IO_P84, output3, X, 301, 1, PULL0)," & -- PAD82
" 303 (BC_1, IO_P84, input, X)," & -- PAD82
" 304 (BC_1, *, controlr, 1)," &
" 305 (BC_1, IO_P83, output3, X, 304, 1, PULL0)," & -- PAD81
" 306 (BC_1, IO_P83, input, X)," & -- PAD81
" 307 (BC_1, *, controlr, 1)," &
" 308 (BC_1, IO_P80, output3, X, 307, 1, PULL0)," & -- PAD80
" 309 (BC_1, IO_P80, input, X)," & -- PAD80
" 310 (BC_1, *, controlr, 1)," &
" 311 (BC_1, IO_P79, output3, X, 310, 1, PULL0)," & -- PAD79
" 312 (BC_1, IO_P79, input, X)," & -- PAD79
" 313 (BC_1, *, controlr, 1)," &
" 314 (BC_1, IO_P78, output3, X, 313, 1, PULL0)," & -- PAD78
" 315 (BC_1, IO_P78, input, X)," & -- PAD78
" 316 (BC_1, *, controlr, 1)," &
" 317 (BC_1, IO_P77, output3, X, 316, 1, PULL0)," & -- PAD77
" 318 (BC_1, IO_P77, input, X)," & -- PAD77
" 319 (BC_1, *, internal, 1)," & -- PAD76.T
" 320 (BC_1, *, internal, X)," & -- PAD76.O
" 321 (BC_1, *, internal, X)," & -- PAD76.I
" 322 (BC_1, *, controlr, 1)," &
" 323 (BC_1, IO_P76, output3, X, 322, 1, PULL0)," & -- PAD75
" 324 (BC_1, IO_P76, input, X)," & -- PAD75
" 325 (BC_1, *, controlr, 1)," &
" 326 (BC_1, IO_P75, output3, X, 325, 1, PULL0)," & -- PAD74
" 327 (BC_1, IO_P75, input, X)," & -- PAD74
" 328 (BC_1, *, controlr, 1)," &
" 329 (BC_1, IO_P74, output3, X, 328, 1, PULL0)," & -- PAD73
" 330 (BC_1, IO_P74, input, X)," & -- PAD73
" 331 (BC_1, *, controlr, 1)," &
" 332 (BC_1, DONE_P72, output3, X, 331, 1, PULL1)," &
" 333 (BC_1, DONE_P72, input, X)," &
" 334 (BC_1, *, internal, 1)," & -- PROGRAM_B.I
" 335 (BC_1, *, controlr, 1)," &
" 336 (BC_1, INIT_P68, output3, X, 335, 1, PULL1)," & -- PAD72
" 337 (BC_1, INIT_P68, input, X)," & -- PAD72
" 338 (BC_1, *, controlr, 1)," &
" 339 (BC_1, IO_P67, output3, X, 338, 1, PULL0)," & -- PAD71
" 340 (BC_1, IO_P67, input, X)," & -- PAD71
" 341 (BC_1, *, controlr, 1)," &
" 342 (BC_1, IO_P66, output3, X, 341, 1, PULL0)," & -- PAD70
" 343 (BC_1, IO_P66, input, X)," & -- PAD70
" 344 (BC_1, *, internal, 1)," & -- PAD69.T
" 345 (BC_1, *, internal, X)," & -- PAD69.O
" 346 (BC_1, *, internal, X)," & -- PAD69.I
" 347 (BC_1, *, controlr, 1)," &
" 348 (BC_1, IO_P65, output3, X, 347, 1, PULL0)," & -- PAD68
" 349 (BC_1, IO_P65, input, X)," & -- PAD68
" 350 (BC_1, *, controlr, 1)," &
" 351 (BC_1, IO_P64, output3, X, 350, 1, PULL0)," & -- PAD67
" 352 (BC_1, IO_P64, input, X)," & -- PAD67
" 353 (BC_1, *, controlr, 1)," &
" 354 (BC_1, IO_P63, output3, X, 353, 1, PULL0)," & -- PAD66
" 355 (BC_1, IO_P63, input, X)," & -- PAD66
" 356 (BC_1, *, controlr, 1)," &
" 357 (BC_1, IO_P62, output3, X, 356, 1, PULL0)," & -- PAD65
" 358 (BC_1, IO_P62, input, X)," & -- PAD65
" 359 (BC_1, *, controlr, 1)," &
" 360 (BC_1, IO_P60, output3, X, 359, 1, PULL0)," & -- PAD64
" 361 (BC_1, IO_P60, input, X)," & -- PAD64
" 362 (BC_1, *, controlr, 1)," &
" 363 (BC_1, IO_P59, output3, X, 362, 1, PULL0)," & -- PAD63
" 364 (BC_1, IO_P59, input, X)," & -- PAD63
" 365 (BC_1, *, internal, 1)," & -- PAD62.T
" 366 (BC_1, *, internal, X)," & -- PAD62.O
" 367 (BC_1, *, internal, X)," & -- PAD62.I
" 368 (BC_1, *, internal, 1)," & -- PAD61.T
" 369 (BC_1, *, internal, X)," & -- PAD61.O
" 370 (BC_1, *, internal, X)," & -- PAD61.I
" 371 (BC_1, *, internal, 1)," & -- PAD60.T
" 372 (BC_1, *, internal, X)," & -- PAD60.O
" 373 (BC_1, *, internal, X)," & -- PAD60.I
" 374 (BC_1, *, controlr, 1)," &
" 375 (BC_1, IO_P58, output3, X, 374, 1, PULL0)," & -- PAD59
" 376 (BC_1, IO_P58, input, X)," & -- PAD59
" 377 (BC_1, *, controlr, 1)," &
" 378 (BC_1, IO_P57, output3, X, 377, 1, PULL0)," & -- PAD58
" 379 (BC_1, IO_P57, input, X)," & -- PAD58
" 380 (BC_1, *, controlr, 1)," &
" 381 (BC_1, IO_P56, output3, X, 380, 1, PULL0)," & -- PAD57
" 382 (BC_1, IO_P56, input, X)," & -- PAD57
" 383 (BC_1, *, internal, 1)," & -- PAD56.T
" 384 (BC_1, *, internal, X)," & -- PAD56.O
" 385 (BC_1, *, internal, X)," & -- PAD56.I
" 386 (BC_1, *, controlr, 1)," &
" 387 (BC_1, IO_P54, output3, X, 386, 1, PULL0)," & -- PAD55
" 388 (BC_1, IO_P54, input, X)," & -- PAD55
" 389 (BC_1, *, controlr, 1)," &
" 390 (BC_1, IO_P51, output3, X, 389, 1, PULL0)," & -- PAD54
" 391 (BC_1, IO_P51, input, X)," & -- PAD54
" 392 (BC_1, *, internal, 1)," & -- PAD53.T
" 393 (BC_1, *, internal, X)," & -- PAD53.O
" 394 (BC_1, *, internal, X)," & -- PAD53.I
" 395 (BC_1, *, controlr, 1)," &
" 396 (BC_1, IO_P50, output3, X, 395, 1, PULL0)," & -- PAD52
" 397 (BC_1, IO_P50, input, X)," & -- PAD52
" 398 (BC_1, *, controlr, 1)," &
" 399 (BC_1, IO_P49, output3, X, 398, 1, PULL0)," & -- PAD51
" 400 (BC_1, IO_P49, input, X)," & -- PAD51
" 401 (BC_1, *, controlr, 1)," &
" 402 (BC_1, IO_P48, output3, X, 401, 1, PULL0)," & -- PAD50
" 403 (BC_1, IO_P48, input, X)," & -- PAD50
" 404 (BC_1, *, internal, 1)," & -- PAD49.T
" 405 (BC_1, *, internal, X)," & -- PAD49.O
" 406 (BC_1, *, internal, X)," & -- PAD49.I
" 407 (BC_1, *, internal, 1)," & -- PAD48.T
" 408 (BC_1, *, internal, X)," & -- PAD48.O
" 409 (BC_1, *, internal, X)," & -- PAD48.I
" 410 (BC_1, *, internal, 1)," & -- PAD47.T
" 411 (BC_1, *, internal, X)," & -- PAD47.O
" 412 (BC_1, *, internal, X)," & -- PAD47.I
" 413 (BC_1, *, controlr, 1)," &
" 414 (BC_1, IO_P47, output3, X, 413, 1, PULL0)," & -- PAD46
" 415 (BC_1, IO_P47, input, X)," & -- PAD46
" 416 (BC_1, *, controlr, 1)," &
" 417 (BC_1, IO_P46, output3, X, 416, 1, PULL0)," & -- PAD45
" 418 (BC_1, IO_P46, input, X)," & -- PAD45
" 419 (BC_1, *, controlr, 1)," &
" 420 (BC_1, IO_P44, output3, X, 419, 1, PULL0)," & -- PAD44
" 421 (BC_1, IO_P44, input, X)," & -- PAD44
" 422 (BC_1, *, controlr, 1)," &
" 423 (BC_1, IO_P43, output3, X, 422, 1, PULL0)," & -- PAD43
" 424 (BC_1, IO_P43, input, X)," & -- PAD43
" 425 (BC_1, *, controlr, 1)," &
" 426 (BC_1, IO_P42, output3, X, 425, 1, PULL0)," & -- PAD42
" 427 (BC_1, IO_P42, input, X)," & -- PAD42
" 428 (BC_1, *, controlr, 1)," &
" 429 (BC_1, IO_P41, output3, X, 428, 1, PULL0)," & -- PAD41
" 430 (BC_1, IO_P41, input, X)," & -- PAD41
" 431 (BC_1, *, internal, 1)," & -- PAD40.T
" 432 (BC_1, *, internal, X)," & -- PAD40.O
" 433 (BC_1, *, internal, X)," & -- PAD40.I
" 434 (BC_1, *, controlr, 1)," &
" 435 (BC_1, IO_P40, output3, X, 434, 1, PULL0)," & -- PAD39
" 436 (BC_1, IO_P40, input, X)," & -- PAD39
" 437 (BC_1, *, controlr, 1)," &
" 438 (BC_1, IO_P39, output3, X, 437, 1, PULL0)," & -- PAD38
" 439 (BC_1, IO_P39, input, X)," & -- PAD38
" 440 (BC_1, *, controlr, 1)," &
" 441 (BC_1, IO_P38, output3, X, 440, 1, PULL0)," & -- PAD37
" 442 (BC_1, IO_P38, input, X)," & -- PAD37
" 443 (BC_1, *, controlr, 1)," &
" 444 (BC_1, CCLK_P37, output3, X, 443, 1, PULL1)," &
" 445 (BC_1, CCLK_P37, input, X)";
attribute DESIGN_WARNING of XC2S30_TQ144 : entity is
"This is a preliminary BSDL file which has not been verified." &
"This BSDL file must be modified by the FPGA designer in order to" &
"reflect post-configuration behavior (if any)." &
"The boundary scan test vectors must keep the PROGRAM pin" &
"either 3-stated or driving high. If the PROGRAM pin" &
"is driven low through any means, the TAP controller" &
"will reset." &
"The boundary scan test vectors must keep the PWDNB pin" &
"either 3-stated or driving high. If the PWDNB pin" &
"is driven low through any means, the TAP controller" &
"will reset." &
"The output and tristate capture values are not valid until after" &
"the device is configured." &
"The tristate control is not captured properly when" &
"GTS is activated." &
"In EXTEST, output and tristate values are not captured in the" &
"Capture-DR state - those register cells are unchanged." &
"In INTEST, the pin input values are not captured in the" &
"Capture-DR state - those register cells are unchanged." &
"The disable values of a 3-stated I/O in this file" &
"correspond with configuration mode pin settings without" &
"pre-configuration pull-up resistors. For the" &
"modes with pull-up resistors, change PULL0 to PULL1." &
"In EXTEST, the determination of whether this is" &
"a pull-up configuration mode depends upon the values" &
"shifted in for the mode pin register cells.";
end XC2S30_TQ144;
