-- ***********************************************************************
-- BSDL file for design ds34t101
-- Created by Synopsys Version 2000.11 (Nov 27, 2000)
-- Designer:
-- Company:
-- Date: Mon Oct 8 15:38:58 2007
-- ***********************************************************************
entity ds34t101 is
-- This section identifies the default device package selected.
generic (PHYSICAL_PIN_MAP: string:= "HSBGA_484");
-- This section declares all the ports in the design.
port (
CLK_CMN : in bit;
CLK_HIGH : in bit;
CLK_MII_RX : in bit;
CLK_MII_TX : in bit;
CLK_SYS : in bit;
CLK_SYS_S : in bit;
JTCLK : in bit;
JTDI : in bit;
JTMS : in bit;
JTRST_N : in bit;
RST_SYS_N : in bit;
DAT_32_16_N : inout bit;
H_CPU_SPI_N : inout bit;
H_CS_N : inout bit;
H_R_W_N : inout bit;
H_WR_BE0_N : inout bit;
H_WR_BE1_N : inout bit;
H_WR_BE2_N : inout bit;
H_WR_BE3_N : inout bit;
MCLK : inout bit;
MDIO : inout bit;
MII_COL : inout bit;
MII_CRS : inout bit;
MII_RX_DV : inout bit;
MII_RX_ERR : inout bit;
MII_TX_EN : inout bit;
MII_TX_ERR : inout bit;
RCLKF1 : inout bit;
RDATF1 : inout bit;
RSYNC1 : inout bit;
RSYSCLK1 : inout bit;
RXTSEL : inout bit;
SD_CAS_N : inout bit;
SD_CS_N : inout bit;
SD_RAS_N : inout bit;
SD_WE_N : inout bit;
TCLKF1 : inout bit;
TDM1_RCLK : inout bit;
TDM1_RSIG_RTS : inout bit;
TDM1_RX : inout bit;
TDM1_RX_SYNC : inout bit;
TDM1_TCLK : inout bit;
TDM1_TX_MF_CD : inout bit;
TDM1_TX_SYNC : inout bit;
TSER1 : inout bit;
TSYNC1 : inout bit;
TSYSCLK1 : inout bit;
TXENABLE : inout bit;
H_AD : inout bit_vector (1 to 24);
H_D : inout bit_vector (0 to 31);
H_INT : inout bit_vector (0 to 1);
MII_RXD : inout bit_vector (0 to 3);
SD_D : inout bit_vector (0 to 31);
CLK_SSMII_TX : out bit;
H_READY_N : out bit;
JTDO : out bit;
MBIST_DONE : out bit;
MBIST_FAIL : out bit;
MDC : out bit;
RFSYNC1 : out bit;
RLOS1 : out bit;
RSER1 : out bit;
SD_CLK : out bit;
TCLKO1 : out bit;
TDATF1 : out bit;
TDM1_ACLK : out bit;
TDM1_TSIG_CTS : out bit;
TDM1_TX : out bit;
TEST_CLK : out bit;
MII_TXD : out bit_vector (0 to 3);
SD_A : out bit_vector (0 to 11);
SD_BA : out bit_vector (0 to 1);
SD_DQM : out bit_vector (0 to 3);
ACVDD1 : linkage bit;
ACVDD2 : linkage bit;
ACVSS1 : linkage bit;
ACVSS2 : linkage bit;
ARVDD1 : linkage bit;
ARVDD2 : linkage bit;
ARVDD3 : linkage bit;
ARVDD4 : linkage bit;
ARVDD5 : linkage bit;
ARVDD6 : linkage bit;
ARVDD7 : linkage bit;
ARVDD8 : linkage bit;
ARVSS1 : linkage bit;
ARVSS2 : linkage bit;
ARVSS3 : linkage bit;
ARVSS4 : linkage bit;
ARVSS5 : linkage bit;
ARVSS6 : linkage bit;
ARVSS7 : linkage bit;
ARVSS8 : linkage bit;
ATVDD1 : linkage bit;
ATVDD2 : linkage bit;
ATVDD3 : linkage bit;
ATVDD4 : linkage bit;
ATVDD5 : linkage bit;
ATVDD6 : linkage bit;
ATVDD7 : linkage bit;
ATVDD8 : linkage bit;
ATVSS1 : linkage bit;
ATVSS2 : linkage bit;
ATVSS3 : linkage bit;
ATVSS4 : linkage bit;
ATVSS5 : linkage bit;
ATVSS6 : linkage bit;
ATVSS7 : linkage bit;
ATVSS8 : linkage bit;
HIZ_N : linkage bit;
MBIST_EN : linkage bit;
RESREF : linkage bit;
RRING1 : linkage bit;
RTIP1 : linkage bit;
SCEN : linkage bit;
STMD : linkage bit;
TRING1 : linkage bit;
TST_CLD : linkage bit;
TTIP1 : linkage bit;
DVDDC : linkage bit_vector (1 to 17);
DVDDIO : linkage bit_vector (1 to 16);
DVDDLIU : linkage bit_vector (1 to 2);
DVSS : linkage bit_vector (1 to 31);
DVSSLIU : linkage bit_vector (1 to 2)
);
use STD_1149_1_1994.all;
attribute COMPONENT_CONFORMANCE of ds34t101: entity is
"STD_1149_1_1993";
attribute PIN_MAP of ds34t101: entity is PHYSICAL_PIN_MAP;
-- This section specifies the pin map for each port. This information
-- is extracted from the port-to-pin map file that was read in using
-- the "read_pin_map" command.
constant HSBGA_484: PIN_MAP_STRING :=
"CLK_CMN : P1," &
"CLK_HIGH : L1," &
"CLK_MII_RX : V16," &
"CLK_MII_TX : AA18," &
"CLK_SYS : J1," &
"CLK_SYS_S : J2," &
"JTCLK : L3," &
"JTDI : M3," &
"JTMS : K3," &
"JTRST_N : P3," &
"RST_SYS_N : P2," &
"DAT_32_16_N : L21," &
"H_CPU_SPI_N : K19," &
"H_CS_N : L17," &
"H_R_W_N : K17," &
"H_WR_BE0_N : L19," &
"H_WR_BE1_N : J16," &
"H_WR_BE2_N : J18," &
"H_WR_BE3_N : L20," &
"MCLK : N1," &
"MDIO : AA20," &
"MII_COL : AA17," &
"MII_CRS : Y18," &
"MII_RX_DV : Y17," &
"MII_RX_ERR : V17," &
"MII_TX_EN : W17," &
"MII_TX_ERR : AB20," &
"RCLKF1 : L4," &
"RDATF1 : A6," &
"RSYNC1 : A5," &
"RSYSCLK1 : C6," &
"RXTSEL : R3," &
"SD_CAS_N : E16," &
"SD_CS_N : B17," &
"SD_RAS_N : D16," &
"SD_WE_N : C17," &
"TCLKF1 : B6," &
"TDM1_RCLK : D12," &
"TDM1_RSIG_RTS : C11," &
"TDM1_RX : D10," &
"TDM1_RX_SYNC : D11," &
"TDM1_TCLK : F12," &
"TDM1_TX_MF_CD : F13," &
"TDM1_TX_SYNC : E13," &
"TSER1 : D9," &
"TSYNC1 : L5," &
"TSYSCLK1 : C8," &
"TXENABLE : H3," &
"H_AD : (L18, M21, K16, M22, T20, M18, M16, M20, L16, N22, " &
"L15, P21, N16, N20, P22, N19, R21, M19, N21, M17, P20, R22, N17, " &
"T21)," &
"H_D : (T22, U21, N18, R20, T17, P16, U18, R16, U22, T16, " &
"V22, P18, W22, Y21, P19, Y22, AA21, AA22, AB21, U20, R19, AB22, P17" &
", V21, R17, V19, T19, W21, U16, R18, W20, U19)," &
"H_INT : (J17, L22)," &
"MII_RXD : (AA16, W16, AB16, Y16)," &
"SD_D : (C18, F21, G19, A21, C16, A22, A18, B21, E21, H19, " &
"B22, H20, C21, H18, C22, D21, G20, D22, J20, G21, J21, E22, J19, " &
"H21, F22, K21, G22, K20, H22, G16, K22, J22)," &
"CLK_SSMII_TX : Y19," &
"H_READY_N : K18," &
"JTDO : N3," &
"MBIST_DONE : M15," &
"MBIST_FAIL : N15," &
"MDC : AB17," &
"RFSYNC1 : K8," &
"RLOS1 : M8," &
"RSER1 : J5," &
"SD_CLK : H16," &
"TCLKO1 : L8," &
"TDATF1 : C7," &
"TDM1_ACLK : E10," &
"TDM1_TSIG_CTS : E11," &
"TDM1_TX : C12," &
"TEST_CLK : J3," &
"MII_TXD : (AB18, W18, AA19, AB19)," &
"SD_A : (A17, F18, F16, B18, E17, A19, H17, F19, F20, D18, " &
"B19, D17)," &
"SD_BA : (G17, C19)," &
"SD_DQM : (A20, E19, B20, D20)," &
"ACVDD1 : M2," &
"ACVDD2 : K2," &
"ACVSS1 : M1," &
"ACVSS2 : K1," &
"ARVDD1 : B14," &
"ARVDD2 : B10," &
"ARVDD3 : B2," &
"ARVDD4 : F2," &
"ARVDD5 : U2," &
"ARVDD6 : AA2," &
"ARVDD7 : AA11," &
"ARVDD8 : AA13," &
"ARVSS1 : A14," &
"ARVSS2 : A10," &
"ARVSS3 : B1," &
"ARVSS4 : F1," &
"ARVSS5 : U1," &
"ARVSS6 : AA1," &
"ARVSS7 : AB11," &
"ARVSS8 : AB13," &
"ATVDD1 : B16," &
"ATVDD2 : B8," &
"ATVDD3 : D1," &
"ATVDD4 : H2," &
"ATVDD5 : R2," &
"ATVDD6 : W1," &
"ATVDD7 : AA9," &
"ATVDD8 : AA15," &
"ATVSS1 : A16," &
"ATVSS2 : A8," &
"ATVSS3 : D2," &
"ATVSS4 : H1," &
"ATVSS5 : R1," &
"ATVSS6 : W2," &
"ATVSS7 : AB9," &
"ATVSS8 : AB15," &
"HIZ_N : T3," &
"MBIST_EN : P15," &
"RESREF : A11," &
"RRING1 : B13," &
"RTIP1 : A13," &
"SCEN : J15," &
"STMD : K15," &
"TRING1 : B15," &
"TST_CLD : G3," &
"TTIP1 : A15," &
"DVDDC : (A12, B11, C20, C4, E18, E20, E5, G18, G5, L2, T18" &
", T5, V18, V20, V5, Y10, Y20)," &
"DVDDIO : (J10, J11, J12, J13, K14, K9, L14, L9, M14, M9, N14" &
", N9, P10, P11, P12, P13)," &
"DVDDLIU : (C3, V3)," &
"DVSS : (B12, D19, D4, F17, F6, H15, H8, K10, K11, K12, K13" &
", L10, L11, L12, L13, M10, M11, M12, M13, N10, N11, N12, N13, N2, " &
"R15, R8, U17, U6, W19, W4, Y12)," &
"DVSSLIU : (E3, Y3)";
-- This section specifies the TAP ports.
-- For the TAP TCK port, the parameters in the brackets are:
-- First Field : Maximum TCK frequency.
-- Second Field: Allowable states TCK may be stopped in.
attribute TAP_SCAN_CLOCK of JTCLK : signal is (10.0e6, BOTH);
attribute TAP_SCAN_IN of JTDI : signal is true;
attribute TAP_SCAN_MODE of JTMS : signal is true;
attribute TAP_SCAN_OUT of JTDO : signal is true;
attribute TAP_SCAN_RESET of JTRST_N: signal is true;
-- Specifies the number of bits in the instruction register.
attribute INSTRUCTION_LENGTH of ds34t101: entity is 3;
-- Specifies the boundary-scan instructions implemented in the
-- design and their opcodes.
attribute INSTRUCTION_OPCODE of ds34t101: entity is
"BYPASS (111)," &
"EXTEST (000)," &
"SAMPLE (010)," &
"USER1 (100)," &
"IDCODE (001)";
-- Specifies the bit pattern that is loaded into the instruction
-- register when the TAP controller passes through the Capture-IR
-- state. The standard mandates that the two LSBs must be "01".
-- The remaining bits are design specific.
attribute INSTRUCTION_CAPTURE of ds34t101: entity is "001";
-- Specifies the bit pattern that is loaded into the DEVICE_ID
-- register during the IDCODE instruction when the TAP controller
-- passes through the Capture-DR state.
attribute IDCODE_REGISTER of ds34t101: entity is
"0001" & -- 4-bit version number
"0000000010010000" & -- 16-bit part number
"00010100001" & -- 11-bit identity of the manufacturer
"1"; -- Required by IEEE Std 1149.1
-- This section specifies the test data register placed between TDI
-- and TDO for each implemented instruction.
attribute REGISTER_ACCESS of ds34t101: entity is
"BYPASS (BYPASS, USER1)," &
"BOUNDARY (EXTEST, SAMPLE)," &
"DEVICE_ID (IDCODE)";
-- Specifies the length of the boundary scan register.
attribute BOUNDARY_LENGTH of ds34t101: entity is 564;
-- The following list specifies the characteristics of each cell
-- in the boundary scan register from TDI to TDO.
-- The following is a description of the label fields:
-- num : Is the cell number.
-- cell : Is the cell type as defined by the standard.
-- port : Is the design port name. Control cells do not
-- have a port name.
-- function: Is the function of the cell as defined by the
-- standard. Is one of input, output2, output3,
-- bidir, control or controlr.
-- safe : Specifies the value that the BSR cell should be
-- loaded with for safe operation when the software
-- might otherwise choose a random value.
-- ccell : The control cell number. Specifies the control
-- cell that drives the output enable for this port.
-- disval : Specifies the value that is loaded into the
-- control cell to disable the output enable for
-- the corresponding port.
-- rslt : Resulting state. Shows the state of the driver
-- when it is disabled.
attribute BOUNDARY_REGISTER of ds34t101: entity is
--
-- num cell port function safe [ccell disval rslt]
--
"563 (BC_1, *, controlr, 0), " &
"562 (BC_0, TXENABLE, bidir, X, 563, 0, Z), " &
"561 (BC_1, *, controlr, 0), " &
"560 (BC_2, TEST_CLK, output3, X, 561, 0, Z), " &
"559 (BC_1, CLK_SYS_S, input, X), " &
"558 (BC_1, CLK_SYS, input, X), " &
"557 (BC_1, CLK_HIGH, input, X), " &
"556 (BC_1, *, controlr, 0), " &
"555 (BC_0, MCLK, bidir, X, 556, 0, Z), " &
"554 (BC_1, CLK_CMN, input, X), " &
"553 (BC_1, RST_SYS_N, input, X), " &
"552 (BC_1, *, controlr, 0), " &
"551 (BC_0, RXTSEL, bidir, X, 552, 0, Z), " &
"550 (BC_0, *, internal, X), " &
"549 (BC_0, *, internal, X), " &
"548 (BC_0, *, internal, X), " &
"547 (BC_0, *, internal, X), " &
"546 (BC_0, *, internal, X), " &
"545 (BC_0, *, internal, X), " &
"544 (BC_0, *, internal, X), " &
"543 (BC_0, *, internal, X), " &
"542 (BC_0, *, internal, X), " &
"541 (BC_0, *, internal, X), " &
"540 (BC_0, *, internal, X), " &
"539 (BC_0, *, internal, X), " &
"538 (BC_0, *, internal, X), " &
"537 (BC_0, *, internal, X), " &
"536 (BC_0, *, internal, X), " &
"535 (BC_0, *, internal, X), " &
"534 (BC_0, *, internal, X), " &
"533 (BC_0, *, internal, X), " &
"532 (BC_0, *, internal, X), " &
"531 (BC_0, *, internal, X), " &
"530 (BC_0, *, internal, X), " &
"529 (BC_0, *, internal, X), " &
"528 (BC_0, *, internal, X), " &
"527 (BC_0, *, internal, X), " &
"526 (BC_0, *, internal, X), " &
"525 (BC_0, *, internal, X), " &
"524 (BC_0, *, internal, X), " &
"523 (BC_0, *, internal, X), " &
"522 (BC_0, *, internal, X), " &
"521 (BC_0, *, internal, X), " &
"520 (BC_0, *, internal, X), " &
"519 (BC_0, *, internal, X), " &
"518 (BC_0, *, internal, X), " &
"517 (BC_0, *, internal, X), " &
"516 (BC_0, *, internal, X), " &
"515 (BC_0, *, internal, X), " &
"514 (BC_0, *, internal, X), " &
"513 (BC_0, *, internal, X), " &
"512 (BC_0, *, internal, X), " &
"511 (BC_0, *, internal, X), " &
"510 (BC_0, *, internal, X), " &
"509 (BC_0, *, internal, X), " &
"508 (BC_0, *, internal, X), " &
"507 (BC_0, *, internal, X), " &
"506 (BC_0, *, internal, X), " &
"505 (BC_0, *, internal, X), " &
"504 (BC_0, *, internal, X), " &
"503 (BC_0, *, internal, X), " &
"502 (BC_0, *, internal, X), " &
"501 (BC_0, *, internal, X), " &
"500 (BC_0, *, internal, X), " &
"499 (BC_0, *, internal, X), " &
"498 (BC_0, *, internal, X), " &
"497 (BC_0, *, internal, X), " &
"496 (BC_0, *, internal, X), " &
"495 (BC_0, *, internal, X), " &
"494 (BC_0, *, internal, X), " &
"493 (BC_0, *, internal, X), " &
"492 (BC_0, *, internal, X), " &
"491 (BC_0, *, internal, X), " &
"490 (BC_0, *, internal, X), " &
"489 (BC_0, *, internal, X), " &
"488 (BC_0, *, internal, X), " &
"487 (BC_0, *, internal, X), " &
"486 (BC_0, *, internal, X), " &
"485 (BC_0, *, internal, X), " &
"484 (BC_0, *, internal, X), " &
"483 (BC_0, *, internal, X), " &
"482 (BC_0, *, internal, X), " &
"481 (BC_0, *, internal, X), " &
"480 (BC_0, *, internal, X), " &
"479 (BC_0, *, internal, X), " &
"478 (BC_0, *, internal, X), " &
"477 (BC_0, *, internal, X), " &
"476 (BC_0, *, internal, X), " &
"475 (BC_0, *, internal, X), " &
"474 (BC_0, *, internal, X), " &
"473 (BC_0, *, internal, X), " &
"472 (BC_0, *, internal, X), " &
"471 (BC_0, *, internal, X), " &
"470 (BC_1, CLK_MII_RX, input, X), " &
"469 (BC_1, *, controlr, 0), " &
"468 (BC_0, MII_RXD(0), bidir, X, 469, 0, Z), " &
"467 (BC_1, *, controlr, 0), " &
"466 (BC_0, MII_RXD(1), bidir, X, 467, 0, Z), " &
"465 (BC_1, *, controlr, 0), " &
"464 (BC_0, MII_RXD(2), bidir, X, 465, 0, Z), " &
"463 (BC_1, *, controlr, 0), " &
"462 (BC_0, MII_RXD(3), bidir, X, 463, 0, Z), " &
"461 (BC_1, *, controlr, 0), " &
"460 (BC_0, MII_RX_DV, bidir, X, 461, 0, Z), " &
"459 (BC_1, *, controlr, 0), " &
"458 (BC_0, MII_RX_ERR, bidir, X, 459, 0, Z), " &
"457 (BC_1, *, controlr, 0), " &
"456 (BC_0, MII_COL, bidir, X, 457, 0, Z), " &
"455 (BC_1, *, controlr, 0), " &
"454 (BC_0, MII_CRS, bidir, X, 455, 0, Z), " &
"453 (BC_1, CLK_MII_TX, input, X), " &
"452 (BC_1, *, controlr, 0), " &
"451 (BC_2, MBIST_DONE, output3, X, 452, 0, Z), " &
"450 (BC_1, *, controlr, 0), " &
"449 (BC_2, CLK_SSMII_TX, output3, X, 450, 0, Z), " &
"448 (BC_1, *, controlr, 0), " &
"447 (BC_2, MBIST_FAIL, output3, X, 448, 0, Z), " &
"446 (BC_1, *, controlr, 0), " &
"445 (BC_2, MII_TXD(0), output3, X, 446, 0, Z), " &
"444 (BC_1, *, controlr, 0), " &
"443 (BC_2, MII_TXD(1), output3, X, 444, 0, Z), " &
"442 (BC_1, *, controlr, 0), " &
"441 (BC_2, MII_TXD(2), output3, X, 442, 0, Z), " &
"440 (BC_1, *, controlr, 0), " &
"439 (BC_2, MII_TXD(3), output3, X, 440, 0, Z), " &
"438 (BC_1, *, controlr, 0), " &
"437 (BC_0, MII_TX_EN, bidir, X, 438, 0, Z), " &
"436 (BC_1, *, controlr, 0), " &
"435 (BC_0, MII_TX_ERR, bidir, X, 436, 0, Z), " &
"434 (BC_1, *, controlr, 0), " &
"433 (BC_0, MDIO, bidir, X, 434, 0, Z), " &
"432 (BC_1, *, controlr, 0), " &
"431 (BC_2, MDC, output3, X, 432, 0, Z), " &
"430 (BC_1, *, controlr, 0), " &
"429 (BC_0, H_D(31), bidir, X, 430, 0, Z), " &
"428 (BC_1, *, controlr, 0), " &
"427 (BC_0, H_D(30), bidir, X, 428, 0, Z), " &
"426 (BC_1, *, controlr, 0), " &
"425 (BC_0, H_D(29), bidir, X, 426, 0, Z), " &
"424 (BC_1, *, controlr, 0), " &
"423 (BC_0, H_D(28), bidir, X, 424, 0, Z), " &
"422 (BC_1, *, controlr, 0), " &
"421 (BC_0, H_D(27), bidir, X, 422, 0, Z), " &
"420 (BC_1, *, controlr, 0), " &
"419 (BC_0, H_D(26), bidir, X, 420, 0, Z), " &
"418 (BC_1, *, controlr, 0), " &
"417 (BC_0, H_D(25), bidir, X, 418, 0, Z), " &
"416 (BC_1, *, controlr, 0), " &
"415 (BC_0, H_D(24), bidir, X, 416, 0, Z), " &
"414 (BC_1, *, controlr, 0), " &
"413 (BC_0, H_D(23), bidir, X, 414, 0, Z), " &
"412 (BC_1, *, controlr, 0), " &
"411 (BC_0, H_D(22), bidir, X, 412, 0, Z), " &
"410 (BC_1, *, controlr, 0), " &
"409 (BC_0, H_D(21), bidir, X, 410, 0, Z), " &
"408 (BC_1, *, controlr, 0), " &
"407 (BC_0, H_D(20), bidir, X, 408, 0, Z), " &
"406 (BC_1, *, controlr, 0), " &
"405 (BC_0, H_D(19), bidir, X, 406, 0, Z), " &
"404 (BC_1, *, controlr, 0), " &
"403 (BC_0, H_D(18), bidir, X, 404, 0, Z), " &
"402 (BC_1, *, controlr, 0), " &
"401 (BC_0, H_D(17), bidir, X, 402, 0, Z), " &
"400 (BC_1, *, controlr, 0), " &
"399 (BC_0, H_D(16), bidir, X, 400, 0, Z), " &
"398 (BC_1, *, controlr, 0), " &
"397 (BC_0, H_D(15), bidir, X, 398, 0, Z), " &
"396 (BC_1, *, controlr, 0), " &
"395 (BC_0, H_D(14), bidir, X, 396, 0, Z), " &
"394 (BC_1, *, controlr, 0), " &
"393 (BC_0, H_D(13), bidir, X, 394, 0, Z), " &
"392 (BC_1, *, controlr, 0), " &
"391 (BC_0, H_D(12), bidir, X, 392, 0, Z), " &
"390 (BC_1, *, controlr, 0), " &
"389 (BC_0, H_D(11), bidir, X, 390, 0, Z), " &
"388 (BC_1, *, controlr, 0), " &
"387 (BC_0, H_D(10), bidir, X, 388, 0, Z), " &
"386 (BC_1, *, controlr, 0), " &
"385 (BC_0, H_D(9), bidir, X, 386, 0, Z), " &
"384 (BC_1, *, controlr, 0), " &
"383 (BC_0, H_D(8), bidir, X, 384, 0, Z), " &
"382 (BC_1, *, controlr, 0), " &
"381 (BC_0, H_D(7), bidir, X, 382, 0, Z), " &
"380 (BC_1, *, controlr, 0), " &
"379 (BC_0, H_D(6), bidir, X, 380, 0, Z), " &
"378 (BC_1, *, controlr, 0), " &
"377 (BC_0, H_D(5), bidir, X, 378, 0, Z), " &
"376 (BC_1, *, controlr, 0), " &
"375 (BC_0, H_D(4), bidir, X, 376, 0, Z), " &
"374 (BC_1, *, controlr, 0), " &
"373 (BC_0, H_D(3), bidir, X, 374, 0, Z), " &
"372 (BC_1, *, controlr, 0), " &
"371 (BC_0, H_D(2), bidir, X, 372, 0, Z), " &
"370 (BC_1, *, controlr, 0), " &
"369 (BC_0, H_D(1), bidir, X, 370, 0, Z), " &
"368 (BC_1, *, controlr, 0), " &
"367 (BC_0, H_D(0), bidir, X, 368, 0, Z), " &
"366 (BC_0, *, internal, X), " &
"365 (BC_0, *, internal, X), " &
"364 (BC_0, *, internal, X), " &
"363 (BC_1, *, controlr, 0), " &
"362 (BC_0, H_AD(24), bidir, X, 363, 0, Z), " &
"361 (BC_1, *, controlr, 0), " &
"360 (BC_0, H_AD(23), bidir, X, 361, 0, Z), " &
"359 (BC_1, *, controlr, 0), " &
"358 (BC_0, H_AD(22), bidir, X, 359, 0, Z), " &
"357 (BC_1, *, controlr, 0), " &
"356 (BC_0, H_AD(21), bidir, X, 357, 0, Z), " &
"355 (BC_1, *, controlr, 0), " &
"354 (BC_0, H_AD(20), bidir, X, 355, 0, Z), " &
"353 (BC_1, *, controlr, 0), " &
"352 (BC_0, H_AD(19), bidir, X, 353, 0, Z), " &
"351 (BC_1, *, controlr, 0), " &
"350 (BC_0, H_AD(18), bidir, X, 351, 0, Z), " &
"349 (BC_1, *, controlr, 0), " &
"348 (BC_0, H_AD(17), bidir, X, 349, 0, Z), " &
"347 (BC_1, *, controlr, 0), " &
"346 (BC_0, H_AD(16), bidir, X, 347, 0, Z), " &
"345 (BC_1, *, controlr, 0), " &
"344 (BC_0, H_AD(15), bidir, X, 345, 0, Z), " &
"343 (BC_1, *, controlr, 0), " &
"342 (BC_0, H_AD(14), bidir, X, 343, 0, Z), " &
"341 (BC_1, *, controlr, 0), " &
"340 (BC_0, H_AD(13), bidir, X, 341, 0, Z), " &
"339 (BC_1, *, controlr, 0), " &
"338 (BC_0, H_AD(12), bidir, X, 339, 0, Z), " &
"337 (BC_1, *, controlr, 0), " &
"336 (BC_0, H_AD(11), bidir, X, 337, 0, Z), " &
"335 (BC_1, *, controlr, 0), " &
"334 (BC_0, H_AD(10), bidir, X, 335, 0, Z), " &
"333 (BC_1, *, controlr, 0), " &
"332 (BC_0, H_AD(9), bidir, X, 333, 0, Z), " &
"331 (BC_1, *, controlr, 0), " &
"330 (BC_0, H_AD(8), bidir, X, 331, 0, Z), " &
"329 (BC_1, *, controlr, 0), " &
"328 (BC_0, H_AD(7), bidir, X, 329, 0, Z), " &
"327 (BC_1, *, controlr, 0), " &
"326 (BC_0, H_AD(6), bidir, X, 327, 0, Z), " &
"325 (BC_1, *, controlr, 0), " &
"324 (BC_0, H_AD(5), bidir, X, 325, 0, Z), " &
"323 (BC_1, *, controlr, 0), " &
"322 (BC_0, H_AD(4), bidir, X, 323, 0, Z), " &
"321 (BC_1, *, controlr, 0), " &
"320 (BC_0, H_AD(3), bidir, X, 321, 0, Z), " &
"319 (BC_1, *, controlr, 0), " &
"318 (BC_0, H_AD(2), bidir, X, 319, 0, Z), " &
"317 (BC_1, *, controlr, 0), " &
"316 (BC_0, H_AD(1), bidir, X, 317, 0, Z), " &
"315 (BC_1, *, controlr, 0), " &
"314 (BC_0, H_CS_N, bidir, X, 315, 0, Z), " &
"313 (BC_1, *, controlr, 0), " &
"312 (BC_0, H_R_W_N, bidir, X, 313, 0, Z), " &
"311 (BC_1, *, controlr, 0), " &
"310 (BC_0, H_WR_BE0_N, bidir, X, 311, 0, Z), " &
"309 (BC_1, *, controlr, 0), " &
"308 (BC_0, H_WR_BE1_N, bidir, X, 309, 0, Z), " &
"307 (BC_1, *, controlr, 0), " &
"306 (BC_0, H_WR_BE2_N, bidir, X, 307, 0, Z), " &
"305 (BC_1, *, controlr, 0), " &
"304 (BC_0, H_WR_BE3_N, bidir, X, 305, 0, Z), " &
"303 (BC_1, *, controlr, 0), " &
"302 (BC_2, H_READY_N, output3, X, 303, 0, Z), " &
"301 (BC_1, *, controlr, 0), " &
"300 (BC_0, H_INT(1), bidir, X, 301, 0, Z), " &
"299 (BC_1, *, controlr, 0), " &
"298 (BC_0, H_INT(0), bidir, X, 299, 0, Z), " &
"297 (BC_1, *, controlr, 0), " &
"296 (BC_0, DAT_32_16_N, bidir, X, 297, 0, " &
"PULL1)," &
"295 (BC_1, *, controlr, 0), " &
"294 (BC_0, H_CPU_SPI_N, bidir, X, 295, 0, " &
"PULL1)," &
"293 (BC_1, *, controlr, 0), " &
"292 (BC_0, SD_D(31), bidir, X, 293, 0, Z), " &
"291 (BC_1, *, controlr, 0), " &
"290 (BC_0, SD_D(30), bidir, X, 291, 0, Z), " &
"289 (BC_1, *, controlr, 0), " &
"288 (BC_0, SD_D(29), bidir, X, 289, 0, Z), " &
"287 (BC_1, *, controlr, 0), " &
"286 (BC_0, SD_D(28), bidir, X, 287, 0, Z), " &
"285 (BC_1, *, controlr, 0), " &
"284 (BC_0, SD_D(27), bidir, X, 285, 0, Z), " &
"283 (BC_1, *, controlr, 0), " &
"282 (BC_0, SD_D(26), bidir, X, 283, 0, Z), " &
"281 (BC_1, *, controlr, 0), " &
"280 (BC_0, SD_D(25), bidir, X, 281, 0, Z), " &
"279 (BC_1, *, controlr, 0), " &
"278 (BC_0, SD_D(24), bidir, X, 279, 0, Z), " &
"277 (BC_1, *, controlr, 0), " &
"276 (BC_0, SD_D(23), bidir, X, 277, 0, Z), " &
"275 (BC_1, *, controlr, 0), " &
"274 (BC_0, SD_D(22), bidir, X, 275, 0, Z), " &
"273 (BC_1, *, controlr, 0), " &
"272 (BC_0, SD_D(21), bidir, X, 273, 0, Z), " &
"271 (BC_1, *, controlr, 0), " &
"270 (BC_0, SD_D(20), bidir, X, 271, 0, Z), " &
"269 (BC_1, *, controlr, 0), " &
"268 (BC_0, SD_D(19), bidir, X, 269, 0, Z), " &
"267 (BC_1, *, controlr, 0), " &
"266 (BC_0, SD_D(18), bidir, X, 267, 0, Z), " &
"265 (BC_1, *, controlr, 0), " &
"264 (BC_0, SD_D(17), bidir, X, 265, 0, Z), " &
"263 (BC_1, *, controlr, 0), " &
"262 (BC_0, SD_D(16), bidir, X, 263, 0, Z), " &
"261 (BC_1, *, controlr, 0), " &
"260 (BC_0, SD_D(15), bidir, X, 261, 0, Z), " &
"259 (BC_1, *, controlr, 0), " &
"258 (BC_0, SD_D(14), bidir, X, 259, 0, Z), " &
"257 (BC_1, *, controlr, 0), " &
"256 (BC_0, SD_D(13), bidir, X, 257, 0, Z), " &
"255 (BC_1, *, controlr, 0), " &
"254 (BC_0, SD_D(12), bidir, X, 255, 0, Z), " &
"253 (BC_1, *, controlr, 0), " &
"252 (BC_0, SD_D(11), bidir, X, 253, 0, Z), " &
"251 (BC_1, *, controlr, 0), " &
"250 (BC_0, SD_D(10), bidir, X, 251, 0, Z), " &
"249 (BC_1, *, controlr, 0), " &
"248 (BC_0, SD_D(9), bidir, X, 249, 0, Z), " &
"247 (BC_1, *, controlr, 0), " &
"246 (BC_0, SD_D(8), bidir, X, 247, 0, Z), " &
"245 (BC_1, *, controlr, 0), " &
"244 (BC_0, SD_D(7), bidir, X, 245, 0, Z), " &
"243 (BC_1, *, controlr, 0), " &
"242 (BC_0, SD_D(6), bidir, X, 243, 0, Z), " &
"241 (BC_1, *, controlr, 0), " &
"240 (BC_0, SD_D(5), bidir, X, 241, 0, Z), " &
"239 (BC_1, *, controlr, 0), " &
"238 (BC_0, SD_D(4), bidir, X, 239, 0, Z), " &
"237 (BC_1, *, controlr, 0), " &
"236 (BC_0, SD_D(3), bidir, X, 237, 0, Z), " &
"235 (BC_1, *, controlr, 0), " &
"234 (BC_0, SD_D(2), bidir, X, 235, 0, Z), " &
"233 (BC_1, *, controlr, 0), " &
"232 (BC_0, SD_D(1), bidir, X, 233, 0, Z), " &
"231 (BC_1, *, controlr, 0), " &
"230 (BC_0, SD_D(0), bidir, X, 231, 0, Z), " &
"229 (BC_1, *, controlr, 0), " &
"228 (BC_2, SD_DQM(3), output3, X, 229, 0, Z), " &
"227 (BC_1, *, controlr, 0), " &
"226 (BC_2, SD_DQM(2), output3, X, 227, 0, Z), " &
"225 (BC_1, *, controlr, 0), " &
"224 (BC_2, SD_DQM(1), output3, X, 225, 0, Z), " &
"223 (BC_1, *, controlr, 0), " &
"222 (BC_2, SD_DQM(0), output3, X, 223, 0, Z), " &
"221 (BC_1, *, controlr, 0), " &
"220 (BC_2, SD_A(11), output3, X, 221, 0, Z), " &
"219 (BC_1, *, controlr, 0), " &
"218 (BC_2, SD_A(10), output3, X, 219, 0, Z), " &
"217 (BC_1, *, controlr, 0), " &
"216 (BC_2, SD_A(9), output3, X, 217, 0, Z), " &
"215 (BC_1, *, controlr, 0), " &
"214 (BC_2, SD_A(8), output3, X, 215, 0, Z), " &
"213 (BC_1, *, controlr, 0), " &
"212 (BC_2, SD_A(7), output3, X, 213, 0, Z), " &
"211 (BC_1, *, controlr, 0), " &
"210 (BC_2, SD_A(6), output3, X, 211, 0, Z), " &
"209 (BC_1, *, controlr, 0), " &
"208 (BC_2, SD_A(5), output3, X, 209, 0, Z), " &
"207 (BC_1, *, controlr, 0), " &
"206 (BC_2, SD_A(4), output3, X, 207, 0, Z), " &
"205 (BC_1, *, controlr, 0), " &
"204 (BC_2, SD_A(3), output3, X, 205, 0, Z), " &
"203 (BC_1, *, controlr, 0), " &
"202 (BC_2, SD_A(2), output3, X, 203, 0, Z), " &
"201 (BC_1, *, controlr, 0), " &
"200 (BC_2, SD_A(1), output3, X, 201, 0, Z), " &
"199 (BC_1, *, controlr, 0), " &
"198 (BC_2, SD_A(0), output3, X, 199, 0, Z), " &
"197 (BC_1, *, controlr, 0), " &
"196 (BC_2, SD_BA(1), output3, X, 197, 0, Z), " &
"195 (BC_1, *, controlr, 0), " &
"194 (BC_2, SD_BA(0), output3, X, 195, 0, Z), " &
"193 (BC_1, *, controlr, 0), " &
"192 (BC_2, SD_CLK, output3, X, 193, 0, Z), " &
"191 (BC_1, *, controlr, 0), " &
"190 (BC_0, SD_CS_N, bidir, X, 191, 0, Z), " &
"189 (BC_1, *, controlr, 0), " &
"188 (BC_0, SD_WE_N, bidir, X, 189, 0, Z), " &
"187 (BC_1, *, controlr, 0), " &
"186 (BC_0, SD_RAS_N, bidir, X, 187, 0, Z), " &
"185 (BC_1, *, controlr, 0), " &
"184 (BC_0, SD_CAS_N, bidir, X, 185, 0, Z), " &
"183 (BC_0, *, internal, X), " &
"182 (BC_0, *, internal, X), " &
"181 (BC_0, *, internal, X), " &
"180 (BC_0, *, internal, X), " &
"179 (BC_0, *, internal, X), " &
"178 (BC_0, *, internal, X), " &
"177 (BC_0, *, internal, X), " &
"176 (BC_0, *, internal, X), " &
"175 (BC_0, *, internal, X), " &
"174 (BC_0, *, internal, X), " &
"173 (BC_0, *, internal, X), " &
"172 (BC_0, *, internal, X), " &
"171 (BC_0, *, internal, X), " &
"170 (BC_0, *, internal, X), " &
"169 (BC_0, *, internal, X), " &
"168 (BC_0, *, internal, X), " &
"167 (BC_0, *, internal, X), " &
"166 (BC_0, *, internal, X), " &
"165 (BC_0, *, internal, X), " &
"164 (BC_0, *, internal, X), " &
"163 (BC_0, *, internal, X), " &
"162 (BC_0, *, internal, X), " &
"161 (BC_0, *, internal, X), " &
"160 (BC_0, *, internal, X), " &
"159 (BC_0, *, internal, X), " &
"158 (BC_0, *, internal, X), " &
"157 (BC_0, *, internal, X), " &
"156 (BC_0, *, internal, X), " &
"155 (BC_0, *, internal, X), " &
"154 (BC_0, *, internal, X), " &
"153 (BC_0, *, internal, X), " &
"152 (BC_0, *, internal, X), " &
"151 (BC_0, *, internal, X), " &
"150 (BC_0, *, internal, X), " &
"149 (BC_0, *, internal, X), " &
"148 (BC_0, *, internal, X), " &
"147 (BC_0, *, internal, X), " &
"146 (BC_0, *, internal, X), " &
"145 (BC_0, *, internal, X), " &
"144 (BC_0, *, internal, X), " &
"143 (BC_0, *, internal, X), " &
"142 (BC_0, *, internal, X), " &
"141 (BC_0, *, internal, X), " &
"140 (BC_0, *, internal, X), " &
"139 (BC_0, *, internal, X), " &
"138 (BC_0, *, internal, X), " &
"137 (BC_0, *, internal, X), " &
"136 (BC_0, *, internal, X), " &
"135 (BC_0, *, internal, X), " &
"134 (BC_0, *, internal, X), " &
"133 (BC_0, *, internal, X), " &
"132 (BC_0, *, internal, X), " &
"131 (BC_0, *, internal, X), " &
"130 (BC_0, *, internal, X), " &
"129 (BC_0, *, internal, X), " &
"128 (BC_0, *, internal, X), " &
"127 (BC_0, *, internal, X), " &
"126 (BC_0, *, internal, X), " &
"125 (BC_0, *, internal, X), " &
"124 (BC_0, *, internal, X), " &
"123 (BC_1, *, controlr, 0), " &
"122 (BC_2, TDM1_TX, output3, X, 123, 0, Z), " &
"121 (BC_1, *, controlr, 0), " &
"120 (BC_0, TDM1_RX, bidir, X, 121, 0, " &
"PULL1)," &
"119 (BC_1, *, controlr, 0), " &
"118 (BC_0, TDM1_TCLK, bidir, X, 119, 0, " &
"PULL1)," &
"117 (BC_1, *, controlr, 0), " &
"116 (BC_0, TDM1_RCLK, bidir, X, 117, 0, " &
"PULL1)," &
"115 (BC_1, *, controlr, 0), " &
"114 (BC_2, TDM1_ACLK, output3, X, 115, 0, Z), " &
"113 (BC_1, *, controlr, 0), " &
"112 (BC_0, TDM1_TX_SYNC, bidir, X, 113, 0, " &
"PULL0)," &
"111 (BC_1, *, controlr, 0), " &
"110 (BC_0, TDM1_TX_MF_CD, bidir, X, 111, 0, " &
"PULL0)," &
"109 (BC_1, *, controlr, 0), " &
"108 (BC_0, TDM1_RX_SYNC, bidir, X, 109, 0, " &
"PULL0)," &
"107 (BC_1, *, controlr, 0), " &
"106 (BC_2, TDM1_TSIG_CTS, output3, X, 107, 0, Z), " &
"105 (BC_1, *, controlr, 0), " &
"104 (BC_0, TDM1_RSIG_RTS, bidir, X, 105, 0, " &
"PULL1)," &
"103 (BC_1, *, controlr, 0), " &
"102 (BC_0, RDATF1, bidir, X, 103, 0, Z), " &
"101 (BC_1, *, controlr, 0), " &
"100 (BC_0, RCLKF1, bidir, X, 101, 0, Z), " &
"99 (BC_1, *, controlr, 0), " &
"98 (BC_2, TDATF1, output3, X, 99, 0, Z), " &
"97 (BC_1, *, controlr, 0), " &
"96 (BC_2, TCLKO1, output3, X, 97, 0, Z), " &
"95 (BC_1, *, controlr, 0), " &
"94 (BC_0, TCLKF1, bidir, X, 95, 0, Z), " &
"93 (BC_1, *, controlr, 0), " &
"92 (BC_2, RLOS1, output3, X, 93, 0, Z), " &
"91 (BC_1, *, controlr, 0), " &
"90 (BC_0, RSYSCLK1, bidir, X, 91, 0, Z), " &
"89 (BC_1, *, controlr, 0), " &
"88 (BC_2, RSER1, output3, X, 89, 0, Z), " &
"87 (BC_1, *, controlr, 0), " &
"86 (BC_0, RSYNC1, bidir, X, 87, 0, Z), " &
"85 (BC_1, *, controlr, 0), " &
"84 (BC_2, RFSYNC1, output3, X, 85, 0, Z), " &
"83 (BC_1, *, controlr, 0), " &
"82 (BC_0, TSER1, bidir, X, 83, 0, Z), " &
"81 (BC_1, *, controlr, 0), " &
"80 (BC_0, TSYNC1, bidir, X, 81, 0, Z), " &
"79 (BC_1, *, controlr, 0), " &
"78 (BC_0, TSYSCLK1, bidir, X, 79, 0, Z), " &
"77 (BC_0, *, internal, X), " &
"76 (BC_0, *, internal, X), " &
"75 (BC_0, *, internal, X), " &
"74 (BC_0, *, internal, X), " &
"73 (BC_0, *, internal, X), " &
"72 (BC_0, *, internal, X), " &
"71 (BC_0, *, internal, X), " &
"70 (BC_0, *, internal, X), " &
"69 (BC_0, *, internal, X), " &
"68 (BC_0, *, internal, X), " &
"67 (BC_0, *, internal, X), " &
"66 (BC_0, *, internal, X), " &
"65 (BC_0, *, internal, X), " &
"64 (BC_0, *, internal, X), " &
"63 (BC_0, *, internal, X), " &
"62 (BC_0, *, internal, X), " &
"61 (BC_0, *, internal, X), " &
"60 (BC_0, *, internal, X), " &
"59 (BC_0, *, internal, X), " &
"58 (BC_0, *, internal, X), " &
"57 (BC_0, *, internal, X), " &
"56 (BC_0, *, internal, X), " &
"55 (BC_0, *, internal, X), " &
"54 (BC_0, *, internal, X), " &
"53 (BC_0, *, internal, X), " &
"52 (BC_0, *, internal, X), " &
"51 (BC_0, *, internal, X), " &
"50 (BC_0, *, internal, X), " &
"49 (BC_0, *, internal, X), " &
"48 (BC_0, *, internal, X), " &
"47 (BC_0, *, internal, X), " &
"46 (BC_0, *, internal, X), " &
"45 (BC_0, *, internal, X), " &
"44 (BC_0, *, internal, X), " &
"43 (BC_0, *, internal, X), " &
"42 (BC_0, *, internal, X), " &
"41 (BC_0, *, internal, X), " &
"40 (BC_0, *, internal, X), " &
"39 (BC_0, *, internal, X), " &
"38 (BC_0, *, internal, X), " &
"37 (BC_0, *, internal, X), " &
"36 (BC_0, *, internal, X), " &
"35 (BC_0, *, internal, X), " &
"34 (BC_0, *, internal, X), " &
"33 (BC_0, *, internal, X), " &
"32 (BC_0, *, internal, X), " &
"31 (BC_0, *, internal, X), " &
"30 (BC_0, *, internal, X), " &
"29 (BC_0, *, internal, X), " &
"28 (BC_0, *, internal, X), " &
"27 (BC_0, *, internal, X), " &
"26 (BC_0, *, internal, X), " &
"25 (BC_0, *, internal, X), " &
"24 (BC_0, *, internal, X), " &
"23 (BC_0, *, internal, X), " &
"22 (BC_0, *, internal, X), " &
"21 (BC_0, *, internal, X), " &
"20 (BC_0, *, internal, X), " &
"19 (BC_0, *, internal, X), " &
"18 (BC_0, *, internal, X), " &
"17 (BC_0, *, internal, X), " &
"16 (BC_0, *, internal, X), " &
"15 (BC_0, *, internal, X), " &
"14 (BC_0, *, internal, X), " &
"13 (BC_0, *, internal, X), " &
"12 (BC_0, *, internal, X), " &
"11 (BC_0, *, internal, X), " &
"10 (BC_0, *, internal, X), " &
"9 (BC_0, *, internal, X), " &
"8 (BC_0, *, internal, X), " &
"7 (BC_0, *, internal, X), " &
"6 (BC_0, *, internal, X), " &
"5 (BC_0, *, internal, X), " &
"4 (BC_0, *, internal, X), " &
"3 (BC_0, *, internal, X), " &
"2 (BC_0, *, internal, X), " &
"1 (BC_0, *, internal, X), " &
"0 (BC_0, *, internal, X) ";
end ds34t101;