BSDL Files Library for JTAG

The only free public library that contains thousands of BSDL (Boundary Scan Description Language) models to use with BScan/JTAG tools

BSDL model: LCMXO256C_XXM100

-- ********************************************************************
-- *   LCMXO256C_XXM100 BSDL Model                                    *
-- *                                                                  *
-- *           This is a preliminary BSDL file.                       *
-- *         It has not been verified on silicon.                     *
-- *                                                                  *
-- * File Version:      1.04                                          *
-- * File Date:         03/25/2008                                    *
-- *                                                                  *
-- * Standard Test Access Port and Boundary-Scan Architecture         *
-- * VHDL Description File                                            *
-- *                                                                  *
-- * This BSDL file is created by genBSDL V 2.0 according to:         *
-- * - IEEE Standard 1149.1-2001                                      *
-- *                                                                  *
-- * This BSDL file has been syntax checked with:                     *
-- * - Lattice BSDL Syntax Checker                                    *
-- * - Goepel BSDL Syntax Checker V3.1.2                              *
-- * - ASSET / Agilent BSDL Validation Service                        *
-- * - JTAG Technologies JTAG BSDL Verifier V2.4                      *
-- *                                                                  *
-- *  Copyright 2000 - 2008                                           *
-- *  Lattice Semiconductor Corporation                               *
-- *  5555 NE Moore Ct.                                               *
-- *  Hillsboro, OR 97124                                             *
-- *                                                                  *
-- *  All rights reserved.  No part of this program or publication    *
-- *  may be reproduced, transmitted, transcribed, stored in a        *
-- *  retrieval system, or translated into any language or            *
-- *  computer language, in any form or by any means without this     *
-- *  notice appearing within.                                        *
-- ********************************************************************
-- *                                                                  *
-- *                           IMPORTANT                              *
-- *                                                                  *
-- * The following is a BSDL file that tests all of the I/O pins      *
-- * as bi-directional pins. The functionality of the BSCAN register  *
-- * for this device is dependent of the pattern programmed into the  *
-- * device. If the device is configured to use LVDS pairs or VREF    *
-- * signals, an application specific BSDL file is required.          *
-- *                                                                  *
-- * The SLEEPN pin is used to put the device in Sleep mode. It must  *
-- * be High throughout the entire BSCAN testing.                     *
-- *                                                                  *
-- * NOTE: The un-programmed MachXO devices do not support the        *
-- *       SAMPLE instruction.                                        * 
-- *                                                                  *
-- * For Further assistance, please contact Tech Support at           *
-- *       1-800-LATTICE or techsupport@latticesemi.com               *
-- ********************************************************************
-- *                                                                  *
-- *                          REVISION HISTORY                        *
-- * Rev 1.04: 03/25/2008                                             *
-- *  - rcs: Added a Note to the header stating un-programmed         *
-- *         devices do not support the SAMPLE instruction.           * 
-- * Rev 1.03: 10/03/2005                                             *
-- *  - rcs: Changed the SLEEPN pin from linkage to in bit.           *
-- *  - rcs: Added attribute COMPLIANCE_PATTERNS for the SLEEPN pin.  *
-- *  - rcs: Added attribute DESIGN_WARNING for the SLEEPN pin.       *
-- *  - rcs: Changed the TAP_SCAN_CLOCK from 20 MHz to 25 MHz.        *
-- * Rev 1.02: 07/26/05                                               *
-- *  - rcs: Changed the TAP_SCAN_CLOCK from 25 MHz to 20 MHz.        *
-- * Rev 1.01: 07/06/05                                               *
-- *  - yy: Hand-edited to add SLEEPN (as linkage bit)                *
-- * Rev 1.00: 05/27/05                                               *
-- *  - yy: Intial release.                                           *
-- *                                                                  *
-- ********************************************************************
entity LCMXO256C_XXM100 is 

	generic (PHYSICAL_PIN_MAP : string := "csBGA_100");
		port (
	                PL2A  :  inout bit;
	                PL2B  :  inout bit;
	                PL3A  :  inout bit;
	                PL3B  :  inout bit;
	                PL3C  :  inout bit;
	                PL3D  :  inout bit;
	                PL4A  :  inout bit;
	                PL4B  :  inout bit;
	                PL5A  :  inout bit;
	                PL5B  :  inout bit;
	                PL5C  :  inout bit;
	                PL5D  :  inout bit;
	                PL6A  :  inout bit;
	                PL6B  :  inout bit;
	                PL7A  :  inout bit;
	                PL7B  :  inout bit;
	                PL7C  :  inout bit;
	                PL7D  :  inout bit;
	                PL8A  :  inout bit;
	                PL8B  :  inout bit;
	                PL9A  :  inout bit;
	                 TMS  :  in bit;
	                PL9B  :  inout bit;
	                 TCK  :  in bit;
	                PB2A  :  inout bit;
	                PB2B  :  inout bit;
	                 TDO  :  out bit;
	                PB2C  :  inout bit;
	                 TDI  :  in bit;
	                PB2D  :  inout bit;
	                PB3A  :  inout bit;
	                PB3B  :  inout bit;
	                PB3C  :  inout bit;
	                PB3D  :  inout bit;
	                PB4A  :  inout bit;
	                PB4B  :  inout bit;
	                PB4C  :  inout bit;
	                PB4D  :  inout bit;
	                PB5A  :  inout bit;
                  SLEEPN  :  in bit;
	                PB5C  :  inout bit;
	                PB5D  :  inout bit;
	                PR9B  :  inout bit;
	                PR9A  :  inout bit;
	                PR8B  :  inout bit;
	                PR8A  :  inout bit;
	                PR7D  :  inout bit;
	                PR7C  :  inout bit;
	                PR7B  :  inout bit;
	                PR7A  :  inout bit;
	                PR6B  :  inout bit;
	                PR6A  :  inout bit;
	                PR5D  :  inout bit;
	                PR5C  :  inout bit;
	                PR5B  :  inout bit;
	                PR5A  :  inout bit;
	                PR4B  :  inout bit;
	                PR4A  :  inout bit;
	                PR3D  :  inout bit;
	                PR3C  :  inout bit;
	                PR3B  :  inout bit;
	                PR3A  :  inout bit;
	                PR2B  :  inout bit;
	                PR2A  :  inout bit;
	                PT5C  :  inout bit;
	                PT5B  :  inout bit;
	                PT5A  :  inout bit;
	                PT4F  :  inout bit;
	                PT4E  :  inout bit;
	                PT4D  :  inout bit;
	                PT4C  :  inout bit;
	                PT4B  :  inout bit;
	                PT4A  :  inout bit;
	                PT3D  :  inout bit;
	              VCCAUX  :  linkage bit;
	                PT3C  :  inout bit;
	                PT3B  :  inout bit;
	                PT3A  :  inout bit;
	                PT2F  :  inout bit;
	                PT2E  :  inout bit;
	                PT2D  :  inout bit;
	                PT2C  :  inout bit;
	                PT2B  :  inout bit;
	                PT2A  :  inout bit;
	                 GND  :  linkage bit_vector (1 to 2);
	              GNDIO0  :  linkage bit_vector (1 to 3);
	              GNDIO1  :  linkage bit_vector (1 to 3);
	                 VCC  :  linkage bit_vector (1 to 2);
	              VCCIO0  :  linkage bit_vector (1 to 3);
	              VCCIO1  :  linkage bit_vector (1 to 3));
-- Version Control
	use STD_1149_1_2001.all;	-- 1149.1-2001 attributes

-- Component Conformance Statement
	attribute COMPONENT_CONFORMANCE of LCMXO256C_XXM100 : entity is "STD_1149_1_2001";

-- Device Package Pin Mapping
	attribute PIN_MAP of LCMXO256C_XXM100 : entity is PHYSICAL_PIN_MAP;

	constant csBGA_100 : PIN_MAP_STRING :=
		"        PL2A:   B1, " &
		"        PL2B:   C1, " &
		"        PL3A:   D2, " &
		"        PL3B:   D1, " &
		"        PL3C:   C2, " &
		"        PL3D:   E1, " &
		"        PL4A:   E2, " &
		"        PL4B:   F1, " &
		"        PL5A:   F2, " &
		"        PL5B:   G2, " &
		"        PL5C:   H2, " &
		"        PL5D:   J1, " &
		"        PL6A:   J2, " &
		"        PL6B:   K1, " &
		"        PL7A:   K2, " &
		"        PL7B:   L1, " &
		"        PL7C:   L2, " &
		"        PL7D:   M1, " &
		"        PL8A:   M2, " &
		"        PL8B:   N1, " &
		"        PL9A:   M3, " &
		"         TMS:   P2, " &
		"        PL9B:   P3, " &
		"         TCK:   N4, " &
		"        PB2A:   P4, " &
		"        PB2B:   N3, " &
		"         TDO:   P5, " &
		"        PB2C:   N5, " &
		"         TDI:   P6, " &
		"        PB2D:   N6, " &
		"        PB3A:   N7, " &
		"        PB3B:   P8, " &
		"        PB3C:   N8, " &
		"        PB3D:   P9, " &
		"        PB4A:  P11, " &
		"        PB4B:  N11, " &
		"        PB4C:  P12, " &
		"        PB4D:  N12, " &
		"        PB5A:  P13, " &
		"      SLEEPN:  M12, " &
		"        PB5C:  P14, " &
		"        PB5D:  N13, " &
		"        PR9B:  N14, " &
		"        PR9A:  M14, " &
		"        PR8B:  L13, " &
		"        PR8A:  L14, " &
		"        PR7D:  M13, " &
		"        PR7C:  K14, " &
		"        PR7B:  K13, " &
		"        PR7A:  J14, " &
		"        PR6B:  J13, " &
		"        PR6A:  H13, " &
		"        PR5D:  G13, " &
		"        PR5C:  F14, " &
		"        PR5B:  F13, " &
		"        PR5A:  E14, " &
		"        PR4B:  E13, " &
		"        PR4A:  D14, " &
		"        PR3D:  D13, " &
		"        PR3C:  C14, " &
		"        PR3B:  C13, " &
		"        PR3A:  B14, " &
		"        PR2B:  C12, " &
		"        PR2A:  A13, " &
		"        PT5C:  A12, " &
		"        PT5B:  B11, " &
		"        PT5A:  A11, " &
		"        PT4F:  B12, " &
		"        PT4E:  A10, " &
		"        PT4D:  B10, " &
		"        PT4C:   A9, " &
		"        PT4B:   A8, " &
		"        PT4A:   B8, " &
		"        PT3D:   A7, " &
		"      VCCAUX:   B7, " &
		"        PT3C:   A6, " &
		"        PT3B:   A5, " &
		"        PT3A:   B4, " &
		"        PT2F:   A3, " &
		"        PT2E:   B3, " &
		"        PT2D:   A2, " &
		"        PT2C:   C3, " &
		"        PT2B:   A1, " &
		"        PT2A:   B2, " &
		"         GND: (  N9, " & 
		"                B9), " & 
		"      GNDIO0: ( G14, " & 
		"               B13, " & 
		"                A4), " & 
		"      GNDIO1: (  H1, " & 
		"                N2, " & 
		"               N10), " & 
		"         VCC: (  P7, " & 
		"                B6), " & 
		"      VCCIO0: ( H14, " & 
		"               A14, " & 
		"                B5), " & 
		"      VCCIO1: (  G1, " & 
		"                P1, " & 
		"               P10)";

-- End of pin mapping

-- Grouped port mapping and definition
--	attribute PORT_GROUPING of LCMXO256C_XXM100 : entity is
--		"DIFFERENTIAL_CURRENT ( " &
--		"(PB2A, PB2B)," &
--		"(PB2C, PB2D)," &
--		"(PB3A, PB3B)," &
--		"(PB3C, PB3D)," &
--		"(PB4A, PB4B)," &
--		"(PB4C, PB4D)," &
--		"(PB5C, PB5D)," &
--		"(PL2A, PL2B)," &
--		"(PL3A, PL3B)," &
--		"(PL3C, PL3D)," &
--		"(PL4A, PL4B)," &
--		"(PL5A, PL5B)," &
--		"(PL5C, PL5D)," &
--		"(PL6A, PL6B)," &
--		"(PL7A, PL7B)," &
--		"(PL7C, PL7D)," &
--		"(PL8A, PL8B)," &
--		"(PL9A, PL9B)," &
--		"(PR2A, PR2B)," &
--		"(PR3A, PR3B)," &
--		"(PR3C, PR3D)," &
--		"(PR4A, PR4B)," &
--		"(PR5A, PR5B)," &
--		"(PR5C, PR5D)," &
--		"(PR6A, PR6B)," &
--		"(PR7A, PR7B)," &
--		"(PR7C, PR7D)," &
--		"(PR8A, PR8B)," &
--		"(PR9A, PR9B)," &
--		"(PT2A, PT2B)," &
--		"(PT2C, PT2D)," &
--		"(PT2E, PT2F)," &
--		"(PT3A, PT3B)," &
--		"(PT3C, PT3D)," &
--		"(PT4A, PT4B)," &
--		"(PT4C, PT4D)," &
--		"(PT4E, PT4F)," &
--		"(PT5A, PT5B)," &
-- End of grouped port mapping

-- TAP definition and characteristics
	attribute TAP_SCAN_IN   of TDI : signal is true;
	attribute TAP_SCAN_MODE of TMS : signal is true;
	attribute TAP_SCAN_OUT  of TDO : signal is true;
	attribute TAP_SCAN_CLOCK of TCK : signal is (25.0e6, BOTH);

-- Compliance Patterns
-- The SLEEPN pin is used to put the device in Sleep mode.
        attribute COMPLIANCE_PATTERNS of LCMXO256C_XXM100 : entity is
           "(SLEEPN) (1)";

-- Instruction register description
	attribute INSTRUCTION_LENGTH of LCMXO256C_XXM100 : entity is 8;
	attribute INSTRUCTION_OPCODE of LCMXO256C_XXM100 : entity is
		"   ISC_ADDRESS_SHIFT		(00000001)," &
		"             XPROGEN		(00110101)," &
		"              IDCODE		(00010110," &
		"                    		 00011001," &
		"                    		 00011101)," &
		"           PINCR_RTI		(01100111)," &
		"             PRELOAD		(00011100)," &
		"          ISC_ENABLE		(00010101)," &
		"           VINCR_RTI		(01101010)," &
		"        PROG_REFRESH		(01001111)," &
		"          SRAMPROGEN		(01010101)," &
		"            ISC_READ		(00001010)," &
		"              INTEST		(00101100)," &
		"    ISC_PROGRAM_DONE		(00101111)," &
		"         XSRAMREADEN		(01110101)," &
		"            INITADDR		(00100001)," &
		"         ISC_DISABLE		(00011110)," &
		"ISC_PROGRAM_USERCODE		(00011010)," &
		"          READ_SETUP		(11101010)," &
		"           ISC_ERASE		(00000011)," &
		"                 IPB		(00111000)," &
		"            ISC_NOOP		(00110000)," &
		"         ISC_PROGRAM		(00000111)," &
		"ISC_PROGRAM_SECURITY		(00001001)," &
		"              SAMPLE		(00011100)," &
		"               HIGHZ		(00011000)," &
		"              BYPASS		(00000000," &
		"                    		 11111111)," &
		"      ISC_DATA_SHIFT		(00000010)," &
		"                 IPA		(00110010)," &
		"       ISC_DISCHARGE		(00010100)," &
		"             REFRESH		(00100011)," &
		"         READ_STATUS		(10110010)," &
		"            USERCODE		(00010111)," &
		"      ISC_ERASE_DONE		(00100100)," &
		"               CLAMP		(00100000)," &
		"              EXTEST		(11010101)," &
		"           ISC_SETUP		(00100010)," &
		"PRIVATE	(00010000, 10000000, 00010001, 00001111)";

  attribute INSTRUCTION_CAPTURE of LCMXO256C_XXM100 : entity is 
                                  "00011X01";
  attribute INSTRUCTION_PRIVATE of LCMXO256C_XXM100 : entity is 
                                  "PRIVATE";

--IDCODE and USERCODE register definition
	attribute IDCODE_REGISTER of LCMXO256C_XXM100 : entity is
		"0000" &	--Version number
		"0001001010000001" &	--Device specific number
		"000001000011";	--Company code

	attribute USERCODE_REGISTER of LCMXO256C_XXM100 : entity is
		"11111111111111111111111111111111";

	attribute REGISTER_ACCESS of LCMXO256C_XXM100 : entity is
		"ISC_DEFAULT[1]		(ISC_DISCHARGE, " &
		"			 ISC_ENABLE, " &
		"			 ISC_DISABLE, " &
		"			 INITADDR, " &
		"			 REFRESH, " &
		"			 ISC_ERASE_DONE, " &
		"			 ISC_NOOP, " &
		"			 XPROGEN, " &
		"			 SRAMPROGEN, " &
		"			 XSRAMREADEN), " &
		"ISC_ADDRESS[295]		(ISC_ADDRESS_SHIFT), " &
		"BYPASS		(HIGHZ, " &
		"			 CLAMP, " &
		"			 BYPASS), " &
		"ISC_DATA[192]		(ISC_DATA_SHIFT), " &
		"ISC_ER2[1]		(IPB), " &
		"STATUS[1]		(ISC_ERASE, " &
		"			 ISC_PROGRAM, " &
		"			 ISC_PROGRAM_SECURITY, " &
		"			 ISC_PROGRAM_USERCODE, " &
		"			 ISC_PROGRAM_DONE, " &
		"			 PROG_REFRESH, " &
		"			 PINCR_RTI, " &
		"			 READ_STATUS), " &
		"ISC_CONFIG[4]		(ISC_SETUP, " &
		"			 READ_SETUP), " &
		"ISC_ER1[1]		(IPA), " &
		"ISC_PDATA[192]		(ISC_READ, " &
		"			 VINCR_RTI), " &
		"DEVICE_ID		(IDCODE, " &
		"			 USERCODE), " &
		"BOUNDARY		(SAMPLE, " &
		"			 PRELOAD, " &
		"			 INTEST, " &
		"			 EXTEST) " ;

-- *****************************************************************
-- Boundary Scan Register Description, Cell 0 is the closest to TDO 
-- *****************************************************************
	attribute BOUNDARY_LENGTH of LCMXO256C_XXM100 : entity is 160;
	attribute BOUNDARY_REGISTER of LCMXO256C_XXM100 : entity is

		"159 (BC_7, PB2A, bidir, X, 158, 1, Z), " &
		"158 (BC_2, *, control, 1), " &
		"157 (BC_7, PB2B, bidir, X, 156, 1, Z), " &
		"156 (BC_2, *, control, 1), " &
		"155 (BC_7, PB2C, bidir, X, 154, 1, Z), " &
		"154 (BC_2, *, control, 1), " &
		"153 (BC_7, PB2D, bidir, X, 152, 1, Z), " &
		"152 (BC_2, *, control, 1), " &
		"151 (BC_7, PB3A, bidir, X, 150, 1, Z), " &
		"150 (BC_2, *, control, 1), " &
		"149 (BC_7, PB3B, bidir, X, 148, 1, Z), " &
		"148 (BC_2, *, control, 1), " &
		"147 (BC_7, PB3C, bidir, X, 146, 1, Z), " &
		"146 (BC_2, *, control, 1), " &
		"145 (BC_7, PB3D, bidir, X, 144, 1, Z), " &
		"144 (BC_2, *, control, 1), " &
		"143 (BC_7, PB4A, bidir, X, 142, 1, Z), " &
		"142 (BC_2, *, control, 1), " &
		"141 (BC_7, PB4B, bidir, X, 140, 1, Z), " &
		"140 (BC_2, *, control, 1), " &
		"139 (BC_7, PB4C, bidir, X, 138, 1, Z), " &
		"138 (BC_2, *, control, 1), " &
		"137 (BC_7, PB4D, bidir, X, 136, 1, Z), " &
		"136 (BC_2, *, control, 1), " &
		"135 (BC_7, PB5A, bidir, X, 134, 1, Z), " &
		"134 (BC_2, *, control, 1), " &
		"133 (BC_1, *, internal, X), " &
		"132 (BC_1, *, internal, 1), " &
		"131 (BC_7, PB5C, bidir, X, 130, 1, Z), " &
		"130 (BC_2, *, control, 1), " &
		"129 (BC_7, PB5D, bidir, X, 128, 1, Z), " &
		"128 (BC_2, *, control, 1), " &
		"127 (BC_7, PR9B, bidir, X, 126, 1, Z), " &
		"126 (BC_2, *, control, 1), " &
		"125 (BC_7, PR9A, bidir, X, 124, 1, Z), " &
		"124 (BC_2, *, control, 1), " &
		"123 (BC_7, PR8B, bidir, X, 122, 1, Z), " &
		"122 (BC_2, *, control, 1), " &
		"121 (BC_7, PR8A, bidir, X, 120, 1, Z), " &
		"120 (BC_2, *, control, 1), " &
		"119 (BC_7, PR7D, bidir, X, 118, 1, Z), " &
		"118 (BC_2, *, control, 1), " &
		"117 (BC_7, PR7C, bidir, X, 116, 1, Z), " &
		"116 (BC_2, *, control, 1), " &
		"115 (BC_7, PR7B, bidir, X, 114, 1, Z), " &
		"114 (BC_2, *, control, 1), " &
		"113 (BC_7, PR7A, bidir, X, 112, 1, Z), " &
		"112 (BC_2, *, control, 1), " &
		"111 (BC_7, PR6B, bidir, X, 110, 1, Z), " &
		"110 (BC_2, *, control, 1), " &
		"109 (BC_7, PR6A, bidir, X, 108, 1, Z), " &
		"108 (BC_2, *, control, 1), " &
		"107 (BC_7, PR5D, bidir, X, 106, 1, Z), " &
		"106 (BC_2, *, control, 1), " &
		"105 (BC_7, PR5C, bidir, X, 104, 1, Z), " &
		"104 (BC_2, *, control, 1), " &
		"103 (BC_7, PR5B, bidir, X, 102, 1, Z), " &
		"102 (BC_2, *, control, 1), " &
		"101 (BC_7, PR5A, bidir, X, 100, 1, Z), " &
		"100 (BC_2, *, control, 1), " &
		"99 (BC_7, PR4B, bidir, X, 98, 1, Z), " &
		"98 (BC_2, *, control, 1), " &
		"97 (BC_7, PR4A, bidir, X, 96, 1, Z), " &
		"96 (BC_2, *, control, 1), " &
		"95 (BC_7, PR3D, bidir, X, 94, 1, Z), " &
		"94 (BC_2, *, control, 1), " &
		"93 (BC_7, PR3C, bidir, X, 92, 1, Z), " &
		"92 (BC_2, *, control, 1), " &
		"91 (BC_7, PR3B, bidir, X, 90, 1, Z), " &
		"90 (BC_2, *, control, 1), " &
		"89 (BC_7, PR3A, bidir, X, 88, 1, Z), " &
		"88 (BC_2, *, control, 1), " &
		"87 (BC_7, PR2B, bidir, X, 86, 1, Z), " &
		"86 (BC_2, *, control, 1), " &
		"85 (BC_7, PR2A, bidir, X, 84, 1, Z), " &
		"84 (BC_2, *, control, 1), " &
		"83 (BC_1, *, internal, X), " &
		"82 (BC_1, *, internal, 1), " &
		"81 (BC_7, PT5C, bidir, X, 80, 1, Z), " &
		"80 (BC_2, *, control, 1), " &
		"79 (BC_7, PT5B, bidir, X, 78, 1, Z), " &
		"78 (BC_2, *, control, 1), " &
		"77 (BC_7, PT5A, bidir, X, 76, 1, Z), " &
		"76 (BC_2, *, control, 1), " &
		"75 (BC_7, PT4F, bidir, X, 74, 1, Z), " &
		"74 (BC_2, *, control, 1), " &
		"73 (BC_7, PT4E, bidir, X, 72, 1, Z), " &
		"72 (BC_2, *, control, 1), " &
		"71 (BC_7, PT4D, bidir, X, 70, 1, Z), " &
		"70 (BC_2, *, control, 1), " &
		"69 (BC_7, PT4C, bidir, X, 68, 1, Z), " &
		"68 (BC_2, *, control, 1), " &
		"67 (BC_7, PT4B, bidir, X, 66, 1, Z), " &
		"66 (BC_2, *, control, 1), " &
		"65 (BC_7, PT4A, bidir, X, 64, 1, Z), " &
		"64 (BC_2, *, control, 1), " &
		"63 (BC_7, PT3D, bidir, X, 62, 1, Z), " &
		"62 (BC_2, *, control, 1), " &
		"61 (BC_7, PT3C, bidir, X, 60, 1, Z), " &
		"60 (BC_2, *, control, 1), " &
		"59 (BC_7, PT3B, bidir, X, 58, 1, Z), " &
		"58 (BC_2, *, control, 1), " &
		"57 (BC_7, PT3A, bidir, X, 56, 1, Z), " &
		"56 (BC_2, *, control, 1), " &
		"55 (BC_7, PT2F, bidir, X, 54, 1, Z), " &
		"54 (BC_2, *, control, 1), " &
		"53 (BC_7, PT2E, bidir, X, 52, 1, Z), " &
		"52 (BC_2, *, control, 1), " &
		"51 (BC_7, PT2D, bidir, X, 50, 1, Z), " &
		"50 (BC_2, *, control, 1), " &
		"49 (BC_7, PT2C, bidir, X, 48, 1, Z), " &
		"48 (BC_2, *, control, 1), " &
		"47 (BC_7, PT2B, bidir, X, 46, 1, Z), " &
		"46 (BC_2, *, control, 1), " &
		"45 (BC_7, PT2A, bidir, X, 44, 1, Z), " &
		"44 (BC_2, *, control, 1), " &
		"43 (BC_7, PL2A, bidir, X, 42, 1, Z), " &
		"42 (BC_2, *, control, 1), " &
		"41 (BC_7, PL2B, bidir, X, 40, 1, Z), " &
		"40 (BC_2, *, control, 1), " &
		"39 (BC_7, PL3A, bidir, X, 38, 1, Z), " &
		"38 (BC_2, *, control, 1), " &
		"37 (BC_7, PL3B, bidir, X, 36, 1, Z), " &
		"36 (BC_2, *, control, 1), " &
		"35 (BC_7, PL3C, bidir, X, 34, 1, Z), " &
		"34 (BC_2, *, control, 1), " &
		"33 (BC_7, PL3D, bidir, X, 32, 1, Z), " &
		"32 (BC_2, *, control, 1), " &
		"31 (BC_7, PL4A, bidir, X, 30, 1, Z), " &
		"30 (BC_2, *, control, 1), " &
		"29 (BC_7, PL4B, bidir, X, 28, 1, Z), " &
		"28 (BC_2, *, control, 1), " &
		"27 (BC_7, PL5A, bidir, X, 26, 1, Z), " &
		"26 (BC_2, *, control, 1), " &
		"25 (BC_7, PL5B, bidir, X, 24, 1, Z), " &
		"24 (BC_2, *, control, 1), " &
		"23 (BC_7, PL5C, bidir, X, 22, 1, Z), " &
		"22 (BC_2, *, control, 1), " &
		"21 (BC_7, PL5D, bidir, X, 20, 1, Z), " &
		"20 (BC_2, *, control, 1), " &
		"19 (BC_7, PL6A, bidir, X, 18, 1, Z), " &
		"18 (BC_2, *, control, 1), " &
		"17 (BC_7, PL6B, bidir, X, 16, 1, Z), " &
		"16 (BC_2, *, control, 1), " &
		"15 (BC_7, PL7A, bidir, X, 14, 1, Z), " &
		"14 (BC_2, *, control, 1), " &
		"13 (BC_7, PL7B, bidir, X, 12, 1, Z), " &
		"12 (BC_2, *, control, 1), " &
		"11 (BC_7, PL7C, bidir, X, 10, 1, Z), " &
		"10 (BC_2, *, control, 1), " &
		"9 (BC_7, PL7D, bidir, X, 8, 1, Z), " &
		"8 (BC_2, *, control, 1), " &
		"7 (BC_7, PL8A, bidir, X, 6, 1, Z), " &
		"6 (BC_2, *, control, 1), " &
		"5 (BC_7, PL8B, bidir, X, 4, 1, Z), " &
		"4 (BC_2, *, control, 1), " &
		"3 (BC_7, PL9A, bidir, X, 2, 1, Z), " &
		"2 (BC_2, *, control, 1), " &
		"1 (BC_7, PL9B, bidir, X, 0, 1, Z), " &
		"0 (BC_2, *, control, 1)";

attribute DESIGN_WARNING of LCMXO256C_XXM100 : entity is
    "The SLEEPN pin is used to put the device in Sleep mode." &
    "It must be High throughout the entire BSCAN testing.";

end LCMXO256C_XXM100;