This BSDL contains syntax errors!
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-- Freescale Boundary Scan Description Language --
--------------------------------------------------------------------------------
-- Boundary Scan Description Language (IEEE 1149.1b) --
-- --
-- Device : MPC8308 Revision 1.0 --
-- File Version : D --
-- File Name : MPC8308.R1A --
-- File created : OCT 12, 2010 --
-- Modified : Aug 16, 2011 --
-- - Changed Nerai to MPC8308 --
-- - Release to Customer --
-- - dssc version 1.10 --
-- Package type : MAPBGA --
-- Voltage Level : 1V --
--------------------------------------------------------------------------------
-- Revision History: --
-- A - Original version --
-- -- NOTE: RXA/RXB pins are non-complaint with IEEE 1149.1 Standard --
-- --
-- Description --
-- ------------ --
-- RXA/RXA_B and RXB/RXB_B differential pin pairs cannot reliably sample--
-- correct values on the pins as per IEEE 1149.1 standard. To prevent --
-- false fail, these pins have been marked as linkage pins in the BSDL --
-- and the assciated BSR marked as internal. --
--
-- NOTE: The IEEE 1149.1 standard optional instructions HIGHZ, --
-- IDCODE, and CLAMP are supported. --
-- --
-- NOTE: SYS_CR_CLK_OUT pin is non-complaint with IEEE 1149.1 Standard --
-- NOTE: USB_CR_CLK_OUT pin is non-complaint with IEEE 1149.1 Standard --
-- --
-- NOTE: For assistance with this file, contact your sales office. --
-- --
-- --
--------------------------------------------------------------------------------
-- --
--------------------------------------------------------------------------------
-- --
--============================================================================--
-- IMPORTANT NOTICE --
-- This information is provided on an AS IS basis and without warranty. --
-- IN NO EVENT SHALL FREESCALE BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL --
-- DAMAGES ARISING FROM USE OF THIS INFORMATION. THIS DISCLAIMER OF --
-- WARRANTY EXTENDS TO THE USER OF THE INFORMATION, AND TO THEIR CUSTOMERS --
-- OR USERS OF PRODUCTS AND IS IN LIEU OF ALL WARRANTIES WHETHER EXPRESS, --
-- IMPLIED, OR STATUTORY, INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY --
-- OR FITNESS FOR PARTICULAR PURPOSE. --
-- --
-- FREESCALE does not represent or warrant that the information furnished --
-- hereunder is free of infringement of any third party patents, --
-- copyrights, trade secrets, or other intellectual property rights. --
-- --
-- FREESCALE does not represent or warrant that the information is free of --
-- defect, or that it meets any particular standard, requirements or need --
-- of the user of the infomation or their customers. --
-- --
-- FREESCALE reserves the right to change the information in this file --
-- without notice. The BSDL files are also available at: --
-- --
-- http://www.freescale.com --
-- --
--============================================================================--
entity MPC8308 is
generic (PHYSICAL_PIN_MAP : string := "PBGA");
-- PORT DESCRIPTION TERMS
-- in = input only
-- out = three-state output (0, Z, 1)
-- buffer = two-state output (0, 1)
-- inout = bidirectional
-- linkage = OTHER (vdd, vss, analog)
--
-- bit = single pin
-- bit_vector = group of pins with suffix 0 to n
port (
GPIO_0: inout bit;
GPIO_1: inout bit;
GPIO_10: inout bit;
GPIO_11: inout bit;
GPIO_12: inout bit;
GPIO_13: inout bit;
GPIO_14: inout bit;
GPIO_15: inout bit;
GPIO_2: inout bit;
GPIO_3: inout bit;
GPIO_4: inout bit;
GPIO_5: inout bit;
GPIO_5A: inout bit;
GPIO_6: inout bit;
GPIO_6A: inout bit;
GPIO_7: inout bit;
GPIO_7A: inout bit;
GPIO_8: inout bit;
GPIO_9: inout bit;
GTM1_TGATE3_B: inout bit;
GTM1_TGATE4_B: inout bit;
GTM1_TIN3: inout bit;
GTM1_TIN4: inout bit;
GTM1_TOUT3_B: inout bit;
GTM1_TOUT4_B: inout bit;
HRESET_B: inout bit;
IIC_SCL1: inout bit;
IIC_SCL2: inout bit;
IIC_SDA1: inout bit;
IIC_SDA2: inout bit;
IRQ_B0: inout bit;
IRQ_B1: inout bit;
IRQ_B2: inout bit;
IRQ_B3: inout bit;
LA0: inout bit;
LA1: inout bit;
LA10: out bit;
LA11: out bit;
LA12: out bit;
LA13: out bit;
LA14: out bit;
LA15: out bit;
LA16: inout bit;
LA17: inout bit;
LA18: inout bit;
LA19: out bit;
LA2: inout bit;
LA20: out bit;
LA21: out bit;
LA22: out bit;
LA23: out bit;
LA24: out bit;
LA25: out bit;
LA3: inout bit;
LA4: inout bit;
LA5: out bit;
LA6: out bit;
LA7: out bit;
LA8: out bit;
LA9: out bit;
LBCTL: out bit;
LCLK0: out bit;
LCS_B0: out bit;
LCS_B1: out bit;
LCS_B2: out bit;
LCS_B3: out bit;
LD0: inout bit;
LD1: inout bit;
LD10: inout bit;
LD11: inout bit;
LD12: inout bit;
LD13: inout bit;
LD14: inout bit;
LD15: inout bit;
LD2: inout bit;
LD3: inout bit;
LD4: inout bit;
LD5: inout bit;
LD6: inout bit;
LD7: inout bit;
LD8: inout bit;
LD9: inout bit;
LGPL0: out bit;
LGPL1: out bit;
LGPL2: out bit;
LGPL3: out bit;
LGPL4: inout bit;
LGPL5: out bit;
LWE_B0: out bit;
LWE_B1: out bit;
MEMC_MA0: out bit;
MEMC_MA1: out bit;
MEMC_MA10: out bit;
MEMC_MA11: out bit;
MEMC_MA12: out bit;
MEMC_MA13: out bit;
MEMC_MA2: out bit;
MEMC_MA3: out bit;
MEMC_MA4: out bit;
MEMC_MA5: out bit;
MEMC_MA6: out bit;
MEMC_MA7: out bit;
MEMC_MA8: out bit;
MEMC_MA9: out bit;
MEMC_MBA0: out bit;
MEMC_MBA1: out bit;
MEMC_MBA2: out bit;
MEMC_MCAS_B: out bit;
MEMC_MCK0: out bit;
MEMC_MCK1: out bit;
MEMC_MCK2: out bit;
MEMC_MCKE: out bit;
MEMC_MCK_B0: out bit;
MEMC_MCK_B1: out bit;
MEMC_MCK_B2: out bit;
MEMC_MCS_B0: out bit;
MEMC_MCS_B1: out bit;
MEMC_MDM0: out bit;
MEMC_MDM1: out bit;
MEMC_MDM2: out bit;
MEMC_MDM3: out bit;
MEMC_MDM8: out bit;
MEMC_MDQ0: inout bit;
MEMC_MDQ1: inout bit;
MEMC_MDQ10: inout bit;
MEMC_MDQ11: inout bit;
MEMC_MDQ12: inout bit;
MEMC_MDQ13: inout bit;
MEMC_MDQ14: inout bit;
MEMC_MDQ15: inout bit;
MEMC_MDQ16: inout bit;
MEMC_MDQ17: inout bit;
MEMC_MDQ18: inout bit;
MEMC_MDQ19: inout bit;
MEMC_MDQ2: inout bit;
MEMC_MDQ20: inout bit;
MEMC_MDQ21: inout bit;
MEMC_MDQ22: inout bit;
MEMC_MDQ23: inout bit;
MEMC_MDQ24: inout bit;
MEMC_MDQ25: inout bit;
MEMC_MDQ26: inout bit;
MEMC_MDQ27: inout bit;
MEMC_MDQ28: inout bit;
MEMC_MDQ29: inout bit;
MEMC_MDQ3: inout bit;
MEMC_MDQ30: inout bit;
MEMC_MDQ31: inout bit;
MEMC_MDQ4: inout bit;
MEMC_MDQ5: inout bit;
MEMC_MDQ6: inout bit;
MEMC_MDQ7: inout bit;
MEMC_MDQ8: inout bit;
MEMC_MDQ9: inout bit;
MEMC_MDQS0: inout bit;
MEMC_MDQS1: inout bit;
MEMC_MDQS2: inout bit;
MEMC_MDQS3: inout bit;
MEMC_MDQS8: inout bit;
MEMC_MECC0: inout bit;
MEMC_MECC1: inout bit;
MEMC_MECC2: inout bit;
MEMC_MECC3: inout bit;
MEMC_MECC4: inout bit;
MEMC_MECC5: inout bit;
MEMC_MECC6: inout bit;
MEMC_MECC7: inout bit;
MEMC_MODT0: out bit;
MEMC_MODT1: out bit;
MEMC_MRAS_B: out bit;
MEMC_MWE_B: out bit;
PORESET_B: in bit;
QUIESCE_B: out bit;
RTC_PIT_CLOCK: in bit;
SD_CD_B: inout bit;
SD_CLK: inout bit;
SD_CMD: inout bit;
SD_DAT0: inout bit;
SD_DAT1: inout bit;
SD_DAT2: inout bit;
SD_DAT3: inout bit;
SD_WP: inout bit;
SPICLK: inout bit;
SPIMISO: inout bit;
SPIMOSI: inout bit;
SPISEL: inout bit;
SRESET_B: inout bit;
SYS_CLK_IN: in bit;
TCK: in bit;
TDI: in bit;
TDO: out bit;
TEST_MODE: in bit;
TMS: in bit;
TRST_B: in bit;
TSEC_TMR_ALARM1: out bit;
TSEC_TMR_ALARM2: inout bit;
TSEC_TMR_CLK: inout bit;
TSEC_TMR_GCLK: out bit;
TSEC_TMR_PP1: out bit;
TSEC_TMR_PP2: out bit;
TSEC_TMR_PP3: inout bit;
TSEC_TMR_TRIG1: inout bit;
TSEC_TMR_TRIG2: inout bit;
TSEC0_TMR_RX_ESFD: inout bit;
TSEC0_TMR_TX_ESFD: inout bit;
TSEC1_COL: in bit;
TSEC1_CRS: in bit;
TSEC1_GTX_CLK: out bit;
TSEC1_MDC: out bit;
TSEC1_MDIO: inout bit;
TSEC1_RXD0: in bit;
TSEC1_RXD1: in bit;
TSEC1_RXD2: in bit;
TSEC1_RXD3: in bit;
TSEC1_RX_CLK: in bit;
TSEC1_RX_DV: in bit;
TSEC1_RX_ER: in bit;
TSEC1_TMR_RX_ESFD: inout bit;
TSEC1_TMR_TX_ESFD: inout bit;
TSEC1_TXD0: inout bit;
TSEC1_TXD1: inout bit;
TSEC1_TXD2: inout bit;
TSEC1_TXD3: inout bit;
TSEC1_TX_CLK: inout bit;
TSEC1_TX_EN: out bit;
TSEC1_TX_ER: inout bit;
TSEC2_CRS: inout bit;
UART_SIN1: inout bit;
UART_SIN2: inout bit;
UART_SOUT1: inout bit;
UART_SOUT2: inout bit;
USBDR_CLK: inout bit;
USBDR_DIR: inout bit;
USBDR_NXT: inout bit;
USBDR_PCTL0: out bit;
USBDR_PCTL1: out bit;
USBDR_PWRFAULT: inout bit;
USBDR_STP: out bit;
USBDR_TXDRXD0: inout bit;
USBDR_TXDRXD1: inout bit;
USBDR_TXDRXD2: inout bit;
USBDR_TXDRXD3: inout bit;
USBDR_TXDRXD4: inout bit;
USBDR_TXDRXD5: inout bit;
USBDR_TXDRXD6: inout bit;
USBDR_TXDRXD7: inout bit;
AVDD1: linkage bit;
AVDD2: linkage bit;
GVDD: linkage bit_vector(0 to 16);
MEMC_MVREF: linkage bit;
NVDDA: linkage bit_vector(0 to 4);
NVDDB: linkage bit_vector(0 to 2);
NVDDC: linkage bit_vector(0 to 4);
NVDDF: linkage bit_vector(0 to 2);
NVDDG: linkage bit_vector(0 to 1);
NVDDH: linkage bit_vector(0 to 5);
NVDDJ: linkage bit_vector(0 to 1);
NVDDK: linkage bit_vector(0 to 6);
NVDDP: linkage bit_vector(0 to 2);
STBY_1V: linkage bit;
THERM0: linkage bit;
VDD: linkage bit_vector(0 to 28);
VSS: linkage bit_vector(0 to 104);
SD_PLL_TPA_ANA: linkage bit;
XPADVDD: linkage bit_vector(0 to 2);
SD_IMP_CAL_RX: linkage bit;
RXA_B: linkage bit;
SD_REF_CLK_B: in bit;
SD_IMP_CAL_TX: linkage bit;
SDAVDD: linkage bit;
TXA_B: out bit;
XCOREVDD: linkage bit_vector(0 to 2);
XPADVSS: linkage bit_vector(0 to 5);
RXA: linkage bit;
SD_REF_CLK: in bit;
SDAVSS: linkage bit;
TXA: out bit;
SD_PLL_TPD: out bit;
XCOREVSS: linkage bit_vector(0 to 7));
use STD_1149_1_2001.all;
attribute COMPONENT_CONFORMANCE of MPC8308: entity is "STD_1149_1_2001";
attribute PIN_MAP of MPC8308 : entity is PHYSICAL_PIN_MAP;
constant PBGA :PIN_MAP_STRING :=
"GPIO_0: G21," &
"GPIO_1: K23," &
"GPIO_10: J23," &
"GPIO_11: K22," &
"GPIO_12: K20," &
"GPIO_13: K18," &
"GPIO_14: J17," &
"GPIO_15: K21," &
"GPIO_2: H18," &
"GPIO_3: G23," &
"GPIO_4: J18," &
"GPIO_5: J20," &
"GPIO_5A: N17," &
"GPIO_6: H22," &
"GPIO_6A: P21," &
"GPIO_7: H21," &
"GPIO_7A: M22," &
"GPIO_8: H20," &
"GPIO_9: J21," &
"GTM1_TGATE3_B: N20," &
"GTM1_TGATE4_B: P23," &
"GTM1_TIN3: P22," &
"GTM1_TIN4: N18," &
"GTM1_TOUT3_B: T18," &
"GTM1_TOUT4_B: V20," &
"HRESET_B: AA9," &
"IIC_SCL1: A9," &
"IIC_SCL2: C10," &
"IIC_SDA1: C9," &
"IIC_SDA2: D10," &
"IRQ_B0: A17," &
"IRQ_B1: F16," &
"IRQ_B2: B17," &
"IRQ_B3: A18," &
"LA0: AC20," &
"LA1: Y16," &
"LA10: V14," &
"LA11: AB17," &
"LA12: AA15," &
"LA13: AC16," &
"LA14: Y14," &
"LA15: AC15," &
"LA16: U13," &
"LA17: V13," &
"LA18: Y13," &
"LA19: AB15," &
"LA2: U15," &
"LA20: AA14," &
"LA21: AB14," &
"LA22: U12," &
"LA23: V12," &
"LA24: Y12," &
"LA25: AC14," &
"LA3: V15," &
"LA4: AA18," &
"LA5: AA17," &
"LA6: AC19," &
"LA7: AA16," &
"LA8: AB18," &
"LA9: AC18," &
"LBCTL: U11," &
"LCLK0: AC12," &
"LCS_B0: AA13," &
"LCS_B1: AB13," &
"LCS_B2: AA12," &
"LCS_B3: Y11," &
"LD0: U18," &
"LD1: V18," &
"LD10: Y17," &
"LD11: AC21," &
"LD12: AB20," &
"LD13: V16," &
"LD14: AA19," &
"LD15: AC17," &
"LD2: U16," &
"LD3: Y20," &
"LD4: AA21," &
"LD5: AC22," &
"LD6: V17," &
"LD7: AB21," &
"LD8: Y19," &
"LD9: AA20," &
"LGPL0: Y10," &
"LGPL1: AA10," &
"LGPL2: AB10," &
"LGPL3: AC10," &
"LGPL4: AB9," &
"LGPL5: Y9," &
"LWE_B0: AB11," &
"LWE_B1: AC11," &
"MEMC_MA0: C2," &
"MEMC_MA1: D2," &
"MEMC_MA10: C1," &
"MEMC_MA11: F7," &
"MEMC_MA12: G2," &
"MEMC_MA13: G3," &
"MEMC_MA2: D3," &
"MEMC_MA3: D4," &
"MEMC_MA4: E4," &
"MEMC_MA5: F4," &
"MEMC_MA6: E2," &
"MEMC_MA7: E1," &
"MEMC_MA8: F2," &
"MEMC_MA9: F3," &
"MEMC_MBA0: C3," &
"MEMC_MBA1: B2," &
"MEMC_MBA2: H4," &
"MEMC_MCAS_B: C5," &
"MEMC_MCK0: A3," &
"MEMC_MCK1: U2," &
"MEMC_MCK2: G1," &
"MEMC_MCKE: H3," &
"MEMC_MCK_B0: A4," &
"MEMC_MCK_B1: U1," &
"MEMC_MCK_B2: H1," &
"MEMC_MCS_B0: B6," &
"MEMC_MCS_B1: C6," &
"MEMC_MDM0: AB2," &
"MEMC_MDM1: V3," &
"MEMC_MDM2: P3," &
"MEMC_MDM3: M7," &
"MEMC_MDM8: K2," &
"MEMC_MDQ0: V6," &
"MEMC_MDQ1: Y4," &
"MEMC_MDQ10: Y1," &
"MEMC_MDQ11: W2," &
"MEMC_MDQ12: U4," &
"MEMC_MDQ13: U3," &
"MEMC_MDQ14: V4," &
"MEMC_MDQ15: U6," &
"MEMC_MDQ16: T3," &
"MEMC_MDQ17: T2," &
"MEMC_MDQ18: R4," &
"MEMC_MDQ19: R3," &
"MEMC_MDQ2: AB3," &
"MEMC_MDQ20: P4," &
"MEMC_MDQ21: N6," &
"MEMC_MDQ22: P2," &
"MEMC_MDQ23: P1," &
"MEMC_MDQ24: N4," &
"MEMC_MDQ25: N3," &
"MEMC_MDQ26: N2," &
"MEMC_MDQ27: M6," &
"MEMC_MDQ28: M2," &
"MEMC_MDQ29: M3," &
"MEMC_MDQ3: AA3," &
"MEMC_MDQ30: L2," &
"MEMC_MDQ31: L3," &
"MEMC_MDQ4: AA2," &
"MEMC_MDQ5: AA1," &
"MEMC_MDQ6: W4," &
"MEMC_MDQ7: Y2," &
"MEMC_MDQ8: W3," &
"MEMC_MDQ9: W1," &
"MEMC_MDQS0: AC3," &
"MEMC_MDQS1: V1," &
"MEMC_MDQS2: R1," &
"MEMC_MDQS3: M1," &
"MEMC_MDQS8: K1," &
"MEMC_MECC0: L4," &
"MEMC_MECC1: L6," &
"MEMC_MECC2: K4," &
"MEMC_MECC3: K3," &
"MEMC_MECC4: J2," &
"MEMC_MECC5: K6," &
"MEMC_MECC6: J3," &
"MEMC_MECC7: J6," &
"MEMC_MODT0: A5," &
"MEMC_MODT1: B5," &
"MEMC_MRAS_B: B4," &
"MEMC_MWE_B: D5," &
"PORESET_B: AA8," &
"QUIESCE_B: AA7," &
"RTC_PIT_CLOCK: AA23," &
"SD_CD_B: A7," &
"SD_CLK: D7," &
"SD_CMD: G9," &
"SD_DAT0: C8," &
"SD_DAT1: B8," &
"SD_DAT2: A8," &
"SD_DAT3: B9," &
"SD_WP: D8," &
"SPICLK: AA5," &
"SPIMISO: Y6," &
"SPIMOSI: AB5," &
"SPISEL: AB4," &
"SRESET_B: AB7," &
"SYS_CLK_IN: AC8," &
"TCK: Y7," &
"TDI: U9," &
"TDO: AC5," &
"TEST_MODE: AC6," &
"TMS: AA6," &
"TRST_B: V8," &
"TSEC_TMR_ALARM1: L23," &
"TSEC_TMR_ALARM2: M23," &
"TSEC_TMR_CLK: W23," &
"TSEC_TMR_GCLK: L17," &
"TSEC_TMR_PP1: L18," &
"TSEC_TMR_PP2: L21," &
"TSEC_TMR_PP3: L22," &
"TSEC_TMR_TRIG1: W21," &
"TSEC_TMR_TRIG2: Y21," &
"TSEC0_TMR_RX_ESFD: N23," &
"TSEC0_TMR_TX_ESFD: N21," &
"TSEC1_COL: B20," &
"TSEC1_CRS: B21," &
"TSEC1_GTX_CLK: F18," &
"TSEC1_MDC: A20," &
"TSEC1_MDIO: C19," &
"TSEC1_RXD0: D20," &
"TSEC1_RXD1: C20," &
"TSEC1_RXD2: C21," &
"TSEC1_RXD3: C22," &
"TSEC1_RX_CLK: A22," &
"TSEC1_RX_DV: D21," &
"TSEC1_RX_ER: C23," &
"TSEC1_TMR_RX_ESFD: M18," &
"TSEC1_TMR_TX_ESFD: M20," &
"TSEC1_TXD0: D22," &
"TSEC1_TXD1: E21," &
"TSEC1_TXD2: F21," &
"TSEC1_TXD3: F22," &
"TSEC1_TX_CLK: E23," &
"TSEC1_TX_EN: F20," &
"TSEC1_TX_ER: E22," &
"TSEC2_CRS: M21," &
"UART_SIN1: B18," &
"UART_SIN2: D18," &
"UART_SOUT1: C17," &
"UART_SOUT2: D17," &
"USBDR_CLK: R23," &
"USBDR_DIR: R21," &
"USBDR_NXT: P18," &
"USBDR_PCTL0: R17," &
"USBDR_PCTL1: U20," &
"USBDR_PWRFAULT: P20," &
"USBDR_STP: V21," &
"USBDR_TXDRXD0: T22," &
"USBDR_TXDRXD1: T21," &
"USBDR_TXDRXD2: U23," &
"USBDR_TXDRXD3: U22," &
"USBDR_TXDRXD4: T20," &
"USBDR_TXDRXD5: R18," &
"USBDR_TXDRXD6: V23," &
"USBDR_TXDRXD7: V22," &
"AVDD1: R6," &
"AVDD2: V10," &
"GVDD: (A1, A6, B3, D1, F1, F6," &
"G4, J1, J4, K7, N1, N7," &
"T1, T4, U7, Y3, AC1)," &
"MEMC_MVREF: G6," &
"NVDDA: (B7, B10, C7, D9, F9)," &
"NVDDB: (A16, A19, C18)," &
"NVDDC: (A23, B22, D23, E20, G18)," &
"NVDDF: (G22, J22, K17)," &
"NVDDG: (M17, N22)," &
"NVDDH: (P17, R20, T17, T23, W22, Y22)," &
"NVDDJ: (AB23, AA22)," &
"NVDDK: (U10, U14, Y18, AA11, AB16, AB22," &
"AC13)," &
"NVDDP: (Y5, AB8, AC4)," &
"STBY_1V: Y23," &
"THERM0: AC7," &
"VDD: (H8, H9, H10, H14, H15, H16," &
"J8, J16, K8, K16, L8, L16," &
"M8, M16, N8, N16, P8, P16," &
"R8, R16, T8, T9, T10, T11," &
"T12, T13, T14, T15, T16)," &
"VSS: (A2, A21, B1, B19, B23, C4," &
"C16, D6, D19, E3, F8, F15," &
"F17, F23, G7, G8, G10, G15," &
"G16, G17, G20, H2, H6, H7," &
"H17, H23, J7, J9, J10, J11," &
"J12, J13, J14, J15, K9, K10," &
"K11, K12, K13, K14, K15, L1," &
"L7, L9, L10, L11, L12, L13," &
"L14, L15, L20, M4, M9, M10," &
"M11, M12, M13, M14, M15, N9," &
"N10, N11, N12, N13, N14, N15," &
"P6, P7, P9, P10, P11, P12," &
"P13, P14, P15, R2, R7, R9," &
"R10, R11, R12, R13, R14, R15," &
"R22, T6, T7, U8, U17, U21," &
"V2, V7, V9, V11, W20, Y8," &
"Y15, AA4, AB1, AB6, AB12, AB19," &
"AC2, AC9, AC23)," &
"SD_PLL_TPA_ANA: F11, " &
"XPADVDD: (D15, F10, F14)," &
"SD_IMP_CAL_RX: A15, " &
"RXA_B: B13, " &
"SD_REF_CLK_B: C12, " &
"SD_IMP_CAL_TX: A11, " &
"SDAVDD: G12, " &
"TXA_B: C15, " &
"XCOREVDD: (A14, B12, C13)," &
"XPADVSS: (A10, B15, D14, G13, G14, H12)," &
"RXA: A13, " &
"SD_REF_CLK: D12, " &
"SDAVSS: F12, " &
"TXA: C14, " &
"SD_PLL_TPD: F13, " &
"XCOREVSS: (A12, B14, C11, D11, D13, G11, H11, H13) " ;
attribute PORT_GROUPING of MPC8308 : entity is
"Differential_Voltage ((TXA, TXA_B),"&
"(SD_REF_CLK, SD_REF_CLK_B))";
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (4.00e+07,BOTH);
attribute TAP_SCAN_RESET of TRST_B : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_IN of TDI : signal is true;
attribute COMPLIANCE_PATTERNS of MPC8308: entity is
"(TEST_MODE) (0)";
attribute INSTRUCTION_LENGTH of MPC8308: entity is 8;
attribute INSTRUCTION_OPCODE of MPC8308: entity is
"BYPASS (11111111)," &
"CLAMP (11110001)," &
"EXTEST (00000000)," &
"HIGHZ (11110010)," &
"IDCODE (11110011)," &
"PRELOAD (11110000)," &
"SAMPLE (11110000)," &
"PRIVATE001 (11111110)," &
"PRIVATE002 (11110100)," &
"PRIVATE003 (00000101)," &
"PRIVATE004 (10010000)," &
"PRIVATE005 (10010001)," &
"PRIVATE006 (00001001)," &
"PRIVATE007 (11111010)," &
"PRIVATE008 (00000011)," &
"PRIVATE009 (00000100)," &
"PRIVATE010 (00001010)," &
"PRIVATE011 (00110001)," &
"PRIVATE012 (00110011)," &
"PRIVATE013 (00110100)," &
"PRIVATE014 (00110101)," &
"PRIVATE015 (00110110)," &
"PRIVATE016 (00110111)," &
"PRIVATE017 (01000100)," &
"PRIVATE018 (01000101)," &
"PRIVATE019 (01000110)," &
"PRIVATE020 (01100000)," &
"PRIVATE021 (01100001)," &
"PRIVATE022 (01100010)," &
"PRIVATE023 (01100011)," &
"PRIVATE024 (01100100)," &
"PRIVATE025 (01100101)," &
"PRIVATE026 (01100110)," &
"PRIVATE027 (01100111)," &
"PRIVATE028 (01101011)," &
"PRIVATE029 (10010010)," &
"PRIVATE030 (10010011)," &
"PRIVATE031 (00010000)," &
"PRIVATE032 (00010001)," &
"PRIVATE033 (00010010)," &
"PRIVATE034 (00010011)," &
"PRIVATE035 (00010100)," &
"PRIVATE036 (01110000)," &
"PRIVATE037 (01110001)," &
"PRIVATE038 (01110010)," &
"PRIVATE039 (01110011)," &
"PRIVATE040 (01110100)," &
"PRIVATE041 (01110101)," &
"PRIVATE042 (01110110)," &
"PRIVATE043 (01111010)," &
"PRIVATE044 (10000000)," &
"PRIVATE045 (10000001)," &
"PRIVATE046 (10000010)," &
"PRIVATE047 (10000011)," &
"PRIVATE048 (00110000)";
attribute INSTRUCTION_CAPTURE of MPC8308: entity is "xxxxxx01 ";
attribute INSTRUCTION_PRIVATE of MPC8308: entity is
"PRIVATE001 ," &
"PRIVATE002 ," &
"PRIVATE003 ," &
"PRIVATE004 ," &
"PRIVATE005 ," &
"PRIVATE006 ," &
"PRIVATE007 ," &
"PRIVATE008 ," &
"PRIVATE009 ," &
"PRIVATE010 ," &
"PRIVATE011 ," &
"PRIVATE012 ," &
"PRIVATE013 ," &
"PRIVATE014 ," &
"PRIVATE015 ," &
"PRIVATE016 ," &
"PRIVATE017 ," &
"PRIVATE018 ," &
"PRIVATE019 ," &
"PRIVATE020 ," &
"PRIVATE021 ," &
"PRIVATE022 ," &
"PRIVATE023 ," &
"PRIVATE024 ," &
"PRIVATE025 ," &
"PRIVATE026 ," &
"PRIVATE027 ," &
"PRIVATE028 ," &
"PRIVATE029 ," &
"PRIVATE030 ," &
"PRIVATE031 ," &
"PRIVATE032 ," &
"PRIVATE033 ," &
"PRIVATE034 ," &
"PRIVATE035 ," &
"PRIVATE036 ," &
"PRIVATE037 ," &
"PRIVATE038 ," &
"PRIVATE039 ," &
"PRIVATE040 ," &
"PRIVATE041 ," &
"PRIVATE042 ," &
"PRIVATE043 ," &
"PRIVATE044 ," &
"PRIVATE045 ," &
"PRIVATE046 ," &
"PRIVATE047 ," &
"PRIVATE048 ";
attribute IDCODE_REGISTER of MPC8308: entity is
"0000" & -- Version
"0110101011100001" & -- Part Number
"00000001110" & -- Manufacturer Identity
"1"; -- IEEE 1149.1 Requirement
attribute REGISTER_ACCESS of MPC8308: entity is
"BYPASS(BYPASS),"&
"BOUNDARY (SAMPLE)";
attribute BOUNDARY_LENGTH of MPC8308 : entity is 491;
attribute BOUNDARY_REGISTER of MPC8308 : entity is
-- num cell port function safe [ccell disval rslt]
"0 (BC_2, *, control, 0)," &
"1 (BC_7, IIC_SDA2, bidir, X, 0, 0, Z)," &
"2 (BC_2, *, control, 0)," &
"3 (BC_7, IIC_SCL1, bidir, X, 2, 0, Z)," &
"4 (BC_2, *, control, 0)," &
"5 (BC_7, IIC_SDA1, bidir, X, 4, 0, Z)," &
"6 (BC_2, *, control, 0)," &
"7 (BC_7, SD_DAT3, bidir, X, 6, 0, Z)," &
"8 (BC_2, *, control, 0)," &
"9 (BC_7, SD_DAT2, bidir, X, 8, 0, Z)," &
"10 (BC_2, *, control, 0)," &
"11 (BC_7, SD_DAT1, bidir, X, 10, 0, Z)," &
"12 (BC_2, *, control, 0)," &
"13 (BC_7, SD_DAT0, bidir, X, 12, 0, Z)," &
"14 (BC_2, *, control, 0)," &
"15 (BC_7, SD_WP, bidir, X, 14, 0, Z)," &
"16 (BC_2, *, control, 0)," &
"17 (BC_7, SD_CD_B, bidir, X, 16, 0, Z)," &
"18 (BC_2, *, control, 0)," &
"19 (BC_7, SD_CMD, bidir, X, 18, 0, Z)," &
"20 (BC_2, *, control, 0)," &
"21 (BC_7, SD_CLK, bidir, X, 20, 0, Z)," &
"22 (BC_2, *, control, 0)," &
"23 (BC_1, MEMC_MCS_B0, output3, X, 22, 0, Z)," &
"24 (BC_2, *, control, 0)," &
"25 (BC_1, MEMC_MODT0, output3, X, 24, 0, Z)," &
"26 (BC_2, *, control, 0)," &
"27 (BC_1, MEMC_MCS_B1, output3, X, 26, 0, Z)," &
"28 (BC_2, *, control, 0)," &
"29 (BC_1, MEMC_MODT1, output3, X, 28, 0, Z)," &
"30 (BC_2, *, control, 0)," &
"31 (BC_1, MEMC_MCAS_B, output3, X, 30, 0, Z)," &
"32 (BC_2, *, control, 0)," &
"33 (BC_1, MEMC_MCK_B0, output3, X, 32, 0, Z)," &
"34 (BC_2, *, control, 0)," &
"35 (BC_1, MEMC_MCK0, output3, X, 34, 0, Z)," &
"36 (BC_2, *, control, 0)," &
"37 (BC_1, MEMC_MRAS_B, output3, X, 36, 0, Z)," &
"38 (BC_2, *, control, 0)," &
"39 (BC_1, MEMC_MA11, output3, X, 38, 0, Z)," &
"40 (BC_2, *, control, 0)," &
"41 (BC_1, MEMC_MWE_B, output3, X, 40, 0, Z)," &
"42 (BC_2, *, control, 0)," &
"43 (BC_1, MEMC_MA3, output3, X, 42, 0, Z)," &
"44 (BC_2, *, control, 0)," &
"45 (BC_1, MEMC_MBA0, output3, X, 44, 0, Z)," &
"46 (BC_2, *, control, 0)," &
"47 (BC_1, MEMC_MBA1, output3, X, 46, 0, Z)," &
"48 (BC_2, *, control, 0)," &
"49 (BC_1, MEMC_MA0, output3, X, 48, 0, Z)," &
"50 (BC_2, *, control, 0)," &
"51 (BC_1, MEMC_MA2, output3, X, 50, 0, Z)," &
"52 (BC_2, *, control, 0)," &
"53 (BC_1, MEMC_MA4, output3, X, 52, 0, Z)," &
"54 (BC_2, *, control, 0)," &
"55 (BC_1, MEMC_MA10, output3, X, 54, 0, Z)," &
"56 (BC_2, *, control, 0)," &
"57 (BC_1, MEMC_MA1, output3, X, 56, 0, Z)," &
"58 (BC_2, *, control, 0)," &
"59 (BC_1, MEMC_MA5, output3, X, 58, 0, Z)," &
"60 (BC_2, *, control, 0)," &
"61 (BC_1, MEMC_MA6, output3, X, 60, 0, Z)," &
"62 (BC_2, *, control, 0)," &
"63 (BC_1, MEMC_MA9, output3, X, 62, 0, Z)," &
"64 (BC_2, *, control, 0)," &
"65 (BC_1, MEMC_MA7, output3, X, 64, 0, Z)," &
"66 (BC_2, *, control, 0)," &
"67 (BC_1, MEMC_MA8, output3, X, 66, 0, Z)," &
"68 (BC_2, *, control, 0)," &
"69 (BC_1, MEMC_MA13, output3, X, 68, 0, Z)," &
"70 (BC_2, *, control, 0)," &
"71 (BC_1, MEMC_MBA2, output3, X, 70, 0, Z)," &
"72 (BC_2, *, control, 0)," &
"73 (BC_1, MEMC_MA12, output3, X, 72, 0, Z)," &
"74 (BC_2, *, control, 0)," &
"75 (BC_1, MEMC_MCK2, output3, X, 74, 0, Z)," &
"76 (BC_2, *, control, 0)," &
"77 (BC_1, MEMC_MCK_B2, output3, X, 76, 0, Z)," &
"78 (BC_2, *, control, 0)," &
"79 (BC_1, MEMC_MCKE, output3, X, 78, 0, Z)," &
"80 (BC_2, *, control, 0)," &
"81 (BC_7, MEMC_MECC7, bidir, X, 80, 0, Z)," &
"82 (BC_2, *, control, 0)," &
"83 (BC_7, MEMC_MECC6, bidir, X, 82, 0, Z)," &
"84 (BC_2, *, control, 0)," &
"85 (BC_7, MEMC_MECC5, bidir, X, 84, 0, Z)," &
"86 (BC_2, *, control, 0)," &
"87 (BC_7, MEMC_MECC4, bidir, X, 86, 0, Z)," &
"88 (BC_2, *, control, 0)," &
"89 (BC_1, MEMC_MDM8, output3, X, 88, 0, Z)," &
"90 (BC_2, *, control, 0)," &
"91 (BC_7, MEMC_MECC3, bidir, X, 90, 0, Z)," &
"92 (BC_2, *, control, 0)," &
"93 (BC_7, MEMC_MDQS8, bidir, X, 92, 0, Z)," &
"94 (BC_2, *, control, 0)," &
"95 (BC_7, MEMC_MECC2, bidir, X, 94, 0, Z)," &
"96 (BC_2, *, control, 0)," &
"97 (BC_7, MEMC_MECC1, bidir, X, 96, 0, Z)," &
"98 (BC_2, *, control, 0)," &
"99 (BC_7, MEMC_MECC0, bidir, X, 98, 0, Z)," &
"100 (BC_2, *, control, 0)," &
"101 (BC_7, MEMC_MDQ31, bidir, X, 100, 0, Z)," &
"102 (BC_2, *, control, 0)," &
"103 (BC_7, MEMC_MDQ30, bidir, X, 102, 0, Z)," &
"104 (BC_2, *, control, 0)," &
"105 (BC_7, MEMC_MDQ29, bidir, X, 104, 0, Z)," &
"106 (BC_2, *, control, 0)," &
"107 (BC_7, MEMC_MDQ28, bidir, X, 106, 0, Z)," &
"108 (BC_2, *, control, 0)," &
"109 (BC_7, MEMC_MDQ27, bidir, X, 108, 0, Z)," &
"110 (BC_2, *, control, 0)," &
"111 (BC_1, MEMC_MDM3, output3, X, 110, 0, Z)," &
"112 (BC_2, *, control, 0)," &
"113 (BC_7, MEMC_MDQS3, bidir, X, 112, 0, Z)," &
"114 (BC_2, *, control, 0)," &
"115 (BC_7, MEMC_MDQ26, bidir, X, 114, 0, Z)," &
"116 (BC_2, *, control, 0)," &
"117 (BC_7, MEMC_MDQ25, bidir, X, 116, 0, Z)," &
"118 (BC_2, *, control, 0)," &
"119 (BC_7, MEMC_MDQ24, bidir, X, 118, 0, Z)," &
"120 (BC_2, *, control, 0)," &
"121 (BC_7, MEMC_MDQ23, bidir, X, 120, 0, Z)," &
"122 (BC_2, *, control, 0)," &
"123 (BC_7, MEMC_MDQ22, bidir, X, 122, 0, Z)," &
"124 (BC_2, *, control, 0)," &
"125 (BC_7, MEMC_MDQ21, bidir, X, 124, 0, Z)," &
"126 (BC_2, *, control, 0)," &
"127 (BC_1, MEMC_MDM2, output3, X, 126, 0, Z)," &
"128 (BC_2, *, control, 0)," &
"129 (BC_7, MEMC_MDQ20, bidir, X, 128, 0, Z)," &
"130 (BC_2, *, control, 0)," &
"131 (BC_7, MEMC_MDQ19, bidir, X, 130, 0, Z)," &
"132 (BC_2, *, control, 0)," &
"133 (BC_7, MEMC_MDQS2, bidir, X, 132, 0, Z)," &
"134 (BC_2, *, control, 0)," &
"135 (BC_7, MEMC_MDQ18, bidir, X, 134, 0, Z)," &
"136 (BC_2, *, control, 0)," &
"137 (BC_7, MEMC_MDQ17, bidir, X, 136, 0, Z)," &
"138 (BC_2, *, control, 0)," &
"139 (BC_7, MEMC_MDQ16, bidir, X, 138, 0, Z)," &
"140 (BC_2, *, control, 0)," &
"141 (BC_1, MEMC_MCK_B1, output3, X, 140, 0, Z)," &
"142 (BC_2, *, control, 0)," &
"143 (BC_1, MEMC_MCK1, output3, X, 142, 0, Z)," &
"144 (BC_2, *, control, 0)," &
"145 (BC_7, MEMC_MDQ13, bidir, X, 144, 0, Z)," &
"146 (BC_2, *, control, 0)," &
"147 (BC_7, MEMC_MDQ12, bidir, X, 146, 0, Z)," &
"148 (BC_2, *, control, 0)," &
"149 (BC_1, MEMC_MDM1, output3, X, 148, 0, Z)," &
"150 (BC_2, *, control, 0)," &
"151 (BC_7, MEMC_MDQ11, bidir, X, 150, 0, Z)," &
"152 (BC_2, *, control, 0)," &
"153 (BC_7, MEMC_MDQ10, bidir, X, 152, 0, Z)," &
"154 (BC_2, *, control, 0)," &
"155 (BC_7, MEMC_MDQ9, bidir, X, 154, 0, Z)," &
"156 (BC_2, *, control, 0)," &
"157 (BC_7, MEMC_MDQS1, bidir, X, 156, 0, Z)," &
"158 (BC_2, *, control, 0)," &
"159 (BC_7, MEMC_MDQ8, bidir, X, 158, 0, Z)," &
"160 (BC_2, *, control, 0)," &
"161 (BC_7, MEMC_MDQ14, bidir, X, 160, 0, Z)," &
"162 (BC_2, *, control, 0)," &
"163 (BC_7, MEMC_MDQ15, bidir, X, 162, 0, Z)," &
"164 (BC_2, *, control, 0)," &
"165 (BC_7, MEMC_MDQ7, bidir, X, 164, 0, Z)," &
"166 (BC_2, *, control, 0)," &
"167 (BC_7, MEMC_MDQ6, bidir, X, 166, 0, Z)," &
"168 (BC_2, *, control, 0)," &
"169 (BC_7, MEMC_MDQ5, bidir, X, 168, 0, Z)," &
"170 (BC_2, *, control, 0)," &
"171 (BC_1, MEMC_MDM0, output3, X, 170, 0, Z)," &
"172 (BC_2, *, control, 0)," &
"173 (BC_7, MEMC_MDQ4, bidir, X, 172, 0, Z)," &
"174 (BC_2, *, control, 0)," &
"175 (BC_7, MEMC_MDQ3, bidir, X, 174, 0, Z)," &
"176 (BC_2, *, control, 0)," &
"177 (BC_7, MEMC_MDQS0, bidir, X, 176, 0, Z)," &
"178 (BC_2, *, control, 0)," &
"179 (BC_7, MEMC_MDQ2, bidir, X, 178, 0, Z)," &
"180 (BC_2, *, control, 0)," &
"181 (BC_7, MEMC_MDQ1, bidir, X, 180, 0, Z)," &
"182 (BC_2, *, control, 0)," &
"183 (BC_7, MEMC_MDQ0, bidir, X, 182, 0, Z)," &
"184 (BC_2, *, control, 0)," &
"185 (BC_7, SPISEL, bidir, X, 184, 0, Z)," &
"186 (BC_2, *, control, 0)," &
"187 (BC_7, SPICLK, bidir, X, 186, 0, Z)," &
"188 (BC_2, *, control, 0)," &
"189 (BC_7, SPIMISO, bidir, X, 188, 0, Z)," &
"190 (BC_2, *, control, 0)," &
"191 (BC_7, SPIMOSI, bidir, X, 190, 0, Z)," &
"192 (BC_2, *, control, 0)," &
"193 (BC_1, QUIESCE_B, output3, X, 192, 0, Z)," &
"194 (BC_2, *, control, 0)," &
"195 (BC_7, SRESET_B, bidir, X, 194, 0, Z)," &
"196 (BC_2, *, internal, X)," &
"197 (BC_2, PORESET_B, input, X)," &
"198 (BC_2, *, control, 0)," &
"199 (BC_7, HRESET_B, bidir, X, 198, 0, Z)," &
"200 (BC_2, *, internal, X)," &
"201 (BC_2, SYS_CLK_IN, input, X)," &
"202 (BC_2, *, control, 0)," &
"203 (BC_1, LGPL5, output3, X, 202, 0, Z)," &
"204 (BC_2, *, control, 0)," &
"205 (BC_7, LGPL4, bidir, X, 204, 0, Z)," &
"206 (BC_2, *, control, 0)," &
"207 (BC_1, LGPL3, output3, X, 206, 0, Z)," &
"208 (BC_2, *, control, 0)," &
"209 (BC_1, LGPL2, output3, X, 208, 0, Z)," &
"210 (BC_2, *, control, 0)," &
"211 (BC_1, LGPL1, output3, X, 210, 0, Z)," &
"212 (BC_2, *, control, 0)," &
"213 (BC_1, LGPL0, output3, X, 212, 0, Z)," &
"214 (BC_2, *, control, 0)," &
"215 (BC_1, LBCTL, output3, X, 214, 0, Z)," &
"216 (BC_2, *, control, 0)," &
"217 (BC_1, LWE_B1, output3, X, 216, 0, Z)," &
"218 (BC_2, *, control, 0)," &
"219 (BC_1, LWE_B0, output3, X, 218, 0, Z)," &
"220 (BC_2, *, control, 0)," &
"221 (BC_1, LCS_B3, output3, X, 220, 0, Z)," &
"222 (BC_2, *, control, 0)," &
"223 (BC_1, LCS_B2, output3, X, 222, 0, Z)," &
"224 (BC_2, *, control, 0)," &
"225 (BC_1, LCS_B1, output3, X, 224, 0, Z)," &
"226 (BC_2, *, control, 0)," &
"227 (BC_1, LCLK0, output3, X, 226, 0, Z)," &
"228 (BC_2, *, control, 0)," &
"229 (BC_1, LCS_B0, output3, X, 228, 0, Z)," &
"230 (BC_2, *, control, 0)," &
"231 (BC_1, LA25, output3, X, 230, 0, Z)," &
"232 (BC_2, *, control, 0)," &
"233 (BC_1, LA24, output3, X, 232, 0, Z)," &
"234 (BC_2, *, control, 0)," &
"235 (BC_1, LA23, output3, X, 234, 0, Z)," &
"236 (BC_2, *, control, 0)," &
"237 (BC_1, LA22, output3, X, 236, 0, Z)," &
"238 (BC_2, *, control, 0)," &
"239 (BC_1, LA21, output3, X, 238, 0, Z)," &
"240 (BC_2, *, control, 0)," &
"241 (BC_1, LA20, output3, X, 240, 0, Z)," &
"242 (BC_2, *, control, 0)," &
"243 (BC_1, LA19, output3, X, 242, 0, Z)," &
"244 (BC_2, *, control, 0)," &
"245 (BC_7, LA18, bidir, X, 244, 0, Z)," &
"246 (BC_2, *, control, 0)," &
"247 (BC_7, LA17, bidir, X, 246, 0, Z)," &
"248 (BC_2, *, control, 0)," &
"249 (BC_7, LA16, bidir, X, 248, 0, Z)," &
"250 (BC_2, *, control, 0)," &
"251 (BC_1, LA15, output3, X, 250, 0, Z)," &
"252 (BC_2, *, control, 0)," &
"253 (BC_1, LA14, output3, X, 252, 0, Z)," &
"254 (BC_2, *, control, 0)," &
"255 (BC_1, LA13, output3, X, 254, 0, Z)," &
"256 (BC_2, *, control, 0)," &
"257 (BC_1, LA12, output3, X, 256, 0, Z)," &
"258 (BC_2, *, control, 0)," &
"259 (BC_1, LA11, output3, X, 258, 0, Z)," &
"260 (BC_2, *, control, 0)," &
"261 (BC_1, LA10, output3, X, 260, 0, Z)," &
"262 (BC_2, *, control, 0)," &
"263 (BC_1, LA9, output3, X, 262, 0, Z)," &
"264 (BC_2, *, control, 0)," &
"265 (BC_1, LA8, output3, X, 264, 0, Z)," &
"266 (BC_2, *, control, 0)," &
"267 (BC_1, LA7, output3, X, 266, 0, Z)," &
"268 (BC_2, *, control, 0)," &
"269 (BC_1, LA6, output3, X, 268, 0, Z)," &
"270 (BC_2, *, control, 0)," &
"271 (BC_1, LA5, output3, X, 270, 0, Z)," &
"272 (BC_2, *, control, 0)," &
"273 (BC_7, LA4, bidir, X, 272, 0, Z)," &
"274 (BC_2, *, control, 0)," &
"275 (BC_7, LA3, bidir, X, 274, 0, Z)," &
"276 (BC_2, *, control, 0)," &
"277 (BC_7, LA2, bidir, X, 276, 0, Z)," &
"278 (BC_2, *, control, 0)," &
"279 (BC_7, LA1, bidir, X, 278, 0, Z)," &
"280 (BC_2, *, control, 0)," &
"281 (BC_7, LA0, bidir, X, 280, 0, Z)," &
"282 (BC_2, *, control, 0)," &
"283 (BC_7, LD15, bidir, X, 282, 0, Z)," &
"284 (BC_2, *, control, 0)," &
"285 (BC_7, LD14, bidir, X, 284, 0, Z)," &
"286 (BC_2, *, control, 0)," &
"287 (BC_7, LD13, bidir, X, 286, 0, Z)," &
"288 (BC_2, *, control, 0)," &
"289 (BC_7, LD12, bidir, X, 288, 0, Z)," &
"290 (BC_2, *, control, 0)," &
"291 (BC_7, LD11, bidir, X, 290, 0, Z)," &
"292 (BC_2, *, control, 0)," &
"293 (BC_7, LD10, bidir, X, 292, 0, Z)," &
"294 (BC_2, *, control, 0)," &
"295 (BC_7, LD9, bidir, X, 294, 0, Z)," &
"296 (BC_2, *, control, 0)," &
"297 (BC_7, LD8, bidir, X, 296, 0, Z)," &
"298 (BC_2, *, control, 0)," &
"299 (BC_7, LD7, bidir, X, 298, 0, Z)," &
"300 (BC_2, *, control, 0)," &
"301 (BC_7, LD6, bidir, X, 300, 0, Z)," &
"302 (BC_2, *, control, 0)," &
"303 (BC_7, LD5, bidir, X, 302, 0, Z)," &
"304 (BC_2, *, control, 0)," &
"305 (BC_7, LD4, bidir, X, 304, 0, Z)," &
"306 (BC_2, *, control, 0)," &
"307 (BC_7, LD3, bidir, X, 306, 0, Z)," &
"308 (BC_2, *, control, 0)," &
"309 (BC_7, LD2, bidir, X, 308, 0, Z)," &
"310 (BC_2, *, control, 0)," &
"311 (BC_7, LD1, bidir, X, 310, 0, Z)," &
"312 (BC_2, *, control, 0)," &
"313 (BC_7, LD0, bidir, X, 312, 0, Z)," &
"314 (BC_2, *, internal, X)," &
"315 (BC_2, *, internal, X)," &
"316 (BC_2, *, internal, X)," &
"317 (BC_2, RTC_PIT_CLOCK, input, X)," &
"318 (BC_2, *, control, 0)," &
"319 (BC_7, TSEC_TMR_TRIG2, bidir, X, 318, 0, Z)," &
"320 (BC_2, *, control, 0)," &
"321 (BC_7, TSEC_TMR_TRIG1, bidir, X, 320, 0, Z)," &
"322 (BC_2, *, control, 0)," &
"323 (BC_7, GTM1_TOUT4_B, bidir, X, 322, 0, Z)," &
"324 (BC_2, *, control, 0)," &
"325 (BC_7, GTM1_TOUT3_B, bidir, X, 324, 0, Z)," &
"326 (BC_2, *, control, 0)," &
"327 (BC_7, TSEC_TMR_CLK, bidir, X, 326, 0, Z)," &
"328 (BC_2, *, control, 0)," &
"329 (BC_1, USBDR_STP, output3, X, 328, 0, Z)," &
"330 (BC_2, *, control, 0)," &
"331 (BC_1, USBDR_PCTL1, output3, X, 330, 0, Z)," &
"332 (BC_2, *, control, 0)," &
"333 (BC_1, USBDR_PCTL0, output3, X, 332, 0, Z)," &
"334 (BC_2, *, control, 0)," &
"335 (BC_7, USBDR_TXDRXD7, bidir, X, 334, 0, Z)," &
"336 (BC_2, *, control, 0)," &
"337 (BC_7, USBDR_TXDRXD6, bidir, X, 336, 0, Z)," &
"338 (BC_2, *, control, 0)," &
"339 (BC_7, USBDR_TXDRXD5, bidir, X, 338, 0, Z)," &
"340 (BC_2, *, control, 0)," &
"341 (BC_7, USBDR_TXDRXD4, bidir, X, 340, 0, Z)," &
"342 (BC_2, *, control, 0)," &
"343 (BC_7, USBDR_TXDRXD3, bidir, X, 342, 0, Z)," &
"344 (BC_2, *, control, 0)," &
"345 (BC_7, USBDR_TXDRXD2, bidir, X, 344, 0, Z)," &
"346 (BC_2, *, control, 0)," &
"347 (BC_7, USBDR_TXDRXD1, bidir, X, 346, 0, Z)," &
"348 (BC_2, *, control, 0)," &
"349 (BC_7, USBDR_TXDRXD0, bidir, X, 348, 0, Z)," &
"350 (BC_2, *, control, 0)," &
"351 (BC_7, USBDR_NXT, bidir, X, 350, 0, Z)," &
"352 (BC_2, *, control, 0)," &
"353 (BC_7, USBDR_DIR, bidir, X, 352, 0, Z)," &
"354 (BC_2, *, control, 0)," &
"355 (BC_7, USBDR_CLK, bidir, X, 354, 0, Z)," &
"356 (BC_2, *, control, 0)," &
"357 (BC_7, USBDR_PWRFAULT, bidir, X, 356, 0, Z)," &
"358 (BC_2, *, control, 0)," &
"359 (BC_7, GPIO_6A, bidir, X, 358, 0, Z)," &
"360 (BC_2, *, control, 0)," &
"361 (BC_7, GPIO_5A, bidir, X, 360, 0, Z)," &
"362 (BC_2, *, control, 0)," &
"363 (BC_7, GTM1_TIN3, bidir, X, 362, 0, Z)," &
"364 (BC_2, *, control, 0)," &
"365 (BC_7, GTM1_TGATE4_B, bidir, X, 364, 0, Z)," &
"366 (BC_2, *, control, 0)," &
"367 (BC_7, GTM1_TIN4, bidir, X, 366, 0, Z)," &
"368 (BC_2, *, control, 0)," &
"369 (BC_7, GTM1_TGATE3_B, bidir, X, 368, 0, Z)," &
"370 (BC_2, *, control, 0)," &
"371 (BC_7, TSEC0_TMR_TX_ESFD, bidir, X, 370, 0, Z)," &
"372 (BC_2, *, control, 0)," &
"373 (BC_7, TSEC0_TMR_RX_ESFD, bidir, X, 372, 0, Z)," &
"374 (BC_2, *, control, 0)," &
"375 (BC_7, TSEC1_TMR_TX_ESFD, bidir, X, 374, 0, Z)," &
"376 (BC_2, *, control, 0)," &
"377 (BC_7, TSEC1_TMR_RX_ESFD, bidir, X, 376, 0, Z)," &
"378 (BC_2, *, control, 0)," &
"379 (BC_7, TSEC2_CRS, bidir, X, 378, 0, Z)," &
"380 (BC_2, *, control, 0)," &
"381 (BC_7, GPIO_7A, bidir, X, 380, 0, Z)," &
"382 (BC_2, *, control, 0)," &
"383 (BC_7, TSEC_TMR_ALARM2, bidir, X, 382, 0, Z)," &
"384 (BC_2, *, control, 0)," &
"385 (BC_1, TSEC_TMR_ALARM1, output3, X, 384, 0, Z)," &
"386 (BC_2, *, control, 0)," &
"387 (BC_7, TSEC_TMR_PP3, bidir, X, 386, 0, Z)," &
"388 (BC_2, *, control, 0)," &
"389 (BC_1, TSEC_TMR_PP2, output3, X, 388, 0, Z)," &
"390 (BC_2, *, control, 0)," &
"391 (BC_1, TSEC_TMR_PP1, output3, X, 390, 0, Z)," &
"392 (BC_2, *, control, 0)," &
"393 (BC_1, TSEC_TMR_GCLK, output3, X, 392, 0, Z)," &
"394 (BC_2, *, control, 0)," &
"395 (BC_7, GPIO_1, bidir, X, 394, 0, Z)," &
"396 (BC_2, *, control, 0)," &
"397 (BC_7, GPIO_11, bidir, X, 396, 0, Z)," &
"398 (BC_2, *, control, 0)," &
"399 (BC_7, GPIO_12, bidir, X, 398, 0, Z)," &
"400 (BC_2, *, control, 0)," &
"401 (BC_7, GPIO_15, bidir, X, 400, 0, Z)," &
"402 (BC_2, *, control, 0)," &
"403 (BC_7, GPIO_13, bidir, X, 402, 0, Z)," &
"404 (BC_2, *, control, 0)," &
"405 (BC_7, GPIO_14, bidir, X, 404, 0, Z)," &
"406 (BC_2, *, control, 0)," &
"407 (BC_7, GPIO_10, bidir, X, 406, 0, Z)," &
"408 (BC_2, *, control, 0)," &
"409 (BC_7, GPIO_9, bidir, X, 408, 0, Z)," &
"410 (BC_2, *, control, 0)," &
"411 (BC_7, GPIO_5, bidir, X, 410, 0, Z)," &
"412 (BC_2, *, control, 0)," &
"413 (BC_7, GPIO_6, bidir, X, 412, 0, Z)," &
"414 (BC_2, *, control, 0)," &
"415 (BC_7, GPIO_7, bidir, X, 414, 0, Z)," &
"416 (BC_2, *, control, 0)," &
"417 (BC_7, GPIO_8, bidir, X, 416, 0, Z)," &
"418 (BC_2, *, control, 0)," &
"419 (BC_7, GPIO_4, bidir, X, 418, 0, Z)," &
"420 (BC_2, *, control, 0)," &
"421 (BC_7, GPIO_3, bidir, X, 420, 0, Z)," &
"422 (BC_2, *, control, 0)," &
"423 (BC_7, GPIO_0, bidir, X, 422, 0, Z)," &
"424 (BC_2, *, control, 0)," &
"425 (BC_7, GPIO_2, bidir, X, 424, 0, Z)," &
"426 (BC_2, *, control, 0)," &
"427 (BC_7, TSEC1_TXD3, bidir, X, 426, 0, Z)," &
"428 (BC_2, *, control, 0)," &
"429 (BC_7, TSEC1_TXD2, bidir, X, 428, 0, Z)," &
"430 (BC_2, *, control, 0)," &
"431 (BC_7, TSEC1_TX_ER, bidir, X, 430, 0, Z)," &
"432 (BC_2, *, control, 0)," &
"433 (BC_1, TSEC1_TX_EN, output3, X, 432, 0, Z)," &
"434 (BC_2, *, control, 0)," &
"435 (BC_7, TSEC1_TXD1, bidir, X, 434, 0, Z)," &
"436 (BC_2, *, control, 0)," &
"437 (BC_7, TSEC1_TXD0, bidir, X, 436, 0, Z)," &
"438 (BC_2, *, control, 0)," &
"439 (BC_7, TSEC1_TX_CLK, bidir, X, 438, 0, Z)," &
"440 (BC_2, *, internal, X)," &
"441 (BC_2, TSEC1_RX_DV, input, X)," &
"442 (BC_2, *, internal, X)," &
"443 (BC_2, TSEC1_RX_ER, input, X)," &
"444 (BC_2, *, internal, X)," &
"445 (BC_2, TSEC1_RXD3, input, X)," &
"446 (BC_2, *, internal, X)," &
"447 (BC_2, TSEC1_RXD2, input, X)," &
"448 (BC_2, *, internal, X)," &
"449 (BC_2, TSEC1_RXD1, input, X)," &
"450 (BC_2, *, internal, X)," &
"451 (BC_2, TSEC1_CRS, input, X)," &
"452 (BC_2, *, internal, X)," &
"453 (BC_2, TSEC1_RXD0, input, X)," &
"454 (BC_2, *, internal, X)," &
"455 (BC_2, TSEC1_RX_CLK, input, X)," &
"456 (BC_2, *, internal, X)," &
"457 (BC_2, TSEC1_COL, input, X)," &
"458 (BC_2, *, control, 0)," &
"459 (BC_1, TSEC1_GTX_CLK, output3, X, 458, 0, Z)," &
"460 (BC_2, *, control, 0)," &
"461 (BC_7, TSEC1_MDIO, bidir, X, 460, 0, Z)," &
"462 (BC_2, *, control, 0)," &
"463 (BC_1, TSEC1_MDC, output3, X, 462, 0, Z)," &
"464 (BC_2, *, control, 0)," &
"465 (BC_7, UART_SIN2, bidir, X, 464, 0, Z)," &
"466 (BC_2, *, control, 0)," &
"467 (BC_7, UART_SOUT2, bidir, X, 466, 0, Z)," &
"468 (BC_2, *, control, 0)," &
"469 (BC_7, UART_SIN1, bidir, X, 468, 0, Z)," &
"470 (BC_2, *, control, 0)," &
"471 (BC_7, UART_SOUT1, bidir, X, 470, 0, Z)," &
"472 (BC_2, *, control, 0)," &
"473 (BC_7, IRQ_B3, bidir, X, 472, 0, Z)," &
"474 (BC_2, *, control, 0)," &
"475 (BC_7, IRQ_B2, bidir, X, 474, 0, Z)," &
"476 (BC_2, *, control, 0)," &
"477 (BC_7, IRQ_B1, bidir, X, 476, 0, Z)," &
"478 (BC_2, *, control, 0)," &
"479 (BC_7, IRQ_B0, bidir, X, 478, 0, Z)," &
"480 (BC_2, *, control, 1)," &
"481 (BC_2, TXA, output3, 0, 480, 1, Z)," &
"482 (BC_4, *, internal, X)," &
"483 (BC_4, SD_REF_CLK, clock, X)," &
"484 (BC_2, *, control, 1)," &
"485 (BC_2, SD_PLL_TPD, output3, 0, 484, 1, Z)," &
"486 (BC_4, *, internal, X)," &
"487 (BC_2, *, internal, X)," &
"488 (BC_2, *, internal, X)," &
"489 (BC_2, *, control, 0)," &
"490 (BC_7, IIC_SCL2, bidir, X, 489, 0, Z)";
end MPC8308;