entity AM263 is
generic (PHYSICAL_PIN_MAP : string := "nFBGA");
port (
TCK: in bit;
TMS: in bit;
TDO: out bit;
TDI: in bit;
QSPI0_CSn0: inout bit;
QSPI0_CSn1: inout bit;
QSPI0_CLK: inout bit;
QSPI0_D0: inout bit;
QSPI0_D1: inout bit;
QSPI0_D2: inout bit;
QSPI0_D3: inout bit;
MCAN0_RX: inout bit;
MCAN0_TX: inout bit;
MCAN1_RX: inout bit;
MCAN1_TX: inout bit;
SPI0_CS0: inout bit;
SPI0_CLK: inout bit;
SPI0_D0: inout bit;
SPI0_D1: inout bit;
SPI1_CS0: inout bit;
SPI1_CLK: inout bit;
SPI1_D0: inout bit;
SPI1_D1: inout bit;
LIN1_RXD: inout bit;
LIN1_TXD: inout bit;
LIN2_RXD: inout bit;
LIN2_TXD: inout bit;
I2C1_SCL: inout bit;
I2C1_SDA: inout bit;
UART0_RTSn: inout bit;
UART0_CTSn: inout bit;
UART0_RXD: inout bit;
UART0_TXD: inout bit;
RGMII1_RXC: inout bit;
RGMII1_RX_CTL: inout bit;
RGMII1_RD0: inout bit;
RGMII1_RD1: inout bit;
RGMII1_RD2: inout bit;
RGMII1_RD3: inout bit;
RGMII1_TXC: inout bit;
RGMII1_TX_CTL: inout bit;
RGMII1_TD0: inout bit;
RGMII1_TD1: inout bit;
RGMII1_TD2: inout bit;
RGMII1_TD3: inout bit;
MDIO0_MDIO: inout bit;
MDIO0_MDC: inout bit;
EPWM0_A: inout bit;
EPWM0_B: inout bit;
EPWM1_A: inout bit;
EPWM1_B: inout bit;
EPWM2_A: inout bit;
EPWM2_B: inout bit;
EPWM3_A: inout bit;
EPWM3_B: inout bit;
EPWM4_A: inout bit;
EPWM4_B: inout bit;
EPWM5_A: inout bit;
EPWM5_B: inout bit;
EPWM6_A: inout bit;
EPWM6_B: inout bit;
EPWM7_A: inout bit;
EPWM7_B: inout bit;
EPWM8_A: inout bit;
EPWM8_B: inout bit;
EPWM9_A: inout bit;
EPWM9_B: inout bit;
EPWM10_A: inout bit;
EPWM10_B: inout bit;
EPWM11_A: inout bit;
EPWM11_B: inout bit;
EPWM12_A: inout bit;
EPWM12_B: inout bit;
EPWM13_A: inout bit;
EPWM13_B: inout bit;
EPWM14_A: inout bit;
EPWM14_B: inout bit;
EPWM15_A: inout bit;
EPWM15_B: inout bit;
UART1_RXD: inout bit;
UART1_TXD: inout bit;
MMC0_CLK: inout bit;
MMC0_CMD: inout bit;
MMC0_D0: inout bit;
MMC0_D1: inout bit;
MMC0_D2: inout bit;
MMC0_D3: inout bit;
MMC0_WP: inout bit;
MMC0_CD: inout bit;
PR0_MDIO0_MDIO: inout bit;
PR0_MDIO0_MDC: inout bit;
PR0_PRU0_GPO5: inout bit;
PR0_PRU0_GPO9: inout bit;
PR0_PRU0_GPO10: inout bit;
PR0_PRU0_GPO8: inout bit;
PR0_PRU0_GPO6: inout bit;
PR0_PRU0_GPO4: inout bit;
PR0_PRU0_GPO0: inout bit;
PR0_PRU0_GPO1: inout bit;
PR0_PRU0_GPO2: inout bit;
PR0_PRU0_GPO3: inout bit;
PR0_PRU0_GPO16: inout bit;
PR0_PRU0_GPO15: inout bit;
PR0_PRU0_GPO11: inout bit;
PR0_PRU0_GPO12: inout bit;
PR0_PRU0_GPO13: inout bit;
PR0_PRU0_GPO14: inout bit;
PR0_PRU1_GPO5: inout bit;
PR0_PRU1_GPO9: inout bit;
PR0_PRU1_GPO10: inout bit;
PR0_PRU1_GPO8: inout bit;
PR0_PRU1_GPO6: inout bit;
PR0_PRU1_GPO4: inout bit;
PR0_PRU1_GPO0: inout bit;
PR0_PRU1_GPO1: inout bit;
PR0_PRU1_GPO2: inout bit;
PR0_PRU1_GPO3: inout bit;
PR0_PRU1_GPO16: inout bit;
PR0_PRU1_GPO15: inout bit;
PR0_PRU1_GPO11: inout bit;
PR0_PRU1_GPO12: inout bit;
PR0_PRU1_GPO13: inout bit;
PR0_PRU1_GPO14: inout bit;
PR0_PRU1_GPO19: inout bit;
PR0_PRU1_GPO18: inout bit;
EXT_REFCLK0: inout bit;
SDFM0_CLK0: inout bit;
SDFM0_D0: inout bit;
SDFM0_CLK1: inout bit;
SDFM0_D1: inout bit;
SDFM0_CLK2: inout bit;
SDFM0_D2: inout bit;
SDFM0_CLK3: inout bit;
SDFM0_D3: inout bit;
EQEP0_A: inout bit;
EQEP0_B: inout bit;
EQEP0_STROBE: inout bit;
EQEP0_INDEX: inout bit;
I2C0_SDA: inout bit;
I2C0_SCL: inout bit;
MCAN2_TX: inout bit;
MCAN2_RX: inout bit;
CLKOUT0: inout bit;
WARMRSTn: inout bit;
SAFETY_ERRORn: inout bit);
use STD_1149_1_2001.all;
attribute COMPONENT_CONFORMANCE of AM263 : entity is "STD_1149_1_2001";
attribute PIN_MAP of AM263 : entity is PHYSICAL_PIN_MAP;
constant nFBGA: PIN_MAP_STRING :=
"TCK: B3, "&
"TMS: D5, "&
"TDO: C4, "&
"TDI: C5, "&
"QSPI0_CSn0: P1, "&
"QSPI0_CSn1: R3, "&
"QSPI0_CLK: N2, "&
"QSPI0_D0: N1, "&
"QSPI0_D1: N4, "&
"QSPI0_D2: M4, "&
"QSPI0_D3: P3, "&
"MCAN0_RX: M1, "&
"MCAN0_TX: L1, "&
"MCAN1_RX: L2, "&
"MCAN1_TX: K1, "&
"SPI0_CS0: C11, "&
"SPI0_CLK: A11, "&
"SPI0_D0: C10, "&
"SPI0_D1: B11, "&
"SPI1_CS0: C9, "&
"SPI1_CLK: A10, "&
"SPI1_D0: B10, "&
"SPI1_D1: D9, "&
"LIN1_RXD: A9, "&
"LIN1_TXD: B9, "&
"LIN2_RXD: B8, "&
"LIN2_TXD: A8, "&
"I2C1_SCL: D7, "&
"I2C1_SDA: C8, "&
"UART0_RTSn: C7, "&
"UART0_CTSn: B7, "&
"UART0_RXD: A7, "&
"UART0_TXD: A6, "&
"RGMII1_RXC: R17, "&
"RGMII1_RX_CTL: R18, "&
"RGMII1_RD0: U17, "&
"RGMII1_RD1: T17, "&
"RGMII1_RD2: U18, "&
"RGMII1_RD3: T18, "&
"RGMII1_TXC: N18, "&
"RGMII1_TX_CTL: M18, "&
"RGMII1_TD0: P16, "&
"RGMII1_TD1: P17, "&
"RGMII1_TD2: P18, "&
"RGMII1_TD3: N17, "&
"MDIO0_MDIO: N16, "&
"MDIO0_MDC: M17, "&
"EPWM0_A: B2, "&
"EPWM0_B: B1, "&
"EPWM1_A: D3, "&
"EPWM1_B: D2, "&
"EPWM2_A: C2, "&
"EPWM2_B: C1, "&
"EPWM3_A: E2, "&
"EPWM3_B: E3, "&
"EPWM4_A: D1, "&
"EPWM4_B: E4, "&
"EPWM5_A: F2, "&
"EPWM5_B: G2, "&
"EPWM6_A: E1, "&
"EPWM6_B: F3, "&
"EPWM7_A: F4, "&
"EPWM7_B: F1, "&
"EPWM8_A: G3, "&
"EPWM8_B: H2, "&
"EPWM9_A: G1, "&
"EPWM9_B: J2, "&
"EPWM10_A: G4, "&
"EPWM10_B: J3, "&
"EPWM11_A: H1, "&
"EPWM11_B: J1, "&
"EPWM12_A: K2, "&
"EPWM12_B: J4, "&
"EPWM13_A: K4, "&
"EPWM13_B: K3, "&
"EPWM14_A: V17, "&
"EPWM14_B: T16, "&
"EPWM15_A: P15, "&
"EPWM15_B: R16, "&
"UART1_RXD: L3, "&
"UART1_TXD: M3, "&
"MMC0_CLK: B6, "&
"MMC0_CMD: A4, "&
"MMC0_D0: B5, "&
"MMC0_D1: B4, "&
"MMC0_D2: A3, "&
"MMC0_D3: A2, "&
"MMC0_WP: C6, "&
"MMC0_CD: A5, "&
"PR0_MDIO0_MDIO: L17, "&
"PR0_MDIO0_MDC: L18, "&
"PR0_PRU0_GPO5: G17, "&
"PR0_PRU0_GPO9: F17, "&
"PR0_PRU0_GPO10: G18, "&
"PR0_PRU0_GPO8: G15, "&
"PR0_PRU0_GPO6: K15, "&
"PR0_PRU0_GPO4: K16, "&
"PR0_PRU0_GPO0: K17, "&
"PR0_PRU0_GPO1: K18, "&
"PR0_PRU0_GPO2: J18, "&
"PR0_PRU0_GPO3: J17, "&
"PR0_PRU0_GPO16: H18, "&
"PR0_PRU0_GPO15: L16, "&
"PR0_PRU0_GPO11: M16, "&
"PR0_PRU0_GPO12: M15, "&
"PR0_PRU0_GPO13: H17, "&
"PR0_PRU0_GPO14: H16, "&
"PR0_PRU1_GPO5: F15, "&
"PR0_PRU1_GPO9: C18, "&
"PR0_PRU1_GPO10: D17, "&
"PR0_PRU1_GPO8: D18, "&
"PR0_PRU1_GPO6: E16, "&
"PR0_PRU1_GPO4: F16, "&
"PR0_PRU1_GPO0: F18, "&
"PR0_PRU1_GPO1: G16, "&
"PR0_PRU1_GPO2: E17, "&
"PR0_PRU1_GPO3: E18, "&
"PR0_PRU1_GPO16: C16, "&
"PR0_PRU1_GPO15: A17, "&
"PR0_PRU1_GPO11: B18, "&
"PR0_PRU1_GPO12: B17, "&
"PR0_PRU1_GPO13: D16, "&
"PR0_PRU1_GPO14: C17, "&
"PR0_PRU1_GPO19: D15, "&
"PR0_PRU1_GPO18: C15, "&
"EXT_REFCLK0: P2, "&
"SDFM0_CLK0: B16, "&
"SDFM0_D0: D14, "&
"SDFM0_CLK1: A16, "&
"SDFM0_D1: D13, "&
"SDFM0_CLK2: B15, "&
"SDFM0_D2: C13, "&
"SDFM0_CLK3: A15, "&
"SDFM0_D3: C14, "&
"EQEP0_A: B14, "&
"EQEP0_B: A14, "&
"EQEP0_STROBE: C12, "&
"EQEP0_INDEX: D11, "&
"I2C0_SDA: B13, "&
"I2C0_SCL: A13, "&
"MCAN2_TX: B12, "&
"MCAN2_RX: A12, "&
"CLKOUT0: M2, "&
"WARMRSTn: C3, "&
"SAFETY_ERRORn: D4";
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (30.0e6, BOTH);
attribute INSTRUCTION_LENGTH of AM263 : entity is 8;
attribute INSTRUCTION_OPCODE of AM263 : entity is
-- Standard instructions:
"EXTEST (01111100), "&
"SAMPLE (01111111), "&
"BYPASS (01111110), "&
"PRELOAD (01111101), "&
"PRIVATE0 (00000001), "&
"PRIVATE1 (00000010), "&
"PRIVATE2 (00000011) ";
attribute INSTRUCTION_CAPTURE of AM263 : entity is "00000001";
attribute INSTRUCTION_PRIVATE of AM263 : entity is
"PRIVATE0," &
"PRIVATE1," &
"PRIVATE2";
attribute REGISTER_ACCESS of AM263 : entity is
"BOUNDARY (EXTEST,SAMPLE, PRELOAD), " &
"BYPASS(BYPASS) ";
attribute BOUNDARY_LENGTH of AM263 : entity is 438;
attribute BOUNDARY_REGISTER of AM263 : entity is
"0 (BC_1, *, control, 1), "&
"1 (BC_1, SAFETY_ERRORn, input, X), "&
"2 (BC_1, SAFETY_ERRORn, output3, X, 0, 1, Z), "&
"3 (BC_1, *, control, 1), "&
"4 (BC_1, WARMRSTn, input, X), "&
"5 (BC_1, WARMRSTn, output3, X, 3, 1, Z), "&
"6 (BC_1, *, control, 1), "&
"7 (BC_1, EPWM0_A, input, X), "&
"8 (BC_1, EPWM0_A, output3, X, 6, 1, Z), "&
"9 (BC_1, *, control, 1), "&
"10 (BC_1, EPWM0_B, input, X), "&
"11 (BC_1, EPWM0_B, output3, X, 9, 1, Z), "&
"12 (BC_1, *, control, 1), "&
"13 (BC_1, EPWM1_A, input, X), "&
"14 (BC_1, EPWM1_A, output3, X, 12, 1, Z), "&
"15 (BC_1, *, control, 1), "&
"16 (BC_1, EPWM1_B, input, X), "&
"17 (BC_1, EPWM1_B, output3, X, 15, 1, Z), "&
"18 (BC_1, *, control, 1), "&
"19 (BC_1, EPWM2_A, input, X), "&
"20 (BC_1, EPWM2_A, output3, X, 18, 1, Z), "&
"21 (BC_1, *, control, 1), "&
"22 (BC_1, EPWM2_B, input, X), "&
"23 (BC_1, EPWM2_B, output3, X, 21, 1, Z), "&
"24 (BC_1, *, control, 1), "&
"25 (BC_1, EPWM3_A, input, X), "&
"26 (BC_1, EPWM3_A, output3, X, 24, 1, Z), "&
"27 (BC_1, *, control, 1), "&
"28 (BC_1, EPWM3_B, input, X), "&
"29 (BC_1, EPWM3_B, output3, X, 27, 1, Z), "&
"30 (BC_1, *, control, 1), "&
"31 (BC_1, EPWM4_A, input, X), "&
"32 (BC_1, EPWM4_A, output3, X, 30, 1, Z), "&
"33 (BC_1, *, control, 1), "&
"34 (BC_1, EPWM4_B, input, X), "&
"35 (BC_1, EPWM4_B, output3, X, 33, 1, Z), "&
"36 (BC_1, *, control, 1), "&
"37 (BC_1, EPWM5_A, input, X), "&
"38 (BC_1, EPWM5_A, output3, X, 36, 1, Z), "&
"39 (BC_1, *, control, 1), "&
"40 (BC_1, EPWM5_B, input, X), "&
"41 (BC_1, EPWM5_B, output3, X, 39, 1, Z), "&
"42 (BC_1, *, control, 1), "&
"43 (BC_1, EPWM6_A, input, X), "&
"44 (BC_1, EPWM6_A, output3, X, 42, 1, Z), "&
"45 (BC_1, *, control, 1), "&
"46 (BC_1, EPWM6_B, input, X), "&
"47 (BC_1, EPWM6_B, output3, X, 45, 1, Z), "&
"48 (BC_1, *, control, 1), "&
"49 (BC_1, EPWM7_A, input, X), "&
"50 (BC_1, EPWM7_A, output3, X, 48, 1, Z), "&
"51 (BC_1, *, control, 1), "&
"52 (BC_1, EPWM7_B, input, X), "&
"53 (BC_1, EPWM7_B, output3, X, 51, 1, Z), "&
"54 (BC_1, *, control, 1), "&
"55 (BC_1, EPWM8_A, input, X), "&
"56 (BC_1, EPWM8_A, output3, X, 54, 1, Z), "&
"57 (BC_1, *, control, 1), "&
"58 (BC_1, EPWM8_B, input, X), "&
"59 (BC_1, EPWM8_B, output3, X, 57, 1, Z), "&
"60 (BC_1, *, control, 1), "&
"61 (BC_1, EPWM9_A, input, X), "&
"62 (BC_1, EPWM9_A, output3, X, 60, 1, Z), "&
"63 (BC_1, *, control, 1), "&
"64 (BC_1, EPWM9_B, input, X), "&
"65 (BC_1, EPWM9_B, output3, X, 63, 1, Z), "&
"66 (BC_1, *, control, 1), "&
"67 (BC_1, EPWM10_A, input, X), "&
"68 (BC_1, EPWM10_A, output3, X, 66, 1, Z), "&
"69 (BC_1, *, control, 1), "&
"70 (BC_1, EPWM10_B, input, X), "&
"71 (BC_1, EPWM10_B, output3, X, 69, 1, Z), "&
"72 (BC_1, *, control, 1), "&
"73 (BC_1, EPWM11_A, input, X), "&
"74 (BC_1, EPWM11_A, output3, X, 72, 1, Z), "&
"75 (BC_1, *, control, 1), "&
"76 (BC_1, EPWM11_B, input, X), "&
"77 (BC_1, EPWM11_B, output3, X, 75, 1, Z), "&
"78 (BC_1, *, control, 1), "&
"79 (BC_1, EPWM12_A, input, X), "&
"80 (BC_1, EPWM12_A, output3, X, 78, 1, Z), "&
"81 (BC_1, *, control, 1), "&
"82 (BC_1, EPWM12_B, input, X), "&
"83 (BC_1, EPWM12_B, output3, X, 81, 1, Z), "&
"84 (BC_1, *, control, 1), "&
"85 (BC_1, EPWM13_A, input, X), "&
"86 (BC_1, EPWM13_A, output3, X, 84, 1, Z), "&
"87 (BC_1, *, control, 1), "&
"88 (BC_1, EPWM13_B, input, X), "&
"89 (BC_1, EPWM13_B, output3, X, 87, 1, Z), "&
"90 (BC_1, *, control, 1), "&
"91 (BC_1, MCAN1_TX, input, X), "&
"92 (BC_1, MCAN1_TX, output3, X, 90, 1, Z), "&
"93 (BC_1, *, control, 1), "&
"94 (BC_1, MCAN1_RX, input, X), "&
"95 (BC_1, MCAN1_RX, output3, X, 93, 1, Z), "&
"96 (BC_1, *, control, 1), "&
"97 (BC_1, MCAN0_RX, input, X), "&
"98 (BC_1, MCAN0_RX, output3, X, 96, 1, Z), "&
"99 (BC_1, *, control, 1), "&
"100 (BC_1, MCAN0_TX, input, X), "&
"101 (BC_1, MCAN0_TX, output3, X, 99, 1, Z), "&
"102 (BC_1, *, control, 1), "&
"103 (BC_1, UART1_RXD, input, X), "&
"104 (BC_1, UART1_RXD, output3, X, 102, 1, Z), "&
"105 (BC_1, *, control, 1), "&
"106 (BC_1, UART1_TXD, input, X), "&
"107 (BC_1, UART1_TXD, output3, X, 105, 1, Z), "&
"108 (BC_1, *, control, 1), "&
"109 (BC_1, CLKOUT0, input, X), "&
"110 (BC_1, CLKOUT0, output3, X, 108, 1, Z), "&
"111 (BC_1, *, control, 1), "&
"112 (BC_1, QSPI0_D0, input, X), "&
"113 (BC_1, QSPI0_D0, output3, X, 111, 1, Z), "&
"114 (BC_1, *, internal, 1), "&
"115 (BC_1, *, internal, 1), "&
"116 (BC_1, *, internal, 1), "&
"117 (BC_1, *, control, 1), "&
"118 (BC_1, QSPI0_CLK, input, X), "&
"119 (BC_1, QSPI0_CLK, output3, X, 117, 1, Z), "&
"120 (BC_1, *, control, 1), "&
"121 (BC_1, QSPI0_D1, input, X), "&
"122 (BC_1, QSPI0_D1, output3, X, 120, 1, Z), "&
"123 (BC_1, *, control, 1), "&
"124 (BC_1, QSPI0_D2, input, X), "&
"125 (BC_1, QSPI0_D2, output3, X, 123, 1, Z), "&
"126 (BC_1, *, control, 1), "&
"127 (BC_1, QSPI0_D3, input, X), "&
"128 (BC_1, QSPI0_D3, output3, X, 126, 1, Z), "&
"129 (BC_1, *, control, 1), "&
"130 (BC_1, QSPI0_CSn0, input, X), "&
"131 (BC_1, QSPI0_CSn0, output3, X, 129, 1, Z), "&
"132 (BC_1, *, control, 1), "&
"133 (BC_1, QSPI0_CSn1, input, X), "&
"134 (BC_1, QSPI0_CSn1, output3, X, 132, 1, Z), "&
"135 (BC_1, *, control, 1), "&
"136 (BC_1, EXT_REFCLK0, input, X), "&
"137 (BC_1, EXT_REFCLK0, output3, X, 135, 1, Z), "&
"138 (BC_1, *, control, 1), "&
"139 (BC_1, EPWM14_A, input, X), "&
"140 (BC_1, EPWM14_A, output3, X, 138, 1, Z), "&
"141 (BC_1, *, control, 1), "&
"142 (BC_1, EPWM14_B, input, X), "&
"143 (BC_1, EPWM14_B, output3, X, 141, 1, Z), "&
"144 (BC_1, *, control, 1), "&
"145 (BC_1, EPWM15_A, input, X), "&
"146 (BC_1, EPWM15_A, output3, X, 144, 1, Z), "&
"147 (BC_1, *, control, 1), "&
"148 (BC_1, EPWM15_B, input, X), "&
"149 (BC_1, EPWM15_B, output3, X, 147, 1, Z), "&
"150 (BC_1, *, control, 1), "&
"151 (BC_1, RGMII1_RD0, input, X), "&
"152 (BC_1, RGMII1_RD0, output3, X, 150, 1, Z), "&
"153 (BC_1, *, control, 1), "&
"154 (BC_1, RGMII1_RD1, input, X), "&
"155 (BC_1, RGMII1_RD1, output3, X, 153, 1, Z), "&
"156 (BC_1, *, control, 1), "&
"157 (BC_1, RGMII1_RD2, input, X), "&
"158 (BC_1, RGMII1_RD2, output3, X, 156, 1, Z), "&
"159 (BC_1, *, control, 1), "&
"160 (BC_1, RGMII1_RD3, input, X), "&
"161 (BC_1, RGMII1_RD3, output3, X, 159, 1, Z), "&
"162 (BC_1, *, control, 1), "&
"163 (BC_1, RGMII1_RXC, input, X), "&
"164 (BC_1, RGMII1_RXC, output3, X, 162, 1, Z), "&
"165 (BC_1, *, control, 1), "&
"166 (BC_1, RGMII1_RX_CTL, input, X), "&
"167 (BC_1, RGMII1_RX_CTL, output3, X, 165, 1, Z), "&
"168 (BC_1, *, control, 1), "&
"169 (BC_1, RGMII1_TD0, input, X), "&
"170 (BC_1, RGMII1_TD0, output3, X, 168, 1, Z), "&
"171 (BC_1, *, control, 1), "&
"172 (BC_1, RGMII1_TD1, input, X), "&
"173 (BC_1, RGMII1_TD1, output3, X, 171, 1, Z), "&
"174 (BC_1, *, control, 1), "&
"175 (BC_1, RGMII1_TD2, input, X), "&
"176 (BC_1, RGMII1_TD2, output3, X, 174, 1, Z), "&
"177 (BC_1, *, control, 1), "&
"178 (BC_1, RGMII1_TD3, input, X), "&
"179 (BC_1, RGMII1_TD3, output3, X, 177, 1, Z), "&
"180 (BC_1, *, control, 1), "&
"181 (BC_1, RGMII1_TXC, input, X), "&
"182 (BC_1, RGMII1_TXC, output3, X, 180, 1, Z), "&
"183 (BC_1, *, control, 1), "&
"184 (BC_1, RGMII1_TX_CTL, input, X), "&
"185 (BC_1, RGMII1_TX_CTL, output3, X, 183, 1, Z), "&
"186 (BC_1, *, control, 1), "&
"187 (BC_1, MDIO0_MDC, input, X), "&
"188 (BC_1, MDIO0_MDC, output3, X, 186, 1, Z), "&
"189 (BC_1, *, control, 1), "&
"190 (BC_1, MDIO0_MDIO, input, X), "&
"191 (BC_1, MDIO0_MDIO, output3, X, 189, 1, Z), "&
"192 (BC_1, *, control, 1), "&
"193 (BC_1, PR0_MDIO0_MDC, input, X), "&
"194 (BC_1, PR0_MDIO0_MDC, output3, X, 192, 1, Z), "&
"195 (BC_1, *, control, 1), "&
"196 (BC_1, PR0_MDIO0_MDIO, input, X), "&
"197 (BC_1, PR0_MDIO0_MDIO, output3, X, 195, 1, Z), "&
"198 (BC_1, *, control, 1), "&
"199 (BC_1, PR0_PRU0_GPO11, input, X), "&
"200 (BC_1, PR0_PRU0_GPO11, output3, X, 198, 1, Z), "&
"201 (BC_1, *, control, 1), "&
"202 (BC_1, PR0_PRU0_GPO12, input, X), "&
"203 (BC_1, PR0_PRU0_GPO12, output3, X, 201, 1, Z), "&
"204 (BC_1, *, control, 1), "&
"205 (BC_1, PR0_PRU0_GPO15, input, X), "&
"206 (BC_1, PR0_PRU0_GPO15, output3, X, 204, 1, Z), "&
"207 (BC_1, *, control, 1), "&
"208 (BC_1, PR0_PRU0_GPO0, input, X), "&
"209 (BC_1, PR0_PRU0_GPO0, output3, X, 207, 1, Z), "&
"210 (BC_1, *, control, 1), "&
"211 (BC_1, PR0_PRU0_GPO1, input, X), "&
"212 (BC_1, PR0_PRU0_GPO1, output3, X, 210, 1, Z), "&
"213 (BC_1, *, control, 1), "&
"214 (BC_1, PR0_PRU0_GPO6, input, X), "&
"215 (BC_1, PR0_PRU0_GPO6, output3, X, 213, 1, Z), "&
"216 (BC_1, *, control, 1), "&
"217 (BC_1, PR0_PRU0_GPO2, input, X), "&
"218 (BC_1, PR0_PRU0_GPO2, output3, X, 216, 1, Z), "&
"219 (BC_1, *, control, 1), "&
"220 (BC_1, PR0_PRU0_GPO3, input, X), "&
"221 (BC_1, PR0_PRU0_GPO3, output3, X, 219, 1, Z), "&
"222 (BC_1, *, control, 1), "&
"223 (BC_1, PR0_PRU0_GPO4, input, X), "&
"224 (BC_1, PR0_PRU0_GPO4, output3, X, 222, 1, Z), "&
"225 (BC_1, *, control, 1), "&
"226 (BC_1, PR0_PRU0_GPO16, input, X), "&
"227 (BC_1, PR0_PRU0_GPO16, output3, X, 225, 1, Z), "&
"228 (BC_1, *, control, 1), "&
"229 (BC_1, PR0_PRU0_GPO13, input, X), "&
"230 (BC_1, PR0_PRU0_GPO13, output3, X, 228, 1, Z), "&
"231 (BC_1, *, control, 1), "&
"232 (BC_1, PR0_PRU0_GPO14, input, X), "&
"233 (BC_1, PR0_PRU0_GPO14, output3, X, 231, 1, Z), "&
"234 (BC_1, *, control, 1), "&
"235 (BC_1, PR0_PRU0_GPO5, input, X), "&
"236 (BC_1, PR0_PRU0_GPO5, output3, X, 234, 1, Z), "&
"237 (BC_1, *, control, 1), "&
"238 (BC_1, PR0_PRU0_GPO10, input, X), "&
"239 (BC_1, PR0_PRU0_GPO10, output3, X, 237, 1, Z), "&
"240 (BC_1, *, control, 1), "&
"241 (BC_1, PR0_PRU0_GPO9, input, X), "&
"242 (BC_1, PR0_PRU0_GPO9, output3, X, 240, 1, Z), "&
"243 (BC_1, *, control, 1), "&
"244 (BC_1, PR0_PRU0_GPO8, input, X), "&
"245 (BC_1, PR0_PRU0_GPO8, output3, X, 243, 1, Z), "&
"246 (BC_1, *, control, 1), "&
"247 (BC_1, PR0_PRU1_GPO0, input, X), "&
"248 (BC_1, PR0_PRU1_GPO0, output3, X, 246, 1, Z), "&
"249 (BC_1, *, control, 1), "&
"250 (BC_1, PR0_PRU1_GPO1, input, X), "&
"251 (BC_1, PR0_PRU1_GPO1, output3, X, 249, 1, Z), "&
"252 (BC_1, *, control, 1), "&
"253 (BC_1, PR0_PRU1_GPO2, input, X), "&
"254 (BC_1, PR0_PRU1_GPO2, output3, X, 252, 1, Z), "&
"255 (BC_1, *, control, 1), "&
"256 (BC_1, PR0_PRU1_GPO3, input, X), "&
"257 (BC_1, PR0_PRU1_GPO3, output3, X, 255, 1, Z), "&
"258 (BC_1, *, control, 1), "&
"259 (BC_1, PR0_PRU1_GPO4, input, X), "&
"260 (BC_1, PR0_PRU1_GPO4, output3, X, 258, 1, Z), "&
"261 (BC_1, *, control, 1), "&
"262 (BC_1, PR0_PRU1_GPO5, input, X), "&
"263 (BC_1, PR0_PRU1_GPO5, output3, X, 261, 1, Z), "&
"264 (BC_1, *, control, 1), "&
"265 (BC_1, PR0_PRU1_GPO6, input, X), "&
"266 (BC_1, PR0_PRU1_GPO6, output3, X, 264, 1, Z), "&
"267 (BC_1, *, control, 1), "&
"268 (BC_1, PR0_PRU1_GPO8, input, X), "&
"269 (BC_1, PR0_PRU1_GPO8, output3, X, 267, 1, Z), "&
"270 (BC_1, *, control, 1), "&
"271 (BC_1, PR0_PRU1_GPO9, input, X), "&
"272 (BC_1, PR0_PRU1_GPO9, output3, X, 270, 1, Z), "&
"273 (BC_1, *, control, 1), "&
"274 (BC_1, PR0_PRU1_GPO10, input, X), "&
"275 (BC_1, PR0_PRU1_GPO10, output3, X, 273, 1, Z), "&
"276 (BC_1, *, control, 1), "&
"277 (BC_1, PR0_PRU1_GPO11, input, X), "&
"278 (BC_1, PR0_PRU1_GPO11, output3, X, 276, 1, Z), "&
"279 (BC_1, *, control, 1), "&
"280 (BC_1, PR0_PRU1_GPO12, input, X), "&
"281 (BC_1, PR0_PRU1_GPO12, output3, X, 279, 1, Z), "&
"282 (BC_1, *, control, 1), "&
"283 (BC_1, PR0_PRU1_GPO13, input, X), "&
"284 (BC_1, PR0_PRU1_GPO13, output3, X, 282, 1, Z), "&
"285 (BC_1, *, control, 1), "&
"286 (BC_1, PR0_PRU1_GPO14, input, X), "&
"287 (BC_1, PR0_PRU1_GPO14, output3, X, 285, 1, Z), "&
"288 (BC_1, *, control, 1), "&
"289 (BC_1, PR0_PRU1_GPO15, input, X), "&
"290 (BC_1, PR0_PRU1_GPO15, output3, X, 288, 1, Z), "&
"291 (BC_1, *, control, 1), "&
"292 (BC_1, PR0_PRU1_GPO16, input, X), "&
"293 (BC_1, PR0_PRU1_GPO16, output3, X, 291, 1, Z), "&
"294 (BC_1, *, control, 1), "&
"295 (BC_1, PR0_PRU1_GPO18, input, X), "&
"296 (BC_1, PR0_PRU1_GPO18, output3, X, 294, 1, Z), "&
"297 (BC_1, *, control, 1), "&
"298 (BC_1, PR0_PRU1_GPO19, input, X), "&
"299 (BC_1, PR0_PRU1_GPO19, output3, X, 297, 1, Z), "&
"300 (BC_1, *, control, 1), "&
"301 (BC_1, SDFM0_CLK0, input, X), "&
"302 (BC_1, SDFM0_CLK0, output3, X, 300, 1, Z), "&
"303 (BC_1, *, control, 1), "&
"304 (BC_1, SDFM0_CLK1, input, X), "&
"305 (BC_1, SDFM0_CLK1, output3, X, 303, 1, Z), "&
"306 (BC_1, *, control, 1), "&
"307 (BC_1, SDFM0_CLK2, input, X), "&
"308 (BC_1, SDFM0_CLK2, output3, X, 306, 1, Z), "&
"309 (BC_1, *, control, 1), "&
"310 (BC_1, SDFM0_CLK3, input, X), "&
"311 (BC_1, SDFM0_CLK3, output3, X, 309, 1, Z), "&
"312 (BC_1, *, control, 1), "&
"313 (BC_1, SDFM0_D0, input, X), "&
"314 (BC_1, SDFM0_D0, output3, X, 312, 1, Z), "&
"315 (BC_1, *, control, 1), "&
"316 (BC_1, SDFM0_D1, input, X), "&
"317 (BC_1, SDFM0_D1, output3, X, 315, 1, Z), "&
"318 (BC_1, *, control, 1), "&
"319 (BC_1, SDFM0_D2, input, X), "&
"320 (BC_1, SDFM0_D2, output3, X, 318, 1, Z), "&
"321 (BC_1, *, control, 1), "&
"322 (BC_1, SDFM0_D3, input, X), "&
"323 (BC_1, SDFM0_D3, output3, X, 321, 1, Z), "&
"324 (BC_1, *, control, 1), "&
"325 (BC_1, EQEP0_A, input, X), "&
"326 (BC_1, EQEP0_A, output3, X, 324, 1, Z), "&
"327 (BC_1, *, control, 1), "&
"328 (BC_1, EQEP0_B, input, X), "&
"329 (BC_1, EQEP0_B, output3, X, 327, 1, Z), "&
"330 (BC_1, *, control, 1), "&
"331 (BC_1, EQEP0_INDEX, input, X), "&
"332 (BC_1, EQEP0_INDEX, output3, X, 330, 1, Z), "&
"333 (BC_1, *, control, 1), "&
"334 (BC_1, EQEP0_STROBE, input, X), "&
"335 (BC_1, EQEP0_STROBE, output3, X, 333, 1, Z), "&
"336 (BC_1, *, control, 1), "&
"337 (BC_1, I2C0_SCL, input, X), "&
"338 (BC_1, I2C0_SCL, output3, X, 336, 1, Z), "&
"339 (BC_1, *, control, 1), "&
"340 (BC_1, I2C0_SDA, input, X), "&
"341 (BC_1, I2C0_SDA, output3, X, 339, 1, Z), "&
"342 (BC_1, *, control, 1), "&
"343 (BC_1, MCAN2_TX, input, X), "&
"344 (BC_1, MCAN2_TX, output3, X, 342, 1, Z), "&
"345 (BC_1, *, control, 1), "&
"346 (BC_1, MCAN2_RX, input, X), "&
"347 (BC_1, MCAN2_RX, output3, X, 345, 1, Z), "&
"348 (BC_1, *, control, 1), "&
"349 (BC_1, SPI0_CLK, input, X), "&
"350 (BC_1, SPI0_CLK, output3, X, 348, 1, Z), "&
"351 (BC_1, *, control, 1), "&
"352 (BC_1, SPI0_CS0, input, X), "&
"353 (BC_1, SPI0_CS0, output3, X, 351, 1, Z), "&
"354 (BC_1, *, control, 1), "&
"355 (BC_1, SPI0_D0, input, X), "&
"356 (BC_1, SPI0_D0, output3, X, 354, 1, Z), "&
"357 (BC_1, *, control, 1), "&
"358 (BC_1, SPI0_D1, input, X), "&
"359 (BC_1, SPI0_D1, output3, X, 357, 1, Z), "&
"360 (BC_1, *, control, 1), "&
"361 (BC_1, SPI1_CLK, input, X), "&
"362 (BC_1, SPI1_CLK, output3, X, 360, 1, Z), "&
"363 (BC_1, *, control, 1), "&
"364 (BC_1, SPI1_CS0, input, X), "&
"365 (BC_1, SPI1_CS0, output3, X, 363, 1, Z), "&
"366 (BC_1, *, control, 1), "&
"367 (BC_1, SPI1_D0, input, X), "&
"368 (BC_1, SPI1_D0, output3, X, 366, 1, Z), "&
"369 (BC_1, *, control, 1), "&
"370 (BC_1, SPI1_D1, input, X), "&
"371 (BC_1, SPI1_D1, output3, X, 369, 1, Z), "&
"372 (BC_1, *, control, 1), "&
"373 (BC_1, LIN1_RXD, input, X), "&
"374 (BC_1, LIN1_RXD, output3, X, 372, 1, Z), "&
"375 (BC_1, *, control, 1), "&
"376 (BC_1, LIN1_TXD, input, X), "&
"377 (BC_1, LIN1_TXD, output3, X, 375, 1, Z), "&
"378 (BC_1, *, control, 1), "&
"379 (BC_1, LIN2_RXD, input, X), "&
"380 (BC_1, LIN2_RXD, output3, X, 378, 1, Z), "&
"381 (BC_1, *, control, 1), "&
"382 (BC_1, LIN2_TXD, input, X), "&
"383 (BC_1, LIN2_TXD, output3, X, 381, 1, Z), "&
"384 (BC_1, *, control, 1), "&
"385 (BC_1, I2C1_SDA, input, X), "&
"386 (BC_1, I2C1_SDA, output3, X, 384, 1, Z), "&
"387 (BC_1, *, control, 1), "&
"388 (BC_1, I2C1_SCL, input, X), "&
"389 (BC_1, I2C1_SCL, output3, X, 387, 1, Z), "&
"390 (BC_1, *, control, 1), "&
"391 (BC_1, UART0_CTSn, input, X), "&
"392 (BC_1, UART0_CTSn, output3, X, 390, 1, Z), "&
"393 (BC_1, *, control, 1), "&
"394 (BC_1, UART0_RTSn, input, X), "&
"395 (BC_1, UART0_RTSn, output3, X, 393, 1, Z), "&
"396 (BC_1, *, control, 1), "&
"397 (BC_1, UART0_RXD, input, X), "&
"398 (BC_1, UART0_RXD, output3, X, 396, 1, Z), "&
"399 (BC_1, *, control, 1), "&
"400 (BC_1, UART0_TXD, input, X), "&
"401 (BC_1, UART0_TXD, output3, X, 399, 1, Z), "&
"402 (BC_1, *, control, 1), "&
"403 (BC_1, MMC0_CD, input, X), "&
"404 (BC_1, MMC0_CD, output3, X, 402, 1, Z), "&
"405 (BC_1, *, control, 1), "&
"406 (BC_1, MMC0_CLK, input, X), "&
"407 (BC_1, MMC0_CLK, output3, X, 405, 1, Z), "&
"408 (BC_1, *, control, 1), "&
"409 (BC_1, MMC0_CMD, input, X), "&
"410 (BC_1, MMC0_CMD, output3, X, 408, 1, Z), "&
"411 (BC_1, *, control, 1), "&
"412 (BC_1, MMC0_D0, input, X), "&
"413 (BC_1, MMC0_D0, output3, X, 411, 1, Z), "&
"414 (BC_1, *, control, 1), "&
"415 (BC_1, MMC0_D1, input, X), "&
"416 (BC_1, MMC0_D1, output3, X, 414, 1, Z), "&
"417 (BC_1, *, control, 1), "&
"418 (BC_1, MMC0_D2, input, X), "&
"419 (BC_1, MMC0_D2, output3, X, 417, 1, Z), "&
"420 (BC_1, *, control, 1), "&
"421 (BC_1, MMC0_D3, input, X), "&
"422 (BC_1, MMC0_D3, output3, X, 420, 1, Z), "&
"423 (BC_1, *, control, 1), "&
"424 (BC_1, MMC0_WP, input, X), "&
"425 (BC_1, MMC0_WP, output3, X, 423, 1, Z), "&
"426 (BC_1, *, internal, 1), "&
"427 (BC_1, *, internal, 1), "&
"428 (BC_1, *, internal, 1), "&
"429 (BC_1, *, internal, 1), "&
"430 (BC_1, *, internal, 1), "&
"431 (BC_1, *, internal, 1), "&
"432 (BC_1, *, internal, 1), "&
"433 (BC_1, *, internal, 1), "&
"434 (BC_1, *, internal, 1), "&
"435 (BC_1, *, internal, 1), "&
"436 (BC_1, *, internal, 1), "&
"437 (BC_1, *, internal, 1)";
end AM263;
