-- BSDL listing from io_top_create.pl, Wed Aug 15 17:26:38 2012
--
-- pins not part of boundary scan are listed as type 'linkage'
entity LPC408x is
generic (PHYSICAL_PIN_MAP : string := "TFBGA180");
port (
p3_12 : inout bit; -- P3[12]_EMC_D[12]
jtag_tdo_swo : out bit; -- JTAG_TDO_SWO
p3_3 : inout bit; -- P3[3]_EMC_D[3]
jtag_tdi : in bit; -- JTAG_TDI
jtag_tms_swdio : in bit; -- JTAG_TMS_SWDIO
p3_13 : inout bit; -- P3[13]_EMC_D[13]
jtag_trstn : in bit; -- JTAG_TRSTn
p5_0 : inout bit; -- P5[0]_EMC_A[24]_SSP2_MOSI_T2_MAT_2
jtag_tck_swdclk : in bit; -- JTAG_TCK_SWDCLK
p0_26 : inout bit; -- P0[26]_ADC0_IN[3]_DAC_OUT_U3_RXD
p3_4 : inout bit; -- P3[4]_EMC_D[4]
p0_25 : inout bit; -- P0[25]_ADC0_IN[2]_I2S_RX_SDA_U3_TXD
vdde1 : linkage bit; -- Vdd(3v3)
p0_24 : inout bit; -- P0[24]_ADC0_IN[1]_I2S_RX_WS_T3_CAP_1
p3_5 : inout bit; -- P3[5]_EMC_D[5]
p0_23 : inout bit; -- P0[23]_ADC0_IN[0]_I2S_RX_SCK_T3_CAP_0
vdda1 : linkage bit; -- Vdda
p3_14 : inout bit; -- P3[14]_EMC_D[14]
vssa1 : linkage bit; -- Vssa
p3_6 : inout bit; -- P3[6]_EMC_D[6]
vrefp11 : linkage bit; -- Vrefp1
vdd_reg_main_3v31 : linkage bit; -- Vdd(reg)(3v3)
p3_7 : inout bit; -- P3[7]_EMC_D[7]
p3_15 : inout bit; -- P3[15]_EMC_D[15]
rstoutn : inout bit; -- RSTOUTn
p5_1 : inout bit; -- P5[1]_EMC_A[25]_SSP2_MISO_T2_MAT_3
vss1 : linkage bit; -- Vss(reg)
vsse1 : linkage bit; -- Vss
rtcx1 : linkage bit; -- RTCX1
resetn : in bit; -- RESETn
rtcx2 : linkage bit; -- RTCX2
rtc_alarm : linkage bit; -- RTC_ALARM
vbat1 : linkage bit; -- Vbat
p1_31 : inout bit; -- P1[31]_USB_OVRCR2n_SSP1_SCK_ADC0_IN[5]_I2C0_SCL
p0_12 : inout bit; -- P0[12]_USB_PPWR2n_SSP1_MISO_ADC0_IN[6]
p1_30 : inout bit; -- P1[30]_USB_PWRD2_USB_VBUS_ADC0_IN[4]_I2C0_SDA_U3_OE
p2_29 : inout bit; -- P2[29]_EMC_DQM[1]
xtal1 : linkage bit; -- XTAL1
p0_13 : inout bit; -- P0[13]_USB_UP_LED2_SSP1_MOSI_ADC0_IN[7]
xtal2 : linkage bit; -- XTAL2
p0_28 : inout bit; -- P0[28]_I2C0_SCL_USB_SCL1
p2_28 : inout bit; -- P2[28]_EMC_DQM[0]
p0_27 : inout bit; -- P0[27]_I2C0_SDA_USB_SDA1
p0_31 : linkage bit; -- P0[31]_USB_D+2
usb_dm2 : linkage bit; -- USB_D-2
p2_24 : inout bit; -- P2[24]_EMC_CKE[0]
p2_25 : inout bit; -- P2[25]_EMC_CKE[1]
p3_26 : inout bit; -- P3[26]_EMC_D[26]_PWM1_3_T0_MAT_1_STCLK
p3_25 : inout bit; -- P3[25]_EMC_D[25]_PWM1_2_T0_MAT_0
p3_24 : inout bit; -- P3[24]_EMC_D[24]_PWM1_1_T0_CAP_1
p2_18 : inout bit; -- P2[18]_EMC_CLK[0]
vdde2 : linkage bit; -- Vdd(3v3)
p0_29 : linkage bit; -- P0[29]_USB_D+1_EINT_0
p0_30 : linkage bit; -- P0[30]_USB_D-1_EINT_1
vsse2 : linkage bit; -- Vss
p3_23 : inout bit; -- P3[23]_EMC_D[23]_PWM1_CAP_0_T0_CAP_0
p1_18 : inout bit; -- P1[18]_USB_UP_LED1_PWM1_1_T1_CAP_0_unused_SSP1_MISO
p2_19 : inout bit; -- P2[19]_EMC_CLK[1]
p1_19 : inout bit; -- P1[19]_USB_TX_E1_USB_PPWR1n_T1_CAP_1_MC_0A_SSP1_SCK_U2_OE
p0_14 : inout bit; -- P0[14]_USB_HSTEN2n_SSP1_SSEL_USB_CONNECT2
p1_20 : inout bit; -- P1[20]_USB_TX_DP1_PWM1_2_QEI_PHA_MC_FB0_SSP0_SCK_LCD_VD_6_LCD_VD_10
p1_21 : inout bit; -- P1[21]_USB_TX_DM1_PWM1_3_SSP0_SSEL_MC_ABORTn_unused_LCD_VD_7_LCD_VD_11
p2_20 : inout bit; -- P2[20]_EMC_DYCSn[0]
p1_22 : inout bit; -- P1[22]_USB_RCV1_USB_PWRD1_T1_MAT_0_MC_0B_SSP1_MOSI_LCD_VD_8_LCD_VD_12
p4_0 : inout bit; -- P4[0]_EMC_A[0]
p1_23 : inout bit; -- P1[23]_USB_RX_DP1_PWM1_4_QEI_PHB_MC_FB1_SSP0_MISO_LCD_VD_9_LCD_VD_13
p1_24 : inout bit; -- P1[24]_USB_RX_DM1_PWM1_5_QEI_IDX_MC_FB2_SSP0_MOSI_LCD_VD_10_LCD_VD_14
p4_1 : inout bit; -- P4[1]_EMC_A[1]
p1_25 : inout bit; -- P1[25]_USB_LS1n_USB_HSTEN1n_T1_MAT_1_MC_1A_CLKOUT_LCD_VD_11_LCD_VD_15
p2_21 : inout bit; -- P2[21]_EMC_DYCSn[1]
p1_26 : inout bit; -- P1[26]_USB_SSPND1n_PWM1_6_T0_CAP_0_MC_1B_SSP1_SSEL_LCD_VD_12_LCD_VD_20
p4_2 : inout bit; -- P4[2]_EMC_A[2]
vss2 : linkage bit; -- Vss(reg)
vdd_reg_main_3v32 : linkage bit; -- Vdd(reg)(3v3)
p2_16 : inout bit; -- P2[16]_EMC_CASn
p1_27 : inout bit; -- P1[27]_USB_INT1n_USB_OVRCR1n_T0_CAP_1_CLKOUT_unused_LCD_VD_13_LCD_VD_21
vdde3 : linkage bit; -- Vdd(3v3)
p1_28 : inout bit; -- P1[28]_USB_SCL1_PWM1_CAP_0_T0_MAT_0_MC_2A_SSP0_SSEL_LCD_VD_14_LCD_VD_22
p1_29 : inout bit; -- P1[29]_USB_SDA1_PWM1_CAP_1_T0_MAT_1_MC_2B_U4_TXD_LCD_VD_15_LCD_VD_23
vsse3 : linkage bit; -- Vss
p0_0 : inout bit; -- P0[0]_CAN_RD_1_U3_TXD_I2C1_SDA_U0_TXD
p2_17 : inout bit; -- P2[17]_EMC_RASn
p0_1 : inout bit; -- P0[1]_CAN_TD_1_U3_RXD_I2C1_SCL_U0_RXD
p4_3 : inout bit; -- P4[3]_EMC_A[3]
p0_10 : inout bit; -- P0[10]_U2_TXD_I2C2_SDA_T3_MAT_0_unused_unused_unused_LCD_VD_5
p0_11 : inout bit; -- P0[11]_U2_RXD_I2C2_SCL_T3_MAT_1_unused_unused_unused_LCD_VD_10
p4_16 : inout bit; -- P4[16]_EMC_A[16]
p2_13 : inout bit; -- P2[13]_EINT_3_SD_DAT_3_I2S_TX_SDA_unused_LCD_VD_5_LCD_VD_9_LCD_VD_19
p4_4 : inout bit; -- P4[4]_EMC_A[4]
p4_17 : inout bit; -- P4[17]_EMC_A[17]
p4_18 : inout bit; -- P4[18]_EMC_A[18]
p2_12 : inout bit; -- P2[12]_EINT_2_SD_DAT_2_I2S_TX_WS_LCD_VD_4_LCD_VD_3_LCD_VD_8_LCD_VD_18
p4_5 : inout bit; -- P4[5]_EMC_A[5]
p2_11 : inout bit; -- P2[11]_EINT_1_SD_DAT_1_I2S_TX_SCK_unused_unused_unused_LCD_CLKIN
p2_10 : inout bit; -- P2[10]_EINT_0_NMI
p4_19 : inout bit; -- P4[19]_EMC_A[19]
vdde4 : linkage bit; -- Vdd(3v3)
p4_6 : inout bit; -- P4[6]_EMC_A[6]
vsse4 : linkage bit; -- Vss
p0_22 : inout bit; -- P0[22]_U1_RTS_SD_DAT_0_U4_TXD_CAN_TD_1_SPIFI_CLK
p5_2 : inout bit; -- P5[2]_EMC_A[26]_SSP2_SCK_T3_MAT_2_unused_I2C0_SDA
p0_21 : inout bit; -- P0[21]_U1_RI_SD_PWR_U4_OE_CAN_RD_1_U4_CLK
p4_26 : inout bit; -- P4[26]_EMC_BLSn[0]
p0_20 : inout bit; -- P0[20]_U1_DTR_SD_CMD_I2C1_SCL_unused_unused_unused_LCD_VD_14
p4_7 : inout bit; -- P4[7]_EMC_A[7]
p0_19 : inout bit; -- P0[19]_U1_DSR_SD_CLK_I2C1_SDA_unused_unused_unused_LCD_VD_13
p0_18 : inout bit; -- P0[18]_U1_DCD_SSP0_MOSI_unused_unused_SPIFI_IO[0]
vdde5 : linkage bit; -- Vdd(3v3)
p0_17 : inout bit; -- P0[17]_U1_CTS_SSP0_MISO_unused_unused_SPIFI_IO[1]
p4_8 : inout bit; -- P4[8]_EMC_A[8]
p0_15 : inout bit; -- P0[15]_U1_TXD_SSP0_SCK_unused_unused_SPIFI_IO[2]
p0_16 : inout bit; -- P0[16]_U1_RXD_SSP0_SSEL_unused_unused_SPIFI_IO[3]
p4_9 : inout bit; -- P4[9]_EMC_A[9]
p2_9 : inout bit; -- P2[9]_USB_CONNECT1_U2_RXD_U4_RXD_ENET_MDIO_unused_LCD_VD_3_LCD_VD_7
vsse5 : linkage bit; -- Vss
p2_8 : inout bit; -- P2[8]_CAN_TD_2_U2_TXD_U1_CTS_ENET_MDC_unused_LCD_VD_2_LCD_VD_6
p4_10 : inout bit; -- P4[10]_EMC_A[10]
p2_7 : inout bit; -- P2[7]_CAN_RD_2_U1_RTS_unused_unused_SPIFI_CSn_LCD_VD_1_LCD_VD_5
p2_6 : inout bit; -- P2[6]_PWM1_CAP_0_U1_RI_T2_CAP_0_U2_OE_TRACECLK_LCD_VD_0_LCD_VD_4
p4_27 : inout bit; -- P4[27]_EMC_BLSn[1]
p2_5 : inout bit; -- P2[5]_PWM1_6_U1_DTR_T2_MAT_0_unused_TRACEDATA[0]_unused_LCD_LP
p5_3 : inout bit; -- P5[3]_EMC_A[27]_SSP2_SSEL_unused_U4_RXD_I2C0_SCL
p2_4 : inout bit; -- P2[4]_PWM1_5_U1_DSR_T2_MAT_1_unused_TRACEDATA[1]_unused_LCD_ENAB_M
p2_3 : inout bit; -- P2[3]_PWM1_4_U1_DCD_T2_MAT_2_unused_TRACEDATA[2]_unused_LCD_FP
p4_11 : inout bit; -- P4[11]_EMC_A[11]
vdde6 : linkage bit; -- Vdd(3v3)
p1_13 : inout bit; -- P1[13]_ENET_RX_DV
vsse6 : linkage bit; -- Vss
p4_12 : inout bit; -- P4[12]_EMC_A[12]
p2_2 : inout bit; -- P2[2]_PWM1_3_U1_CTS_T2_MAT_3_unused_TRACEDATA[3]_unused_LCD_DCLK
p2_1 : inout bit; -- P2[1]_PWM1_2_U1_RXD_unused_unused_unused_unused_LCD_LE
p1_7 : inout bit; -- P1[7]_ENET_COL_SD_DAT_1_PWM0_5_unused_CMP1_IN[1]
p2_0 : inout bit; -- P2[0]_PWM1_1_U1_TXD_unused_unused_unused_unused_LCD_PWR
p4_13 : inout bit; -- P4[13]_EMC_A[13]
p1_5 : inout bit; -- P1[5]_ENET_TX_ER_SD_PWR_PWM0_3_unused_CMP1_IN[2]
p1_12 : inout bit; -- P1[12]_ENET_RXD_3_SD_DAT_3_PWM0_CAP_0_unused_CMP1_OUT
p0_9 : inout bit; -- P0[9]_I2S_TX_SDA_SSP1_MOSI_T2_MAT_3_RTC_EV2_CMP1_IN[3]_unused_LCD_VD_17
p4_14 : inout bit; -- P4[14]_EMC_A[14]
p0_8 : inout bit; -- P0[8]_I2S_TX_WS_SSP1_MISO_T2_MAT_2_RTC_EV1_CMP1_IN[4]_unused_LCD_VD_16
p0_7 : inout bit; -- P0[7]_I2S_TX_SCK_SSP1_SCK_T2_MAT_1_RTC_EV0_CMP_VREF_unused_LCD_VD_9
p1_11 : inout bit; -- P1[11]_ENET_RXD_2_SD_DAT_2_PWM0_6
p0_6 : inout bit; -- P0[6]_I2S_RX_SDA_SSP1_SSEL_T2_MAT_0_U1_RTS_CMP_ROSC_unused_LCD_VD_8
vdde7 : linkage bit; -- Vdd(3v3)
p0_5 : inout bit; -- P0[5]_I2S_RX_WS_CAN_TD_2_T2_CAP_1_unused_CMP_RESET_unused_LCD_VD_1
p0_4 : inout bit; -- P0[4]_I2S_RX_SCK_CAN_RD_2_T2_CAP_0_unused_CMP_ROSC_unused_LCD_VD_0
vsse7 : linkage bit; -- Vss
p4_28 : inout bit; -- P4[28]_EMC_BLSn[2]_U3_TXD_T2_MAT_0_unused_LCD_VD_6_LCD_VD_10_LCD_VD_2
p1_6 : inout bit; -- P1[6]_ENET_TX_CLK_SD_DAT_0_PWM0_4_unused_CMP0_IN[4]
vss3 : linkage bit; -- Vss(reg)
p4_15 : inout bit; -- P4[15]_EMC_A[15]
vdd_reg_e1_3v31 : linkage bit; -- Vdd(reg)(3v3)
p4_29 : inout bit; -- P4[29]_EMC_BLSn[3]_U3_RXD_T2_MAT_1_I2C2_SCL_LCD_VD_7_LCD_VD_11_LCD_VD_3
p1_3 : inout bit; -- P1[3]_ENET_TXD[3]_SD_CMD_PWM0_2
p1_17 : inout bit; -- P1[17]_ENET_MDIO_I2S_RX_MCLK_unused_unused_CMP0_IN[3]
p4_25 : inout bit; -- P4[25]_EMC_WEn
p1_16 : inout bit; -- P1[16]_ENET_MDC_I2S_TX_MCLK_unused_unused_CMP0_IN[2]
p1_15 : inout bit; -- P1[15]_ENET_RX_CLK_unused_I2C2_SDA
p4_24 : inout bit; -- P4[24]_EMC_OEn
p1_14 : inout bit; -- P1[14]_ENET_RX_ER_unused_T2_CAP_0_unused_CMP0_IN[1]
p1_2 : inout bit; -- P1[2]_ENET_TXD[2]_SD_CLK_PWM0_1
p1_10 : inout bit; -- P1[10]_ENET_RXD_1_unused_T3_CAP_0
p4_30 : inout bit; -- P4[30]_EMC_CSn[0]_unused_unused_unused_CMP0_OUT
p1_9 : inout bit; -- P1[9]_ENET_RXD_0_unused_T3_MAT_0
p1_8 : inout bit; -- P1[8]_ENET_CRS_unused_T3_MAT_1_SSP2_SSEL
p3_8 : inout bit; -- P3[8]_EMC_D[8]
p1_4 : inout bit; -- P1[4]_ENET_TX_EN_unused_T3_MAT_2_SSP2_MISO
p4_31 : inout bit; -- P4[31]_EMC_CSn[1]
p1_1 : inout bit; -- P1[1]_ENET_TXD[1]_unused_T3_MAT_3_SSP2_MOSI
p1_0 : inout bit; -- P1[0]_ENET_TXD[0]_unused_T3_CAP_1_SSP2_SCK
p3_0 : inout bit; -- P3[0]_EMC_D[0]
vdde8 : linkage bit; -- Vdd(3v3)
p3_9 : inout bit; -- P3[9]_EMC_D[9]
vsse8 : linkage bit; -- Vss
p3_1 : inout bit; -- P3[1]_EMC_D[1]
p0_2 : inout bit; -- P0[2]_U0_TXD_U3_TXD
p0_3 : inout bit; -- P0[3]_U0_RXD_U3_RXD
p3_10 : inout bit; -- P3[10]_EMC_D[10]
p5_4 : inout bit; -- P5[4]_U0_OE_unused_T3_MAT_3_U4_TXD
p3_2 : inout bit; -- P3[2]_EMC_D[2]
p3_11 : inout bit -- P3[11]_EMC_D[11]
);
use STD_1149_1_2001.all;
attribute COMPONENT_CONFORMANCE of LPC408x : entity is "std_1149_1_2001";
attribute PIN_MAP of LPC408x : entity is PHYSICAL_PIN_MAP;
constant TFBGA180 : PIN_MAP_STRING :=
"p3_12 : A1," &
"jtag_tdo_swo : B1," &
"p3_3 : G5," &
"jtag_tdi : C3," &
"jtag_tms_swdio : C2," &
"p3_13 : C1," &
"jtag_trstn : D4," &
"p5_0 : E5," &
"jtag_tck_swdclk : D2," &
"p0_26 : D1," &
"p3_4 : D3," &
"p0_25 : E4," &
"vdde1 : E2," &
"p0_24 : E1," &
"p3_5 : E3," &
"p0_23 : F5," &
"vdda1 : F2," &
"p3_14 : F1," &
"vssa1 : F3," &
"p3_6 : F4," &
"vrefp11 : G2," &
"vdd_reg_main_3v31 : G1," &
"p3_7 : G3," &
"p3_15 : G4," &
"rstoutn : H2," &
"p5_1 : H1," &
"vss1 : H3," &
"vsse1 : H4," &
"rtcx1 : J2," &
"resetn : J1," &
"rtcx2 : J3," &
"rtc_alarm : H5," &
"vbat1 : K1," &
"p1_31 : K2," &
"p0_12 : J4," &
"p1_30 : K3," &
"p2_29 : L1," &
"xtal1 : L2," &
"p0_13 : J5," &
"xtal2 : K4," &
"p0_28 : M1," &
"p2_28 : M2," &
"p0_27 : L3," &
"p0_31 : N1," &
"usb_dm2 : N2," &
"p2_24 : P1," &
"p2_25 : P2," &
"p3_26 : K7," &
"p3_25 : M3," &
"p3_24 : N3," &
"p2_18 : P3," &
"vdde2 : L4," &
"p0_29 : K5," &
"p0_30 : N4," &
"vsse2 : P4," &
"p3_23 : M4," &
"p1_18 : L5," &
"p2_19 : N5," &
"p1_19 : P5," &
"p0_14 : M5," &
"p1_20 : K6," &
"p1_21 : N6," &
"p2_20 : P6," &
"p1_22 : M6," &
"p4_0 : L6," &
"p1_23 : N7," &
"p1_24 : P7," &
"p4_1 : M7," &
"p1_25 : L7," &
"p2_21 : N8," &
"p1_26 : P8," &
"p4_2 : M8," &
"vss2 : L8," &
"vdd_reg_main_3v32 : N9," &
"p2_16 : P9," &
"p1_27 : M9," &
"vdde3 : K8," &
"p1_28 : P10," &
"p1_29 : N10," &
"vsse3 : L9," &
"p0_0 : M10," &
"p2_17 : P11," &
"p0_1 : N11," &
"p4_3 : K9," &
"p0_10 : L10," &
"p0_11 : P12," &
"p4_16 : N12," &
"p2_13 : M11," &
"p4_4 : P13," &
"p4_17 : N13," &
"p4_18 : P14," &
"p2_12 : N14," &
"p4_5 : H10," &
"p2_11 : M12," &
"p2_10 : M13," &
"p4_19 : M14," &
"vdde4 : L11," &
"p4_6 : K10," &
"vsse4 : L13," &
"p0_22 : L14," &
"p5_2 : L12," &
"p0_21 : K11," &
"p4_26 : K13," &
"p0_20 : K14," &
"p4_7 : K12," &
"p0_19 : J10," &
"p0_18 : J13," &
"vdde5 : J14," &
"p0_17 : J12," &
"p4_8 : J11," &
"p0_15 : H13," &
"p0_16 : H14," &
"p4_9 : H12," &
"p2_9 : H11," &
"vsse5 : G13," &
"p2_8 : G14," &
"p4_10 : G12," &
"p2_7 : G11," &
"p2_6 : F13," &
"p4_27 : F14," &
"p2_5 : F12," &
"p5_3 : G10," &
"p2_4 : E14," &
"p2_3 : E13," &
"p4_11 : F11," &
"vdde6 : E12," &
"p1_13 : D14," &
"vsse6 : D13," &
"p4_12 : F10," &
"p2_2 : E11," &
"p2_1 : C14," &
"p1_7 : C13," &
"p2_0 : D12," &
"p4_13 : B14," &
"p1_5 : B13," &
"p1_12 : A14," &
"p0_9 : A13," &
"p4_14 : E8," &
"p0_8 : C12," &
"p0_7 : B12," &
"p1_11 : A12," &
"p0_6 : D11," &
"vdde7 : E10," &
"p0_5 : B11," &
"p0_4 : A11," &
"vsse7 : C11," &
"p4_28 : D10," &
"p1_6 : B10," &
"vss3 : A10," &
"p4_15 : C10," &
"vdd_reg_e1_3v31 : E9," &
"p4_29 : B9," &
"p1_3 : A9," &
"p1_17 : C9," &
"p4_25 : D9," &
"p1_16 : B8," &
"p1_15 : A8," &
"p4_24 : C8," &
"p1_14 : D8," &
"p1_2 : B7," &
"p1_10 : A7," &
"p4_30 : C7," &
"p1_9 : D7," &
"p1_8 : B6," &
"p3_8 : A6," &
"p1_4 : C6," &
"p4_31 : E7," &
"p1_1 : A5," &
"p1_0 : B5," &
"p3_0 : D6," &
"vdde8 : C5," &
"p3_9 : A4," &
"vsse8 : B4," &
"p3_1 : E6," &
"p0_2 : D5," &
"p0_3 : A3," &
"p3_10 : B3," &
"p5_4 : C4," &
"p3_2 : A2," &
"p3_11 : B2";
-- *********************************************************************
-- * IEEE 1149.1 TAP PORTS *
-- *********************************************************************
-- This section specifies the TAP ports. For the TAP TCK port, the
-- parameters in the brackets are:
-- First Field : Maximum TCK frequency.
-- Second Field: Allowable states where TCK may be stopped.
attribute TAP_SCAN_CLOCK of jtag_tck_swdclk : signal is (10.00e+06,BOTH);
attribute TAP_SCAN_IN of jtag_tdi : signal is true;
attribute TAP_SCAN_MODE of jtag_tms_swdio : signal is true;
attribute TAP_SCAN_OUT of jtag_tdo_swo : signal is true;
attribute TAP_SCAN_RESET of jtag_trstn : signal is true;
-- Specifies the compliance enable patterns for the design. It lists a set of
-- design ports and the values that they should be set to, in order to enable
-- compliance to IEEE Std 1149.1
attribute COMPLIANCE_PATTERNS of LPC408x: entity is
"(resetn) (0)";
-- *********************************************************************
-- * INSTRUCTIONS AND REGISTER ACCESS *
-- *********************************************************************
attribute INSTRUCTION_LENGTH of LPC408x : entity is 5;
attribute INSTRUCTION_OPCODE of LPC408x : entity is
"extest (00000)," &
"sample (00001)," &
"preload (00001)," &
"highz (00010)," &
"clamp (00011)," &
"idcode (00100)," &
"resrvd (00101, 00110, 00111, 01000, 01001, 01010, 01011, 01100)," &
"bypass (11111)";
attribute INSTRUCTION_CAPTURE of LPC408x : entity is "00001";
attribute INSTRUCTION_PRIVATE of LPC408x : entity is "resrvd";
attribute IDCODE_REGISTER of LPC408x : entity is
"0xxx" & -- Version Number
"0100000110001000" & -- Part Number
"00000010101" & -- Manufacturer ID
"1"; -- Required by IEEE
attribute REGISTER_ACCESS of LPC408x : entity is
"BOUNDARY (extest, sample, preload), " &
"DEVICE_ID (idcode), " &
"BYPASS (highz, clamp, bypass)";
-- *********************************************************************
-- * BOUNDARY SCAN CELL INFORMATION *
-- *********************************************************************
attribute BOUNDARY_LENGTH of LPC408x : entity is 489;
attribute BOUNDARY_REGISTER of LPC408x : entity is
-- # cell name function safe control disable disable
-- type bit signal value result
"488 (BC_0, * , INTERNAL, X ),"&
"487 (BC_0, * , INTERNAL, X ),"&
"486 (BC_0, * , INTERNAL, X ),"&
"485 (BC_4, p3_13 , INPUT, X ),"&
"484 (BC_1, p3_13 , OUTPUT3, X, 483, 0, Z ),"&
"483 (BC_1, * , CONTROL, 0 ),"&
"482 (BC_4, p5_0 , INPUT, X ),"&
"481 (BC_1, p5_0 , OUTPUT3, X, 480, 0, Z ),"&
"480 (BC_1, * , CONTROL, 0 ),"&
"479 (BC_0, * , INTERNAL, X ),"&
"478 (BC_0, * , INTERNAL, X ),"&
"477 (BC_0, * , INTERNAL, X ),"&
"476 (BC_4, p0_26 , INPUT, X ),"&
"475 (BC_1, p0_26 , OUTPUT3, X, 474, 0, Z ),"&
"474 (BC_1, * , CONTROL, 0 ),"&
"473 (BC_4, p3_4 , INPUT, X ),"&
"472 (BC_1, p3_4 , OUTPUT3, X, 471, 0, Z ),"&
"471 (BC_1, * , CONTROL, 0 ),"&
"470 (BC_4, p0_25 , INPUT, X ),"&
"469 (BC_1, p0_25 , OUTPUT3, X, 468, 0, Z ),"&
"468 (BC_1, * , CONTROL, 0 ),"&
"467 (BC_4, p0_24 , INPUT, X ),"&
"466 (BC_1, p0_24 , OUTPUT3, X, 465, 0, Z ),"&
"465 (BC_1, * , CONTROL, 0 ),"&
"464 (BC_4, p3_5 , INPUT, X ),"&
"463 (BC_1, p3_5 , OUTPUT3, X, 462, 0, Z ),"&
"462 (BC_1, * , CONTROL, 0 ),"&
"461 (BC_4, p0_23 , INPUT, X ),"&
"460 (BC_1, p0_23 , OUTPUT3, X, 459, 0, Z ),"&
"459 (BC_1, * , CONTROL, 0 ),"&
"458 (BC_0, * , INTERNAL, X ),"&
"457 (BC_0, * , INTERNAL, X ),"&
"456 (BC_0, * , INTERNAL, X ),"&
"455 (BC_4, p3_14 , INPUT, X ),"&
"454 (BC_1, p3_14 , OUTPUT3, X, 453, 0, Z ),"&
"453 (BC_1, * , CONTROL, 0 ),"&
"452 (BC_4, p3_6 , INPUT, X ),"&
"451 (BC_1, p3_6 , OUTPUT3, X, 450, 0, Z ),"&
"450 (BC_1, * , CONTROL, 0 ),"&
"449 (BC_0, * , INTERNAL, X ),"&
"448 (BC_0, * , INTERNAL, X ),"&
"447 (BC_0, * , INTERNAL, X ),"&
"446 (BC_4, p3_7 , INPUT, X ),"&
"445 (BC_1, p3_7 , OUTPUT3, X, 444, 0, Z ),"&
"444 (BC_1, * , CONTROL, 0 ),"&
"443 (BC_4, p3_15 , INPUT, X ),"&
"442 (BC_1, p3_15 , OUTPUT3, X, 441, 0, Z ),"&
"441 (BC_1, * , CONTROL, 0 ),"&
"440 (BC_4, rstoutn , INPUT, X ),"&
"439 (BC_1, rstoutn , OUTPUT3, X, 438, 0, Z ),"&
"438 (BC_1, * , CONTROL, 0 ),"&
"437 (BC_4, p5_1 , INPUT, X ),"&
"436 (BC_1, p5_1 , OUTPUT3, X, 435, 0, Z ),"&
"435 (BC_1, * , CONTROL, 0 ),"&
"434 (BC_0, * , INTERNAL, X ),"&
"433 (BC_0, * , INTERNAL, X ),"&
"432 (BC_0, * , INTERNAL, X ),"&
"431 (BC_0, * , INTERNAL, X ),"&
"430 (BC_0, * , INTERNAL, X ),"&
"429 (BC_0, * , INTERNAL, X ),"&
"428 (BC_4, p1_31 , INPUT, X ),"&
"427 (BC_1, p1_31 , OUTPUT3, X, 426, 0, Z ),"&
"426 (BC_1, * , CONTROL, 0 ),"&
"425 (BC_4, p0_12 , INPUT, X ),"&
"424 (BC_1, p0_12 , OUTPUT3, X, 423, 0, Z ),"&
"423 (BC_1, * , CONTROL, 0 ),"&
"422 (BC_4, p1_30 , INPUT, X ),"&
"421 (BC_1, p1_30 , OUTPUT3, X, 420, 0, Z ),"&
"420 (BC_1, * , CONTROL, 0 ),"&
"419 (BC_4, p2_29 , INPUT, X ),"&
"418 (BC_1, p2_29 , OUTPUT3, X, 417, 0, Z ),"&
"417 (BC_1, * , CONTROL, 0 ),"&
"416 (BC_4, p0_13 , INPUT, X ),"&
"415 (BC_1, p0_13 , OUTPUT3, X, 414, 0, Z ),"&
"414 (BC_1, * , CONTROL, 0 ),"&
"413 (BC_0, * , INTERNAL, X ),"&
"412 (BC_0, * , INTERNAL, X ),"&
"411 (BC_0, * , INTERNAL, X ),"&
"410 (BC_4, p0_28 , INPUT, X ),"&
"409 (BC_1, p0_28 , OUTPUT3, X, 408, 0, WEAK1 ),"&
"408 (BC_1, * , CONTROL, 0 ),"&
"407 (BC_4, p2_28 , INPUT, X ),"&
"406 (BC_1, p2_28 , OUTPUT3, X, 405, 0, Z ),"&
"405 (BC_1, * , CONTROL, 0 ),"&
"404 (BC_4, p0_27 , INPUT, X ),"&
"403 (BC_1, p0_27 , OUTPUT3, X, 402, 0, WEAK1 ),"&
"402 (BC_1, * , CONTROL, 0 ),"&
"401 (BC_4, p2_24 , INPUT, X ),"&
"400 (BC_1, p2_24 , OUTPUT3, X, 399, 0, Z ),"&
"399 (BC_1, * , CONTROL, 0 ),"&
"398 (BC_4, p2_25 , INPUT, X ),"&
"397 (BC_1, p2_25 , OUTPUT3, X, 396, 0, Z ),"&
"396 (BC_1, * , CONTROL, 0 ),"&
"395 (BC_4, p3_26 , INPUT, X ),"&
"394 (BC_1, p3_26 , OUTPUT3, X, 393, 0, Z ),"&
"393 (BC_1, * , CONTROL, 0 ),"&
"392 (BC_4, p3_25 , INPUT, X ),"&
"391 (BC_1, p3_25 , OUTPUT3, X, 390, 0, Z ),"&
"390 (BC_1, * , CONTROL, 0 ),"&
"389 (BC_0, * , INTERNAL, X ),"&
"388 (BC_0, * , INTERNAL, X ),"&
"387 (BC_0, * , INTERNAL, X ),"&
"386 (BC_4, p3_24 , INPUT, X ),"&
"385 (BC_1, p3_24 , OUTPUT3, X, 384, 0, Z ),"&
"384 (BC_1, * , CONTROL, 0 ),"&
"383 (BC_4, p2_18 , INPUT, X ),"&
"382 (BC_1, p2_18 , OUTPUT3, X, 381, 0, Z ),"&
"381 (BC_1, * , CONTROL, 0 ),"&
"380 (BC_0, * , INTERNAL, X ),"&
"379 (BC_0, * , INTERNAL, X ),"&
"378 (BC_0, * , INTERNAL, X ),"&
"377 (BC_4, p3_23 , INPUT, X ),"&
"376 (BC_1, p3_23 , OUTPUT3, X, 375, 0, Z ),"&
"375 (BC_1, * , CONTROL, 0 ),"&
"374 (BC_4, p1_18 , INPUT, X ),"&
"373 (BC_1, p1_18 , OUTPUT3, X, 372, 0, Z ),"&
"372 (BC_1, * , CONTROL, 0 ),"&
"371 (BC_4, p2_19 , INPUT, X ),"&
"370 (BC_1, p2_19 , OUTPUT3, X, 369, 0, Z ),"&
"369 (BC_1, * , CONTROL, 0 ),"&
"368 (BC_4, p1_19 , INPUT, X ),"&
"367 (BC_1, p1_19 , OUTPUT3, X, 366, 0, Z ),"&
"366 (BC_1, * , CONTROL, 0 ),"&
"365 (BC_4, p0_14 , INPUT, X ),"&
"364 (BC_1, p0_14 , OUTPUT3, X, 363, 0, Z ),"&
"363 (BC_1, * , CONTROL, 0 ),"&
"362 (BC_4, p1_20 , INPUT, X ),"&
"361 (BC_1, p1_20 , OUTPUT3, X, 360, 0, Z ),"&
"360 (BC_1, * , CONTROL, 0 ),"&
"359 (BC_4, p1_21 , INPUT, X ),"&
"358 (BC_1, p1_21 , OUTPUT3, X, 357, 0, Z ),"&
"357 (BC_1, * , CONTROL, 0 ),"&
"356 (BC_4, p2_20 , INPUT, X ),"&
"355 (BC_1, p2_20 , OUTPUT3, X, 354, 0, Z ),"&
"354 (BC_1, * , CONTROL, 0 ),"&
"353 (BC_4, p1_22 , INPUT, X ),"&
"352 (BC_1, p1_22 , OUTPUT3, X, 351, 0, Z ),"&
"351 (BC_1, * , CONTROL, 0 ),"&
"350 (BC_4, p4_0 , INPUT, X ),"&
"349 (BC_1, p4_0 , OUTPUT3, X, 348, 0, Z ),"&
"348 (BC_1, * , CONTROL, 0 ),"&
"347 (BC_4, p1_23 , INPUT, X ),"&
"346 (BC_1, p1_23 , OUTPUT3, X, 345, 0, Z ),"&
"345 (BC_1, * , CONTROL, 0 ),"&
"344 (BC_4, p1_24 , INPUT, X ),"&
"343 (BC_1, p1_24 , OUTPUT3, X, 342, 0, Z ),"&
"342 (BC_1, * , CONTROL, 0 ),"&
"341 (BC_4, p4_1 , INPUT, X ),"&
"340 (BC_1, p4_1 , OUTPUT3, X, 339, 0, Z ),"&
"339 (BC_1, * , CONTROL, 0 ),"&
"338 (BC_4, p1_25 , INPUT, X ),"&
"337 (BC_1, p1_25 , OUTPUT3, X, 336, 0, Z ),"&
"336 (BC_1, * , CONTROL, 0 ),"&
"335 (BC_4, p2_21 , INPUT, X ),"&
"334 (BC_1, p2_21 , OUTPUT3, X, 333, 0, Z ),"&
"333 (BC_1, * , CONTROL, 0 ),"&
"332 (BC_4, p1_26 , INPUT, X ),"&
"331 (BC_1, p1_26 , OUTPUT3, X, 330, 0, Z ),"&
"330 (BC_1, * , CONTROL, 0 ),"&
"329 (BC_4, p4_2 , INPUT, X ),"&
"328 (BC_1, p4_2 , OUTPUT3, X, 327, 0, Z ),"&
"327 (BC_1, * , CONTROL, 0 ),"&
"326 (BC_0, * , INTERNAL, X ),"&
"325 (BC_0, * , INTERNAL, X ),"&
"324 (BC_0, * , INTERNAL, X ),"&
"323 (BC_4, p2_16 , INPUT, X ),"&
"322 (BC_1, p2_16 , OUTPUT3, X, 321, 0, Z ),"&
"321 (BC_1, * , CONTROL, 0 ),"&
"320 (BC_4, p1_27 , INPUT, X ),"&
"319 (BC_1, p1_27 , OUTPUT3, X, 318, 0, Z ),"&
"318 (BC_1, * , CONTROL, 0 ),"&
"317 (BC_4, p1_28 , INPUT, X ),"&
"316 (BC_1, p1_28 , OUTPUT3, X, 315, 0, Z ),"&
"315 (BC_1, * , CONTROL, 0 ),"&
"314 (BC_0, * , INTERNAL, X ),"&
"313 (BC_0, * , INTERNAL, X ),"&
"312 (BC_0, * , INTERNAL, X ),"&
"311 (BC_4, p1_29 , INPUT, X ),"&
"310 (BC_1, p1_29 , OUTPUT3, X, 309, 0, Z ),"&
"309 (BC_1, * , CONTROL, 0 ),"&
"308 (BC_4, p0_0 , INPUT, X ),"&
"307 (BC_1, p0_0 , OUTPUT3, X, 306, 0, Z ),"&
"306 (BC_1, * , CONTROL, 0 ),"&
"305 (BC_4, p2_17 , INPUT, X ),"&
"304 (BC_1, p2_17 , OUTPUT3, X, 303, 0, Z ),"&
"303 (BC_1, * , CONTROL, 0 ),"&
"302 (BC_4, p0_1 , INPUT, X ),"&
"301 (BC_1, p0_1 , OUTPUT3, X, 300, 0, Z ),"&
"300 (BC_1, * , CONTROL, 0 ),"&
"299 (BC_4, p4_3 , INPUT, X ),"&
"298 (BC_1, p4_3 , OUTPUT3, X, 297, 0, Z ),"&
"297 (BC_1, * , CONTROL, 0 ),"&
"296 (BC_4, p0_10 , INPUT, X ),"&
"295 (BC_1, p0_10 , OUTPUT3, X, 294, 0, Z ),"&
"294 (BC_1, * , CONTROL, 0 ),"&
"293 (BC_0, * , INTERNAL, X ),"&
"292 (BC_0, * , INTERNAL, X ),"&
"291 (BC_0, * , INTERNAL, X ),"&
"290 (BC_4, p0_11 , INPUT, X ),"&
"289 (BC_1, p0_11 , OUTPUT3, X, 288, 0, Z ),"&
"288 (BC_1, * , CONTROL, 0 ),"&
"287 (BC_4, p4_16 , INPUT, X ),"&
"286 (BC_1, p4_16 , OUTPUT3, X, 285, 0, Z ),"&
"285 (BC_1, * , CONTROL, 0 ),"&
"284 (BC_4, p2_13 , INPUT, X ),"&
"283 (BC_1, p2_13 , OUTPUT3, X, 282, 0, Z ),"&
"282 (BC_1, * , CONTROL, 0 ),"&
"281 (BC_4, p4_4 , INPUT, X ),"&
"280 (BC_1, p4_4 , OUTPUT3, X, 279, 0, Z ),"&
"279 (BC_1, * , CONTROL, 0 ),"&
"278 (BC_4, p4_17 , INPUT, X ),"&
"277 (BC_1, p4_17 , OUTPUT3, X, 276, 0, Z ),"&
"276 (BC_1, * , CONTROL, 0 ),"&
"275 (BC_4, p4_18 , INPUT, X ),"&
"274 (BC_1, p4_18 , OUTPUT3, X, 273, 0, Z ),"&
"273 (BC_1, * , CONTROL, 0 ),"&
"272 (BC_4, p2_12 , INPUT, X ),"&
"271 (BC_1, p2_12 , OUTPUT3, X, 270, 0, Z ),"&
"270 (BC_1, * , CONTROL, 0 ),"&
"269 (BC_4, p4_5 , INPUT, X ),"&
"268 (BC_1, p4_5 , OUTPUT3, X, 267, 0, Z ),"&
"267 (BC_1, * , CONTROL, 0 ),"&
"266 (BC_4, p2_11 , INPUT, X ),"&
"265 (BC_1, p2_11 , OUTPUT3, X, 264, 0, Z ),"&
"264 (BC_1, * , CONTROL, 0 ),"&
"263 (BC_0, * , INTERNAL, X ),"&
"262 (BC_0, * , INTERNAL, X ),"&
"261 (BC_0, * , INTERNAL, X ),"&
"260 (BC_4, p2_10 , INPUT, X ),"&
"259 (BC_1, p2_10 , OUTPUT3, X, 258, 0, Z ),"&
"258 (BC_1, * , CONTROL, 0 ),"&
"257 (BC_4, p4_19 , INPUT, X ),"&
"256 (BC_1, p4_19 , OUTPUT3, X, 255, 0, Z ),"&
"255 (BC_1, * , CONTROL, 0 ),"&
"254 (BC_4, p4_6 , INPUT, X ),"&
"253 (BC_1, p4_6 , OUTPUT3, X, 252, 0, Z ),"&
"252 (BC_1, * , CONTROL, 0 ),"&
"251 (BC_0, * , INTERNAL, X ),"&
"250 (BC_0, * , INTERNAL, X ),"&
"249 (BC_0, * , INTERNAL, X ),"&
"248 (BC_4, p0_22 , INPUT, X ),"&
"247 (BC_1, p0_22 , OUTPUT3, X, 246, 0, Z ),"&
"246 (BC_1, * , CONTROL, 0 ),"&
"245 (BC_4, p5_2 , INPUT, X ),"&
"244 (BC_1, p5_2 , OUTPUT3, X, 243, 0, WEAK1 ),"&
"243 (BC_1, * , CONTROL, 0 ),"&
"242 (BC_4, p0_21 , INPUT, X ),"&
"241 (BC_1, p0_21 , OUTPUT3, X, 240, 0, Z ),"&
"240 (BC_1, * , CONTROL, 0 ),"&
"239 (BC_4, p4_26 , INPUT, X ),"&
"238 (BC_1, p4_26 , OUTPUT3, X, 237, 0, Z ),"&
"237 (BC_1, * , CONTROL, 0 ),"&
"236 (BC_4, p0_20 , INPUT, X ),"&
"235 (BC_1, p0_20 , OUTPUT3, X, 234, 0, Z ),"&
"234 (BC_1, * , CONTROL, 0 ),"&
"233 (BC_4, p4_7 , INPUT, X ),"&
"232 (BC_1, p4_7 , OUTPUT3, X, 231, 0, Z ),"&
"231 (BC_1, * , CONTROL, 0 ),"&
"230 (BC_4, p0_19 , INPUT, X ),"&
"229 (BC_1, p0_19 , OUTPUT3, X, 228, 0, Z ),"&
"228 (BC_1, * , CONTROL, 0 ),"&
"227 (BC_0, * , INTERNAL, X ),"&
"226 (BC_0, * , INTERNAL, X ),"&
"225 (BC_0, * , INTERNAL, X ),"&
"224 (BC_4, p0_18 , INPUT, X ),"&
"223 (BC_1, p0_18 , OUTPUT3, X, 222, 0, Z ),"&
"222 (BC_1, * , CONTROL, 0 ),"&
"221 (BC_4, p0_17 , INPUT, X ),"&
"220 (BC_1, p0_17 , OUTPUT3, X, 219, 0, Z ),"&
"219 (BC_1, * , CONTROL, 0 ),"&
"218 (BC_4, p4_8 , INPUT, X ),"&
"217 (BC_1, p4_8 , OUTPUT3, X, 216, 0, Z ),"&
"216 (BC_1, * , CONTROL, 0 ),"&
"215 (BC_4, p0_15 , INPUT, X ),"&
"214 (BC_1, p0_15 , OUTPUT3, X, 213, 0, Z ),"&
"213 (BC_1, * , CONTROL, 0 ),"&
"212 (BC_0, * , INTERNAL, X ),"&
"211 (BC_0, * , INTERNAL, X ),"&
"210 (BC_0, * , INTERNAL, X ),"&
"209 (BC_4, p0_16 , INPUT, X ),"&
"208 (BC_1, p0_16 , OUTPUT3, X, 207, 0, Z ),"&
"207 (BC_1, * , CONTROL, 0 ),"&
"206 (BC_4, p4_9 , INPUT, X ),"&
"205 (BC_1, p4_9 , OUTPUT3, X, 204, 0, Z ),"&
"204 (BC_1, * , CONTROL, 0 ),"&
"203 (BC_4, p2_9 , INPUT, X ),"&
"202 (BC_1, p2_9 , OUTPUT3, X, 201, 0, Z ),"&
"201 (BC_1, * , CONTROL, 0 ),"&
"200 (BC_4, p2_8 , INPUT, X ),"&
"199 (BC_1, p2_8 , OUTPUT3, X, 198, 0, Z ),"&
"198 (BC_1, * , CONTROL, 0 ),"&
"197 (BC_4, p4_10 , INPUT, X ),"&
"196 (BC_1, p4_10 , OUTPUT3, X, 195, 0, Z ),"&
"195 (BC_1, * , CONTROL, 0 ),"&
"194 (BC_4, p2_7 , INPUT, X ),"&
"193 (BC_1, p2_7 , OUTPUT3, X, 192, 0, Z ),"&
"192 (BC_1, * , CONTROL, 0 ),"&
"191 (BC_0, * , INTERNAL, X ),"&
"190 (BC_0, * , INTERNAL, X ),"&
"189 (BC_0, * , INTERNAL, X ),"&
"188 (BC_4, p2_6 , INPUT, X ),"&
"187 (BC_1, p2_6 , OUTPUT3, X, 186, 0, Z ),"&
"186 (BC_1, * , CONTROL, 0 ),"&
"185 (BC_4, p4_27 , INPUT, X ),"&
"184 (BC_1, p4_27 , OUTPUT3, X, 183, 0, Z ),"&
"183 (BC_1, * , CONTROL, 0 ),"&
"182 (BC_4, p2_5 , INPUT, X ),"&
"181 (BC_1, p2_5 , OUTPUT3, X, 180, 0, Z ),"&
"180 (BC_1, * , CONTROL, 0 ),"&
"179 (BC_4, p5_3 , INPUT, X ),"&
"178 (BC_1, p5_3 , OUTPUT3, X, 177, 0, WEAK1 ),"&
"177 (BC_1, * , CONTROL, 0 ),"&
"176 (BC_4, p2_4 , INPUT, X ),"&
"175 (BC_1, p2_4 , OUTPUT3, X, 174, 0, Z ),"&
"174 (BC_1, * , CONTROL, 0 ),"&
"173 (BC_0, * , INTERNAL, X ),"&
"172 (BC_0, * , INTERNAL, X ),"&
"171 (BC_0, * , INTERNAL, X ),"&
"170 (BC_4, p2_3 , INPUT, X ),"&
"169 (BC_1, p2_3 , OUTPUT3, X, 168, 0, Z ),"&
"168 (BC_1, * , CONTROL, 0 ),"&
"167 (BC_4, p4_11 , INPUT, X ),"&
"166 (BC_1, p4_11 , OUTPUT3, X, 165, 0, Z ),"&
"165 (BC_1, * , CONTROL, 0 ),"&
"164 (BC_4, p1_13 , INPUT, X ),"&
"163 (BC_1, p1_13 , OUTPUT3, X, 162, 0, Z ),"&
"162 (BC_1, * , CONTROL, 0 ),"&
"161 (BC_4, p4_12 , INPUT, X ),"&
"160 (BC_1, p4_12 , OUTPUT3, X, 159, 0, Z ),"&
"159 (BC_1, * , CONTROL, 0 ),"&
"158 (BC_4, p2_2 , INPUT, X ),"&
"157 (BC_1, p2_2 , OUTPUT3, X, 156, 0, Z ),"&
"156 (BC_1, * , CONTROL, 0 ),"&
"155 (BC_0, * , INTERNAL, X ),"&
"154 (BC_0, * , INTERNAL, X ),"&
"153 (BC_0, * , INTERNAL, X ),"&
"152 (BC_4, p2_1 , INPUT, X ),"&
"151 (BC_1, p2_1 , OUTPUT3, X, 150, 0, Z ),"&
"150 (BC_1, * , CONTROL, 0 ),"&
"149 (BC_4, p1_7 , INPUT, X ),"&
"148 (BC_1, p1_7 , OUTPUT3, X, 147, 0, Z ),"&
"147 (BC_1, * , CONTROL, 0 ),"&
"146 (BC_4, p2_0 , INPUT, X ),"&
"145 (BC_1, p2_0 , OUTPUT3, X, 144, 0, Z ),"&
"144 (BC_1, * , CONTROL, 0 ),"&
"143 (BC_4, p4_13 , INPUT, X ),"&
"142 (BC_1, p4_13 , OUTPUT3, X, 141, 0, Z ),"&
"141 (BC_1, * , CONTROL, 0 ),"&
"140 (BC_4, p1_5 , INPUT, X ),"&
"139 (BC_1, p1_5 , OUTPUT3, X, 138, 0, Z ),"&
"138 (BC_1, * , CONTROL, 0 ),"&
"137 (BC_4, p1_12 , INPUT, X ),"&
"136 (BC_1, p1_12 , OUTPUT3, X, 135, 0, Z ),"&
"135 (BC_1, * , CONTROL, 0 ),"&
"134 (BC_4, p0_9 , INPUT, X ),"&
"133 (BC_1, p0_9 , OUTPUT3, X, 132, 0, Z ),"&
"132 (BC_1, * , CONTROL, 0 ),"&
"131 (BC_4, p4_14 , INPUT, X ),"&
"130 (BC_1, p4_14 , OUTPUT3, X, 129, 0, Z ),"&
"129 (BC_1, * , CONTROL, 0 ),"&
"128 (BC_4, p0_8 , INPUT, X ),"&
"127 (BC_1, p0_8 , OUTPUT3, X, 126, 0, Z ),"&
"126 (BC_1, * , CONTROL, 0 ),"&
"125 (BC_0, * , INTERNAL, X ),"&
"124 (BC_0, * , INTERNAL, X ),"&
"123 (BC_0, * , INTERNAL, X ),"&
"122 (BC_4, p0_7 , INPUT, X ),"&
"121 (BC_1, p0_7 , OUTPUT3, X, 120, 0, Z ),"&
"120 (BC_1, * , CONTROL, 0 ),"&
"119 (BC_4, p1_11 , INPUT, X ),"&
"118 (BC_1, p1_11 , OUTPUT3, X, 117, 0, Z ),"&
"117 (BC_1, * , CONTROL, 0 ),"&
"116 (BC_4, p0_6 , INPUT, X ),"&
"115 (BC_1, p0_6 , OUTPUT3, X, 114, 0, Z ),"&
"114 (BC_1, * , CONTROL, 0 ),"&
"113 (BC_4, p0_5 , INPUT, X ),"&
"112 (BC_1, p0_5 , OUTPUT3, X, 111, 0, Z ),"&
"111 (BC_1, * , CONTROL, 0 ),"&
"110 (BC_0, * , INTERNAL, X ),"&
"109 (BC_0, * , INTERNAL, X ),"&
"108 (BC_0, * , INTERNAL, X ),"&
"107 (BC_4, p0_4 , INPUT, X ),"&
"106 (BC_1, p0_4 , OUTPUT3, X, 105, 0, Z ),"&
"105 (BC_1, * , CONTROL, 0 ),"&
"104 (BC_4, p4_28 , INPUT, X ),"&
"103 (BC_1, p4_28 , OUTPUT3, X, 102, 0, Z ),"&
"102 (BC_1, * , CONTROL, 0 ),"&
"101 (BC_4, p1_6 , INPUT, X ),"&
"100 (BC_1, p1_6 , OUTPUT3, X, 99, 0, Z ),"&
" 99 (BC_1, * , CONTROL, 0 ),"&
" 98 (BC_4, p4_15 , INPUT, X ),"&
" 97 (BC_1, p4_15 , OUTPUT3, X, 96, 0, Z ),"&
" 96 (BC_1, * , CONTROL, 0 ),"&
" 95 (BC_0, * , INTERNAL, X ),"&
" 94 (BC_0, * , INTERNAL, X ),"&
" 93 (BC_0, * , INTERNAL, X ),"&
" 92 (BC_4, p4_29 , INPUT, X ),"&
" 91 (BC_1, p4_29 , OUTPUT3, X, 90, 0, Z ),"&
" 90 (BC_1, * , CONTROL, 0 ),"&
" 89 (BC_4, p1_3 , INPUT, X ),"&
" 88 (BC_1, p1_3 , OUTPUT3, X, 87, 0, Z ),"&
" 87 (BC_1, * , CONTROL, 0 ),"&
" 86 (BC_4, p1_17 , INPUT, X ),"&
" 85 (BC_1, p1_17 , OUTPUT3, X, 84, 0, Z ),"&
" 84 (BC_1, * , CONTROL, 0 ),"&
" 83 (BC_4, p4_25 , INPUT, X ),"&
" 82 (BC_1, p4_25 , OUTPUT3, X, 81, 0, Z ),"&
" 81 (BC_1, * , CONTROL, 0 ),"&
" 80 (BC_4, p1_16 , INPUT, X ),"&
" 79 (BC_1, p1_16 , OUTPUT3, X, 78, 0, Z ),"&
" 78 (BC_1, * , CONTROL, 0 ),"&
" 77 (BC_4, p1_15 , INPUT, X ),"&
" 76 (BC_1, p1_15 , OUTPUT3, X, 75, 0, Z ),"&
" 75 (BC_1, * , CONTROL, 0 ),"&
" 74 (BC_4, p4_24 , INPUT, X ),"&
" 73 (BC_1, p4_24 , OUTPUT3, X, 72, 0, Z ),"&
" 72 (BC_1, * , CONTROL, 0 ),"&
" 71 (BC_4, p1_14 , INPUT, X ),"&
" 70 (BC_1, p1_14 , OUTPUT3, X, 69, 0, Z ),"&
" 69 (BC_1, * , CONTROL, 0 ),"&
" 68 (BC_4, p1_2 , INPUT, X ),"&
" 67 (BC_1, p1_2 , OUTPUT3, X, 66, 0, Z ),"&
" 66 (BC_1, * , CONTROL, 0 ),"&
" 65 (BC_4, p1_10 , INPUT, X ),"&
" 64 (BC_1, p1_10 , OUTPUT3, X, 63, 0, Z ),"&
" 63 (BC_1, * , CONTROL, 0 ),"&
" 62 (BC_4, p4_30 , INPUT, X ),"&
" 61 (BC_1, p4_30 , OUTPUT3, X, 60, 0, Z ),"&
" 60 (BC_1, * , CONTROL, 0 ),"&
" 59 (BC_4, p1_9 , INPUT, X ),"&
" 58 (BC_1, p1_9 , OUTPUT3, X, 57, 0, Z ),"&
" 57 (BC_1, * , CONTROL, 0 ),"&
" 56 (BC_4, p1_8 , INPUT, X ),"&
" 55 (BC_1, p1_8 , OUTPUT3, X, 54, 0, Z ),"&
" 54 (BC_1, * , CONTROL, 0 ),"&
" 53 (BC_4, p3_8 , INPUT, X ),"&
" 52 (BC_1, p3_8 , OUTPUT3, X, 51, 0, Z ),"&
" 51 (BC_1, * , CONTROL, 0 ),"&
" 50 (BC_4, p1_4 , INPUT, X ),"&
" 49 (BC_1, p1_4 , OUTPUT3, X, 48, 0, Z ),"&
" 48 (BC_1, * , CONTROL, 0 ),"&
" 47 (BC_4, p4_31 , INPUT, X ),"&
" 46 (BC_1, p4_31 , OUTPUT3, X, 45, 0, Z ),"&
" 45 (BC_1, * , CONTROL, 0 ),"&
" 44 (BC_4, p1_1 , INPUT, X ),"&
" 43 (BC_1, p1_1 , OUTPUT3, X, 42, 0, Z ),"&
" 42 (BC_1, * , CONTROL, 0 ),"&
" 41 (BC_0, * , INTERNAL, X ),"&
" 40 (BC_0, * , INTERNAL, X ),"&
" 39 (BC_0, * , INTERNAL, X ),"&
" 38 (BC_4, p1_0 , INPUT, X ),"&
" 37 (BC_1, p1_0 , OUTPUT3, X, 36, 0, Z ),"&
" 36 (BC_1, * , CONTROL, 0 ),"&
" 35 (BC_4, p3_0 , INPUT, X ),"&
" 34 (BC_1, p3_0 , OUTPUT3, X, 33, 0, Z ),"&
" 33 (BC_1, * , CONTROL, 0 ),"&
" 32 (BC_4, p3_9 , INPUT, X ),"&
" 31 (BC_1, p3_9 , OUTPUT3, X, 30, 0, Z ),"&
" 30 (BC_1, * , CONTROL, 0 ),"&
" 29 (BC_4, p3_1 , INPUT, X ),"&
" 28 (BC_1, p3_1 , OUTPUT3, X, 27, 0, Z ),"&
" 27 (BC_1, * , CONTROL, 0 ),"&
" 26 (BC_4, p0_2 , INPUT, X ),"&
" 25 (BC_1, p0_2 , OUTPUT3, X, 24, 0, Z ),"&
" 24 (BC_1, * , CONTROL, 0 ),"&
" 23 (BC_0, * , INTERNAL, X ),"&
" 22 (BC_0, * , INTERNAL, X ),"&
" 21 (BC_0, * , INTERNAL, X ),"&
" 20 (BC_4, p0_3 , INPUT, X ),"&
" 19 (BC_1, p0_3 , OUTPUT3, X, 18, 0, Z ),"&
" 18 (BC_1, * , CONTROL, 0 ),"&
" 17 (BC_4, p3_10 , INPUT, X ),"&
" 16 (BC_1, p3_10 , OUTPUT3, X, 15, 0, Z ),"&
" 15 (BC_1, * , CONTROL, 0 ),"&
" 14 (BC_4, p5_4 , INPUT, X ),"&
" 13 (BC_1, p5_4 , OUTPUT3, X, 12, 0, Z ),"&
" 12 (BC_1, * , CONTROL, 0 ),"&
" 11 (BC_4, p3_2 , INPUT, X ),"&
" 10 (BC_1, p3_2 , OUTPUT3, X, 9, 0, Z ),"&
" 9 (BC_1, * , CONTROL, 0 ),"&
" 8 (BC_4, p3_11 , INPUT, X ),"&
" 7 (BC_1, p3_11 , OUTPUT3, X, 6, 0, Z ),"&
" 6 (BC_1, * , CONTROL, 0 ),"&
" 5 (BC_4, p3_12 , INPUT, X ),"&
" 4 (BC_1, p3_12 , OUTPUT3, X, 3, 0, Z ),"&
" 3 (BC_1, * , CONTROL, 0 ),"&
" 2 (BC_4, p3_3 , INPUT, X ),"&
" 1 (BC_1, p3_3 , OUTPUT3, X, 0, 0, Z ),"&
" 0 (BC_1, * , CONTROL, 0 )";
end LPC408x;