--*******************************************************************************************************
--** Copyright (c) 2014 Cypress Semiconductor
--** All rights reserved.
--**
--** File Name: 1460KV33_x36_165.bsdl
--** Release: 1.0
--** Last Updated: Apr 6,2016
--** Function: 1M x 36 Pipelined NoBL SRAM With ECC, BSDL file for JTAG
--** Part #: CY7C1460KV33
--** Notes: IMPORTANT NOTE: Please be aware that the CY7C1460KV33 device is fully IEEE
--** 1149.1 compliant.
--**
--** Ref CY7C1460KV33 Datasheet at http://www.cypress.com
--**
--** Queries ? :contact Cypress MPD Applications
--** Written by : Cypress MPD Applications
--*******************************************************************************************************
entity CY7C1460KV33_165 is
generic (PHYSICAL_PIN_MAP : string := "FBGA");
port (
A: in bit_vector(0 to 19);
ADV: in bit;
BW_A_b: in bit;
BW_B_b: in bit;
BW_C_b: in bit;
BW_D_b: in bit;
CE1_b: in bit;
CE2: in bit;
CE3_b: in bit;
CEN_b: in bit;
CLK: in bit;
DP_A: in bit;
DP_B: in bit;
DP_C: in bit;
DP_D: in bit;
DQ_A: inout bit_vector(0 to 7);
DQ_B: inout bit_vector(0 to 7);
DQ_C: inout bit_vector(0 to 7);
DQ_D: inout bit_vector(0 to 7);
OE_b: in bit;
MODE: in bit;
WE_b: in bit;
TMS: in bit;
TDI: in bit;
TCK: in bit;
TDO: out bit;
ZZ: in bit;
VDD: linkage bit_vector(0 to 17);
VSS: linkage bit_vector(0 to 33);
VDDQ: linkage bit_vector(0 to 19);
NC: linkage bit_vector(0 to 18)
);
use STD_1149_1_1994.all;
attribute COMPONENT_CONFORMANCE of CY7C1460KV33_165 : entity is
"STD_1149_1_1993";
attribute PIN_MAP of CY7C1460KV33_165 : entity is
PHYSICAL_PIN_MAP;
constant FBGA:PIN_MAP_STRING:=
"A:(R6,P6,P8,R8,R9,P9,P10,R10,R11,A10,B10,A9, " &
" B9,A2,B2,R2,P3,R3,R4,P4), " & -- Address
"ADV:A8, " &
"BW_A_b:B5, " &
"BW_B_b:A5, " &
"BW_C_b:A4, " &
"BW_D_b:B4, " &-- Byte Write
"CE1_b:A3, " &
"CE2:B3, " &
"CE3_b:A6, " &
"CEN_b:A7, " &
"CLK:B6, " &-- Clock
"DP_A:N11, " &
"DP_B:C11, " &
"DP_C:C1, " &
"DP_D:N1, " &
"DQ_A:(M11,L11,K11,J11,M10,L10,K10,J10), " &
"DQ_B:(G11,F11,E11,D11,G10,F10,E10,D10), " &
"DQ_C:(D1,E1,F1,G1,D2,E2,F2,G2), " &
"DQ_D:(J1,K1,L1,M1,J2,K2,L2,M2), " &
"WE_b:B7, " &
"OE_b:B8, " &
"MODE:R1, " &
"TMS:R5, " &
"TDI:P5, " &
"TCK:R7, " &
"TDO:P7, " &
"ZZ:H11, "&
"VDD:(D4,D8,E4,E8,F4,F8,G4,G8,H4,H8, " &
" J4,J8,K4,K8,L4,L8,M4,M8), " &
"VDDQ:(C3,C9,D3,D9,E3,E9,F3,F9,G3,G9, " &
" J3,J9,K3,K9,L3,L9,M3,M9,N3,N9), " &
"VSS:(C4,C5,C6,C7,C8,D5,D6,D7,E5,E6,E7, " &
" F5,F6,F7,G5,G6,G7,H5,H6,H7,J5,J6,J7, " &
" K5,K6,K7,L5,L6,L7,M5,M6,M7,N4,N8), " &
"NC:(A1,A11,B1,B11,C2,C10,H1,H2,H3,H9,H10, " &
"N2,N5,N6,N7,N10,P1,P2,P11) ";
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (10.0e6, BOTH);
attribute INSTRUCTION_LENGTH of CY7C1460KV33_165 : entity is 3;
attribute INSTRUCTION_OPCODE of CY7C1460KV33_165 : entity is
"EXTEST (000)," &
"IDCODE (001)," &
"SAMPLE (010)," &-- Sample-Z
"SAMPLD (100)," &-- Sample/Preload
"BYPASS (111) ";
attribute INSTRUCTION_CAPTURE of CY7C1460KV33_165: entity is "001";
attribute IDCODE_REGISTER of CY7C1460KV33_165 : entity is
"000" & -- Part Configuration
"01011001000100111" & -- Defines the width & density
"00000110100" & -- Manufacturer identity
"1";-- 1149.1 Requirement
attribute REGISTER_ACCESS of CY7C1460KV33_165 : entity is
"BOUNDARY (EXTEST,SAMPLE,SAMPLD)," &
"BYPASS (BYPASS)";
attribute BOUNDARY_LENGTH of CY7C1460KV33_165 : entity is 89;
attribute BOUNDARY_REGISTER of CY7C1460KV33_165 : entity is
"0 (BC_4, *, internal, X)," &
"1 (BC_4, *, internal, X)," &
"2 (BC_4, *, internal, X)," &
"3 (BC_4, *, internal, X)," &
"4 (BC_4, A(2), input, X)," &
"5 (BC_4, A(3), input, X)," &
"6 (BC_4, A(4), input, X)," &
"7 (BC_4, A(5), input, X)," &
"8 (BC_4, A(6), input, X)," &
"9 (BC_4, A(7), input, X)," &
"10 (BC_4, A(8), input, X)," &
"11 (BC_4, ZZ, input, X)," &
"12 (BC_4, DP_A, input, X)," &
"13 (BC_7, DQ_A(0), bidir, X, 88, 0, Z), " &
"14 (BC_7, DQ_A(1), bidir, X, 88, 0, Z), " &
"15 (BC_7, DQ_A(2), bidir, X, 88, 0, Z), " &
"16 (BC_7, DQ_A(3), bidir, X, 88, 0, Z), " &
"17 (BC_7, DQ_A(4), bidir, X, 88, 0, Z), " &
"18 (BC_7, DQ_A(5), bidir, X, 88, 0, Z), " &
"19 (BC_7, DQ_A(6), bidir, X, 88, 0, Z), " &
"20 (BC_7, DQ_A(7), bidir, X, 88, 0, Z), " &
"21 (BC_4, *, internal, X)," &
"22 (BC_4, *, internal, X)," &
"23 (BC_7, DQ_B(0), bidir, X, 88, 0, Z), " &
"24 (BC_7, DQ_B(1), bidir, X, 88, 0, Z), " &
"25 (BC_7, DQ_B(2), bidir, X, 88, 0, Z), " &
"26 (BC_7, DQ_B(3), bidir, X, 88, 0, Z), " &
"27 (BC_7, DQ_B(4), bidir, X, 88, 0, Z), " &
"28 (BC_7, DQ_B(5), bidir, X, 88, 0, Z), " &
"29 (BC_7, DQ_B(6), bidir, X, 88, 0, Z), " &
"30 (BC_7, DQ_B(7), bidir, X, 88, 0, Z), " &
"31 (BC_4, DP_B, input, X)," &
"32 (BC_4, *, internal, X)," &
"33 (BC_4, *, internal, X)," &
"34 (BC_4, A(9), input, X)," &
"35 (BC_4, A(10), input, X)," &
"36 (BC_4, A(11), input, X)," &
"37 (BC_4, A(12), input, X)," &
"38 (BC_4, *, internal, X)," &
"39 (BC_4, ADV, input, X)," &
"40 (BC_4, OE_b, input, X)," &
"41 (BC_4, CEN_b, input, X)," &
"42 (BC_4, WE_b, input, X)," &
"43 (BC_4, CLK, input, X)," &
"44 (BC_4, CE3_b, input, X)," &
"45 (BC_4, BW_A_b, input, X)," &
"46 (BC_4, BW_B_b, input, X)," &
"47 (BC_4, BW_C_b, input, X)," &
"48 (BC_4, BW_D_b, input, X)," &
"49 (BC_4, CE2, input, X)," &
"50 (BC_4, CE1_b, input, X)," &
"51 (BC_4, A(13), input , X)," &
"52 (BC_4, A(14), input, X)," &
"53 (BC_4, *, internal, X)," &
"54 (BC_4, *, internal, X)," &
"55 (BC_4, *, internal, X)," &
"56 (BC_4, DP_C, input, X)," &
"57 (BC_7, DQ_C(0), bidir, X, 88, 0, Z), " &
"58 (BC_7, DQ_C(1), bidir, X, 88, 0, Z), " &
"59 (BC_7, DQ_C(2), bidir, X, 88, 0, Z), " &
"60 (BC_7, DQ_C(3), bidir, X, 88, 0, Z), " &
"61 (BC_7, DQ_C(4), bidir, X, 88, 0, Z), " &
"62 (BC_7, DQ_C(5), bidir, X, 88, 0, Z), " &
"63 (BC_7, DQ_C(6), bidir, X, 88, 0, Z), " &
"64 (BC_7, DQ_C(7), bidir, X, 88, 0, Z), " &
"65 (BC_4, *, internal, X)," &
"66 (BC_4, *, internal, X)," &
"67 (BC_7, DQ_D(0), bidir, X, 88, 0, Z), " &
"68 (BC_7, DQ_D(1), bidir, X, 88, 0, Z), " &
"69 (BC_7, DQ_D(2), bidir, X, 88, 0, Z), " &
"70 (BC_7, DQ_D(3), bidir, X, 88, 0, Z), " &
"71 (BC_7, DQ_D(4), bidir, X, 88, 0, Z), " &
"72 (BC_7, DQ_D(5), bidir, X, 88, 0, Z), " &
"73 (BC_7, DQ_D(6), bidir, X, 88, 0, Z), " &
"74 (BC_7, DQ_D(7), bidir, X, 88, 0, Z), " &
"75 (BC_4, DP_D, input, X)," &
"76 (BC_4, *, internal, X)," &
"77 (BC_4, *, internal, X)," &
"78 (BC_4, MODE, input, X)," &
"79 (BC_4, A(15), input , X)," &
"80 (BC_4, A(16), input, X)," &
"81 (BC_4, A(17), input, X)," &
"82 (BC_4, *, internal, X)," &
"83 (BC_4, A(18), input, X)," &
"84 (BC_4, A(19), input, X)," &
"85 (BC_4, *, internal, X)," &
"86 (BC_4, A(1), input, X)," &
"87 (BC_4, A(0), input, X)," &
"88 (BC_2, *, controlr, X)";
end CY7C1460KV33_165 ;