BSDL Files Library for JTAG

The only free public library that contains thousands of BSDL (Boundary Scan Description Language) models to use with BScan/JTAG tools

BSDL model: ispPAC_POWR1014A_XXT48

-- ********************************************************************
-- * ispPAC-POWR1014A BSDL Model                                      *
-- * File Version:      1.00                                          *
-- * File Date:         04/04/06                                      *
-- *                                                                  *
-- * Standard Test Access Port and Boundary-Scan Architecture         *
-- * VHDL Description File                                            *
-- *                                                                  *
-- * This BSDL file is created by ispBDF v3.1 according to:           *
-- * - IEEE 1149.1 1994 spec.                                         *
-- *                                                                  *
-- * This BSDL file has been syntax checked with:                     *
-- * - Lattice BSDL Syntax Checker                                    *
-- * - Goepel BSDL Syntax Checker                                     *
-- * - Agilent BSDL Syntax Checker                                    *
-- *                                                                  *
-- *  Copyright 2000 - 2006 Lattice Semiconductor Corporation         *
-- *  5555 NE Moore Ct., Hillsboro, OR 97124                          *
-- *  All rights reserved.  No part of this program or publication    *
-- *  may be reproduced, transmitted, transcribed, stored in a        *
-- *  retrieval system, or translated into any language or            *
-- *  computer language, in any form or by any means without this     *
-- *  notice appearing within.                                        *
-- ********************************************************************
-- *                                                                  *
-- *                           IMPORTANT                              *
-- *                                                                  *
-- * This device does not include a BSCAN register and does not       *
-- * directly support pin continuity testing.  The BSDL file is       *
-- * is provided to define the devices in a scan chain where the      *
-- * Instruction Register and Bypass instruction must be known.       *
-- *                                                                  *
-- * For Further assistance, please contact Tech Support at           *
-- *       1-800-LATTICE or techsupport@latticesemi.com               *
-- ********************************************************************
-- *                                                                  *
-- *                          REVISION HISTORY                        *
-- *                                                                  *
-- * Rev 1.00: 04/04/06                                               *
-- *  - Initial version                                               *
-- *                                                                  *
-- ********************************************************************

-- The Overall Structure of the Entity Description
entity ispPAC_POWR1014A_XXT48 is

-- Generic Parameter Statement
generic (PHYSICAL_PIN_MAP : string := "TQFP_48");
-- Logical Port Description Statement
port (
      OUT14:    linkage bit;
      OUT13:    linkage bit;
      OUT12:    linkage bit;
      OUT11:    linkage bit;
      OUT10:    linkage bit;
      OUT9:     linkage bit;
      GNDD:     linkage bit_vector(0 to 1);
      OUT8:     linkage bit;
      OUT7:     linkage bit;
      OUT6:     linkage bit;
      OUT5:     linkage bit;
      OUT4:     linkage bit;
      SMBA_OUT3:linkage bit;
      HVOUT2:   linkage bit;
      HVOUT1:   linkage bit;
      TMS:      in bit;
      ATDI:     linkage bit;
      TDI:      in bit;
      TDISEL:   linkage bit;
      VCCJ:     linkage bit;
      TDO:      out bit;
      TCK:      in bit;
      VCCD:     linkage bit_vector(0 to 1);
      VCCPROG:  linkage bit;
      VMON1:    linkage bit;
      VMON2:    linkage bit;
      VMON3:    linkage bit;
      VMON4:    linkage bit;
      VCCA:     linkage bit;
      GNDA:     linkage bit;
      VMON5:    linkage bit;
      VMON6:    linkage bit;
      VMON7:    linkage bit;
      VMON8:    linkage bit;
      VMON9:    linkage bit;
      VMON10:   linkage bit;
      SDA:      linkage bit;
      SCL:      linkage bit;
      RESETb:   linkage bit;
      PLDCLK:   linkage bit;
      MCLK:     linkage bit;
      IN1:      linkage bit;
      VCCINP:   linkage bit;
      IN2:      linkage bit;
      IN3:      linkage bit;
      IN4:      linkage bit
);
-- Version Control
use STD_1149_1_1994.all;              -- 1149.1-1994 attributes

-- Component Conformance Statement
attribute COMPONENT_CONFORMANCE of ispPAC_POWR1014A_XXT48 : entity is
"STD_1149_1_1993";

-- Device Package Pin Mapping
attribute PIN_MAP of ispPAC_POWR1014A_XXT48 : entity is PHYSICAL_PIN_MAP;

constant TQFP_48 : PIN_MAP_STRING :=

      "OUT14:     1,"&
      "OUT13:     2,"&
      "OUT12:     3,"&
      "OUT11:     4,"&
      "OUT10:     5,"&
      "OUT9:      6,"&
      "GNDD:      (7,31),"&
      "OUT8:      8,"&
      "OUT7:      9,"&
      "OUT6:     10,"&
      "OUT5:     11,"&
      "OUT4:     12,"&
      "SMBA_OUT3:13,"&
      "HVOUT2:   14,"&
      "HVOUT1:   15,"&
      "TMS:      16,"&
      "ATDI:     17,"&
      "TDI:      18,"&
      "TDISEL:   19,"&
      "VCCJ:     20,"&
      "TDO:      21,"&
      "TCK:      22,"&
      "VCCD:     (23,41),"&
      "VCCPROG:  24,"&
      "VMON1:    25,"&
      "VMON2:    26,"&
      "VMON3:    27,"&
      "VMON4:    28,"&
      "VCCA:     29,"&
      "GNDA:     30,"&
      "VMON5:    32,"&
      "VMON6:    33,"&
      "VMON7:    34,"&
      "VMON8:    35,"&
      "VMON9:    36,"&
      "VMON10:   37,"&
      "SDA:      38,"&
      "SCL:      39,"&
      "RESETb:   40,"&
      "PLDCLK:   42,"&
      "MCLK:     43,"&
      "IN1:      44,"&
      "VCCINP:   45,"&
      "IN2:      46,"&
      "IN3:      47,"&
      "IN4:      48";

-- Scan Port Identification

      attribute TAP_SCAN_CLOCK of TCK : Signal is (1.0e6, BOTH);
      attribute TAP_SCAN_IN of TDI : Signal is True;
      attribute TAP_SCAN_OUT of TDO : Signal is True;
      attribute TAP_SCAN_MODE of TMS : Signal is True;

-- Instruction Register Description

      attribute INSTRUCTION_LENGTH of ispPAC_POWR1014A_XXT48 : entity is 8;
      attribute INSTRUCTION_OPCODE of ispPAC_POWR1014A_XXT48 : entity is

-- 1149.1 instructions
      "BYPASS              (11111111),"&
      "SAMPLE              (00011100),"&
      "EXTEST              (00000000),"&
      "IDCODE              (00010110),"&
      "HIGHZ               (00011000)";

      attribute INSTRUCTION_CAPTURE of ispPAC_POWR1014A_XXT48 : entity is
      "00011101";

-- IDCODE Definition
      attribute IDCODE_REGISTER of ispPAC_POWR1014A_XXT48 : entity is
      "0000"&          -- version number
      "0000000101000101"&          -- part identification
      "00000100001"&          -- company code
      "1";          -- mandatory

-- Register Access Description
      attribute REGISTER_ACCESS of ispPAC_POWR1014A_XXT48 : entity is
      "BYPASS           (BYPASS, "&
      "                 HIGHZ),"&
      "BOUNDARY         (SAMPLE, "&
      "                 EXTEST),"&
      "DEVICE_ID        (IDCODE)";

-- *****************************************************************
-- Boundary Scan Register Description, Cell 0 is the closest to TDO
-- *****************************************************************
      attribute BOUNDARY_LENGTH of ispPAC_POWR1014A_XXT48 : entity is 1;
      attribute BOUNDARY_REGISTER of ispPAC_POWR1014A_XXT48 : entity is

      --num cell  port  function  safe  [ccell  disval  rslt]
      "0 (BC_1,   *, INTERNAL, 0           )";

end ispPAC_POWR1014A_XXT48;