BSDL Files Library for JTAG

The only free public library that contains thousands of BSDL (Boundary Scan Description Language) models to use with BScan/JTAG tools

BSDL model: sirius_top

-- *****************************************************************************

--   BSDL file for design sirius_top

--   Designer: 
--   Company:  PLX TECHNOLOGY

--   Date: 03/12/09. BSDL Generator: 1.1

-- *****************************************************************************


 entity sirius_top is

-- This section identifies the default device package selected.

   generic (PHYSICAL_PIN_MAP: string:= "PEX_8609BA");

-- This section declares all the ports in the design.


   port (

GPIO29		          : inout    bit;
PEX_REFCLK_CFCp	          : linkage  bit;
PEX_REFCLK_CFCn	          : linkage  bit;
STRAP_PORTCFG0            : in       bit;
STRAP_PORTCFG1            : in       bit;
FATAL_ERR	          : out      bit;
GPIO30                    : inout    bit;
GPIO0                     : inout    bit;
STRAP_FAST_BRINGUP        : in       bit;
STRAP_SERDES_MODE_EN      : in       bit;
GPIO1	                  : inout    bit;
GPIO2	                  : inout    bit;
GPIO3	                  : inout    bit;
GPIO4	                  : inout    bit;
GPIO5	                  : inout    bit;
STRAP_UPSTRM_PORTSEL0     : in       bit;	
STRAP_UPSTRM_PORTSEL1     : in       bit;	
STRAP_UPSTRM_PORTSEL2     : in       bit;	
STRAP_UPSTRM_PORTSEL3     : in       bit;	
STRAP_RESERVED_17         : in       bit;
STRAP_NT_UPSTRM_PORTSEL0  : in       bit;
STRAP_NT_UPSTRM_PORTSEL1  : in       bit;		
STRAP_NT_UPSTRM_PORTSEL2  : in       bit;
GPIO6	                  : inout    bit;
GPIO7	                  : inout    bit;
GPIO8	                  : inout    bit;
GPIO9	                  : inout    bit;
SHPC_INTn_P                 : in       bit;
SPARE0                    : inout    bit;
STRAP_NT_UPSTRM_PORTSEL3  : in       bit;
SPARE1                    : inout    bit;
STRAP_NT_P2P_EN_n                    : inout    bit;
STRAP_SMBUS_EN_n                    : inout    bit;
STRAP_UPCFG_TIMER_EN_n                    : inout    bit;
STRAP_SSC_ISO_ENABLE	  : in       bit;
GPIO10                    : inout    bit;
GPIO11                    : inout    bit;
GPIO12                    : inout    bit;
GPIO13                    : inout    bit;
GPIO14                    : inout    bit;
GPIO15                    : inout    bit;
PEX_PERp0                 : in       bit;
PEX_PERn0                 : in       bit;
PEX_PETp0                 : buffer   bit;
PEX_PETn0                 : buffer   bit;
PEX_PERp1                 : in       bit;
PEX_PERn1                 : in       bit;
PEX_PETp1                 : buffer   bit;
PEX_PETn1                 : buffer   bit;
PEX_REFCLKp               : linkage  bit;
PEX_REFCLKn               : linkage  bit;
ATB_0                     : linkage  bit;
REXT_B0                   : linkage  bit;
REXT_A0                   : linkage  bit;
PEX_PETn2                 : buffer   bit;
PEX_PETp2                 : buffer   bit;
PEX_PERn2                 : in       bit;
PEX_PERp2                 : in       bit;
PEX_PETn3                 : buffer   bit;
PEX_PETp3                 : buffer   bit;
PEX_PERn3                 : in       bit;
PEX_PERp3                 : in       bit;
STRAP_TESTMODE0           : in       bit;
STRAP_TESTMODE1           : in       bit;
STRAP_TESTMODE2           : in       bit;
STRAP_TESTMODE3           : in       bit;
PEX_LANE_GOOD0            : out      bit;
PEX_LANE_GOOD1            : out      bit;
PEX_LANE_GOOD2            : out      bit;
PEX_LANE_GOOD3            : out      bit;
STRAP_PLL_BYPASS          : linkage  bit;
GPIO16                    : inout    bit;
STRAP_PROBE_MODE          : in       bit;
PEX_NT_RESET	          : out      bit;
EE_DI	                  : out      bit;
EE_CS	                  : inout    bit;
EE_SK	                  : out      bit;
EE_DO	                  : inout    bit;
PEX_PERST                 : linkage  bit;
PEX_INTA                  : out      bit;
STRAP_DEBUG_SEL0          : in       bit;
STRAP_NT_ENABLE           : in       bit;
PEX_PERp4                 : in       bit;
PEX_PERn4                 : in       bit;
PEX_PETp4                 : buffer   bit;
PEX_PETn4                 : buffer   bit;
PEX_PERp5                 : in       bit;
PEX_PERn5                 : in       bit;
PEX_PETp5                 : buffer   bit;
PEX_PETn5                 : buffer   bit;
ATB_1                     : linkage  bit;
REXT_B1                   : linkage  bit;
REXT_A1                   : linkage  bit;
PEX_PETn6                 : buffer   bit;
PEX_PETp6                 : buffer   bit;
PEX_PERn6                 : in       bit;
PEX_PERp6                 : in       bit;
PEX_PETn7                 : buffer   bit;
PEX_PETp7                 : buffer   bit;
PEX_PERn7                 : in       bit;
PEX_PERp7                 : in       bit;
I2C_ADDR2                 : in       bit;
I2C_ADDR1                 : in       bit;
I2C_ADDR0                 : in       bit;
PEX_LANE_GOOD4            : out      bit;
PEX_LANE_GOOD5            : out      bit;
PEX_LANE_GOOD6            : inout    bit;
PEX_LANE_GOOD7            : inout    bit;
I2C_SCL0                  : inout    bit;
I2C_SDA0                  : inout    bit;
I2C_SCL1                  : inout    bit;
I2C_SDA1                  : inout    bit;
JTAG_TRST                 : in       bit;
JTAG_TDI                  : in       bit;
JTAG_TDO                  : out      bit;
JTAG_TCK                  : in       bit;
JTAG_TMS                  : in       bit;
STRAP_RESERVED_16         : linkage  bit;
THERMAL_DIODEn            : linkage  bit;
THERMAL_DIODEp            : linkage  bit;
VDD10                     : linkage  bit_vector (0 to 15);
VDD25A                    : linkage  bit_vector (0 to 3);
VDD25                     : linkage  bit_vector (0 to 3);
VSS                       : linkage  bit_vector (0 to 46)
  );

   use STD_1149_1_2001.all;
   use STD_1149_6_2003.all;

   attribute COMPONENT_CONFORMANCE of sirius_top: entity is "STD_1149_1_2001";

   attribute PIN_MAP of sirius_top: entity is PHYSICAL_PIN_MAP;

     constant PEX_8609BA: PIN_MAP_STRING :=

"GPIO29		          : D3 ," &
"PEX_REFCLK_CFCp	  : B7 ," &
"PEX_REFCLK_CFCn	  : A7 ," &
"ATB_1	                  : C7 ," &
"STRAP_PORTCFG0           : A1 ," &
"STRAP_PORTCFG1           : B2 ," &
"FATAL_ERR	          : B13 ," &
"GPIO30                   : A2 ," &
"GPIO0                    : D2 ," &
"STRAP_FAST_BRINGUP       : C3 ," &
"STRAP_SERDES_MODE_EN     : C4 ," &
"GPIO1	                  : D1 ," &
"GPIO2	                  : E3 ," &
"GPIO3	                  : E2 ," &
"GPIO4	                  : E1 ," &
"GPIO5	                  : F2 ," &
"STRAP_UPSTRM_PORTSEL0    : F3 ," &	
"STRAP_UPSTRM_PORTSEL1    : F1 ," &	
"STRAP_UPSTRM_PORTSEL2    : H2 ," &
"STRAP_UPSTRM_PORTSEL3    : G2 ," &	
"STRAP_RESERVED_17        : F4 ," &
"STRAP_NT_UPSTRM_PORTSEL0 : J3 ," &
"STRAP_NT_UPSTRM_PORTSEL1 : J2 ," &		
"STRAP_NT_UPSTRM_PORTSEL2 : K3 ," &
"GPIO6                    : J4 ," &
"GPIO7                    : J1 ," &
"GPIO8                    : H1 ," &
"GPIO9                    : K1 ," &
"SPARE0                   : K2 ," &
"STRAP_NT_UPSTRM_PORTSEL3 : M3 ," &
"SPARE1                   : L2 ," &
"STRAP_NT_P2P_EN_n                   : G1 ," &
"STRAP_SMBUS_EN_n                   : L1 ," &
"STRAP_UPCFG_TIMER_EN_n                   : C1 ," &
"STRAP_SSC_ISO_ENABLE     : M4 ," &
"GPIO10                   : M1 ," &
"GPIO11                   : P2 ," &
"GPIO12                   : P1 ," &
"GPIO13                   : L3 ," &
"GPIO14                   : M2 ," &
"GPIO15                   : N2 ," &
"PEX_PERp0                : P3 ," &
"PEX_PERn0                : N3 ," &
"PEX_PETp0                : P4 ," &
"PEX_PETn0                : N4 ," &
"PEX_PERp1                : P5 ," &
"PEX_PERn1                : N5 ," &
"PEX_PETp1                : P6 ," &
"PEX_PETn1                : N6 ," &
"PEX_REFCLKp              : N8  ," &
"PEX_REFCLKn              : P8  ," &
"ATB_0                    : M8  ," &
"REXT_B0                  : N7  ," &
"REXT_A0                  : P7  ," &
"PEX_PETn2                : N9  ," &
"PEX_PETp2                : P9  ," &
"PEX_PERn2                : N10 ," &
"PEX_PERp2                : P10 ," &
"PEX_PETn3                : N11 ," &
"PEX_PETp3                : P11 ," &
"PEX_PERn3                : N12 ," &
"PEX_PERp3                : P12 ," &
"STRAP_TESTMODE0          : P13 ," &
"STRAP_TESTMODE1          : N14 ," &
"STRAP_TESTMODE2          : M14 ," &
"STRAP_TESTMODE3          : N13 ," &
"PEX_LANE_GOOD0           : P14 ," &
"PEX_LANE_GOOD1           : M13 ," &
"PEX_LANE_GOOD2           : L14 ," &
"PEX_LANE_GOOD3           : L12 ," &
"STRAP_PLL_BYPASS         : M12 ," &
"GPIO16                   : K12 ," &
"STRAP_PROBE_MODE         : K13 ," &
"PEX_NT_RESET             : L13 ," &
"EE_DI                    : K14 ," &
"EE_CS                    : J13 ," &
"EE_SK                    : J14 ," &
"EE_DO                    : H14 ," &
"PEX_PERST                : H13 ," &
"PEX_INTA                 : J12 ," &
"STRAP_DEBUG_SEL0         : J11 ," &
"STRAP_NT_ENABLE          : H12 ," &
"PEX_PERp4                : A12 ," &
"PEX_PERn4                : B12 ," &
"PEX_PETp4                : A11 ," &
"PEX_PETn4                : B11 ," &
"PEX_PERp5                : A10 ," &
"PEX_PERn5                : B10 ," &
"PEX_PETp5                : A9  ," &
"PEX_PETn5                : B9  ," &
"REXT_B1                  : A8  ," &
"REXT_A1                  : B8  ," &
"PEX_PETn6                : B6  ," &
"PEX_PETp6                : A6  ," &
"PEX_PERn6                : B5  ," &
"PEX_PERp6                : A5  ," &
"PEX_PETn7                : B4  ," &
"PEX_PETp7                : A4  ," &
"PEX_PERn7                : B3  ," &
"PEX_PERp7                : A3  ," &
"I2C_ADDR2                : G14 ," &
"I2C_ADDR1                : F11 ," &
"I2C_ADDR0                : G13 ," &
"PEX_LANE_GOOD4           : B1  ," &
"PEX_LANE_GOOD5           : B14 ," &
"PEX_LANE_GOOD6           : A14 ," &
"PEX_LANE_GOOD7           : C2  ," &
"I2C_SCL0                 : F14 ," &
"I2C_SDA0                 : F12 ," &
"I2C_SCL1                 : F13 ," &
"I2C_SDA1                 : E14 ," &
"SHPC_INTn_P                : C14 ," &
"JTAG_TRST                : C13 ," &
"JTAG_TDI                 : D12 ," &
"JTAG_TDO                 : E12 ," &
"JTAG_TCK                 : E13 ," &
"JTAG_TMS                 : D14 ," &
"STRAP_RESERVED_16        : D13 ," & 
"THERMAL_DIODEn           : C12 ," &
"THERMAL_DIODEp           : A13 ," &
"VDD10                    : ( D5, D6, D9, D10, E4, E11, G4, G11, H4, " &
                              "H11, K4, K11, L5, L6, L9, L10 ), " &
"VDD25A                   : ( C8, G3, G12, M7), " &
"VDD25                    : ( D11, D4, L4, L11), " &
"VSS                      : ( C5, C6, C9, C10, C11, E5, E6, E7, " &
                              "E8, E9, E10, F5, F6, F7, F8, F9, " &
                              "F10, G5, G6, G7, G8, G9, G10, H3, " &
                              "H5, H6, H7, H8, H9, H10, J5, J6, " &
                              "J7, J8, J9, J10, K5, K6, K7, K8, " &
                              "K9, K10, M5, M6, M9, M10, M11 ) " ;
-- This section specifies the differential IO port groupings.

   attribute PORT_GROUPING of sirius_top: entity is
      "Differential_Voltage ( (PEX_PERp0, PEX_PERn0)," &
                             "(PEX_PERp1, PEX_PERn1)," &
                             "(PEX_PERp2, PEX_PERn2)," &
                             "(PEX_PERp3, PEX_PERn3)," &
                             "(PEX_PERp4, PEX_PERn4)," &
                             "(PEX_PERp5,PEX_PERn5)," &
                             "(PEX_PERp6,PEX_PERn6)," &
                             "(PEX_PERp7,PEX_PERn7)," &
                             "(PEX_PETp0,PEX_PETn0)," &
                             "(PEX_PETp1,PEX_PETn1)," &
                             "(PEX_PETp2,PEX_PETn2)," &
                             "(PEX_PETp3,PEX_PETn3)," &
                             "(PEX_PETp4,PEX_PETn4)," &
                             "(PEX_PETp5,PEX_PETn5)," &
                             "(PEX_PETp6,PEX_PETn6)," &
                             "(PEX_PETp7,PEX_PETn7))";
-- This section specifies the TAP ports. For the TAP TCK port, the parameters in
-- the brackets are:
--        First Field : Maximum  TCK frequency.
--        Second Field: Allowable states TCK may be stopped in.

   attribute TAP_SCAN_CLOCK of JTAG_TCK  : signal is (20.0e6, BOTH);
   attribute TAP_SCAN_IN    of JTAG_TDI  : signal is true;
   attribute TAP_SCAN_MODE  of JTAG_TMS  : signal is true;
   attribute TAP_SCAN_OUT   of JTAG_TDO  : signal is true;
   attribute TAP_SCAN_RESET of JTAG_TRST: signal is true;

-- Specifies the compliance enable patterns for the design. It lists a set of
-- design ports and the values that they should be set to, in order to enable
-- compliance to IEEE Std 1149.1

   attribute COMPLIANCE_PATTERNS of sirius_top: entity is
        "(  STRAP_RESERVED_17 ) (1)";
-- Specifies the number of bits in the instruction register.

   attribute INSTRUCTION_LENGTH of sirius_top: entity is 29;

   attribute INSTRUCTION_OPCODE of sirius_top: entity is
     "BYPASS           (11111111111111111111111111111)," &
     "EXTEST           (11111111111111111111111101000)," &
     "SAMPLE           (11111111111111111111111111000)," &
     "PRELOAD          (11111111111111111111111111000)," &
     "EXTEST_PULSE     (11111111101111111111111101000)," &
     "EXTEST_TRAIN     (11111110100111111111111101000)," &
     "CLAMP            (11111111111111111111111101111)," &
     "IDCODE           (11111111111111111111111111110)";

-- Specifies the bit pattern that is loaded into the instruction register when
-- the TAP controller passes through the Capture-IR state. The standard mandates
-- that the two LSBs must be "01". The remaining bits are design specific.

   attribute INSTRUCTION_CAPTURE of sirius_top: entity is "00000000000000000000000000001";

-- Specifies the bit pattern that is loaded into the DEVICE_ID register during
-- the IDCODE instruction when the TAP controller passes through the Capture-DR
-- state.

   attribute IDCODE_REGISTER of sirius_top: entity is
     "0000" &
 -- 4-bit version number
     "1000011000001001" &
 -- 16-bit part number
     "00111001101" &
 -- 11-bit identity of the manufacturer
     "1";
 -- Required by IEEE Std 1149.1

-- This section specifies the test data register placed between TDI and TDO for
-- each implemented instruction.

   attribute REGISTER_ACCESS of sirius_top: entity is
        "BYPASS    (BYPASS, CLAMP)," &
        "BOUNDARY  (EXTEST, SAMPLE, PRELOAD)," &
        "DEVICE_ID (IDCODE)," &
        "BOUNDARY  (EXTEST_PULSE, EXTEST_TRAIN)";

-- Specifies the length of the boundary scan register.

   attribute BOUNDARY_LENGTH of sirius_top: entity is 284;

-- The following list specifies the characteristics of each cell in the boundary
-- scan register from TDI to TDO. The following is a description of the label
-- fields:


   attribute BOUNDARY_REGISTER of sirius_top: entity is

     "283 (BC_0,  *, internal, X) , " &              
     "282 (BC_0,  *, internal, X) , " &                      
     "281 (BC_0,  *, internal, X) , " &                      
     "280 (BC_0,  *, internal, X) , " &                      
     "279 (BC_1,  SHPC_INTn_P, input, X ) , " &
     "278 (BC_0 , FATAL_ERR , output3 , X , 277 , 1 , Z ) , " &
     "277 (BC_0 , * , control , 1 ) , " &
     "276 (BC_0,  PEX_LANE_GOOD5, output3 , X , 275 , 1 , Z ) , " &
     "275 (BC_0 , * , control , 1 ) , " &
     "274 (BC_1,  PEX_LANE_GOOD6, input , X ) , " &
     "273 (BC_0,  PEX_LANE_GOOD6, output3 , X , 272 , 1 , Z ) , " &
     "272 (BC_0 , * , control , 1 ) , " &
     "271 (BC_1,  *, internal, X) , " &
     "270 (AC_SELU , *            , internal      , 0 ) , " & 
     "269 (AC_1    , PEX_PETp4 , output2       , X ) , " &
     "268 (BC_4,  PEX_PERp4, observe_only, X) , " &
     "267 (BC_4,  PEX_PERn4, observe_only, X) , " &
     "266 (BC_1,  *, internal, X) , " &
     "265 (AC_SELU , *            , internal      , 0 ) , " & 
     "264 (AC_1    , PEX_PETp5 , output2       , X ) , " &
     "263 (BC_4,  PEX_PERp5, observe_only, X) , " &
     "262 (BC_4,  PEX_PERn5, observe_only, X) , " &
     "261 (BC_4,  PEX_PERn6, observe_only, X) , " &
     "260 (BC_4,  PEX_PERp6, observe_only, X) , " &
     "259 (AC_SELU , *            , internal      , 0 ) , " & 
     "258 (AC_1    , PEX_PETp6 , output2       , X ) , " &
     "257 (BC_1,  *, internal, X) , " &
     "256 (BC_4,  PEX_PERn7, observe_only, X) , " &
     "255 (BC_4,  PEX_PERp7, observe_only, X) , " &
     "254 (AC_SELU , *            , internal      , 0 ) , " & 
     "253 (AC_1    , PEX_PETp7 , output2       , X ) , " &
     "252 (BC_1,  *, internal, X) , " &
     "251 (BC_1,  STRAP_PORTCFG0, input, X ) , " &
     "250 (BC_1,  STRAP_PORTCFG1, input, X ) , " &
     "249 (BC_0,  *, internal, X) , " &              
     "248 (BC_0,  PEX_LANE_GOOD4, output3 , X , 247 , 1 , Z ) , " &
     "247 (BC_0 , * , control , 1 ) , " &
     "246 (BC_0,  *, internal, X) , " &                      
     "245 (BC_0,  *, internal, X) , " &                      
     "244 (BC_0,  *, internal, X) , " &                      
     "243 (BC_0,  *, internal, X) , " &                      
     "242 (BC_0,  *, internal, X) , " &                      
     "241 (BC_0,  *, internal, X) , " &                      
     "240 (BC_0,  *, internal, X) , " &                      
     "239 (BC_0,  *, internal, X) , " &                      
     "238 (BC_0,  *, internal, X) , " &                      
     "237 (BC_1,  GPIO29, input , X ) , " &
     "236 (BC_0,  GPIO29, output3 , X , 235 , 1 , Z ) , " &
     "235 (BC_0 , * , control , 1 ) , " &
     "234 (BC_1,  GPIO30, input , X ) , " &
     "233 (BC_0,  GPIO30, output3 , X , 232 , 1 , Z ) , " &
     "232 (BC_0 , * , control , 1 ) , " &
     "231 (BC_1,  STRAP_FAST_BRINGUP, input, X) , " & 
     "230 (BC_1,  PEX_LANE_GOOD7, input , X ) , " &
     "229 (BC_0,  PEX_LANE_GOOD7, output3 , X , 228 , 1 , Z ) , " &
     "228 (BC_0 , * , control , 1 ) , " &
     "227 (BC_1,  STRAP_SERDES_MODE_EN, input, X) , " & 
     "226 (BC_0,  *, internal, X) , " &                      
     "225 (BC_0,  *, internal, X) , " &                      
     "224 (BC_0,  *, internal, X) , " &                      
     "223 (BC_1,  GPIO0, input , X ) , " &
     "222 (BC_0,  GPIO0, output3 , X , 221 , 1 , Z ) , " &
     "221 (BC_0 , * , control , 1 ) , " &
     "220 (BC_1,  GPIO1, input , X ) , " &
     "219 (BC_0,  GPIO1, output3 , X , 218 , 1 , Z ) , " &
     "218 (BC_0 , * , control , 1 ) , " &
     "217 (BC_1,  GPIO2, input , X ) , " &
     "216 (BC_0,  GPIO2, output3 , X , 215 , 1 , Z ) , " &
     "215 (BC_0 , * , control , 1 ) , " &
     "214 (BC_1,  GPIO3, input , X ) , " &
     "213 (BC_0,  GPIO3, output3 , X , 212 , 1 , Z ) , " &
     "212 (BC_0 , * , control , 1 ) , " &
     "211 (BC_1,  GPIO4, input , X ) , " &
     "210 (BC_0,  GPIO4, output3 , X , 209 , 1 , Z ) , " &
     "209 (BC_0 , * , control , 1 ) , " &
     "208 (BC_1,  GPIO5, input , X ) , " &
     "207 (BC_0,  GPIO5, output3 , X , 206 , 1 , Z ) , " &
     "206 (BC_0 , * , control , 1 ) , " &
     "205 (BC_1,  STRAP_UPSTRM_PORTSEL0, input, X) , " & 
     "204 (BC_1,  STRAP_UPSTRM_PORTSEL1, input, X) , " & 
     "203 (BC_1,  STRAP_UPSTRM_PORTSEL2, input, X) , " & 
     "202 (BC_1,  STRAP_UPSTRM_PORTSEL3, input, X) , " & 
     "201 (BC_1,  *, internal, X) , " &
     "200 (BC_0,  *, internal, X) , " &                                                      
     "199 (BC_0,  *, internal, X) , " &                                                      
     "198 (BC_0,  *, internal, X) , " &                                                      
     "197 (BC_0,  *, internal, X) , " &                                                      
     "196 (BC_1,  *, internal, X) , " &
     "195 (BC_0,  *, internal, X) , " &                                                      
     "194 (BC_0,  *, internal, X) , " &                                                      
     "193 (BC_0,  *, internal, X) , " &                                                      
     "192 (BC_0,  *, internal, X) , " &                                                      
     "191 (BC_0,  *, internal, X) , " &                                                      
     "190 (BC_0,  *, internal, X) , " &                                                      
     "189 (BC_0,  *, internal, X) , " &                                                      
     "188 (BC_0,  *, internal, X) , " &                                                      
     "187 (BC_1,  *, internal, X) , " &
     "186 (BC_0,  *, internal, X) , " &                                                      
     "185 (BC_0,  *, internal, X) , " &                                                      
     "184 (BC_0,  *, internal, X) , " &                                                      
     "183 (BC_0,  *, internal, X) , " &                                                      
     "182 (BC_1,  *, internal, X) , " &
     "181 (BC_1,  STRAP_NT_UPSTRM_PORTSEL0, input, X) , " &
     "180 (BC_1,  STRAP_NT_UPSTRM_PORTSEL1, input, X) , " &
     "179 (BC_1,  STRAP_NT_UPSTRM_PORTSEL2, input, X) , " &
     "178 (BC_0,  *, internal, X) , " &                                 
     "177 (BC_0,  *, internal, X) , " &                                 
     "176 (BC_0,  *, internal, X) , " &                                 
     "175 (BC_0,  *, internal, X) , " &                                 
     "174 (BC_0,  *, internal, X) , " &                                 
     "173 (BC_0,  *, internal, X) , " &                                 
     "172 (BC_0,  *, internal, X) , " &                                 
     "171 (BC_0,  *, internal, X) , " &  
     "170 (BC_1,  GPIO6, input , X ) , " &
     "169 (BC_0,  GPIO6, output3 , X , 168 , 1 , Z ) , " &
     "168 (BC_0 , * , control , 1 ) , " &
     "167 (BC_1,  GPIO7, input , X ) , " &
     "166 (BC_0,  GPIO7, output3 , X , 165 , 1 , Z ) , " &
     "165 (BC_0 , * , control , 1 ) , " &
     "164 (BC_1,  GPIO8, input , X ) , " &
     "163 (BC_0,  GPIO8, output3 , X , 162 , 1 , Z ) , " &
     "162 (BC_0 , * , control , 1 ) , " &
     "161 (BC_1,  GPIO9, input , X ) , " &
     "160 (BC_0,  GPIO9, output3 , X , 159 , 1 , Z ) , " &
     "159 (BC_0 , * , control , 1 ) , " &
     "158 (BC_1,  SPARE0, input , X ) , " &
     "157 (BC_0,  SPARE0, output3 , X , 156 , 1 , Z ) , " &
     "156 (BC_0 , * , control , 1 ) , " &
     "155 (BC_1,  STRAP_NT_UPSTRM_PORTSEL3, input, X) , " &
     "154 (BC_1,  SPARE1, input , X ) , " &
     "153 (BC_0,  SPARE1, output3 , X , 152 , 1 , Z ) , " &
     "152 (BC_0 , * , control , 1 ) , " &
     "151 (BC_1,  STRAP_NT_P2P_EN_n, input , X ) , " &
     "150 (BC_0,  STRAP_NT_P2P_EN_n, output3 , X , 149 , 1 , Z ) , " &
     "149 (BC_0 , * , control , 1 ) , " &
     "148 (BC_1,  STRAP_SMBUS_EN_n, input , X ) , " &
     "147 (BC_0,  STRAP_SMBUS_EN_n, output3 , X , 146 , 1 , Z ) , " &
     "146 (BC_0 , * , control , 1 ) , " &
     "145 (BC_1,  STRAP_UPCFG_TIMER_EN_n, input , X ) , " &
     "144 (BC_0,  STRAP_UPCFG_TIMER_EN_n, output3 , X , 143 , 1 , Z ) , " &
     "143 (BC_0 , * , control , 1 ) , " &
     "142 (BC_0,  *, internal, X) , " &
     "141 (BC_0,  *, internal, X) , " &
     "140 (BC_0,  *, internal, X) , " &
     "139 (BC_0,  *, internal, X) , " &
     "138 (BC_0 , *, internal, X ) , " &
     "137 (BC_1,  STRAP_SSC_ISO_ENABLE, input, X) , " & 
     "136 (BC_1,  GPIO10, input , X ) , " &
     "135 (BC_0,  GPIO10, output3 , X , 134 , 1 , Z ) , " &
     "134 (BC_0 , * , control , 1 ) , " &
     "133 (BC_1,  GPIO11, input , X ) , " &
     "132 (BC_0,  GPIO11, output3 , X , 131 , 1 , Z ) , " &
     "131 (BC_0 , * , control , 1 ) , " &
     "130 (BC_1,  GPIO12, input , X ) , " &
     "129 (BC_0,  GPIO12, output3 , X , 128 , 1 , Z ) , " &
     "128 (BC_0 , * , control , 1 ) , " &
     "127 (BC_1,  GPIO13, input , X ) , " &
     "126 (BC_0,  GPIO13, output3 , X , 125 , 1 , Z ) , " &
     "125 (BC_0 , * , control , 1 ) , " &
     "124 (BC_1,  GPIO14, input , X ) , " &
     "123 (BC_0,  GPIO14, output3 , X , 122 , 1 , Z ) , " &
     "122 (BC_0 , * , control , 1 ) , " &
     "121 (BC_1,  GPIO15, input , X ) , " &
     "120 (BC_0,  GPIO15, output3 , X , 119 , 1 , Z ) , " &
     "119 (BC_0 , * , control , 1 ) , " &
     "118 (BC_1,  *, internal, X) , " &
     "117 (AC_SELU , *            , internal      , 0 ) , " & 
     "116 (AC_1    , PEX_PETp0 , output2       , X ) , " &
     "115 (BC_4,  PEX_PERp0, observe_only, X) , " &
     "114 (BC_4,  PEX_PERn0, observe_only, X) , " &
     "113 (BC_1,  *, internal, X) , " &
     "112 (AC_SELU , *            , internal      , 0 ) , " & 
     "111 (AC_1    , PEX_PETp1 , output2       , X ) , " &
     "110 (BC_4,  PEX_PERp1, observe_only, X) , " &
     "109 (BC_4,  PEX_PERn1, observe_only, X) , " &
     "108 (BC_4,  PEX_PERn2, observe_only, X) , " &
     "107 (BC_4,  PEX_PERp2, observe_only, X) , " &
     "106 (AC_SELU , *            , internal      , 0 ) , " & 
     "105 (AC_1    , PEX_PETp2 , output2       , X ) , " &
     "104 (BC_1,  *, internal, X) , " &
     "103 (BC_4,  PEX_PERn3, observe_only, X) , " &
     "102 (BC_4,  PEX_PERp3, observe_only, X) , " &
     "101 (AC_SELU , *            , internal      , 0 ) , " & 
     "100 (AC_1    , PEX_PETp3 , output2       , X ) , " &
     " 99 (BC_1,  *, internal, X) , " &
     " 98 (BC_1,  STRAP_TESTMODE0, input, X) , " & 
     " 97 (BC_1,  STRAP_TESTMODE1, input, X) , " & 
     " 96 (BC_1,  STRAP_TESTMODE2, input, X) , " & 
     " 95 (BC_1,  STRAP_TESTMODE3, input, X) , " & 
     " 94 (BC_0,  PEX_LANE_GOOD0, output3 , X , 93 , 1 , Z ) , " &
     " 93 (BC_0 , * , control , 1 ) , " &
     " 92 (BC_0,  PEX_LANE_GOOD1, output3 , X , 91 , 1 , Z ) , " &
     " 91 (BC_0 , * , control , 1 ) , " &
     " 90 (BC_0,  PEX_LANE_GOOD2, output3 , X , 89 , 1 , Z ) , " &
     " 89 (BC_0 , * , control , 1 ) , " &
     " 88 (BC_0,  PEX_LANE_GOOD3, output3 , X , 87 , 1 , Z ) , " &
     " 87 (BC_0 , * , control , 1 ) , " &             
     " 86 (BC_0,  *, internal, X) , " &                      
     " 85 (BC_0,  *, internal, X) , " &                      
     " 84 (BC_0,  *, internal, X) , " &                      
     " 83 (BC_0,  *, internal, X) , " &                      
     " 82 (BC_0,  *, internal, X) , " &                      
     " 81 (BC_0,  *, internal, X) , " &              
     " 80 (BC_0,  *, internal, X) , " &                      
     " 79 (BC_0,  *, internal, X) , " &                      
     " 78 (BC_0,  *, internal, X) , " &              
     " 77 (BC_1,  GPIO16, input , X ) , " &
     " 76 (BC_0,  GPIO16, output3 , X , 75 , 1 , Z ) , " &
     " 75 (BC_0 , * , control , 1 ) , " &
     " 74 (BC_0,  *, internal, X) , " &                      
     " 73 (BC_0,  *, internal, X) , " &                      
     " 72 (BC_0,  *, internal, X) , " &              
     " 71 (BC_0,  *, internal, X) , " &                      
     " 70 (BC_0,  *, internal, X) , " &                      
     " 69 (BC_0,  *, internal, X) , " &              
     " 68 (BC_0,  *, internal, X) , " &                      
     " 67 (BC_0,  *, internal, X) , " &                      
     " 66 (BC_0,  *, internal, X) , " &              
     " 65 (BC_1,  STRAP_PROBE_MODE, input, X) , " & 
     " 64 (BC_1,  PEX_NT_RESET, output3 , X , 63 , 1 , Z ) , " &
     " 63 (BC_0 , * , control , 1 ) , " &
     " 62 (BC_0 , EE_DI, output3 , X , 61 , 1 , Z ) , " &
     " 61 (BC_0 , * , control , 1 ) , " &
     " 60 (BC_1 , EE_CS, input , X ) , " &
     " 59 (BC_0 , EE_CS, output3 , X , 58 , 1 , Z ) , " &
     " 58 (BC_0 , * , control , 1 ) , " &
     " 57 (BC_0 , EE_SK, output3 , X , 56 , 1 , Z ) , " &
     " 56 (BC_0 , * , control , 1 ) , " &
     " 55 (BC_1 , EE_DO, input , X ) , " &
     " 54 (BC_0 , EE_DO, output3 , X , 53 , 1 , Z ) , " &
     " 53 (BC_0 , * , control , 1 ) , " &
     " 52 (BC_0,  PEX_INTA, output3 , X , 51 , 1 , Z ) , " &
     " 51 (BC_0 , * , control , 1 ) , " &
     " 50 (BC_1,  STRAP_DEBUG_SEL0, input, X) , " & 
     " 49 (BC_1,  STRAP_NT_ENABLE, input, X) , " &
     " 48 (BC_1,  *, internal, X) , " &
     " 47 (BC_0,  *, internal, X) , " &                                                      
     " 46 (BC_0,  *, internal, X) , " &                                                      
     " 45 (BC_0,  *, internal, X) , " &                                                      
     " 44 (BC_0,  *, internal, X) , " &                                                      
     " 43 (BC_1,  *, internal, X) , " &
     " 42 (BC_0,  *, internal, X) , " &                                                      
     " 41 (BC_0,  *, internal, X) , " &                                                      
     " 40 (BC_0,  *, internal, X) , " &                                                      
     " 39 (BC_0,  *, internal, X) , " &                                                      
     " 38 (BC_0,  *, internal, X) , " &                                                      
     " 37 (BC_0,  *, internal, X) , " &                                                      
     " 36 (BC_0,  *, internal, X) , " &                                                      
     " 35 (BC_0,  *, internal, X) , " &                                                      
     " 34 (BC_1,  *, internal, X) , " &
     " 33 (BC_0,  *, internal, X) , " &                                                      
     " 32 (BC_0,  *, internal, X) , " &                                                      
     " 31 (BC_0,  *, internal, X) , " &                                                      
     " 30 (BC_0,  *, internal, X) , " &                                                      
     " 29 (BC_1,  *, internal, X) , " &
     " 28 (BC_1,  I2C_ADDR2, input, X) , " & 
     " 27 (BC_1,  I2C_ADDR1, input, X) , " & 
     " 26 (BC_1,  I2C_ADDR0, input, X) , " & 
     " 25 (BC_0,  *, internal, X) , " &                                 
     " 24 (BC_0,  *, internal, X) , " &                                 
     " 23 (BC_0,  *, internal, X) , " &                                 
     " 22 (BC_0,  *, internal, X) , " &                                 
     " 21 (BC_0,  *, internal, X) , " &                                 
     " 20 (BC_0,  *, internal, X) , " &                                 
     " 19 (BC_0,  *, internal, X) , " &                                 
     " 18 (BC_0,  *, internal, X) , " &                                 
     " 17 (BC_1, I2C_SCL0 , input , X ) , " &
     " 16 (BC_0,  I2C_SCL0, output3 , X , 15 , 1 , Z ) , " &
     " 15 (BC_0, * , control , 1 ) , " &
     " 14 (BC_1, I2C_SDA0 , input , X ) , " &
     " 13 (BC_0,  I2C_SDA0, output3 , X , 12 , 1 , Z ) , " &
     " 12 (BC_0, * , control , 1 ) , " &
     " 11 (BC_1, I2C_SCL1 , input , X ) , " &
     " 10 (BC_0,  I2C_SCL1, output3 , X , 9 , 1 , Z ) , " &
     "  9 (BC_0, * , control , 1 ) , " &
     "  8 (BC_1, I2C_SDA1 , input , X ) , " &
     "  7 (BC_0,  I2C_SDA1, output3 , X , 6 , 1 , Z ) , " &
     "  6 (BC_0, * , control , 1 ) , " &
     "  5 (BC_0,  *, internal, X) , " &                      
     "  4 (BC_0,  *, internal, X) , " &                      
     "  3 (BC_0,  *, internal, X) , " &                      
     "  2 (BC_0,  *, internal, X) , " &                      
     "  1 (BC_0,  *, internal, X) , " &                      
     "  0 (BC_0,  *, internal, X) ";                      
attribute AIO_COMPONENT_CONFORMANCE of sirius_top: entity is "STD_1149_6_2003";

attribute AIO_Pin_BEHAVIOR of sirius_top : entity is
     "PEX_PERp0[115], " &
     "PEX_PERp1[110], " &
     "PEX_PERp2[107], " &
     "PEX_PERp3[102], " &
     "PEX_PERp4[268], " &
     "PEX_PERp5[263], " &
     "PEX_PERp6[260], " &
     "PEX_PERp7[255], " &
     "PEX_PETp0: AC_Select=117; " &
     "PEX_PETp1: AC_Select=112; " &
     "PEX_PETp2: AC_Select=106; " &
     "PEX_PETp3: AC_Select=101; " &
     "PEX_PETp4: AC_Select=270; " &
     "PEX_PETp5: AC_Select=265; " &
     "PEX_PETp6: AC_Select=259; " &
     "PEX_PETp7: AC_Select=254 " ;

 end sirius_top;