--------------------------------------------------------------------------
--------------------------------------------------------------------------
-- Boundary Scan Descriptor Language (BSDL) for:
--
-- PPC750CL
--
--08/03/07 BSDL file updated w/corrected syntax,
--12/14/06 header edited for compliance to IBM Legal standards
---------------------------------------------------------------------------
--
-- Copyright International Business Machines Corporation 2007
-- All Rights Reserved.
--
-- Printed in the United States of America August, 2007.
-- The following are trademarks of International Business Machines Corporation
-- in the United States, or other countries, or both:
-- IBM IBM logo
-- PowerPC Logo PowerPC
-- PowerPC 750CL ibm.com
--
-- Other company, product and service names may be trademarks or service
-- marks of others.
--
-- All information contained in this document is subject to change without
-- notice. The products described in this document are NOT intended for
-- use in applications such as implantation, life support, or other
-- hazardous uses where malfunction could result in death, bodily injury,
-- or catastrophic property damage. The information contained in this
-- document does not affect or change IBM product specifications
-- or warranties. Nothing in this document shall operate as an express
-- or implied license or indemnity under the intellectual property rights
-- of IBM or third parties. All information contained in this document was
-- obtained in specific environments, and is presented as an illustration.
-- The results obtained in other operating environments may vary.
--
-- THIS INFORMATION IS PROVIDED ON AN "AS IS" BASIS. In no event will IBM
-- be liable for damages arising directly or indirectly from any use of the
-- information contained in this document.
--
-- IBM Microelectronics Division
-- 2070 Route 52, Bldg 330
-- Hopewell Junction, NY 12533-6351
--
-- The IBM home page can be found at http://www.ibm.com
-- The IBM Microelectronics Division home page can be found at
-- http://www.ibm.com/chips
--
-- This information is for modeling purposes only, and is not guaranteed.
-- This Information may contain technical inaccuracies or typographical errors.
--
-- The receipt or possession of this file does not convey any rights to
-- reproduce or disclose its contents, or to manufacture, use or sell
-- anything that it may describe, in whole or in part, without specific
-- written consent of IBM CORPORATION. Any reproduction of this file without
-- the express written consent of IBM CORPORATION is a violation of the copy-
-- right laws and may subject you to civil liability and criminal prosecution.
--
--
-- Please direct all inquiries regarding this file to your local FAE
--
-- NOTE :
-- Compliance attribute must be chosen for setup
-- The appropriate PVR must be entered. This file is applicable for both
-- DD1.3 & DD2.0 design revisions.
entity top_750cl is
generic (PHYSICAL_PIN_MAP : string := "CBGA292");
port (
agnd: linkage bit;
avdd: linkage bit;
gnd: linkage bit_vector (0 to 59);
vdd: linkage bit_vector (0 to 31);
ovdd: linkage bit_vector (0 to 31);
BVSEL: in bit;
EFUSE: in bit;
L1_TSTCLK: in bit;
L2_TSTCLK: in bit;
LSSD_MODE_N: in bit;
SYSCLK: in bit;
SYSCLK_B: in bit;
TCK: in bit;
TDI: in bit;
THRMD1: in bit;
TMS: in bit;
TRST_N: in bit;
A: inout bit_vector(0 to 31);
AACK_N: inout bit;
ABB_N: inout bit;
ARTRY_N: inout bit;
BG_N: inout bit;
BR_N: out bit;
CHECKSTOP_N: out bit;
CI_N: out bit;
CKSTP_N: in bit;
CLK_OUT: out bit;
DBB_N: inout bit;
DBG_N: in bit;
DBWO_N: in bit;
DH: inout bit_vector(0 to 31);
DL: inout bit_vector(0 to 31);
DRTRY_N: in bit;
GBL_N: inout bit;
HRESET_N: in bit;
INT_N: inout bit;
KGND: out bit;
KVDD: out bit;
MCP_N: in bit;
PLL_CFG: in bit_vector(0 to 4);
QACK_N: in bit;
QREQ_N: out bit;
SMI_N: in bit;
SRESET_N: inout bit;
TA_N: in bit;
TBST_N: inout bit;
TDO: out bit;
TEA_N: in bit;
THRMD2: out bit;
TLBISYNC_N: in bit;
TSIZ: out bit_vector(0 to 2);
TS_N: inout bit;
TT: inout bit_vector(0 to 4);
WT_N: out bit);
use STD_1149_1_2001.all;
attribute COMPONENT_CONFORMANCE of top_750cl:
entity is "STD_1149_1_1993";
attribute PIN_MAP of top_750cl : entity is PHYSICAL_PIN_MAP;
constant CBGA256:PIN_MAP_STRING:=
"AACK_N:A8 ," &
"ABB_N:Y6 ," &
"AGND:Y14 ," &
"ARTRY_N:W7 ," &
"AVDD:Y15 ," &
"efuse:Y16 ," &
"BG_N:W4 ," &
"BR_N:Y3 ," &
"BVSEL:W9 ," &
"CHECKSTOP_N:Y12 ," &
"CI_N:T4 ," &
"CKSTP_N:Y10 ," &
"DBB_N:U7 ," &
"DBG_N:Y5 ," &
"DBWO_N:A6 ," &
"DRTRY_N:W3 ," &
"GBL_N:W1 ," &
"HRESET_N:Y11 ," &
"INT_N:Y9 ," &
"KGND:Y1 ," &
"KVDD:Y2 ," &
"L1_TSTCLK:Y13 ," &
"L2_TSTCLK:W13 ," &
"LSSD_MODE_N:U13 ," &
"MCP_N:W12 ," &
"PLL_CFG:(Y18, W17, Y17, U16, W14) ," &
"QACK_N:Y8 ," &
"QREQ_N:U8 ,"&
"SMI_N:W10 ," &
"SRESET_N:Y7 ," &
"SYSCLK:W16 ," &
"SYSCLK_B:W15 ," &
"TA_N:A12 ," &
"TBST_N:A11 ," &
"TCK:T2 ," &
"TDI:V2 ," &
"TDO:W5 ," &
"TEA_N:W6 ," &
"THRMD1:M6 ," &
"THRMD2:J6 ," &
"TLBISYNC_N:W11 ," &
"TMS:V1 ," &
"TRST_N:U1 ," &
"TS_N:B15 ," &
"TSIZ:(A14, B12, B11) ," &
"TT:(D14, B17, B14, A15, B13) ," &
"WT_N:U5 ," &
"A : (E20 ," &
"E19," &
"D20," &
"C20," &
"D19," &
"C19," &
"A20," &
"E16," &
"B20," &
"E17," &
"B18," &
"A18," &
"A17," &
"A19," &
"A16," &
"B16," &
"B10," &
"B9 ," &
"A9," &
"B7," &
"A7," &
"D8," &
"A5," &
"B6," &
"D7," &
"D5," &
"B5," &
"B4," &
"A4," &
"A3," &
"B3," &
"E5)," &
"DL:(A2," &
"A1," &
"C2," &
"E4," &
"C1," &
"E2," &
"D2," &
"E1," &
"D1," &
"F1," &
"G2," &
"F2," &
"H2," &
"H4," &
"G1," &
"K2," &
"J2," &
"K1," &
"J1," &
"L2," &
"M2," &
"L1," &
"N2," &
"N4," &
"N1," &
"P1," &
"P4," &
"P2," &
"R2," &
"R1," &
"U2," &
"T1)," &
"CLK_OUT:T5," &
"DH:(W18,"&
"T17," &
"Y20," &
"Y19," &
"W20," &
"V19," &
"U19," &
"T16," &
"T19," &
"U20," &
"V20," &
"R19," &
"N17," &
"P17," &
"R20," &
"P20," &
"N20," &
"P19," &
"M20," &
"L20," &
"M19," &
"L19," &
"K20," &
"J19," &
"K19," &
"G20," &
"H20," &
"H17," &
"H19," &
"F19," &
"G17," &
"F20)," &
"GND:(B2," &
"B19," &
"C5," &
"C8," &
"C13," &
"C16," &
"D10," &
"D11," &
"E3," &
"E7," &
"E14," &
"E18," &
"F10," &
"F11," &
"G5," &
"G8," &
"G13," &
"G16," &
"H3," &
"H8," &
"H9," &
"H12," &
"H13," &
"H18," &
"J12," &
"K4," &
"K7," &
"K10," &
"K14," &
"K17," &
"L4," &
"L7," &
"L10," &
"L14," &
"L17," &
"M12," &
"N3," &
"N8," &
"N9," &
"N12," &
"N13," &
"N18," &
"P5," &
"P8," &
"P13," &
"P16," &
"R10," &
"R11," &
"T3," &
"T7," &
"T14," &
"T18," &
"U10," &
"U11," &
"V5," &
"V8," &
"V13," &
"V16," &
"W2," &
"W19)," &
"OVDD:(C4," &
"C14," &
"D3," &
"E10," &
"G3," &
"G14," &
"H5," &
"K5," &
"L5," &
"N5," &
"P3," &
"P14," &
"T10," &
"U3," &
"V4," &
"V14," &
"C7," &
"C17," &
"D18," &
"E11," &
"G7," &
"G18," &
"H16," &
"K16," &
"L16," &
"N16," &
"P7," &
"P18," &
"T11," &
"U18," &
"V7," &
"V17)," &
"VDD:(C10," &
"E8," &
"F6," &
"F12," &
"J8," &
"J13," &
"K8," &
"K13," &
"L3," &
"L11," &
"L18," &
"M9," &
"R6," &
"R12," &
"T8," &
"V10," &
"C11," &
"E13," &
"F9," &
"F15," &
"J9," &
"K3," &
"K11," &
"K18," &
"L8," &
"L13," &
"M8," &
"M13," &
"R9," &
"R15," &
"T13,"&
"V11) " ;
attribute TAP_SCAN_IN of TDI: signal is true;
attribute TAP_SCAN_MODE of TMS: signal is true;
attribute TAP_SCAN_OUT of TDO: signal is true;
attribute TAP_SCAN_CLOCK of TCK: signal is (20.0e6,LOW);
attribute TAP_SCAN_RESET of TRST_N: signal is true;
--- The below compliance attribute is for DD2.0 , 1.15 V
attribute COMPLIANCE_PATTERNS of top_750cl: entity is
"(BVSEL,L1_TSTCLK,L2_TSTCLK,LSSD_MODE_N)" &
"(X011)";
--- The below compliance attribute is for DD2.0 , 1.80 V
--- attribute COMPLIANCE_PATTERNS of top_750cl: entity is
--- "(BVSEL,L1_TSTCLK,L2_TSTCLK,LSSD_MODE_N)" &
--- "(X001)";
--- The below compliance attribute is for DD1.3 , 1.15 V
--- attribute COMPLIANCE_PATTERNS of top_750cl: entity is
--- "(BVSEL,L1_TSTCLK,L2_TSTCLK,LSSD_MODE_N)" &
--- "(X011)";
--- The below compliance attribute is for DD1.3 , 1.80 V
--- attribute COMPLIANCE_PATTERNS of top_750cl: entity is
--- "(BVSEL,L1_TSTCLK,L2_TSTCLK,LSSD_MODE_N)" &
--- "(X011)";
attribute INSTRUCTION_LENGTH of top_750cl: entity is 8;
-- attribute INSTRUCTION_OPCODE of top_750cl: entity is
-- "BYPASS (11111111)," &
-- "EXTEST (00000000)";
attribute INSTRUCTION_OPCODE of top_750cl: entity is
-- Standard instructions:
"EXTEST (00000000), "& -- Hex 00
"SAMPLE (11000000), "& -- Hex C0
"BYPASS (11111111), "& -- Hex FF
"HIGHZ (11110000), "& -- Hex F0
"CLAMP (11110001), "& -- Hex F1
-- Public instruction:
"READ_PVR (01111100)"; -- Hex 7C
attribute INSTRUCTION_CAPTURE of top_750cl: entity is "XXXXXX01";
-- AGP this section added
attribute REGISTER_ACCESS of top_750cl : entity is
"BYPASS(BYPASS), " &
"PVR[32](READ_PVR CAPTURES 00000000000010000111XXXXXXXXXXXX) ";
-- Capture Value = Hex"0008 7XXX" where XX = minor chip revision level
-- PVR for DD 1.3: 0008 71x3 , PVR for DD 2.0 � 0008 72x0
attribute BOUNDARY_LENGTH of top_750cl: entity is 169;
attribute BOUNDARY_REGISTER of top_750cl: entity is
"0 (BC_7,A(5),bidir,X,163,0,Z)," &
"1 (BC_7,A(6),bidir,X,163,0,Z)," &
"2 (BC_7,A(7),bidir,X,9,0,Z)," &
"3 (BC_7,A(8),bidir,X,163,0,Z)," &
"4 (BC_7,A(9),bidir,X,9,0,Z)," &
"5 (BC_7,A(10),bidir,X,163,0,Z)," &
"6 (BC_7,A(11),bidir,X,163,0,Z)," &
"7 (BC_7,A(12),bidir,X,9,0,Z)," &
"8 (BC_7,A(13),bidir,X,9,0,Z)," &
"9 (BC_1,*,control,0)," &
"10 (BC_7,A(14),bidir,X,15,0,Z)," &
"11 (BC_7,A(15),bidir,X,15,0,Z)," &
"12 (BC_7,TT(0),bidir,X,15,0,Z)," &
"13 (BC_7,TT(1),bidir,X,15,0,Z)," &
"14 (BC_7,TT(2),bidir,X,15,0,Z)," &
"15 (BC_1,*,control,0)," &
"16 (BC_1,*,control,0)," &
"17 (BC_7,TT(3),bidir,X,16,0,Z)," &
"18 (BC_1,*,control,0)," &
"19 (BC_7,TS_N,bidir,X,18,0,Z)," &
"20 (BC_7,TT(4),bidir,X,16,0,Z)," &
"21 (BC_1,TSIZ(0),output3,X,16,0,Z)," &
"22 (BC_1,TSIZ(1),output3,X,16,0,Z)," &
"23 (BC_1,TSIZ(2),output3,X,16,0,Z)," &
"24 (BC_1,*,control,0)," &
"25 (BC_1,TA_N,input,X)," &
"26 (BC_7,TBST_N,bidir,X,16,0,Z)," &
"27 (BC_7,AACK_N,bidir,X,24,0,Z)," &
"28 (BC_1,*,control,0)," &
"29 (BC_7,A(16),bidir,X,28,0,Z)," &
"30 (BC_7,A(17),bidir,X,28,0,Z)," &
"31 (BC_7,A(18),bidir,X,28,0,Z)," &
"32 (BC_7,A(19),bidir,X,28,0,Z)," &
"33 (BC_1,*,control,0)," &
"34 (BC_7,A(20),bidir,X,33,0,Z)," &
"35 (BC_7,A(21),bidir,X,36,0,Z)," &
"36 (BC_1,*,control,0)," &
"37 (BC_7,A(22),bidir,X,36,0,Z)," &
"38 (BC_1,DBWO_N,input,X)," &
"39 (BC_7,A(23),bidir,X,36,0,Z)," &
"40 (BC_7,A(24),bidir,X,33,0,Z)," &
"41 (BC_7,A(25),bidir,X,33,0,Z)," &
"42 (BC_7,A(26),bidir,X,36,0,Z)," &
"43 (BC_7,A(27),bidir,X,33,0,Z)," &
"44 (BC_7,A(28),bidir,X,36,0,Z)," &
"45 (BC_7,A(29),bidir,X,48,0,Z)," &
"46 (BC_7,A(30),bidir,X,48,0,Z)," &
"47 (BC_7,A(31),bidir,X,48,0,Z)," &
"48 (BC_1,*,control,0)," &
"49 (BC_7,DL(0),bidir,X,53,0,Z)," &
"50 (BC_7,DL(1),bidir,X,53,0,Z)," &
"51 (BC_7,DL(2),bidir,X,53,0,Z)," &
"52 (BC_7,DL(3),bidir,X,53,0,Z)," &
"53 (BC_1,*,control,0)," &
"54 (BC_7,DL(4),bidir,X,58,0,Z)," &
"55 (BC_7,DL(5),bidir,X,58,0,Z)," &
"56 (BC_7,DL(6),bidir,X,58,0,Z)," &
"57 (BC_7,DL(7),bidir,X,58,0,Z)," &
"58 (BC_1,*,control,0)," &
"59 (BC_7,DL(8),bidir,X,64,0,Z)," &
"60 (BC_7,DL(9),bidir,X,64,0,Z)," &
"61 (BC_7,DL(10),bidir,X,64,0,Z)," &
"62 (BC_7,DL(11),bidir,X,64,0,Z)," &
"63 (BC_7,DL(12),bidir,X,64,0,Z)," &
"64 (BC_1,*,control,0)," &
"65 (BC_1,*,control,0)," &
"66 (BC_7,DL(13),bidir,X,65,0,Z)," &
"67 (BC_7,DL(14),bidir,X,65,0,Z)," &
"68 (BC_7,DL(15),bidir,X,65,0,Z)," &
"69 (BC_7,DL(16),bidir,X,65,0,Z)," &
"70 (BC_7,DL(17),bidir,X,65,0,Z)," &
"71 (BC_1,*,control,0)," &
"72 (BC_7,DL(18),bidir,X,71,0,Z)," &
"73 (BC_7,DL(19),bidir,X,71,0,Z)," &
"74 (BC_7,DL(20),bidir,X,71,0,Z)," &
"75 (BC_7,DL(21),bidir,X,71,0,Z)," &
"76 (BC_7,DL(22),bidir,X,71,0,Z)," &
"77 (BC_1,*,control,0)," &
"78 (BC_7,DL(23),bidir,X,77,0,Z)," &
"79 (BC_7,DL(24),bidir,X,77,0,Z)," &
"80 (BC_7,DL(25),bidir,X,77,0,Z)," &
"81 (BC_1,*,control,0)," &
"82 (BC_7,DL(26),bidir,X,81,0,Z)," &
"83 (BC_7,DL(27),bidir,X,81,0,Z)," &
"84 (BC_7,DL(28),bidir,X,81,0,Z)," &
"85 (BC_1,*,control,0)," &
"86 (BC_7,DL(29),bidir,X,85,0,Z)," &
"87 (BC_7,DL(30),bidir,X,85,0,Z)," &
"88 (BC_1,*,control,0)," &
"89 (BC_1,CI_N,output3,X,88,0,Z)," &
"90 (BC_7,GBL_N,bidir,X,88,0,Z)," &
"91 (BC_7,DL(31),bidir,X,85,0,Z)," &
"92 (BC_1,WT_N,output3,X,88,0,Z)," &
"93 (BC_1,DRTRY_N,input,X)," &
"94 (BC_1,*,control,0)," &
"95 (BC_1,CLK_OUT,output3,X,94,0,Z)," &
"96 (BC_7,BG_N,bidir,X,24,0,Z)," &
"97 (BC_1,*,control,0)," &
"98 (BC_1,BR_N,output3,X,97,0,Z)," &
"99 (BC_1,DBG_N,input,X)," &
"100 (BC_1,*,control,0)," &
"101 (BC_7,ABB_N,bidir,X,100,0,Z)," &
"102 (BC_1,*,control,0)," &
"103 (BC_7,DBB_N,bidir,X,102,0,Z)," &
"104 (BC_1,*,control,0)," &
"105 (BC_7,ARTRY_N,bidir,X,104,0,Z)," &
"106 (BC_1,TLBISYNC_N,input,X)," &
"107 (BC_1,TEA_N,input,X)," &
"108 (BC_1,QREQ_N,output3,X,97,0,Z)," &
"109 (BC_1,QACK_N,input,X)," &
"110 (BC_7,SRESET_N,bidir,X,24,0,Z)," &
"111 (BC_1,SMI_N,input,X)," &
"112 (BC_7,INT_N,bidir,X,88,0,Z)," &
"113 (BC_1,CKSTP_N,input,X)," &
"114 (BC_1,PLL_CFG(4),input,X)," &
"115 (BC_1,PLL_CFG(3),input,X)," &
"116 (BC_1,PLL_CFG(2),input,X)," &
"117 (BC_1,PLL_CFG(1),input,X)," &
"118 (BC_1,*,control,0)," &
"119 (BC_1,CHECKSTOP_N,output3,X,118,0,Z)," &
"120 (BC_1,PLL_CFG(0),input,X)," &
"121 (BC_1,HRESET_N,input,X)," &
"122 (BC_1,MCP_N,input,X)," &
"123 (BC_1,*,control,0)," &
"124 (BC_7,DH(0),bidir,X,123,0,Z)," &
"125 (BC_7,DH(1),bidir,X,123,0,Z)," &
"126 (BC_7,DH(2),bidir,X,123,0,Z)," &
"127 (BC_7,DH(3),bidir,X,123,0,Z)," &
"128 (BC_7,DH(4),bidir,X,123,0,Z)," &
"129 (BC_7,DH(5),bidir,X,134,0,Z)," &
"130 (BC_7,DH(6),bidir,X,134,0,Z)," &
"131 (BC_7,DH(7),bidir,X,134,0,Z)," &
"132 (BC_7,DH(8),bidir,X,134,0,Z)," &
"133 (BC_7,DH(9),bidir,X,134,0,Z)," &
"134 (BC_1,*,control,0)," &
"135 (BC_7,DH(10),bidir,X,139,0,Z)," &
"136 (BC_7,DH(11),bidir,X,139,0,Z)," &
"137 (BC_7,DH(12),bidir,X,139,0,Z)," &
"138 (BC_7,DH(13),bidir,X,139,0,Z)," &
"139 (BC_1,*,control,0)," &
"140 (BC_7,DH(14),bidir,X,144,0,Z)," &
"141 (BC_7,DH(15),bidir,X,144,0,Z)," &
"142 (BC_7,DH(16),bidir,X,144,0,Z)," &
"143 (BC_7,DH(17),bidir,X,144,0,Z)," &
"144 (BC_1,*,control,0)," &
"145 (BC_1,*,control,0)," &
"146 (BC_7,DH(18),bidir,X,145,0,Z)," &
"147 (BC_7,DH(19),bidir,X,145,0,Z)," &
"148 (BC_7,DH(20),bidir,X,145,0,Z)," &
"149 (BC_1,*,control,0)," &
"150 (BC_7,DH(21),bidir,X,145,0,Z)," &
"151 (BC_7,DH(22),bidir,X,149,0,Z)," &
"152 (BC_7,DH(23),bidir,X,149,0,Z)," &
"153 (BC_7,DH(24),bidir,X,149,0,Z)," &
"154 (BC_7,DH(25),bidir,X,149,0,Z)," &
"155 (BC_7,DH(26),bidir,X,149,0,Z)," &
"156 (BC_7,DH(27),bidir,X,149,0,Z)," &
"157 (BC_1,*,control,0)," &
"158 (BC_7,DH(28),bidir,X,157,0,Z)," &
"159 (BC_7,DH(29),bidir,X,157,0,Z)," &
"160 (BC_7,DH(30),bidir,X,157,0,Z)," &
"161 (BC_7,DH(31),bidir,X,157,0,Z)," &
"162 (BC_7,A(0),bidir,X,165,0,Z)," &
"163 (BC_1,*,control,0)," &
"164 (BC_7,A(1),bidir,X,165,0,Z)," &
"165 (BC_1,*,control,0)," &
"166 (BC_7,A(2),bidir,X,165,0,Z)," &
"167 (BC_7,A(3),bidir,X,165,0,Z)," &
"168 (BC_7,A(4),bidir,X,165,0,Z)";
attribute TestBench_Time_Date: BSDL_EXTENSION;
attribute TestBench_Port_Alias: BSDL_EXTENSION;
attribute TestBench_Time_Date of top_750cl: entity is
"BSDL was generated on Fri Aug 18 07:57:23 2006";
attribute TestBench_Port_Alias of top_750cl: entity is
"LSSD_MODE_N:LSSD_MODE_," &
"TRST_N:TRST_," &
"AACK_N:AACK_," &
"ABB_N:ABB_," &
"ARTRY_N:ARTRY_," &
"BG_N:BG_," &
"BR_N:BR_," &
"CHECKSTOP_N:CHECKSTOP_," &
"CI_N:CI_," &
"CKSTP_N:CKSTP_," &
"DBB_N:DBB_," &
"DBG_N:DBG_," &
"DBWO_N:DBWO_," &
"DRTRY_N:DRTRY_," &
"GBL_N:GBL_," &
"HRESET_N:HRESET_," &
"INT_N:INT_," &
"MCP_N:MCP_," &
"QACK_N:QACK_," &
"QREQ_N:QREQ_," &
"SMI_N:SMI_," &
"SRESET_N:SRESET_," &
"TA_N:TA_," &
"TBST_N:TBST_," &
"TEA_N:TEA_," &
"TLBISYNC_N:TLBISYNC_," &
"TS_N:TS_," &
"WT_N:WT_";
end top_750cl;
