-- $ XILINX$RCSfile: xc2c32_vq44.bsd,v $
-- $ XILINX$Revision: 1.3 $
--
-- BSDL file for device xc2c32, package vq44
-- Xilinx, Inc. $State: ADVANCED $ $Date: 2002-09-10 16:51:07-07 $
-- Generated by createBSDL_br 2.2c
-- =================================================
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--
entity XC2C32_VQ44 is
generic (PHYSICAL_PIN_MAP : string := "UNDEFINED");
port ( tdi : in bit;
tck : in bit;
tms : in bit;
tdo : out bit;
IN_16 : in bit;
IO_0 : inout bit;
IO_1 : inout bit;
IO_2 : inout bit;
IO_3 : inout bit;
IO_4 : inout bit;
IO_5 : inout bit;
IO_6 : inout bit;
IO_7 : inout bit;
IO_8 : inout bit;
IO_9 : inout bit;
IO_10 : inout bit;
IO_11 : inout bit;
IO_12 : inout bit;
IO_13 : inout bit;
IO_14 : inout bit;
IO_15 : inout bit;
IO_17 : inout bit;
IO_18 : inout bit;
IO_19 : inout bit;
IO_20 : inout bit;
IO_21 : inout bit;
IO_22 : inout bit;
IO_23 : inout bit;
IO_24 : inout bit;
IO_25 : inout bit;
IO_26 : inout bit;
IO_27 : inout bit;
IO_28 : inout bit;
IO_29 : inout bit;
IO_30 : inout bit;
IO_31 : inout bit;
IO_32 : inout bit);
use std_1149_1_1994.all;
use STD_1532_2001.all;
attribute COMPONENT_CONFORMANCE of XC2C32_VQ44 : entity is "std_1149_1_1993";
attribute PIN_MAP of XC2C32_VQ44 : entity is PHYSICAL_PIN_MAP;
constant UNDEFINED : PIN_MAP_STRING :=
" tdi:9, tck:11, tms:10, tdo:24,IN_16:18," &
" IO_0:38, IO_1:37, IO_2:36, IO_3:34, IO_4:33," &
" IO_5:32, IO_6:31, IO_7:30, IO_8:29, IO_9:28," &
" IO_10:27, IO_11:23, IO_12:22, IO_13:21, IO_14:20," &
" IO_15:19, IO_17:39, IO_18:40, IO_19:41, IO_20:42," &
" IO_21:43, IO_22:44, IO_23:1, IO_24:2, IO_25:3," &
" IO_26:5, IO_27:6, IO_28:8, IO_29:12, IO_30:13," &
" IO_31:14, IO_32:16";
attribute TAP_SCAN_IN of tdi : signal is true;
attribute TAP_SCAN_CLOCK of tck : signal is (10.0e6, both);
attribute TAP_SCAN_MODE of tms : signal is true;
attribute TAP_SCAN_OUT of tdo : signal is true;
attribute INSTRUCTION_LENGTH of XC2C32_VQ44 : entity is 8;
attribute INSTRUCTION_OPCODE of XC2C32_VQ44 : entity is
"BYPASS (11111111)," &
"SAMPLE (00000011)," &
"EXTEST (00000000)," &
"IDCODE (00000001)," &
"USERCODE (11111101)," &
"INTEST (00000010)," &
"HIGHZ (11111100)," &
"ISC_ENABLE_CLAMP (11101001)," &
"ISC_ENABLEOTF (11100100)," &
"ISC_ENABLE (11101000)," &
"ISC_SRAM_READ (11100111)," &
"ISC_SRAM_WRITE (11100110)," &
"ISC_ERASE (11101101)," &
"ISC_PROGRAM (11101010)," &
"ISC_READ (11101110)," &
"ISC_INIT (11110000)," &
"ISC_DISABLE (11000000)," &
"TEST_ENABLE (00010001)," &
"BULKPROG (00010010)," &
"ERASE_ALL (00010100)," &
"MVERIFY (00010011)," &
"TEST_DISABLE (00010101)," &
"STRTEST (00010110)," &
"ISC_NOOP (11100000)";
attribute INSTRUCTION_PRIVATE of XC2C32_VQ44 : entity is
"BULKPROG, MVERIFY, ERASE_ALL, TEST_ENABLE, TEST_DISABLE,STRTEST";
attribute INSTRUCTION_CAPTURE of XC2C32_VQ44 : entity is "XXXXXX01" ;
attribute IDCODE_REGISTER of XC2C32_VQ44 : entity is "00000110110000011100000010010011";
attribute USERCODE_REGISTER of XC2C32_VQ44 : entity is "XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX";
attribute REGISTER_ACCESS of XC2C32_VQ44 : entity is
"BOUNDARY (SAMPLE)," &
"BOUNDARY (EXTEST)," &
"DEVICE_ID (IDCODE, USERCODE)," &
"BOUNDARY (INTEST)," &
"ISC_Default[1] (ISC_ENABLE_CLAMP)," &
"DATAREG[266] (ISC_ENABLEOTF)," &
"DATAREG[266] (ISC_ENABLE)," &
"DATAREG[266] (ISC_SRAM_READ)," &
"DATAREG[266] (ISC_SRAM_WRITE)," &
"DATAREG[266] (ISC_ERASE)," &
"DATAREG[266] (ISC_PROGRAM)," &
"DATAREG[266] (ISC_READ)," &
"DATAREG[266] (ISC_INIT)," &
"DATAREG[266] (ISC_DISABLE)," &
"ISC_Default[1] (ISC_NOOP)";
attribute BOUNDARY_LENGTH of XC2C32_VQ44 : entity is 97;
attribute BOUNDARY_REGISTER of XC2C32_VQ44 : entity is
--
-- num cell port function safe [ccell disval rslt]
--
" 96 (BC_1, IO_0, INPUT, X)," &
" 95 (BC_1, IO_0, OUTPUT3, X, 94, 0,Z),"&
" 94 (BC_1, *, CONTROL, X)," &
" 93 (BC_1, IO_1, INPUT, X)," &
" 92 (BC_1, IO_1, OUTPUT3, X, 91, 0,Z),"&
" 91 (BC_1, *, CONTROL, X)," &
" 90 (BC_1, IO_2, INPUT, X)," &
" 89 (BC_1, IO_2, OUTPUT3, X, 88, 0,Z),"&
" 88 (BC_1, *, CONTROL, X)," &
" 87 (BC_1, IO_3, INPUT, X)," &
" 86 (BC_1, IO_3, OUTPUT3, X, 85, 0,Z),"&
" 85 (BC_1, *, CONTROL, X)," &
" 84 (BC_1, IO_4, INPUT, X)," &
" 83 (BC_1, IO_4, OUTPUT3, X, 82, 0,Z),"&
" 82 (BC_1, *, CONTROL, X)," &
" 81 (BC_1, IO_5, INPUT, X)," &
" 80 (BC_1, IO_5, OUTPUT3, X, 79, 0,Z),"&
" 79 (BC_1, *, CONTROL, X)," &
" 78 (BC_1, IO_6, INPUT, X)," &
" 77 (BC_1, IO_6, OUTPUT3, X, 76, 0,Z),"&
" 76 (BC_1, *, CONTROL, X)," &
" 75 (BC_1, IO_7, INPUT, X)," &
" 74 (BC_1, IO_7, OUTPUT3, X, 73, 0,Z),"&
" 73 (BC_1, *, CONTROL, X)," &
" 72 (BC_1, IO_8, INPUT, X)," &
" 71 (BC_1, IO_8, OUTPUT3, X, 70, 0,Z),"&
" 70 (BC_1, *, CONTROL, X)," &
" 69 (BC_1, IO_9, INPUT, X)," &
" 68 (BC_1, IO_9, OUTPUT3, X, 67, 0,Z),"&
" 67 (BC_1, *, CONTROL, X)," &
" 66 (BC_1, IO_10, INPUT, X)," &
" 65 (BC_1, IO_10, OUTPUT3, X, 64, 0,Z),"&
" 64 (BC_1, *, CONTROL, X)," &
" 63 (BC_1, IO_11, INPUT, X)," &
" 62 (BC_1, IO_11, OUTPUT3, X, 61, 0,Z),"&
" 61 (BC_1, *, CONTROL, X)," &
" 60 (BC_1, IO_12, INPUT, X)," &
" 59 (BC_1, IO_12, OUTPUT3, X, 58, 0,Z),"&
" 58 (BC_1, *, CONTROL, X)," &
" 57 (BC_1, IO_13, INPUT, X)," &
" 56 (BC_1, IO_13, OUTPUT3, X, 55, 0,Z),"&
" 55 (BC_1, *, CONTROL, X)," &
" 54 (BC_1, IO_14, INPUT, X)," &
" 53 (BC_1, IO_14, OUTPUT3, X, 52, 0,Z),"&
" 52 (BC_1, *, CONTROL, X)," &
" 51 (BC_1, IO_15, INPUT, X)," &
" 50 (BC_1, IO_15, OUTPUT3, X, 49, 0,Z),"&
" 49 (BC_1, *, CONTROL, X)," &
" 48 (BC_1, IO_17, INPUT, X)," &
" 47 (BC_1, IO_17, OUTPUT3, X, 46, 0,Z),"&
" 46 (BC_1, *, CONTROL, X)," &
" 45 (BC_1, IO_18, INPUT, X)," &
" 44 (BC_1, IO_18, OUTPUT3, X, 43, 0,Z),"&
" 43 (BC_1, *, CONTROL, X)," &
" 42 (BC_1, IO_19, INPUT, X)," &
" 41 (BC_1, IO_19, OUTPUT3, X, 40, 0,Z),"&
" 40 (BC_1, *, CONTROL, X)," &
" 39 (BC_1, IO_20, INPUT, X)," &
" 38 (BC_1, IO_20, OUTPUT3, X, 37, 0,Z),"&
" 37 (BC_1, *, CONTROL, X)," &
" 36 (BC_1, IO_21, INPUT, X)," &
" 35 (BC_1, IO_21, OUTPUT3, X, 34, 0,Z),"&
" 34 (BC_1, *, CONTROL, X)," &
" 33 (BC_1, IO_22, INPUT, X)," &
" 32 (BC_1, IO_22, OUTPUT3, X, 31, 0,Z),"&
" 31 (BC_1, *, CONTROL, X)," &
" 30 (BC_1, IO_23, INPUT, X)," &
" 29 (BC_1, IO_23, OUTPUT3, X, 28, 0,Z),"&
" 28 (BC_1, *, CONTROL, X)," &
" 27 (BC_1, IO_24, INPUT, X)," &
" 26 (BC_1, IO_24, OUTPUT3, X, 25, 0,Z),"&
" 25 (BC_1, *, CONTROL, X)," &
" 24 (BC_1, IO_25, INPUT, X)," &
" 23 (BC_1, IO_25, OUTPUT3, X, 22, 0,Z),"&
" 22 (BC_1, *, CONTROL, X)," &
" 21 (BC_1, IO_26, INPUT, X)," &
" 20 (BC_1, IO_26, OUTPUT3, X, 19, 0,Z),"&
" 19 (BC_1, *, CONTROL, X)," &
" 18 (BC_1, IO_27, INPUT, X)," &
" 17 (BC_1, IO_27, OUTPUT3, X, 16, 0,Z),"&
" 16 (BC_1, *, CONTROL, X)," &
" 15 (BC_1, IO_28, INPUT, X)," &
" 14 (BC_1, IO_28, OUTPUT3, X, 13, 0,Z),"&
" 13 (BC_1, *, CONTROL, X)," &
" 12 (BC_1, IO_29, INPUT, X)," &
" 11 (BC_1, IO_29, OUTPUT3, X, 10, 0,Z),"&
" 10 (BC_1, *, CONTROL, X)," &
" 9 (BC_1, IO_30, INPUT, X)," &
" 8 (BC_1, IO_30, OUTPUT3, X, 7, 0,Z),"&
" 7 (BC_1, *, CONTROL, X)," &
" 6 (BC_1, IO_31, INPUT, X)," &
" 5 (BC_1, IO_31, OUTPUT3, X, 4, 0,Z),"&
" 4 (BC_1, *, CONTROL, X)," &
" 3 (BC_1, IO_32, INPUT, X)," &
" 2 (BC_1, IO_32, OUTPUT3, X, 1, 0,Z),"&
" 1 (BC_1, *, CONTROL, X)," &
" 0 (BC_1, IN_16, INPUT, X)";
-- Following atribute is specific only to ISC_ENABLE Instruction
attribute ISC_PIN_BEHAVIOR of XC2C32_VQ44 : entity is "HIGHZ";
-- If ISC_ENABLE_CLAMP is executed instead of ISC_ENABLE, previous attribute
-- should be replaced with (clamp value depends on the preconditioning)
-- attribute ISC_PIN_BEHAVIOR of XC2C32_VQ44 : entity is "CLAMP"
-- If ISC_ENABLEOTF is executed instead of ISC_ENABLE, all device pins will
-- behave as previously programmed and would therefore be all indicated as
-- fixed system pins. You should uncomment the following attribute:
--
-- attribute ISC_FIXED_SYSTEM_PINS of XC2C32_VQ44 : entity is
-- IO_0, IO_1, IO_2, IO_3, IO_4, IO_5, IO_6, IO_7, IO_8, IO_9, IO_10, IO_11, IO_12, IO_13, IO_14,
-- IO_15, IO_17, IO_18, IO_19, IO_20, IO_21, IO_22, IO_23, IO_24, IO_25, IO_26, IO_27, IO_28, IO_29, IO_30,
-- IO_31, IO_32;IO_0, IO_1, IO_2, IO_3, IO_4, IO_5, IO_6, IO_7, IO_8, IO_9, IO_10, IO_11, IO_12,
-- IO_13, IO_14, IO_15, IO_17, IO_18, IO_19, IO_20, IO_21, IO_22, IO_23, IO_24, IO_25, IO_26, IO_27, IO_28,
-- IO_29, IO_30, IO_31, IO_32;IO_0, IO_1, IO_2, IO_3, IO_4, IO_5, IO_6, IO_7, IO_8, IO_9, IO_10,
-- IO_11, IO_12, IO_13, IO_14, IO_15, IO_17, IO_18, IO_19, IO_20, IO_21, IO_22, IO_23, IO_24, IO_25, IO_26,
-- IO_27, IO_28, IO_29, IO_30, IO_31, IO_32;
attribute ISC_STATUS of XC2C32_VQ44 : entity is "NOT IMPLEMENTED";
attribute ISC_BLANK_USERCODE of XC2C32_VQ44 : entity is "11111111111111111111111111111111";
--attribute ISC_SECURITY of XC2C32_VQ44 : entity is "ISC_DISABLE_READ *";
attribute ISC_FLOW of XC2C32_VQ44 : entity is
-- program device
"flow_program(array)" &
"initialize" &
"(ISC_PROGRAM 6:?,260:? wait 10.0e-3)" &
"Repeat 49 "&
"(ISC_PROGRAM 6:?,260:? wait 10.0e-3)," &
--program device
-- "flow_program1(array)" &
-- "initialize" &
-- "(ISC_PROGRAM 281:? wait 10.0e-3)," &
"flow_program_donebit " &
"initialize" &
"(ISC_PROGRAM 6:05, 12:FFB wait tck 10000 )," &
-- verify device
"flow_verify(array) " &
"initialize " &
"(ISC_READ 6:$addr?, 260:f wait tck 1 6:0*0, 260:$data?)" &
"Repeat 49 "&
"(ISC_READ 6:$addr?, 260:f wait tck 1 6:0*0, 260:$data?)," &
-- read device
"flow_read(array) " &
"initialize " &
"(ISC_READ 260:0, 6:$addr=0 wait tck 1 260:!, 6:0*0)" &
" Repeat 49 "&
"(ISC_READ 260:0, 6:$addr+1 wait tck 1 260:!, 6:0*0)," &
-- program SRAM
"flow_sram_write(array) " &
"initialize " &
"(ISC_SRAM_WRITE 260:?, 6:$addr=0 wait 10.0e-3)" &
" Repeat 49 "&
"(ISC_SRAM_WRITE 260:?, 6:$addr+1 wait 10.0e-3)," &
-- verify SRAM
"flow_sram_read(array) " &
"initialize " &
"(ISC_SRAM_READ 260:0, 6:$addr=0 wait tck 1 260:!, 6:0*0)" &
" Repeat 49 "&
"(ISC_SRAM_READ 260:0, 6:$addr+1 wait tck 1 260:!, 6:0*0)," &
-- verify IDCODE
"flow_verify(idcode) " &
"initialize " &
"(IDCODE wait tck 1 32:06c1c093), " &
-- read IDCODE
"flow_read(idcode) " &
"initialize " &
"(IDCODE wait tck 1 32:!), " &
-- verify USERCODE blank device
"flow_verify(usercode) " &
"initialize " &
"(USERCODE wait tck 1 32:FFFFFFFF), " &
-- read USERCODE blank device
"flow_verify(usercode) " &
"initialize " &
"(USERCODE wait tck 1 32:!), " &
-- erase device
"flow_erase " &
"initialize " &
"(ISC_ERASE 260:0 wait 100.0e-3) " &
"(ISC_INIT wait 20.0e-6) " &
"(ISC_INIT 260:0 wait 200.0e-6), " &
-- erase verify
"flow_erase_verify(array) " &
"initialize " &
"(ISC_READ 6:?,260:? wait tck 1 6:0*0, 260:F*F ) " &
-- "(ISC_READ 6:?,260:? wait tck 1 260:" &
-- "FFFFFFFFFFFFFFFFFFF" &
-- "FFFFFFFFFFFFFFFFFFFF" &
-- "FFFFFFFFFFFFFFFFFFFF" &
-- "FFFFFFFFFF, 6:0*0)" &
" Repeat 49 "&
"(ISC_READ 6:?,260:? wait tck 1 6:0*0, 260:F*F), " &
-- "(ISC_READ 6:?,260:? wait tck 1 260:" &
-- "FFFFFFFFFFFFFFFFFFF" &
-- "FFFFFFFFFFFFFFFFFFFF" &
-- "FFFFFFFFFFFFFFFFFFFF" &
-- "FFFFFFFFFF, 6:0*0)," &
--
-- ISC MODE can be enabled with any of the following three flows
-- enable ISC mode (outputs are HIGHZ)
"flow_enable_highz " &
"initialize " &
"(ISC_ENABLE wait tck 1), " &
-- enable ISC mode (outputs are CLAMP)
"flow_enable_clamp " &
"initialize " &
"(ISC_ENABLE_CLAMP wait tck 1), " &
-- enable ISC mode (outputs are ACTIVE)
"flow_enable_active " &
"initialize " &
"(ISC_ENABLEOTF wait tck 1), " &
-- load bypass instruction
"flow_bypass " &
"initialize " &
"(BYPASS wait tck 1), " &
-- disable ISC mode (disables all three ISC modes)
"flow_disable " &
"initialize " &
"(ISC_DISABLE wait tck 100), " &
-- reinitialize device
"flow_reinit " &
"initialize " &
"(ISC_INIT wait TCK 20) " &
"(ISC_INIT 266:0 wait TCK 100 ) " ;
attribute ISC_PROCEDURE of XC2C32_VQ44 : entity is
"proc_verify(idcode) = (flow_verify(idcode)), " &
"proc_read(idcode) = (flow_read(idcode)), " &
"proc_verify(usercode) = (flow_verify(usercode)), " &
"proc_verify(array) = (flow_verify(array))," &
"proc_read(array) = (flow_read(array))," &
"proc_disable = (flow_disable), "&
"proc_reinit = (flow_reinit), "&
"proc_enable = (flow_enable_highz), "&
"proc_bypass = (flow_bypass), "&
"proc_enable_clamp = (flow_enable_clamp), "&
"proc_enable_active = (flow_enable_active), "&
"proc_error_exit = (flow_disable), "&
"proc_program(array) = (flow_program(array),flow_program_donebit), "&
"proc_verify(array) = (flow_verify(array)), " &
"proc_sram_write(array) = (flow_sram_write(array)), " &
"proc_sram_read(array) = (flow_sram_read(array)), " &
"proc_erase = (flow_erase), " &
"proc_blank_check = (flow_erase_verify(array)), " &
"proc_isc_exit = (flow_disable)";
attribute ISC_ACTION of XC2C32_VQ44 : entity is
"erase = (proc_verify(idcode) recommended, " &
" proc_enable, " &
" proc_erase, " &
" proc_blank_check optional, " &
" proc_reinit, proc_bypass, " &
" proc_disable), " &
"program = (proc_verify(idcode) recommended, " &
" proc_enable, " &
" proc_erase, " &
" proc_blank_check optional, " &
" proc_program(array), " &
" proc_verify(array) optional, " &
" proc_reinit, " &
" proc_disable, proc_bypass), " &
-- When using program_clamp the PIN_BEHAVIOR is CLAMP
"program_clamp = (proc_verify(idcode) recommended, " &
" proc_enable_clamp, " &
" proc_erase, " &
" proc_blank_check optional, " &
" proc_program(array), " &
" proc_verify(array) optional, " &
" proc_reinit, " &
" proc_disable), " &
-- When using program_active all IOs behave as fixed pins
"program_active = (proc_verify(idcode) recommended, " &
" proc_enable_active, " &
" proc_sram_write(array), " &
" proc_reinit, " &
" proc_disable), " &
"verify = (proc_verify(idcode) recommended, " &
" proc_enable, " &
" proc_verify(array), " &
" proc_reinit, " &
" proc_disable), " &
"read = (proc_verify(idcode) recommended, " &
" proc_enable, " &
" proc_read(array), " &
" proc_reinit, " &
" proc_disable), "&
"verify(idcode) = (proc_verify(idcode))," &
"read(idcode) = (proc_read(idcode))";
-- attribute ISC_DESIGN_WARNING of XC2C32_VQ44: entity is
-- "When using the ACTION: program_clamp, the PIN_BEHAVIOR is CLAMP. " &
-- "For correctness, the BSDL should be modified to indicate this. " &
-- "When using the ACTION: program_active, the pins behave as previously " &
-- "programmed. This makes all device IO's effectively behave as fixed pins.";
-- ===========================================================
end XC2C32_VQ44;
