BSDL Files Library for JTAG

The only free public library that contains thousands of BSDL (Boundary Scan Description Language) models to use with BScan/JTAG tools

BSDL model: STM32L451_UFQFPN48

-- ****************** (C) COPYRIGHT 2017 STMicroelectronics **************************
-- * File Name          : STM32L451_UFQFPN48.bsd                                     *
-- * Author             : STMicroelectronics www.st.com                              *
-- * Version            : V1.0                                                       *
-- * Date               : 09-May-2017                                                *
-- * Description        : Boundary Scan Description Language (BSDL) file for the     * 
-- *                      STM32L451_UFQFPN48 Microcontrollers.                       *
-- ***********************************************************************************
-- * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS     *
-- * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.*
-- * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,        *
-- * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE   *
-- * CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING         *
-- * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.                 *
-- ***********************************************************************************
-- * This BSDL file has been syntaxed checked and validated by:                      *                                                                 
-- * GOEPEL SyntaxChecker Version 3.1.2                                              *
-- ***********************************************************************************

 entity STM32L451_UFQFPN48 is					
 -- This section identifies the default device package selected.
 generic (PHYSICAL_PIN_MAP: string:= "UFQFPN48_PACKAGE");
 -- This section declares all the ports in the design.	 
   port ( 
      JTMS              : in    bit;				  
      JTCK              : in    bit;
      JTDI              : in    bit;	
      JTDO              : out   bit;			  
      JTRST             : in    bit;				  				  
      NRST              : in    bit;   
      PC13              : inout bit;
      PC14_OSC32_IN     : inout bit;
      PC15_OSC32_OUT    : inout bit;
      PH0_OSC_IN        : inout bit;
      PH1_OSC_OUT       : inout bit;
      PA0               : inout bit;
      PA1               : inout bit;
      PA2               : inout bit;
      PA3               : inout bit;
      PA4               : inout bit;
      PA5               : inout bit;
      PA6               : inout bit;
      PA7               : inout bit;
      PB0               : inout bit;
      PB1               : inout bit;
      PB2               : inout bit;
      PB10              : inout bit;
      PB11              : inout bit;
      PB12              : inout bit;
      PB13              : inout bit;
      PB14              : inout bit;
      PB15              : inout bit;
      PA8               : inout bit;
      PA9               : inout bit;
      PA10              : inout bit;
      PA11              : inout bit;
      PA12              : inout bit;
      PB5               : inout bit;
      PB6               : inout bit;
      PB7               : inout bit;
      PH3_BOOT0         : inout bit;
      PB8               : inout bit;
      PB9               : inout bit;
      VBAT              : linkage bit;
      VSSA_VREFM        : linkage bit;
      VDDA_VREFP        : linkage bit;
      VDD               : linkage bit_vector(0 to 1);
      VSS               : linkage bit_vector(0 to 1)
			  
    );

--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
    use STD_1149_1_2001.all;

    attribute COMPONENT_CONFORMANCE of STM32L451_UFQFPN48: entity is "STD_1149_1_2001";

    attribute PIN_MAP of STM32L451_UFQFPN48 : entity is PHYSICAL_PIN_MAP;

-- This section specifies the pin map for each port. This information is extracted from the
-- port-to-pin map file that was read in using the "read_pin_map" command.

    constant UFQFPN48_PACKAGE: PIN_MAP_STRING :=   
      "JTMS             : 34  ," & 
      "JTCK             : 37  ," & 
      "JTDI             : 38  ," & 
      "JTDO             : 39  ," & 
      "JTRST            : 40  ," & 
      "NRST             : 7  ," & 
      "PC13             : 2  ," & 
      "PC14_OSC32_IN    : 3  ," & 
      "PC15_OSC32_OUT   : 4  ," & 
      "PH0_OSC_IN       : 5  ," & 
      "PH1_OSC_OUT      : 6  ," & 
      "PA0              : 10  ," & 
      "PA1              : 11  ," & 
      "PA2              : 12  ," & 
      "PA3              : 13  ," & 
      "PA4              : 14  ," & 
      "PA5              : 15  ," & 
      "PA6              : 16  ," & 
      "PA7              : 17  ," & 
      "PB0              : 18  ," & 
      "PB1              : 19  ," & 
      "PB2              : 20  ," & 
      "PB10             : 21  ," & 
      "PB11             : 22  ," & 
      "PB12             : 25  ," & 
      "PB13             : 26  ," & 
      "PB14             : 27  ," & 
      "PB15             : 28  ," & 
      "PA8              : 29  ," & 
      "PA9              : 30  ," & 
      "PA10             : 31  ," & 
      "PA11             : 32  ," & 
      "PA12             : 33  ," & 
      "PB5              : 41  ," & 
      "PB6              : 42  ," & 
      "PB7              : 43  ," & 
      "PH3_BOOT0        : 44  ," & 
      "PB8              : 45  ," & 
      "PB9              : 46  ," & 
      "VBAT             : 1  ," &
      "VSSA_VREFM       : 8  ," &
      "VDDA_VREFP       : 9  ," &
      "VDD              : (24, 36)," &
      "VSS              : (23, 35) " ;



-- This section specifies the TAP ports. For the TAP TCK port, the parameters in the brackets are:
--        First Field : Maximum  TCK frequency.
--        Second Field: Allowable states TCK may be stopped in.
   
   attribute TAP_SCAN_CLOCK of JTCK  : signal is (10.0e6, BOTH);
   attribute TAP_SCAN_IN    of JTDI  : signal is true;
   attribute TAP_SCAN_MODE  of JTMS  : signal is true;
   attribute TAP_SCAN_OUT   of JTDO  : signal is true;
   attribute TAP_SCAN_RESET of JTRST : signal is true;
   
-- Specifies the compliance enable patterns for the design. It lists a set of 
-- design ports and the values that they should be set to, in order to enable 
-- compliance to IEEE Std 1149.1

   
   attribute COMPLIANCE_PATTERNS of STM32L451_UFQFPN48: entity is 
        "(NRST) (0)";

   
-- Specifies the number of bits in the instruction register.

   attribute INSTRUCTION_LENGTH of STM32L451_UFQFPN48: entity is 5;

-- Specifies the boundary-scan instructions implemented in the design and their opcodes.
   
   attribute INSTRUCTION_OPCODE of STM32L451_UFQFPN48: entity is 
     "BYPASS  (11111)," &
     "EXTEST  (00000)," &
     "SAMPLE  (00010)," &
     "PRELOAD (00010)," &
     "IDCODE  (00001)";
   
-- Specifies the bit pattern that is loaded into the instruction register when the TAP controller 
-- passes through the Capture-IR state. The standard mandates that the two LSBs must be "01". The 
-- remaining bits are design specific.
   
   attribute INSTRUCTION_CAPTURE of STM32L451_UFQFPN48: entity is "XXX01";

-- Specifies the bit pattern that is loaded into the DEVICE_ID register during the IDCODE 
-- instruction when the TAP controller passes through the Capture-DR state.
   
   attribute IDCODE_REGISTER of STM32L451_UFQFPN48: entity is 
     "XXXX" &              -- 4-bit version number
     "0110010001100010" &  -- 16-bit part number
     "00000100000" &       -- 11-bit identity of the manufacturer
     "1";                  -- Required by IEEE Std 1149.1

 -- This section specifies the test data register placed between TDI and TDO for each implemented 
-- instruction.
   
  attribute REGISTER_ACCESS of STM32L451_UFQFPN48: entity is 
       "BYPASS    (BYPASS)," &
       "BOUNDARY  (EXTEST, SAMPLE, PRELOAD)," &
       "DEVICE_ID (IDCODE)";

-- Specifies the length of the boundary scan register.
   
   attribute BOUNDARY_LENGTH of STM32L451_UFQFPN48: entity is 333;
 
-- The following list specifies the characteristics of each cell in the boundary scan register from 
-- TDI to TDO. The following is a description of the label fields:
--      num     : Is the cell number.
--      cell    : Is the cell type as defined by the standard.
--      port    : Is the design port name. Control cells do not have a port name.
--      function: Is the function of the cell as defined by the standard. Is one of input, output2, 
--                output3, bidir, control or controlr.
--      safe    : Specifies the value that the BSR cell should be loaded with for safe operation 
--                when the software might otherwise choose a random value.
--      ccell   : The control cell number. Specifies the control cell that drives the output enable 
--                for this port.
--      disval  : Specifies the value that is loaded into the control cell to disable the output 
--                enable for the corresponding port.
--      rslt    : Resulting state. Shows the state of the driver when it is disabled.
   
   attribute BOUNDARY_REGISTER of STM32L451_UFQFPN48: entity is 
--     
--    num	cell	port		function	safe  [ccell  disval  rslt]
--     
--------------------------------------------------------------------------------	

      "332	(BC_1,	*,		internal,	0)				," &
      "331	(BC_1,	*,		internal,	0)				," &
      "330	(BC_1,	*,		internal,	0)				," &
      "329	(BC_1,	*,		internal,	0)				," &
      "328	(BC_1,	*,		internal,	0)				," &
      "327	(BC_1,	*,		internal,	0)				," &
      "326	(BC_1,	*,		internal,	0)				," &
      "325	(BC_1,	*,		internal,	0)				," &
      "324	(BC_1,	*,		internal,	0)				," &
      "323	(BC_1,	*,		internal,	0)				," &
      "322	(BC_1,	*,		internal,	0)				," &
      "321	(BC_1,	*,		internal,	0)				," &
      "320	(BC_1,	*,		internal,	0)				," &
      "319	(BC_1,	*,		internal,	0)				," &
      "318	(BC_1,	*,		internal,	0)				," &
      "317	(BC_1,	*,		CONTROL,	1)				," &
      "316	(BC_1,	PC13,		OUTPUT3,	X,	317,	1,	Z)	," &
      "315	(BC_4,	PC13,		INPUT,  	X)				," &
      "314	(BC_1,	*,		CONTROL,	1)				," &
      "313	(BC_1,	PC14_OSC32_IN,	OUTPUT3,	X,	314,	1,	Z)	," &
      "312	(BC_4,	PC14_OSC32_IN,	INPUT,  	X)				," &
      "311	(BC_1,	*,		CONTROL,	1)				," &
      "310	(BC_1,	PC15_OSC32_OUT,	OUTPUT3,	X,	311,	1,	Z)	," &
      "309	(BC_4,	PC15_OSC32_OUT,	INPUT,  	X)				," &
      "308	(BC_1,	*,		internal,	0)				," &
      "307	(BC_1,	*,		internal,	0)				," &
      "306	(BC_1,	*,		internal,	0)				," &
      "305	(BC_1,	*,		internal,	0)				," &
      "304	(BC_1,	*,		internal,	0)				," &
      "303	(BC_1,	*,		internal,	0)				," &
      "302	(BC_1,	*,		internal,	0)				," &
      "301	(BC_1,	*,		internal,	0)				," &
      "300	(BC_1,	*,		internal,	0)				," &
      "299	(BC_1,	*,		internal,	0)				," &
      "298	(BC_1,	*,		internal,	0)				," &
      "297	(BC_1,	*,		internal,	0)				," &
      "296	(BC_1,	*,		internal,	0)				," &
      "295	(BC_1,	*,		internal,	0)				," &
      "294	(BC_1,	*,		internal,	0)				," &
      "293	(BC_1,	*,		internal,	0)				," &
      "292	(BC_1,	*,		internal,	0)				," &
      "291	(BC_1,	*,		internal,	0)				," &
      "290	(BC_1,	*,		internal,	0)				," &
      "289	(BC_1,	*,		internal,	0)				," &
      "288	(BC_1,	*,		internal,	0)				," &
      "287	(BC_1,	*,		internal,	0)				," &
      "286	(BC_1,	*,		internal,	0)				," &
      "285	(BC_1,	*,		internal,	0)				," &
      "284	(BC_1,	*,		internal,	0)				," &
      "283	(BC_1,	*,		internal,	0)				," &
      "282	(BC_1,	*,		internal,	0)				," &
      "281	(BC_1,	*,		internal,	0)				," &
      "280	(BC_1,	*,		internal,	0)				," &
      "279	(BC_1,	*,		internal,	0)				," &
      "278	(BC_1,	*,		internal,	0)				," &
      "277	(BC_1,	*,		internal,	0)				," &
      "276	(BC_1,	*,		internal,	0)				," &
      "275	(BC_1,	*,		CONTROL,	1)				," &
      "274	(BC_1,	PH0_OSC_IN,		OUTPUT3,	X,	275,	1,	Z)	," &
      "273	(BC_4,	PH0_OSC_IN,		INPUT,  	X)				," &
      "272	(BC_1,	*,		CONTROL,	1)				," &
      "271	(BC_1,	PH1_OSC_OUT,	OUTPUT3,	X,	272,	1,	Z)	," &
      "270	(BC_4,	PH1_OSC_OUT,	INPUT,  	X)				," &
      "269	(BC_1,	*,		internal,	0)				," &
      "268	(BC_1,	*,		internal,	0)				," &
      "267	(BC_1,	*,		internal,	0)				," &
      "266	(BC_1,	*,		internal,	0)				," &
      "265	(BC_1,	*,		internal,	0)				," &
      "264	(BC_1,	*,		internal,	0)				," &
      "263	(BC_1,	*,		internal,	0)				," &
      "262	(BC_1,	*,		internal,	0)				," &
      "261	(BC_1,	*,		internal,	0)				," &
      "260	(BC_1,	*,		internal,	0)				," &
      "259	(BC_1,	*,		internal,	0)				," &
      "258	(BC_1,	*,		internal,	0)				," &
      "257	(BC_1,	*,		CONTROL,	1)				," &
      "256	(BC_1,	PA0,		OUTPUT3,	X,	257,	1,	Z)	," &
      "255	(BC_4,	PA0,		INPUT,  	X)				," &
      "254	(BC_1,	*,		internal,	0)				," &
      "253	(BC_1,	*,		internal,	0)				," &
      "252	(BC_1,	*,		internal,	0)				," &
      "251	(BC_1,	*,		CONTROL,	1)				," &
      "250	(BC_1,	PA1,		OUTPUT3,	X,	251,	1,	Z)	," &
      "249	(BC_4,	PA1,		INPUT,  	X)				," &
      "248	(BC_1,	*,		CONTROL,	1)				," &
      "247	(BC_1,	PA2,		OUTPUT3,	X,	248,	1,	Z)	," &
      "246	(BC_4,	PA2,		INPUT,  	X)				," &
      "245	(BC_1,	*,		CONTROL,	1)				," &
      "244	(BC_1,	PA3,		OUTPUT3,	X,	245,	1,	Z)	," &
      "243	(BC_4,	PA3,		INPUT,  	X)				," &
      "242	(BC_1,	*,		CONTROL,	1)				," &
      "241	(BC_1,	PA4,		OUTPUT3,	X,	242,	1,	Z)	," &
      "240	(BC_4,	PA4,		INPUT,  	X)				," &
      "239	(BC_1,	*,		CONTROL,	1)				," &
      "238	(BC_1,	PA5,		OUTPUT3,	X,	239,	1,	Z)	," &
      "237	(BC_4,	PA5,		INPUT,  	X)				," &
      "236	(BC_1,	*,		CONTROL,	1)				," &
      "235	(BC_1,	PA6,		OUTPUT3,	X,	236,	1,	Z)	," &
      "234	(BC_4,	PA6,		INPUT,  	X)				," &
      "233	(BC_1,	*,		CONTROL,	1)				," &
      "232	(BC_1,	PA7,		OUTPUT3,	X,	233,	1,	Z)	," &
      "231	(BC_4,	PA7,		INPUT,  	X)				," &
      "230	(BC_1,	*,		internal,	0)				," &
      "229	(BC_1,	*,		internal,	0)				," &
      "228	(BC_1,	*,		internal,	0)				," &
      "227	(BC_1,	*,		internal,	0)				," &
      "226	(BC_1,	*,		internal,	0)				," &
      "225	(BC_1,	*,		internal,	0)				," &
      "224	(BC_1,	*,		CONTROL,	1)				," &
      "223	(BC_1,	PB0,		OUTPUT3,	X,	224,	1,	Z)	," &
      "222	(BC_4,	PB0,		INPUT,  	X)				," &
      "221	(BC_1,	*,		CONTROL,	1)				," &
      "220	(BC_1,	PB1,		OUTPUT3,	X,	221,	1,	Z)	," &
      "219	(BC_4,	PB1,		INPUT,  	X)				," &
      "218	(BC_1,	*,		CONTROL,	1)				," &
      "217	(BC_1,	PB2,		OUTPUT3,	X,	218,	1,	Z)	," &
      "216	(BC_4,	PB2,		INPUT,  	X)				," &
      "215	(BC_1,	*,		internal,	0)				," &
      "214	(BC_1,	*,		internal,	0)				," &
      "213	(BC_1,	*,		internal,	0)				," &
      "212	(BC_1,	*,		internal,	0)				," &
      "211	(BC_1,	*,		internal,	0)				," &
      "210	(BC_1,	*,		internal,	0)				," &
      "209	(BC_1,	*,		internal,	0)				," &
      "208	(BC_1,	*,		internal,	0)				," &
      "207	(BC_1,	*,		internal,	0)				," &
      "206	(BC_1,	*,		internal,	0)				," &
      "205	(BC_1,	*,		internal,	0)				," &
      "204	(BC_1,	*,		internal,	0)				," &
      "203	(BC_1,	*,		internal,	0)				," &
      "202	(BC_1,	*,		internal,	0)				," &
      "201	(BC_1,	*,		internal,	0)				," &
      "200	(BC_1,	*,		internal,	0)				," &
      "199	(BC_1,	*,		internal,	0)				," &
      "198	(BC_1,	*,		internal,	0)				," &
      "197	(BC_1,	*,		internal,	0)				," &
      "196	(BC_1,	*,		internal,	0)				," &
      "195	(BC_1,	*,		internal,	0)				," &
      "194	(BC_1,	*,		internal,	0)				," &
      "193	(BC_1,	*,		internal,	0)				," &
      "192	(BC_1,	*,		internal,	0)				," &
      "191	(BC_1,	*,		internal,	0)				," &
      "190	(BC_1,	*,		internal,	0)				," &
      "189	(BC_1,	*,		internal,	0)				," &
      "188	(BC_1,	*,		internal,	0)				," &
      "187	(BC_1,	*,		internal,	0)				," &
      "186	(BC_1,	*,		internal,	0)				," &
      "185	(BC_1,	*,		internal,	0)				," &
      "184	(BC_1,	*,		internal,	0)				," &
      "183	(BC_1,	*,		internal,	0)				," &
      "182	(BC_1,	*,		internal,	0)				," &
      "181	(BC_1,	*,		internal,	0)				," &
      "180	(BC_1,	*,		internal,	0)				," &
      "179	(BC_1,	*,		internal,	0)				," &
      "178	(BC_1,	*,		internal,	0)				," &
      "177	(BC_1,	*,		internal,	0)				," &
      "176	(BC_1,	*,		internal,	0)				," &
      "175	(BC_1,	*,		internal,	0)				," &
      "174	(BC_1,	*,		internal,	0)				," &
      "173	(BC_1,	*,		internal,	0)				," &
      "172	(BC_1,	*,		internal,	0)				," &
      "171	(BC_1,	*,		internal,	0)				," &
      "170	(BC_1,	*,		internal,	0)				," &
      "169	(BC_1,	*,		internal,	0)				," &
      "168	(BC_1,	*,		internal,	0)				," &
      "167	(BC_1,	*,		CONTROL,	1)				," &
      "166	(BC_1,	PB10,		OUTPUT3,	X,	167,	1,	Z)	," &
      "165	(BC_4,	PB10,		INPUT,  	X)				," &
      "164	(BC_1,	*,		CONTROL,	1)				," &
      "163	(BC_1,	PB11,		OUTPUT3,	X,	164,	1,	Z)	," &
      "162	(BC_4,	PB11,		INPUT,  	X)				," &
      "161	(BC_1,	*,		CONTROL,	1)				," &
      "160	(BC_1,	PB12,		OUTPUT3,	X,	161,	1,	Z)	," &
      "159	(BC_4,	PB12,		INPUT,  	X)				," &
      "158	(BC_1,	*,		CONTROL,	1)				," &
      "157	(BC_1,	PB13,		OUTPUT3,	X,	158,	1,	Z)	," &
      "156	(BC_4,	PB13,		INPUT,  	X)				," &
      "155	(BC_1,	*,		CONTROL,	1)				," &
      "154	(BC_1,	PB14,		OUTPUT3,	X,	155,	1,	Z)	," &
      "153	(BC_4,	PB14,		INPUT,  	X)				," &
      "152	(BC_1,	*,		CONTROL,	1)				," &
      "151	(BC_1,	PB15,		OUTPUT3,	X,	152,	1,	Z)	," &
      "150	(BC_4,	PB15,		INPUT,  	X)				," &
      "149	(BC_1,	*,		internal,	0)				," &
      "148	(BC_1,	*,		internal,	0)				," &
      "147	(BC_1,	*,		internal,	0)				," &
      "146	(BC_1,	*,		internal,	0)				," &
      "145	(BC_1,	*,		internal,	0)				," &
      "144	(BC_1,	*,		internal,	0)				," &
      "143	(BC_1,	*,		internal,	0)				," &
      "142	(BC_1,	*,		internal,	0)				," &
      "141	(BC_1,	*,		internal,	0)				," &
      "140	(BC_1,	*,		internal,	0)				," &
      "139	(BC_1,	*,		internal,	0)				," &
      "138	(BC_1,	*,		internal,	0)				," &
      "137	(BC_1,	*,		internal,	0)				," &
      "136	(BC_1,	*,		internal,	0)				," &
      "135	(BC_1,	*,		internal,	0)				," &
      "134	(BC_1,	*,		internal,	0)				," &
      "133	(BC_1,	*,		internal,	0)				," &
      "132	(BC_1,	*,		internal,	0)				," &
      "131	(BC_1,	*,		internal,	0)				," &
      "130	(BC_1,	*,		internal,	0)				," &
      "129	(BC_1,	*,		internal,	0)				," &
      "128	(BC_1,	*,		internal,	0)				," &
      "127	(BC_1,	*,		internal,	0)				," &
      "126	(BC_1,	*,		internal,	0)				," &
      "125	(BC_1,	*,		internal,	0)				," &
      "124	(BC_1,	*,		internal,	0)				," &
      "123	(BC_1,	*,		internal,	0)				," &
      "122	(BC_1,	*,		internal,	0)				," &
      "121	(BC_1,	*,		internal,	0)				," &
      "120	(BC_1,	*,		internal,	0)				," &
      "119	(BC_1,	*,		internal,	0)				," &
      "118	(BC_1,	*,		internal,	0)				," &
      "117	(BC_1,	*,		internal,	0)				," &
      "116	(BC_1,	*,		internal,	0)				," &
      "115	(BC_1,	*,		internal,	0)				," &
      "114	(BC_1,	*,		internal,	0)				," &
      "113	(BC_1,	*,		internal,	0)				," &
      "112	(BC_1,	*,		internal,	0)				," &
      "111	(BC_1,	*,		internal,	0)				," &
      "110	(BC_1,	*,		internal,	0)				," &
      "109	(BC_1,	*,		internal,	0)				," &
      "108	(BC_1,	*,		internal,	0)				," &
      "107	(BC_1,	*,		internal,	0)				," &
      "106	(BC_1,	*,		internal,	0)				," &
      "105	(BC_1,	*,		internal,	0)				," &
      "104	(BC_1,	*,		internal,	0)				," &
      "103	(BC_1,	*,		internal,	0)				," &
      "102 (BC_1,	*,		internal,	0)				," &
      "101	(BC_1,	*,		internal,	0)				," &
      "100	(BC_1,	*,		internal,	0)				," &
      "99	(BC_1,	*,		internal,	0)				," &
      "98	(BC_1,	*,		internal,	0)				," &
      "97	(BC_1,	*,		internal,	0)				," &
      "96	(BC_1,	*,		internal,	0)				," &
      "95	(BC_1,	*,		internal,	0)				," &
      "94	(BC_1,	*,		internal,	0)				," &
      "93	(BC_1,	*,		internal,	0)				," &
      "92	(BC_1,	*,		CONTROL,	1)				," &
      "91	(BC_1,	PA8,		OUTPUT3,	X,	92,	1,	Z)	," &
      "90	(BC_4,	PA8,		INPUT,  	X)				," &
      "89	(BC_1,	*,		CONTROL,	1)				," &
      "88	(BC_1,	PA9,		OUTPUT3,	X,	89,	1,	Z)	," &
      "87	(BC_4,	PA9,		INPUT,  	X)				," &
      "86	(BC_1,	*,		CONTROL,	1)				," &
      "85	(BC_1,	PA10,		OUTPUT3,	X,	86,	1,	Z)	," &
      "84	(BC_4,	PA10,		INPUT,  	X)				," &
      "83	(BC_1,	*,		CONTROL,	1)				," &
      "82	(BC_1,	PA11,		OUTPUT3,	X,	83,	1,	Z)	," &
      "81	(BC_4,	PA11,		INPUT,  	X)				," &
      "80	(BC_1,	*,		CONTROL,	1)				," &
      "79	(BC_1,	PA12,		OUTPUT3,	X,	80,	1,	Z)	," &
      "78	(BC_4,	PA12,		INPUT,  	X)				," &
      "77	(BC_1,	*,		internal,	0)				," &
      "76	(BC_1,	*,		internal,	0)				," &
      "75	(BC_1,	*,		internal,	0)				," &
      "74	(BC_1,	*,		internal,	0)				," &
      "73	(BC_1,	*,		internal,	0)				," &
      "72	(BC_1,	*,		internal,	0)				," &
      "71	(BC_1,	*,		internal,	0)				," &
      "70	(BC_1,	*,		internal,	0)				," &
      "69	(BC_1,	*,		internal,	0)				," &
      "68	(BC_1,	*,		internal,	0)				," &
      "67	(BC_1,	*,		internal,	0)				," &
      "66	(BC_1,	*,		internal,	0)				," &
      "65	(BC_1,	*,		internal,	0)				," &
      "64	(BC_1,	*,		internal,	0)				," &
      "63	(BC_1,	*,		internal,	0)				," &
      "62	(BC_1,	*,		internal,	0)				," &
      "61	(BC_1,	*,		internal,	0)				," &
      "60	(BC_1,	*,		internal,	0)				," &
      "59	(BC_1,	*,		internal,	0)				," &
      "58	(BC_1,	*,		internal,	0)				," &
      "57	(BC_1,	*,		internal,	0)				," &
      "56	(BC_1,	*,		internal,	0)				," &
      "55	(BC_1,	*,		internal,	0)				," &
      "54	(BC_1,	*,		internal,	0)				," &
      "53	(BC_1,	*,		internal,	0)				," &
      "52	(BC_1,	*,		internal,	0)				," &
      "51	(BC_1,	*,		internal,	0)				," &
      "50	(BC_1,	*,		internal,	0)				," &
      "49	(BC_1,	*,		internal,	0)				," &
      "48	(BC_1,	*,		internal,	0)				," &
      "47	(BC_1,	*,		internal,	0)				," &
      "46	(BC_1,	*,		internal,	0)				," &
      "45	(BC_1,	*,		internal,	0)				," &
      "44	(BC_1,	*,		internal,	0)				," &
      "43	(BC_1,	*,		internal,	0)				," &
      "42	(BC_1,	*,		internal,	0)				," &
      "41	(BC_1,	*,		internal,	0)				," &
      "40	(BC_1,	*,		internal,	0)				," &
      "39	(BC_1,	*,		internal,	0)				," &
      "38	(BC_1,	*,		internal,	0)				," &
      "37	(BC_1,	*,		internal,	0)				," &
      "36	(BC_1,	*,		internal,	0)				," &
      "35	(BC_1,	*,		internal,	0)				," &
      "34	(BC_1,	*,		internal,	0)				," &
      "33	(BC_1,	*,		internal,	0)				," &
      "32	(BC_1,	*,		internal,	0)				," &
      "31	(BC_1,	*,		internal,	0)				," &
      "30	(BC_1,	*,		internal,	0)				," &
      "29	(BC_1,	*,		internal,	0)				," &
      "28	(BC_1,	*,		internal,	0)				," &
      "27	(BC_1,	*,		internal,	0)				," &
      "26	(BC_1,	*,		internal,	0)				," &
      "25	(BC_1,	*,		internal,	0)				," &
      "24	(BC_1,	*,		internal,	0)				," &
      "23	(BC_1,	*,		CONTROL,	1)				," &
      "22	(BC_1,	PB5,		OUTPUT3,	X,	23,	1,	Z)	," &
      "21	(BC_4,	PB5,		INPUT,  	X)				," &
      "20	(BC_1,	*,		CONTROL,	1)				," &
      "19	(BC_1,	PB6,		OUTPUT3,	X,	20,	1,	Z)	," &
      "18	(BC_4,	PB6,		INPUT,  	X)				," &
      "17	(BC_1,	*,		CONTROL,	1)				," &
      "16	(BC_1,	PB7,		OUTPUT3,	X,	17,	1,	Z)	," &
      "15	(BC_4,	PB7,		INPUT,  	X)				," &
      "14	(BC_1,	*,		CONTROL,	1)				," &
      "13	(BC_1,	PH3_BOOT0,     	OUTPUT3,	X,	14,	1,	Z)	," &
      "12	(BC_4,	PH3_BOOT0,		INPUT,  	X)				," &
      "11	(BC_1,	*,		CONTROL,	1)				," &
      "10	(BC_1,	PB8,		OUTPUT3,	X,	11,	1,	Z)	," &
      "9	(BC_4,	PB8,		INPUT,  	X)				," &
      "8	(BC_1,	*,		CONTROL,	1)				," &
      "7	(BC_1,	PB9,		OUTPUT3,	X,	8,	1,	Z)	," &
      "6	(BC_4,	PB9,		INPUT,  	X)				," &
      "5	(BC_1,	*,		internal,	0)				," &
      "4	(BC_1,	*,		internal,	0)				," &
      "3	(BC_1,	*,		internal,	0)				," &
      "2	(BC_1,	*,		internal,	0)				," &
      "1	(BC_1,	*,		internal,	0)				," &
      "0	(BC_1,	*,		internal,	0)				 " ;
        									      
    attribute DESIGN_WARNING of STM32L451_UFQFPN48: entity is 				      
      "Device configuration can effect boundary scan behavior. " &		      
      "Keep the NRST pin low to ensure default boundary scan operation " &	      
      "as described in this file." ;

					      
end STM32L451_UFQFPN48;

									      
-- ******************* (C) COPYRIGHT 2017 STMicroelectronics *****END OF FILE********