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BSDL model: DS33X162

-- ***********************************************************************
--
--   BSDL file for design ds33x162
--   Created by Synopsys Version 2000.11 (Nov 27, 2000)
--
--   File Name		:	DS33X162_BSDL.TXT
--   Designer		: 
--   Company		: 	Maxim Integrated Products
--   Documentation	:	DS33X162 datasheet
--   BSDL Revision	:	1.0
--   Date		:	Thu Dec 20 13:45:03 2007
--
--   Device	      	:	DS33X162 RevB1
--   Package	     	:	256-pin PBGA
-- 
--			IMPORTANT NOTICE
-- Maxim Integrated Products customers are advised to obtain the latest version of 
-- device specifications before relying on any published information contained 
-- herein. Maxim Integrated Products assumes no responsibility or liability arising 
-- out of the application of any information described herein.
--
--			IMPORTANT NOTICE ABOUT THE REVISION
--
-- Maxim Integrated Products customers are advised to check the revision of the  
-- device they will be using.  All the codes for the device revisions are 
-- herein this BSDL file.
--
-- The characters "/", "(", ")" and "*" have been removed from signal names for 
-- compatibility with BSDL file format.
-- 
-- ***********************************************************************


 entity ds33x162 is
   
-- This section identifies the default device package selected.
   
   generic (PHYSICAL_PIN_MAP: string:= "PBGA_256");
   
-- This section declares all the ports in the design.
   
   port ( 
          jtclk       : in       bit;
          jtdi        : in       bit;
          jtms        : in       bit;
          jtrst_n     : in       bit;
          refclk      : in       bit;
          rst_n       : in       bit;
          sysclk      : in       bit;
          ale         : inout    bit;
          col1        : inout    bit;
          col2        : inout    bit;
          crs1        : inout    bit;
          crs2        : inout    bit;
          cs_n        : inout    bit;
          dce_sel     : inout    bit;
          int_n       : inout    bit;
          mdc         : inout    bit;
          mdio        : inout    bit;
          mode        : inout    bit;
          rclk1       : inout    bit;
          rclk10      : inout    bit;
          rclk11      : inout    bit;
          rclk12      : inout    bit;
          rclk13      : inout    bit;
          rclk14      : inout    bit;
          rclk15      : inout    bit;
          rclk16      : inout    bit;
          rclk2       : inout    bit;
          rclk3       : inout    bit;
          rclk4       : inout    bit;
          rclk5       : inout    bit;
          rclk6       : inout    bit;
          rclk7       : inout    bit;
          rclk8       : inout    bit;
          rclk9       : inout    bit;
          rd_n        : inout    bit;
          rdata1      : inout    bit;
          rdata10     : inout    bit;
          rdata11     : inout    bit;
          rdata12     : inout    bit;
          rdata13     : inout    bit;
          rdata14     : inout    bit;
          rdata15     : inout    bit;
          rdata16     : inout    bit;
          rdata2      : inout    bit;
          rdata3      : inout    bit;
          rdata4      : inout    bit;
          rdata5      : inout    bit;
          rdata6      : inout    bit;
          rdata7      : inout    bit;
          rdata8      : inout    bit;
          rdata9      : inout    bit;
          rmii_sel    : inout    bit;
          rsync1      : inout    bit;
          rsync10     : inout    bit;
          rsync11     : inout    bit;
          rsync12     : inout    bit;
          rsync13     : inout    bit;
          rsync14     : inout    bit;
          rsync15     : inout    bit;
          rsync16     : inout    bit;
          rsync2      : inout    bit;
          rsync3      : inout    bit;
          rsync4      : inout    bit;
          rsync5      : inout    bit;
          rsync6      : inout    bit;
          rsync7      : inout    bit;
          rsync8      : inout    bit;
          rsync9      : inout    bit;
          rxclk1      : inout    bit;
          rxclk2      : inout    bit;
          rxdv1       : inout    bit;
          rxdv2       : inout    bit;
          rxer1       : inout    bit;
          rxer2       : inout    bit;
          spi_sel     : inout    bit;
          tclk1       : inout    bit;
          tclk2       : inout    bit;
          tclk3       : inout    bit;
          tclk4       : inout    bit;
          tclk5       : inout    bit;
          tclk6       : inout    bit;
          tclk7       : inout    bit;
          tclk8       : inout    bit;
          tdata1      : inout    bit;
          tdata10     : inout    bit;
          tdata11     : inout    bit;
          tdata12     : inout    bit;
          tdata13     : inout    bit;
          tdata14     : inout    bit;
          tdata15     : inout    bit;
          tdata16     : inout    bit;
          tdata2      : inout    bit;
          tdata3      : inout    bit;
          tdata4      : inout    bit;
          tdata5      : inout    bit;
          tdata6      : inout    bit;
          tdata7      : inout    bit;
          tdata8      : inout    bit;
          tdata9      : inout    bit;
          tmclk3      : inout    bit;
          tmclk4      : inout    bit;
          tmsync3     : inout    bit;
          tmsync4     : inout    bit;
          tsync1      : inout    bit;
          tsync2      : inout    bit;
          tsync3      : inout    bit;
          tsync4      : inout    bit;
          tsync5      : inout    bit;
          tsync6      : inout    bit;
          tsync7      : inout    bit;
          tsync8      : inout    bit;
          txclk1      : inout    bit;
          txclk2      : inout    bit;
          txen1       : inout    bit;
          txen2       : inout    bit;
          txer1       : inout    bit;
          txer2       : inout    bit;
          wr_n        : inout    bit;
          a           : inout    bit_vector (0 to 10);
          d           : inout    bit_vector (0 to 7);
          rxd         : inout    bit_vector (0 to 7);
          txd         : inout    bit_vector (0 to 7);
          jtdo        : out      bit;
          gtx_clk1    : buffer   bit;
          avdd        : linkage  bit;
          avss        : linkage  bit;
          hiz_n       : linkage  bit;
          mbist_done  : linkage  bit;
          mbist_en    : linkage  bit;
          mbist_fail  : linkage  bit;
          pll_test_o  : linkage  bit;
          sd_a[0]     : linkage  bit;
          sd_a[10]    : linkage  bit;
          sd_a[11]    : linkage  bit;
          sd_a[12]    : linkage  bit;
          sd_a[1]     : linkage  bit;
          sd_a[2]     : linkage  bit;
          sd_a[3]     : linkage  bit;
          sd_a[4]     : linkage  bit;
          sd_a[5]     : linkage  bit;
          sd_a[6]     : linkage  bit;
          sd_a[7]     : linkage  bit;
          sd_a[8]     : linkage  bit;
          sd_a[9]     : linkage  bit;
          sd_ba[0]    : linkage  bit;
          sd_ba[1]    : linkage  bit;
          sd_cas_n    : linkage  bit;
          sd_clk      : linkage  bit;
          sd_clk_n    : linkage  bit;
          sd_clken    : linkage  bit;
          sd_cs_n     : linkage  bit;
          sd_dq[0]    : linkage  bit;
          sd_dq[10]   : linkage  bit;
          sd_dq[11]   : linkage  bit;
          sd_dq[12]   : linkage  bit;
          sd_dq[13]   : linkage  bit;
          sd_dq[14]   : linkage  bit;
          sd_dq[15]   : linkage  bit;
          sd_dq[1]    : linkage  bit;
          sd_dq[2]    : linkage  bit;
          sd_dq[3]    : linkage  bit;
          sd_dq[4]    : linkage  bit;
          sd_dq[5]    : linkage  bit;
          sd_dq[6]    : linkage  bit;
          sd_dq[7]    : linkage  bit;
          sd_dq[8]    : linkage  bit;
          sd_dq[9]    : linkage  bit;
          sd_ldm      : linkage  bit;
          sd_ldqs     : linkage  bit;
          sd_ras_n    : linkage  bit;
          sd_udm      : linkage  bit;
          sd_udqs     : linkage  bit;
          sd_we_n     : linkage  bit;
          sstl_test_i : linkage  bit;
          sstl_test_o : linkage  bit;
          sten        : linkage  bit;
          stmd        : linkage  bit;
          vref        : linkage  bit;
          vd33        : linkage  bit_vector (1 to 8);
          vdd         : linkage  bit_vector (1 to 9);
          vddp        : linkage  bit_vector (1 to 3);
          vddq        : linkage  bit_vector (1 to 7);
          vss         : linkage  bit_vector (1 to 13);
          vsso        : linkage  bit_vector (1 to 7)
   );
   
   use STD_1149_1_1994.all;
   
   attribute COMPONENT_CONFORMANCE of ds33x162: entity is "STD_1149_1_1993";
   
   attribute PIN_MAP of ds33x162: entity is PHYSICAL_PIN_MAP;
   
-- This section specifies the pin map for each port. This information
-- is extracted from the port-to-pin map file that was read in using
-- the "read_pin_map" command.
   
     constant PBGA_256: PIN_MAP_STRING := 
        "jtclk       : A1," &
        "jtdi        : D2," &
        "jtms        : C1," &
        "jtrst_n     : B1," &
        "refclk      : T13," &
        "rst_n       : E8," &
        "sysclk      : E16," &
        "ale         : J7," &
        "col1        : E14," &
        "col2        : L16," &
        "crs1        : E13," &
        "crs2        : J14," &
        "cs_n        : J8," &
        "dce_sel     : P13," &
        "int_n       : J11," &
        "mdc         : F15," &
        "mdio        : G13," &
        "mode        : J12," &
        "rclk1       : E1," &
        "rclk10      : J2," &
        "rclk11      : M2," &
        "rclk12      : N2," &
        "rclk13      : L5," &
        "rclk14      : T1," &
        "rclk15      : T4," &
        "rclk16      : R3," &
        "rclk2       : G7," &
        "rclk3       : G1," &
        "rclk4       : H4," &
        "rclk5       : F4," &
        "rclk6       : J1," &
        "rclk7       : J5," &
        "rclk8       : J4," &
        "rclk9       : J3," &
        "rd_n        : J9," &
        "rdata1      : D1," &
        "rdata10     : K3," &
        "rdata11     : N1," &
        "rdata12     : L4," &
        "rdata13     : P2," &
        "rdata14     : R1," &
        "rdata15     : N3," &
        "rdata16     : N4," &
        "rdata2      : G8," &
        "rdata3      : G4," &
        "rdata4      : H2," &
        "rdata5      : F3," &
        "rdata6      : F2," &
        "rdata7      : K1," &
        "rdata8      : L1," &
        "rdata9      : K2," &
        "rmii_sel    : M14," &
        "rsync1      : F1," &
        "rsync10     : M1," &
        "rsync11     : L3," &
        "rsync12     : P1," &
        "rsync13     : M4," &
        "rsync14     : R2," &
        "rsync15     : P3," &
        "rsync16     : T3," &
        "rsync2      : H7," &
        "rsync3      : G2," &
        "rsync4      : H1," &
        "rsync5      : G3," &
        "rsync6      : H3," &
        "rsync7      : N5," &
        "rsync8      : L2," &
        "rsync9      : K4," &
        "rxclk1      : G16," &
        "rxclk2      : N13," &
        "rxdv1       : G15," &
        "rxdv2       : M11," &
        "rxer1       : H15," &
        "rxer2       : M12," &
        "spi_sel     : J16," &
        "tclk1       : R5," &
        "tclk2       : P5," &
        "tclk3       : R8," &
        "tclk4       : P9," &
        "tclk5       : M7," &
        "tclk6       : P10," &
        "tclk7       : T10," &
        "tclk8       : R10," &
        "tdata1      : T6," &
        "tdata10     : R11," &
        "tdata11     : N11," &
        "tdata12     : R12," &
        "tdata13     : P14," &
        "tdata14     : P12," &
        "tdata15     : N12," &
        "tdata16     : P11," &
        "tdata2      : T7," &
        "tdata3      : P6," &
        "tdata4      : N9," &
        "tdata5      : M5," &
        "tdata6      : N6," &
        "tdata7      : N7," &
        "tdata8      : R9," &
        "tdata9      : N10," &
        "tmclk3      : T11," &
        "tmclk4      : M10," &
        "tmsync3     : T12," &
        "tmsync4     : N14," &
        "tsync1      : R6," &
        "tsync2      : T8," &
        "tsync3      : M6," &
        "tsync4      : P7," &
        "tsync5      : R7," &
        "tsync6      : P8," &
        "tsync7      : N8," &
        "tsync8      : T9," &
        "txclk1      : M15," &
        "txclk2      : T16," &
        "txen1       : K14," &
        "txen2       : P16," &
        "txer1       : L14," &
        "txer2       : R16," &
        "wr_n        : J10," &
        "a           : (K10, L9, K11, L10, K13, L11, K12, L12, G10, L13, G11" &
        ")," &
        "d           : (K6, L6, K7, L7, K8, L8, K9, M9)," &
        "rxd         : (G14, F13, F14, H14, N16, M16, L15, K16)," &
        "txd         : (J13, K15, J15, H13, N15, P15, R15, T15)," &
        "jtdo        : E2," &
        "gtx_clk1    : R14," &
        "avdd        : F5," &
        "avss        : E11," &
        "hiz_n       : H16," &
        "mbist_done  : H8," &
        "mbist_en    : T5," &
        "mbist_fail  : T2," &
        "pll_test_o  : H6," &
        "sd_a[0]     : C3," &
        "sd_a[10]    : A3," &
        "sd_a[11]    : C6," &
        "sd_a[12]    : A5," &
        "sd_a[1]     : C2," &
        "sd_a[2]     : B2," &
        "sd_a[3]     : A2," &
        "sd_a[4]     : D3," &
        "sd_a[5]     : D4," &
        "sd_a[6]     : B5," &
        "sd_a[7]     : C5," &
        "sd_a[8]     : D5," &
        "sd_a[9]     : B6," &
        "sd_ba[0]    : B4," &
        "sd_ba[1]    : B3," &
        "sd_cas_n    : B7," &
        "sd_clk      : A8," &
        "sd_clk_n    : A9," &
        "sd_clken    : C4," &
        "sd_cs_n     : A4," &
        "sd_dq[0]    : C16," &
        "sd_dq[10]   : D12," &
        "sd_dq[11]   : C10," &
        "sd_dq[12]   : B10," &
        "sd_dq[13]   : B11," &
        "sd_dq[14]   : C11," &
        "sd_dq[15]   : B12," &
        "sd_dq[1]    : B16," &
        "sd_dq[2]    : B15," &
        "sd_dq[3]    : C15," &
        "sd_dq[4]    : A14," &
        "sd_dq[5]    : C12," &
        "sd_dq[6]    : A13," &
        "sd_dq[7]    : B13," &
        "sd_dq[8]    : D9," &
        "sd_dq[9]    : C9," &
        "sd_ldm      : D13," &
        "sd_ldqs     : C13," &
        "sd_ras_n    : A6," &
        "sd_udm      : D7," &
        "sd_udqs     : D8," &
        "sd_we_n     : A7," &
        "sstl_test_i : F7," &
        "sstl_test_o : J6," &
        "sten        : G6," &
        "stmd        : G9," &
        "vref        : B9," &
        "vd33        : (E9, E10, G5, E12, K5, M8, T14, P4)," &
        "vdd         : (D11, E3, E4, F12, G12, H11, H12, M3, R13)," &
        "vddp        : (B8, E5, E7)," &
        "vddq        : (A11, A12, A15, A16, C14, D10, D14)," &
        "vss         : (A10, C7, F6, F8, F9, F10, F11, F16, H5, H9, H10, R4" &
        ", M13)," &
        "vsso        : (B14, C8, D6, D15, D16, E6, E15)";
   
-- This section specifies the TAP ports.
-- For the TAP TCK port, the parameters in the brackets are:
--        First Field : Maximum  TCK frequency.
--        Second Field: Allowable states TCK may be stopped in.
   
   attribute TAP_SCAN_CLOCK of jtclk  : signal is (10.0e6, BOTH);
   attribute TAP_SCAN_IN    of jtdi   : signal is true;
   attribute TAP_SCAN_MODE  of jtms   : signal is true;
   attribute TAP_SCAN_OUT   of jtdo   : signal is true;
   attribute TAP_SCAN_RESET of jtrst_n: signal is true;
   
-- Specifies the number of bits in the instruction register.
   
   attribute INSTRUCTION_LENGTH of ds33x162: entity is 3;
   
-- Specifies the boundary-scan instructions implemented in the
-- design and their opcodes.
   
   attribute INSTRUCTION_OPCODE of ds33x162: entity is 
     "BYPASS (111)," &
     "EXTEST (000)," &
     "SAMPLE (010)," &
     "CLAMP  (011)," &
     "HIGHZ  (100)," &
     "USER1  (101)," &
     "USER2  (110)," &
     "IDCODE (001)";
   
-- Specifies the bit pattern that is loaded into the instruction
-- register when the TAP controller passes through the Capture-IR
-- state. The standard mandates that the two LSBs must be "01".
-- The remaining bits are design specific.
   
   attribute INSTRUCTION_CAPTURE of ds33x162: entity is "001";
   
-- Specifies the bit pattern that is loaded into the DEVICE_ID
-- register during the IDCODE instruction when the TAP controller
-- passes through the Capture-DR state.
   
   attribute IDCODE_REGISTER of ds33x162: entity is 
     "0001" &                  -- 4-bit version number
     "0000000001100101" &      -- 16-bit part number
     "00010100001" &           -- 11-bit identity of the manufacturer
     "1";                      -- Required by IEEE Std 1149.1
   
-- This section specifies the test data register placed between TDI
-- and TDO for each implemented instruction.
   
   attribute REGISTER_ACCESS of ds33x162: entity is 
        "BYPASS    (BYPASS, CLAMP, HIGHZ, USER1, USER2)," &
        "BOUNDARY  (EXTEST, SAMPLE)," &
        "DEVICE_ID (IDCODE)";
   
-- Specifies the length of the boundary scan register.
   
   attribute BOUNDARY_LENGTH of ds33x162: entity is 312;
   
-- The following list specifies the characteristics of each cell
-- in the boundary scan register from TDI to TDO.
-- The following is a description of the label fields:
--      num     : Is the cell number.
--      cell    : Is the cell type as defined by the standard.
--      port    : Is the design port name. Control cells do not
--                have a port name.
--      function: Is the function of the cell as defined by the
--                standard. Is one of input, output2, output3,
--                bidir, control or controlr.
--      safe    : Specifies the value that the BSR cell should be
--                loaded with for safe operation when the software
--                might otherwise choose a random value.
--      ccell   : The control cell number. Specifies the control
--                cell that drives the output enable for this port.
--      disval  : Specifies the value that is loaded into the
--                control cell to disable the output enable for
--                the corresponding port.
--      rslt    : Resulting state. Shows the state of the driver
--                when it is disabled.
   
   attribute BOUNDARY_REGISTER of ds33x162: entity is 
--    
--    num   cell   port      function      safe  [ccell  disval  rslt]
--    
     "311  (BC_1,  *,        control,      0),                        " &
     "310  (BC_0,  rdata1,   bidir,        X,    311,    0,      Z),  " &
     "309  (BC_1,  *,        control,      0),                        " &
     "308  (BC_0,  rclk1,    bidir,        X,    309,    0,      Z),  " &
     "307  (BC_1,  *,        control,      0),                        " &
     "306  (BC_0,  rsync1,   bidir,        X,    307,    0,      Z),  " &
     "305  (BC_0,  *,        internal,     X),                        " &
     "304  (BC_0,  *,        internal,     X),                        " &
     "303  (BC_0,  *,        internal,     X),                        " &
     "302  (BC_0,  *,        internal,     X),                        " &
     "301  (BC_0,  *,        internal,     X),                        " &
     "300  (BC_0,  *,        internal,     X),                        " &
     "299  (BC_0,  *,        internal,     X),                        " &
     "298  (BC_0,  *,        internal,     X),                        " &
     "297  (BC_1,  *,        control,      0),                        " &
     "296  (BC_0,  rdata2,   bidir,        X,    297,    0,      Z),  " &
     "295  (BC_1,  *,        control,      0),                        " &
     "294  (BC_0,  rclk2,    bidir,        X,    295,    0,      Z),  " &
     "293  (BC_1,  *,        control,      0),                        " &
     "292  (BC_0,  rsync2,   bidir,        X,    293,    0,      Z),  " &
     "291  (BC_1,  *,        control,      0),                        " &
     "290  (BC_0,  rdata3,   bidir,        X,    291,    0,      Z),  " &
     "289  (BC_1,  *,        control,      0),                        " &
     "288  (BC_0,  rclk3,    bidir,        X,    289,    0,      Z),  " &
     "287  (BC_1,  *,        control,      0),                        " &
     "286  (BC_0,  rsync3,   bidir,        X,    287,    0,      Z),  " &
     "285  (BC_1,  *,        control,      0),                        " &
     "284  (BC_0,  rdata4,   bidir,        X,    285,    0,      Z),  " &
     "283  (BC_1,  *,        control,      0),                        " &
     "282  (BC_0,  rclk4,    bidir,        X,    283,    0,      Z),  " &
     "281  (BC_1,  *,        control,      0),                        " &
     "280  (BC_0,  rsync4,   bidir,        X,    281,    0,      Z),  " &
     "279  (BC_1,  *,        control,      0),                        " &
     "278  (BC_0,  rdata5,   bidir,        X,    279,    0,      Z),  " &
     "277  (BC_1,  *,        control,      0),                        " &
     "276  (BC_0,  rclk5,    bidir,        X,    277,    0,      Z),  " &
     "275  (BC_1,  *,        control,      0),                        " &
     "274  (BC_0,  rsync5,   bidir,        X,    275,    0,      Z),  " &
     "273  (BC_1,  *,        control,      0),                        " &
     "272  (BC_0,  rdata6,   bidir,        X,    273,    0,      Z),  " &
     "271  (BC_1,  *,        control,      0),                        " &
     "270  (BC_0,  rclk6,    bidir,        X,    271,    0,      Z),  " &
     "269  (BC_1,  *,        control,      0),                        " &
     "268  (BC_0,  rsync6,   bidir,        X,    269,    0,      Z),  " &
     "267  (BC_1,  *,        control,      0),                        " &
     "266  (BC_0,  rdata7,   bidir,        X,    267,    0,      Z),  " &
     "265  (BC_1,  *,        control,      0),                        " &
     "264  (BC_0,  rclk7,    bidir,        X,    265,    0,      Z),  " &
     "263  (BC_1,  *,        control,      0),                        " &
     "262  (BC_0,  rsync7,   bidir,        X,    263,    0,      Z),  " &
     "261  (BC_1,  *,        control,      0),                        " &
     "260  (BC_0,  rdata8,   bidir,        X,    261,    0,      Z),  " &
     "259  (BC_1,  *,        control,      0),                        " &
     "258  (BC_0,  rclk8,    bidir,        X,    259,    0,      Z),  " &
     "257  (BC_1,  *,        control,      0),                        " &
     "256  (BC_0,  rsync8,   bidir,        X,    257,    0,      Z),  " &
     "255  (BC_1,  *,        control,      0),                        " &
     "254  (BC_0,  rdata9,   bidir,        X,    255,    0,      Z),  " &
     "253  (BC_1,  *,        control,      0),                        " &
     "252  (BC_0,  rclk9,    bidir,        X,    253,    0,      Z),  " &
     "251  (BC_1,  *,        control,      0),                        " &
     "250  (BC_0,  rsync9,   bidir,        X,    251,    0,      Z),  " &
     "249  (BC_1,  *,        control,      0),                        " &
     "248  (BC_0,  rdata10,  bidir,        X,    249,    0,      Z),  " &
     "247  (BC_1,  *,        control,      0),                        " &
     "246  (BC_0,  rclk10,   bidir,        X,    247,    0,      Z),  " &
     "245  (BC_1,  *,        control,      0),                        " &
     "244  (BC_0,  rsync10,  bidir,        X,    245,    0,      Z),  " &
     "243  (BC_1,  *,        control,      0),                        " &
     "242  (BC_0,  rdata11,  bidir,        X,    243,    0,      Z),  " &
     "241  (BC_1,  *,        control,      0),                        " &
     "240  (BC_0,  rclk11,   bidir,        X,    241,    0,      Z),  " &
     "239  (BC_1,  *,        control,      0),                        " &
     "238  (BC_0,  rsync11,  bidir,        X,    239,    0,      Z),  " &
     "237  (BC_1,  *,        control,      0),                        " &
     "236  (BC_0,  rdata12,  bidir,        X,    237,    0,      Z),  " &
     "235  (BC_1,  *,        control,      0),                        " &
     "234  (BC_0,  rclk12,   bidir,        X,    235,    0,      Z),  " &
     "233  (BC_1,  *,        control,      0),                        " &
     "232  (BC_0,  rsync12,  bidir,        X,    233,    0,      Z),  " &
     "231  (BC_1,  *,        control,      0),                        " &
     "230  (BC_0,  rdata13,  bidir,        X,    231,    0,      Z),  " &
     "229  (BC_1,  *,        control,      0),                        " &
     "228  (BC_0,  rclk13,   bidir,        X,    229,    0,      Z),  " &
     "227  (BC_1,  *,        control,      0),                        " &
     "226  (BC_0,  rsync13,  bidir,        X,    227,    0,      Z),  " &
     "225  (BC_1,  *,        control,      0),                        " &
     "224  (BC_0,  rdata14,  bidir,        X,    225,    0,      Z),  " &
     "223  (BC_1,  *,        control,      0),                        " &
     "222  (BC_0,  rclk14,   bidir,        X,    223,    0,      Z),  " &
     "221  (BC_1,  *,        control,      0),                        " &
     "220  (BC_0,  rsync14,  bidir,        X,    221,    0,      Z),  " &
     "219  (BC_1,  *,        control,      0),                        " &
     "218  (BC_0,  rdata15,  bidir,        X,    219,    0,      Z),  " &
     "217  (BC_1,  *,        control,      0),                        " &
     "216  (BC_0,  rclk15,   bidir,        X,    217,    0,      Z),  " &
     "215  (BC_1,  *,        control,      0),                        " &
     "214  (BC_0,  rsync15,  bidir,        X,    215,    0,      Z),  " &
     "213  (BC_1,  *,        control,      0),                        " &
     "212  (BC_0,  rdata16,  bidir,        X,    213,    0,      Z),  " &
     "211  (BC_1,  *,        control,      0),                        " &
     "210  (BC_0,  rclk16,   bidir,        X,    211,    0,      Z),  " &
     "209  (BC_1,  *,        control,      0),                        " &
     "208  (BC_0,  rsync16,  bidir,        X,    209,    0,      Z),  " &
     "207  (BC_1,  *,        control,      0),                        " &
     "206  (BC_0,  tdata1,   bidir,        X,    207,    0,      Z),  " &
     "205  (BC_1,  *,        control,      0),                        " &
     "204  (BC_0,  tclk1,    bidir,        X,    205,    0,      Z),  " &
     "203  (BC_1,  *,        control,      0),                        " &
     "202  (BC_0,  tsync1,   bidir,        X,    203,    0,      Z),  " &
     "201  (BC_0,  *,        internal,     X),                        " &
     "200  (BC_0,  *,        internal,     X),                        " &
     "199  (BC_0,  *,        internal,     X),                        " &
     "198  (BC_0,  *,        internal,     X),                        " &
     "197  (BC_0,  *,        internal,     X),                        " &
     "196  (BC_0,  *,        internal,     X),                        " &
     "195  (BC_0,  *,        internal,     X),                        " &
     "194  (BC_0,  *,        internal,     X),                        " &
     "193  (BC_1,  *,        control,      0),                        " &
     "192  (BC_0,  tdata2,   bidir,        X,    193,    0,      Z),  " &
     "191  (BC_1,  *,        control,      0),                        " &
     "190  (BC_0,  tclk2,    bidir,        X,    191,    0,      Z),  " &
     "189  (BC_1,  *,        control,      0),                        " &
     "188  (BC_0,  tsync2,   bidir,        X,    189,    0,      Z),  " &
     "187  (BC_1,  *,        control,      0),                        " &
     "186  (BC_0,  tdata3,   bidir,        X,    187,    0,      Z),  " &
     "185  (BC_1,  *,        control,      0),                        " &
     "184  (BC_0,  tclk3,    bidir,        X,    185,    0,      Z),  " &
     "183  (BC_1,  *,        control,      0),                        " &
     "182  (BC_0,  tsync3,   bidir,        X,    183,    0,      Z),  " &
     "181  (BC_1,  *,        control,      0),                        " &
     "180  (BC_0,  tdata4,   bidir,        X,    181,    0,      Z),  " &
     "179  (BC_1,  *,        control,      0),                        " &
     "178  (BC_0,  tclk4,    bidir,        X,    179,    0,      Z),  " &
     "177  (BC_1,  *,        control,      0),                        " &
     "176  (BC_0,  tsync4,   bidir,        X,    177,    0,      Z),  " &
     "175  (BC_1,  *,        control,      0),                        " &
     "174  (BC_0,  tdata5,   bidir,        X,    175,    0,      Z),  " &
     "173  (BC_1,  *,        control,      0),                        " &
     "172  (BC_0,  tclk5,    bidir,        X,    173,    0,      Z),  " &
     "171  (BC_1,  *,        control,      0),                        " &
     "170  (BC_0,  tsync5,   bidir,        X,    171,    0,      Z),  " &
     "169  (BC_1,  *,        control,      0),                        " &
     "168  (BC_0,  tdata6,   bidir,        X,    169,    0,      Z),  " &
     "167  (BC_1,  *,        control,      0),                        " &
     "166  (BC_0,  tclk6,    bidir,        X,    167,    0,      Z),  " &
     "165  (BC_1,  *,        control,      0),                        " &
     "164  (BC_0,  tsync6,   bidir,        X,    165,    0,      Z),  " &
     "163  (BC_1,  *,        control,      0),                        " &
     "162  (BC_0,  tdata7,   bidir,        X,    163,    0,      Z),  " &
     "161  (BC_1,  *,        control,      0),                        " &
     "160  (BC_0,  tclk7,    bidir,        X,    161,    0,      Z),  " &
     "159  (BC_1,  *,        control,      0),                        " &
     "158  (BC_0,  tsync7,   bidir,        X,    159,    0,      Z),  " &
     "157  (BC_1,  *,        control,      0),                        " &
     "156  (BC_0,  tdata8,   bidir,        X,    157,    0,      Z),  " &
     "155  (BC_1,  *,        control,      0),                        " &
     "154  (BC_0,  tclk8,    bidir,        X,    155,    0,      Z),  " &
     "153  (BC_1,  *,        control,      0),                        " &
     "152  (BC_0,  tsync8,   bidir,        X,    153,    0,      Z),  " &
     "151  (BC_1,  *,        control,      0),                        " &
     "150  (BC_0,  tdata9,   bidir,        X,    151,    0,      Z),  " &
     "149  (BC_1,  *,        control,      0),                        " &
     "148  (BC_0,  tmclk3,   bidir,        X,    149,    0,      Z),  " &
     "147  (BC_1,  *,        control,      0),                        " &
     "146  (BC_0,  tmsync3,  bidir,        X,    147,    0,      Z),  " &
     "145  (BC_1,  *,        control,      0),                        " &
     "144  (BC_0,  tdata10,  bidir,        X,    145,    0,      Z),  " &
     "143  (BC_1,  *,        control,      0),                        " &
     "142  (BC_0,  tdata11,  bidir,        X,    143,    0,      Z),  " &
     "141  (BC_1,  *,        control,      0),                        " &
     "140  (BC_0,  tdata12,  bidir,        X,    141,    0,      Z),  " &
     "139  (BC_1,  *,        control,      0),                        " &
     "138  (BC_0,  tdata13,  bidir,        X,    139,    0,      Z),  " &
     "137  (BC_1,  *,        control,      0),                        " &
     "136  (BC_0,  tmclk4,   bidir,        X,    137,    0,      Z),  " &
     "135  (BC_1,  *,        control,      0),                        " &
     "134  (BC_0,  tmsync4,  bidir,        X,    135,    0,      Z),  " &
     "133  (BC_1,  *,        control,      0),                        " &
     "132  (BC_0,  tdata14,  bidir,        X,    133,    0,      Z),  " &
     "131  (BC_1,  *,        control,      0),                        " &
     "130  (BC_0,  tdata15,  bidir,        X,    131,    0,      Z),  " &
     "129  (BC_1,  *,        control,      0),                        " &
     "128  (BC_0,  tdata16,  bidir,        X,    129,    0,      Z),  " &
     "127  (BC_1,  refclk,   input,        X),                        " &
     "126  (BC_1,  *,        control,      0),                        " &
     "125  (BC_0,  dce_sel,  bidir,        X,    126,    0,      Z),  " &
     "124  (BC_1,  *,        control,      0),                        " &
     "123  (BC_0,  rmii_sel, bidir,        X,    124,    0,      Z),  " &
     "122  (BC_1,  *,        control,      0),                        " &
     "121  (BC_0,  txclk2,   bidir,        X,    122,    0,      Z),  " &
     "120  (BC_1,  *,        control,      0),                        " &
     "119  (BC_0,  txer2,    bidir,        X,    120,    0,      Z),  " &
     "118  (BC_2,  gtx_clk1, output2,      X),                        " &
     "117  (BC_1,  *,        control,      0),                        " &
     "116  (BC_0,  txen2,    bidir,        X,    117,    0,      Z),  " &
     "115  (BC_1,  *,        control,      0),                        " &
     "114  (BC_0,  txd(4),   bidir,        X,    115,    0,      Z),  " &
     "113  (BC_1,  *,        control,      0),                        " &
     "112  (BC_0,  txd(5),   bidir,        X,    113,    0,      Z),  " &
     "111  (BC_1,  *,        control,      0),                        " &
     "110  (BC_0,  txd(6),   bidir,        X,    111,    0,      Z),  " &
     "109  (BC_1,  *,        control,      0),                        " &
     "108  (BC_0,  txd(7),   bidir,        X,    109,    0,      Z),  " &
     "107  (BC_1,  *,        control,      0),                        " &
     "106  (BC_0,  rxclk2,   bidir,        X,    107,    0,      Z),  " &
     "105  (BC_1,  *,        control,      0),                        " &
     "104  (BC_0,  rxer2,    bidir,        X,    105,    0,      Z),  " &
     "103  (BC_1,  *,        control,      0),                        " &
     "102  (BC_0,  rxdv2,    bidir,        X,    103,    0,      Z),  " &
     "101  (BC_1,  *,        control,      0),                        " &
     "100  (BC_0,  rxd(4),   bidir,        X,    101,    0,      Z),  " &
     "99   (BC_1,  *,        control,      0),                        " &
     "98   (BC_0,  rxd(5),   bidir,        X,    99,     0,      Z),  " &
     "97   (BC_1,  *,        control,      0),                        " &
     "96   (BC_0,  rxd(6),   bidir,        X,    97,     0,      Z),  " &
     "95   (BC_1,  *,        control,      0),                        " &
     "94   (BC_0,  rxd(7),   bidir,        X,    95,     0,      Z),  " &
     "93   (BC_1,  *,        control,      0),                        " &
     "92   (BC_0,  col2,     bidir,        X,    93,     0,      Z),  " &
     "91   (BC_1,  *,        control,      0),                        " &
     "90   (BC_0,  crs2,     bidir,        X,    91,     0,      Z),  " &
     "89   (BC_1,  *,        control,      0),                        " &
     "88   (BC_0,  txclk1,   bidir,        X,    89,     0,      Z),  " &
     "87   (BC_1,  *,        control,      0),                        " &
     "86   (BC_0,  txer1,    bidir,        X,    87,     0,      Z),  " &
     "85   (BC_1,  *,        control,      0),                        " &
     "84   (BC_0,  txen1,    bidir,        X,    85,     0,      Z),  " &
     "83   (BC_1,  *,        control,      0),                        " &
     "82   (BC_0,  txd(0),   bidir,        X,    83,     0,      Z),  " &
     "81   (BC_1,  *,        control,      0),                        " &
     "80   (BC_0,  txd(1),   bidir,        X,    81,     0,      Z),  " &
     "79   (BC_1,  *,        control,      0),                        " &
     "78   (BC_0,  txd(2),   bidir,        X,    79,     0,      Z),  " &
     "77   (BC_1,  *,        control,      0),                        " &
     "76   (BC_0,  txd(3),   bidir,        X,    77,     0,      Z),  " &
     "75   (BC_1,  *,        control,      0),                        " &
     "74   (BC_0,  rxclk1,   bidir,        X,    75,     0,      Z),  " &
     "73   (BC_1,  *,        control,      0),                        " &
     "72   (BC_0,  rxer1,    bidir,        X,    73,     0,      Z),  " &
     "71   (BC_1,  *,        control,      0),                        " &
     "70   (BC_0,  rxdv1,    bidir,        X,    71,     0,      Z),  " &
     "69   (BC_1,  *,        control,      0),                        " &
     "68   (BC_0,  rxd(0),   bidir,        X,    69,     0,      Z),  " &
     "67   (BC_1,  *,        control,      0),                        " &
     "66   (BC_0,  rxd(1),   bidir,        X,    67,     0,      Z),  " &
     "65   (BC_1,  *,        control,      0),                        " &
     "64   (BC_0,  rxd(2),   bidir,        X,    65,     0,      Z),  " &
     "63   (BC_1,  *,        control,      0),                        " &
     "62   (BC_0,  rxd(3),   bidir,        X,    63,     0,      Z),  " &
     "61   (BC_1,  *,        control,      0),                        " &
     "60   (BC_0,  col1,     bidir,        X,    61,     0,      Z),  " &
     "59   (BC_1,  *,        control,      0),                        " &
     "58   (BC_0,  crs1,     bidir,        X,    59,     0,      Z),  " &
     "57   (BC_1,  *,        control,      0),                        " &
     "56   (BC_0,  mdio,     bidir,        X,    57,     0,      Z),  " &
     "55   (BC_1,  *,        control,      0),                        " &
     "54   (BC_0,  mdc,      bidir,        X,    55,     0,      Z),  " &
     "53   (BC_1,  *,        control,      0),                        " &
     "52   (BC_0,  d(7),     bidir,        X,    53,     0,      Z),  " &
     "51   (BC_1,  *,        control,      0),                        " &
     "50   (BC_0,  d(6),     bidir,        X,    51,     0,      Z),  " &
     "49   (BC_1,  *,        control,      0),                        " &
     "48   (BC_0,  d(5),     bidir,        X,    49,     0,      Z),  " &
     "47   (BC_1,  *,        control,      0),                        " &
     "46   (BC_0,  d(4),     bidir,        X,    47,     0,      Z),  " &
     "45   (BC_1,  *,        control,      0),                        " &
     "44   (BC_0,  d(3),     bidir,        X,    45,     0,      Z),  " &
     "43   (BC_1,  *,        control,      0),                        " &
     "42   (BC_0,  d(2),     bidir,        X,    43,     0,      Z),  " &
     "41   (BC_1,  *,        control,      0),                        " &
     "40   (BC_0,  d(1),     bidir,        X,    41,     0,      Z),  " &
     "39   (BC_1,  *,        control,      0),                        " &
     "38   (BC_0,  d(0),     bidir,        X,    39,     0,      Z),  " &
     "37   (BC_1,  *,        control,      0),                        " &
     "36   (BC_0,  a(10),    bidir,        X,    37,     0,      Z),  " &
     "35   (BC_1,  *,        control,      0),                        " &
     "34   (BC_0,  a(9),     bidir,        X,    35,     0,      Z),  " &
     "33   (BC_1,  *,        control,      0),                        " &
     "32   (BC_0,  a(8),     bidir,        X,    33,     0,      Z),  " &
     "31   (BC_1,  *,        control,      0),                        " &
     "30   (BC_0,  a(7),     bidir,        X,    31,     0,      Z),  " &
     "29   (BC_1,  *,        control,      0),                        " &
     "28   (BC_0,  a(6),     bidir,        X,    29,     0,      Z),  " &
     "27   (BC_1,  *,        control,      0),                        " &
     "26   (BC_0,  a(5),     bidir,        X,    27,     0,      Z),  " &
     "25   (BC_1,  *,        control,      0),                        " &
     "24   (BC_0,  a(4),     bidir,        X,    25,     0,      Z),  " &
     "23   (BC_1,  *,        control,      0),                        " &
     "22   (BC_0,  a(3),     bidir,        X,    23,     0,      Z),  " &
     "21   (BC_1,  *,        control,      0),                        " &
     "20   (BC_0,  a(2),     bidir,        X,    21,     0,      Z),  " &
     "19   (BC_1,  *,        control,      0),                        " &
     "18   (BC_0,  a(1),     bidir,        X,    19,     0,      Z),  " &
     "17   (BC_1,  *,        control,      0),                        " &
     "16   (BC_0,  a(0),     bidir,        X,    17,     0,      Z),  " &
     "15   (BC_1,  *,        control,      0),                        " &
     "14   (BC_0,  ale,      bidir,        X,    15,     0,      Z),  " &
     "13   (BC_1,  *,        control,      0),                        " &
     "12   (BC_0,  cs_n,     bidir,        X,    13,     0,      Z),  " &
     "11   (BC_1,  *,        control,      0),                        " &
     "10   (BC_0,  rd_n,     bidir,        X,    11,     0,      Z),  " &
     "9    (BC_1,  *,        control,      0),                        " &
     "8    (BC_0,  wr_n,     bidir,        X,    9,      0,      Z),  " &
     "7    (BC_1,  *,        control,      0),                        " &
     "6    (BC_0,  int_n,    bidir,        X,    7,      0,      Z),  " &
     "5    (BC_1,  *,        control,      0),                        " &
     "4    (BC_0,  mode,     bidir,        X,    5,      0,      Z),  " &
     "3    (BC_1,  *,        control,      0),                        " &
     "2    (BC_0,  spi_sel,  bidir,        X,    3,      0,      Z),  " &
     "1    (BC_1,  sysclk,   input,        X),                        " &
     "0    (BC_1,  rst_n,    input,        X)                         ";
 
 end ds33x162;