--$ XILINX$RCSfile: xc2v40_cs144.bsd,v $
--$ XILINX$Revision: 1.1 $
--
-- BSDL file for device XC2V40, package CS144
-- Xilinx, Inc. $State: ADVANCED $ $Date: 2001-01-04 16:28:54-08 $
-- Generated by createBSDL 2.20lh
--
-- For technical support, http://support.xilinx.com -> enter text 'bsdl'
-- in the text search box at the left of the page. If none of
-- these records resolve your problem you should open a web support case
-- or contact our technical support at:
--
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-- Germany (49) 89 991 54930 dlhelp@xilinx.com
-- Japan (81) 3-3297-9163 jhotline@xilinx.com
--
-- This BSDL file reflects the pre-configuration JTAG behavior. To reflect
-- the post-configuration JTAG behavior (if any), edit this file as described
-- below. Many of these changes are demonstrated by commented-out template
-- lines preceeding the lines they would replace:
--
-- 1. Enable USER instructions as appropriate (see below).
-- 2. Set disable result of all pads as configured.
-- 3. Set safe state of boundary cells as necessary.
-- 4. Rename entity if necessary to avoid name collisions.
-- 5. Modify USERCODE value in USERCODE_REGISTER declaration.
--
-- To avoid power-down, the boundary scan test vectors should keep
-- the PWRDWN_B pin high.
--
-- To prevent losing the current configuration, the boundary scan
-- test vectors should keep the PROG_B pin high.
--
-- PWRDWN_B and PROG_B can only be captured, not updated. The value
-- at the pin is always used by the device.
--
-- All IOBs prior to configuration, and unused and output-only IOBs following
-- configuration, will sense their pad values during boundary-scan with an LVTTL
-- input buffer. In order to properly capture a logic high value at one
-- of these IOBs into its input boundary scan cell, VCCO must be
-- at least 2V (Vih for LVTTL).
--
-- For post-configuration boundary scan only: If an IOB is configured to use
-- an input standard that uses VREF pins, then the boundary scan test vectors
-- must keep the used VREF pins 3-stated.
--
-- The disable result of a 3-stated I/O in this file correspond
-- to HSWAP_EN being high. If HSWAP_EN is low, every PULL0 should
-- be changed to PULL1.
--
-- HSWAP_EN, M0, M1, and M2 can only be captured, not updated. The value
-- at the pin is always used by the device.
entity XC2V40_CS144 is
generic (PHYSICAL_PIN_MAP : string := "CS144" );
port (
CCLK_M13: inout bit;
DONE_N12: inout bit;
GND: linkage bit_vector (1 to 12);
HSWAP_EN_A1: in bit;
M0_N2: in bit;
M1_M2: in bit;
M2_M3: in bit;
NOCONNECT: linkage bit_vector (1 to 4);
PROG_B: in bit;
PWRDWN_B: in bit;
RSVD: linkage bit_vector (1 to 3);
TCK: in bit;
TDI: in bit;
TDO: out bit;
TMS: in bit;
VBATT: linkage bit;
VCCAUX: linkage bit_vector (1 to 4);
VCCINT: linkage bit_vector (1 to 4);
VCCO0: linkage bit_vector (1 to 2);
VCCO1: linkage bit_vector (1 to 2);
VCCO2: linkage bit_vector (1 to 2);
VCCO3: linkage bit_vector (1 to 2);
VCCO4: linkage bit_vector (1 to 2);
VCCO5: linkage bit_vector (1 to 2);
VCCO6: linkage bit_vector (1 to 2);
VCCO7: linkage bit_vector (1 to 2);
IO_A3: inout bit; -- PAD2
IO_A4: inout bit; -- PAD5
IO_A5: inout bit; -- PAD7
IO_A6: inout bit; -- PAD11
IO_A7: inout bit; -- PAD13
IO_A8: inout bit; -- PAD15
IO_A10: inout bit; -- PAD21
IO_B3: inout bit; -- PAD1
IO_B4: inout bit; -- PAD4
IO_B6: inout bit; -- PAD10
IO_B7: inout bit; -- PAD14
IO_B8: inout bit; -- PAD16
IO_B10: inout bit; -- PAD22
IO_C4: inout bit; -- PAD3
IO_C6: inout bit; -- PAD9
IO_C8: inout bit; -- PAD17
IO_C9: inout bit; -- PAD19
IO_C10: inout bit; -- PAD23
IO_C13: inout bit; -- PAD25
IO_D1: inout bit; -- PAD94
IO_D2: inout bit; -- PAD95
IO_D3: inout bit; -- PAD96
IO_D5: inout bit; -- PAD6
IO_D6: inout bit; -- PAD8
IO_D7: inout bit; -- PAD12
IO_D8: inout bit; -- PAD18
IO_D9: inout bit; -- PAD20
IO_D10: inout bit; -- PAD24
IO_D11: inout bit; -- PAD26
IO_D12: inout bit; -- PAD27
IO_D13: inout bit; -- PAD28
IO_E2: inout bit; -- PAD91
IO_E3: inout bit; -- PAD92
IO_E4: inout bit; -- PAD93
IO_E10: inout bit; -- PAD29
IO_E11: inout bit; -- PAD30
IO_F1: inout bit; -- PAD90
IO_F12: inout bit; -- PAD31
IO_G1: inout bit; -- PAD89
IO_G3: inout bit; -- PAD86
IO_G4: inout bit; -- PAD85
IO_G10: inout bit; -- PAD32
IO_G11: inout bit; -- PAD35
IO_G12: inout bit; -- PAD37
IO_G13: inout bit; -- PAD36
IO_H1: inout bit; -- PAD84
IO_H3: inout bit; -- PAD83
IO_H4: inout bit; -- PAD80
IO_H11: inout bit; -- PAD41
IO_H12: inout bit; -- PAD38
IO_J2: inout bit; -- PAD79
IO_J10: inout bit; -- PAD43
IO_J13: inout bit; -- PAD42
IO_K1: inout bit; -- PAD78
IO_K2: inout bit; -- PAD77
IO_K3: inout bit; -- PAD76
IO_K4: inout bit; -- PAD72
IO_K5: inout bit; -- PAD68
IO_K6: inout bit; -- PAD66
IO_K7: inout bit; -- PAD60
IO_K8: inout bit; -- PAD56
IO_K9: inout bit; -- PAD54
IO_K10: inout bit; -- PAD47
IO_K11: inout bit; -- PAD46
IO_K12: inout bit; -- PAD45
IO_K13: inout bit; -- PAD44
IO_L1: inout bit; -- PAD75
IO_L2: inout bit; -- PAD74
IO_L3: inout bit; -- PAD73
IO_L4: inout bit; -- PAD71
IO_L5: inout bit; -- PAD67
IO_L6: inout bit; -- PAD65
IO_L8: inout bit; -- PAD57
IO_L10: inout bit; -- PAD51
IO_L13: inout bit; -- PAD48
IO_M4: inout bit; -- PAD70
IO_M6: inout bit; -- PAD64
IO_M7: inout bit; -- PAD62
IO_M8: inout bit; -- PAD58
IO_M10: inout bit; -- PAD52
IO_M11: inout bit; -- PAD49
IO_N4: inout bit; -- PAD69
IO_N6: inout bit; -- PAD63
IO_N7: inout bit; -- PAD61
IO_N8: inout bit; -- PAD59
IO_N9: inout bit; -- PAD55
IO_N10: inout bit; -- PAD53
IO_N11: inout bit -- PAD50
); --end port list
use STD_1149_1_1994.all;
attribute COMPONENT_CONFORMANCE of XC2V40_CS144 : entity is
"STD_1149_1_1993";
attribute PIN_MAP of XC2V40_CS144 : entity is PHYSICAL_PIN_MAP;
constant CS144: PIN_MAP_STRING:=
"CCLK_M13:M13," &
"DONE_N12:N12," &
"GND:(B9,C5,E1,E12,F13,G2,H10,J1,J4,J11," &
"L9,M5)," &
"HSWAP_EN_A1:A1," &
"M0_N2:N2," &
"M1_M2:M2," &
"M2_M3:M3," &
"NOCONNECT:(E13,F2,F4,F11)," &
"PROG_B:B1," &
"PWRDWN_B:M12," &
"RSVD:(A2,B2,B11)," &
"TCK:B12," &
"TDI:C1," &
"TDO:C11," &
"TMS:A13," &
"VBATT:A12," &
"VCCAUX:(B13,C2,N1,N13)," &
"VCCINT:(C7,H2,H13,L7)," &
"VCCO0:(B5,C3)," &
"VCCO1:(A9,A11)," &
"VCCO2:(C12,F10)," &
"VCCO3:(J12,L12)," &
"VCCO4:(L11,M9)," &
"VCCO5:(N3,N5)," &
"VCCO6:(J3,M1)," &
"VCCO7:(D4,F3)," &
"IO_A3:A3," &
"IO_A4:A4," &
"IO_A5:A5," &
"IO_A6:A6," &
"IO_A7:A7," &
"IO_A8:A8," &
"IO_A10:A10," &
"IO_B3:B3," &
"IO_B4:B4," &
"IO_B6:B6," &
"IO_B7:B7," &
"IO_B8:B8," &
"IO_B10:B10," &
"IO_C4:C4," &
"IO_C6:C6," &
"IO_C8:C8," &
"IO_C9:C9," &
"IO_C10:C10," &
"IO_C13:C13," &
"IO_D1:D1," &
"IO_D2:D2," &
"IO_D3:D3," &
"IO_D5:D5," &
"IO_D6:D6," &
"IO_D7:D7," &
"IO_D8:D8," &
"IO_D9:D9," &
"IO_D10:D10," &
"IO_D11:D11," &
"IO_D12:D12," &
"IO_D13:D13," &
"IO_E2:E2," &
"IO_E3:E3," &
"IO_E4:E4," &
"IO_E10:E10," &
"IO_E11:E11," &
"IO_F1:F1," &
"IO_F12:F12," &
"IO_G1:G1," &
"IO_G3:G3," &
"IO_G4:G4," &
"IO_G10:G10," &
"IO_G11:G11," &
"IO_G12:G12," &
"IO_G13:G13," &
"IO_H1:H1," &
"IO_H3:H3," &
"IO_H4:H4," &
"IO_H11:H11," &
"IO_H12:H12," &
"IO_J2:J2," &
"IO_J10:J10," &
"IO_J13:J13," &
"IO_K1:K1," &
"IO_K2:K2," &
"IO_K3:K3," &
"IO_K4:K4," &
"IO_K5:K5," &
"IO_K6:K6," &
"IO_K7:K7," &
"IO_K8:K8," &
"IO_K9:K9," &
"IO_K10:K10," &
"IO_K11:K11," &
"IO_K12:K12," &
"IO_K13:K13," &
"IO_L1:L1," &
"IO_L2:L2," &
"IO_L3:L3," &
"IO_L4:L4," &
"IO_L5:L5," &
"IO_L6:L6," &
"IO_L8:L8," &
"IO_L10:L10," &
"IO_L13:L13," &
"IO_M4:M4," &
"IO_M6:M6," &
"IO_M7:M7," &
"IO_M8:M8," &
"IO_M10:M10," &
"IO_M11:M11," &
"IO_N4:N4," &
"IO_N6:N6," &
"IO_N7:N7," &
"IO_N8:N8," &
"IO_N9:N9," &
"IO_N10:N10," &
"IO_N11:N11";
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (33.0e6, BOTH);
attribute COMPLIANCE_PATTERNS of XC2V40_CS144 : entity is
"(PROG_B, PWRDWN_B) (11)";
attribute INSTRUCTION_LENGTH of XC2V40_CS144 : entity is 6;
attribute INSTRUCTION_OPCODE of XC2V40_CS144 : entity is
"EXTEST (000000)," &
"SAMPLE (000001)," &
"USER1 (000010)," & -- Not available until after configuration
"USER2 (000011)," & -- Not available until after configuration
"CFG_OUT (000100)," & -- Not available during configuration with another mode.
"CFG_IN (000101)," & -- Not available during configuration with another mode.
"INTEST (000111)," &
"USERCODE (001000)," &
"IDCODE (001001)," &
"HIGHZ (001010)," &
"JSTART (001100)," & -- Not available during configuration with another mode.
"JSHUTDOWN (001101)," & -- Not available during configuration with another mode.
"JPROGRAM (001011)," & -- Not available during configuration with another mode.
"BYPASS (111111)";
attribute INSTRUCTION_CAPTURE of XC2V40_CS144 : entity is
-- Bit 5 is 1 when DONE is released (part of startup sequence)
-- Bit 4 is 1 if house-cleaning is complete
-- Bit 3 is ISC_Enabled
-- Bit 2 is ISC_Done
"XXXX01";
attribute INSTRUCTION_PRIVATE of XC2V40_CS144 : entity is
-- If the device is configured, and a USER instruction is implemented
-- and not private to the FPGA designer, then it should be removed
-- from INSTRUCTION_PRIVATE, and the target register should be defined
-- in REGISTER_ACCESS.
"USER1," &
"USER2," &
"CFG_OUT," &
"CFG_IN," &
"JSTART," &
"JSHUTDOWN," &
"JPROGRAM";
attribute IDCODE_REGISTER of XC2V40_CS144 : entity is
"XXXX" & -- version
"0001000" & -- family
"000001000" & -- array size
"00001001001" & -- manufacturer
"1"; -- required by 1149.1
attribute USERCODE_REGISTER of XC2V40_CS144 : entity is
"XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX";
attribute REGISTER_ACCESS of XC2V40_CS144 : entity is
-- "<reg_name>[<length>] (USER1)," &
-- "<reg_name>[<length>] (USER2)," &
"BYPASS (HIGHZ,BYPASS)," &
"DEVICE_ID (USERCODE,IDCODE)," &
"BOUNDARY (SAMPLE,INTEST,EXTEST)";
attribute BOUNDARY_LENGTH of XC2V40_CS144 : entity is 300;
attribute BOUNDARY_REGISTER of XC2V40_CS144 : entity is
-- cellnum (type, port, function, safe[, ccell, disval, disrslt])
" 0 (BC_2, *, controlr, 1)," &
" 1 (BC_2, IO_D10, output3, X, 0, 1, PULL0)," & -- PAD24
" 2 (BC_2, IO_D10, input, X)," & -- PAD24
" 3 (BC_2, *, controlr, 1)," &
" 4 (BC_2, IO_C10, output3, X, 3, 1, PULL0)," & -- PAD23
" 5 (BC_2, IO_C10, input, X)," & -- PAD23
" 6 (BC_2, *, controlr, 1)," &
" 7 (BC_2, IO_B10, output3, X, 6, 1, PULL0)," & -- PAD22
" 8 (BC_2, IO_B10, input, X)," & -- PAD22
" 9 (BC_2, *, controlr, 1)," &
" 10 (BC_2, IO_A10, output3, X, 9, 1, PULL0)," & -- PAD21
" 11 (BC_2, IO_A10, input, X)," & -- PAD21
" 12 (BC_2, *, controlr, 1)," &
" 13 (BC_2, IO_D9, output3, X, 12, 1, PULL0)," & -- PAD20
" 14 (BC_2, IO_D9, input, X)," & -- PAD20
" 15 (BC_2, *, controlr, 1)," &
" 16 (BC_2, IO_C9, output3, X, 15, 1, PULL0)," & -- PAD19
" 17 (BC_2, IO_C9, input, X)," & -- PAD19
" 18 (BC_2, *, controlr, 1)," &
" 19 (BC_2, IO_D8, output3, X, 18, 1, PULL0)," & -- PAD18
" 20 (BC_2, IO_D8, input, X)," & -- PAD18
" 21 (BC_2, *, controlr, 1)," &
" 22 (BC_2, IO_C8, output3, X, 21, 1, PULL0)," & -- PAD17
" 23 (BC_2, IO_C8, input, X)," & -- PAD17
" 24 (BC_2, *, controlr, 1)," &
" 25 (BC_2, IO_B8, output3, X, 24, 1, PULL0)," & -- PAD16
" 26 (BC_2, IO_B8, input, X)," & -- PAD16
" 27 (BC_2, *, controlr, 1)," &
" 28 (BC_2, IO_A8, output3, X, 27, 1, PULL0)," & -- PAD15
" 29 (BC_2, IO_A8, input, X)," & -- PAD15
" 30 (BC_2, *, controlr, 1)," &
" 31 (BC_2, IO_B7, output3, X, 30, 1, PULL0)," & -- PAD14
" 32 (BC_2, IO_B7, input, X)," & -- PAD14
" 33 (BC_2, *, controlr, 1)," &
" 34 (BC_2, IO_A7, output3, X, 33, 1, PULL0)," & -- PAD13
" 35 (BC_2, IO_A7, input, X)," & -- PAD13
" 36 (BC_2, *, controlr, 1)," &
" 37 (BC_2, IO_D7, output3, X, 36, 1, PULL0)," & -- PAD12
" 38 (BC_2, IO_D7, input, X)," & -- PAD12
" 39 (BC_2, *, controlr, 1)," &
" 40 (BC_2, IO_A6, output3, X, 39, 1, PULL0)," & -- PAD11
" 41 (BC_2, IO_A6, input, X)," & -- PAD11
" 42 (BC_2, *, controlr, 1)," &
" 43 (BC_2, IO_B6, output3, X, 42, 1, PULL0)," & -- PAD10
" 44 (BC_2, IO_B6, input, X)," & -- PAD10
" 45 (BC_2, *, controlr, 1)," &
" 46 (BC_2, IO_C6, output3, X, 45, 1, PULL0)," & -- PAD9
" 47 (BC_2, IO_C6, input, X)," & -- PAD9
" 48 (BC_2, *, controlr, 1)," &
" 49 (BC_2, IO_D6, output3, X, 48, 1, PULL0)," & -- PAD8
" 50 (BC_2, IO_D6, input, X)," & -- PAD8
" 51 (BC_2, *, controlr, 1)," &
" 52 (BC_2, IO_A5, output3, X, 51, 1, PULL0)," & -- PAD7
" 53 (BC_2, IO_A5, input, X)," & -- PAD7
" 54 (BC_2, *, controlr, 1)," &
" 55 (BC_2, IO_D5, output3, X, 54, 1, PULL0)," & -- PAD6
" 56 (BC_2, IO_D5, input, X)," & -- PAD6
" 57 (BC_2, *, controlr, 1)," &
" 58 (BC_2, IO_A4, output3, X, 57, 1, PULL0)," & -- PAD5
" 59 (BC_2, IO_A4, input, X)," & -- PAD5
" 60 (BC_2, *, controlr, 1)," &
" 61 (BC_2, IO_B4, output3, X, 60, 1, PULL0)," & -- PAD4
" 62 (BC_2, IO_B4, input, X)," & -- PAD4
" 63 (BC_2, *, controlr, 1)," &
" 64 (BC_2, IO_C4, output3, X, 63, 1, PULL0)," & -- PAD3
" 65 (BC_2, IO_C4, input, X)," & -- PAD3
" 66 (BC_2, *, controlr, 1)," &
" 67 (BC_2, IO_A3, output3, X, 66, 1, PULL0)," & -- PAD2
" 68 (BC_2, IO_A3, input, X)," & -- PAD2
" 69 (BC_2, *, controlr, 1)," &
" 70 (BC_2, IO_B3, output3, X, 69, 1, PULL0)," & -- PAD1
" 71 (BC_2, IO_B3, input, X)," & -- PAD1
" 72 (BC_2, HSWAP_EN_A1, input, X)," &
" 73 (BC_2, *, internal, 1)," & -- PROG_B.I
" 74 (BC_2, *, controlr, 1)," &
" 75 (BC_2, IO_D3, output3, X, 74, 1, PULL0)," & -- PAD96
" 76 (BC_2, IO_D3, input, X)," & -- PAD96
" 77 (BC_2, *, controlr, 1)," &
" 78 (BC_2, IO_D2, output3, X, 77, 1, PULL0)," & -- PAD95
" 79 (BC_2, IO_D2, input, X)," & -- PAD95
" 80 (BC_2, *, controlr, 1)," &
" 81 (BC_2, IO_D1, output3, X, 80, 1, PULL0)," & -- PAD94
" 82 (BC_2, IO_D1, input, X)," & -- PAD94
" 83 (BC_2, *, controlr, 1)," &
" 84 (BC_2, IO_E4, output3, X, 83, 1, PULL0)," & -- PAD93
" 85 (BC_2, IO_E4, input, X)," & -- PAD93
" 86 (BC_2, *, controlr, 1)," &
" 87 (BC_2, IO_E3, output3, X, 86, 1, PULL0)," & -- PAD92
" 88 (BC_2, IO_E3, input, X)," & -- PAD92
" 89 (BC_2, *, controlr, 1)," &
" 90 (BC_2, IO_E2, output3, X, 89, 1, PULL0)," & -- PAD91
" 91 (BC_2, IO_E2, input, X)," & -- PAD91
" 92 (BC_2, *, controlr, 1)," &
" 93 (BC_2, IO_F1, output3, X, 92, 1, PULL0)," & -- PAD90
" 94 (BC_2, IO_F1, input, X)," & -- PAD90
" 95 (BC_2, *, controlr, 1)," &
" 96 (BC_2, IO_G1, output3, X, 95, 1, PULL0)," & -- PAD89
" 97 (BC_2, IO_G1, input, X)," & -- PAD89
" 98 (BC_2, *, internal, 1)," & -- PAD88.T
" 99 (BC_2, *, internal, X)," & -- PAD88.O
" 100 (BC_2, *, internal, X)," & -- PAD88.I
" 101 (BC_2, *, internal, 1)," & -- PAD87.T
" 102 (BC_2, *, internal, X)," & -- PAD87.O
" 103 (BC_2, *, internal, X)," & -- PAD87.I
" 104 (BC_2, *, controlr, 1)," &
" 105 (BC_2, IO_G3, output3, X, 104, 1, PULL0)," & -- PAD86
" 106 (BC_2, IO_G3, input, X)," & -- PAD86
" 107 (BC_2, *, controlr, 1)," &
" 108 (BC_2, IO_G4, output3, X, 107, 1, PULL0)," & -- PAD85
" 109 (BC_2, IO_G4, input, X)," & -- PAD85
" 110 (BC_2, *, controlr, 1)," &
" 111 (BC_2, IO_H1, output3, X, 110, 1, PULL0)," & -- PAD84
" 112 (BC_2, IO_H1, input, X)," & -- PAD84
" 113 (BC_2, *, controlr, 1)," &
" 114 (BC_2, IO_H3, output3, X, 113, 1, PULL0)," & -- PAD83
" 115 (BC_2, IO_H3, input, X)," & -- PAD83
" 116 (BC_2, *, internal, 1)," & -- PAD82.T
" 117 (BC_2, *, internal, X)," & -- PAD82.O
" 118 (BC_2, *, internal, X)," & -- PAD82.I
" 119 (BC_2, *, internal, 1)," & -- PAD81.T
" 120 (BC_2, *, internal, X)," & -- PAD81.O
" 121 (BC_2, *, internal, X)," & -- PAD81.I
" 122 (BC_2, *, controlr, 1)," &
" 123 (BC_2, IO_H4, output3, X, 122, 1, PULL0)," & -- PAD80
" 124 (BC_2, IO_H4, input, X)," & -- PAD80
" 125 (BC_2, *, controlr, 1)," &
" 126 (BC_2, IO_J2, output3, X, 125, 1, PULL0)," & -- PAD79
" 127 (BC_2, IO_J2, input, X)," & -- PAD79
" 128 (BC_2, *, controlr, 1)," &
" 129 (BC_2, IO_K1, output3, X, 128, 1, PULL0)," & -- PAD78
" 130 (BC_2, IO_K1, input, X)," & -- PAD78
" 131 (BC_2, *, controlr, 1)," &
" 132 (BC_2, IO_K2, output3, X, 131, 1, PULL0)," & -- PAD77
" 133 (BC_2, IO_K2, input, X)," & -- PAD77
" 134 (BC_2, *, controlr, 1)," &
" 135 (BC_2, IO_K3, output3, X, 134, 1, PULL0)," & -- PAD76
" 136 (BC_2, IO_K3, input, X)," & -- PAD76
" 137 (BC_2, *, controlr, 1)," &
" 138 (BC_2, IO_L1, output3, X, 137, 1, PULL0)," & -- PAD75
" 139 (BC_2, IO_L1, input, X)," & -- PAD75
" 140 (BC_2, *, controlr, 1)," &
" 141 (BC_2, IO_L2, output3, X, 140, 1, PULL0)," & -- PAD74
" 142 (BC_2, IO_L2, input, X)," & -- PAD74
" 143 (BC_2, *, controlr, 1)," &
" 144 (BC_2, IO_L3, output3, X, 143, 1, PULL0)," & -- PAD73
" 145 (BC_2, IO_L3, input, X)," & -- PAD73
" 146 (BC_2, M1_M2, input, X)," &
" 147 (BC_2, M0_N2, input, X)," &
" 148 (BC_2, M2_M3, input, X)," &
" 149 (BC_2, *, controlr, 1)," &
" 150 (BC_2, IO_K4, output3, X, 149, 1, PULL0)," & -- PAD72
" 151 (BC_2, IO_K4, input, X)," & -- PAD72
" 152 (BC_2, *, controlr, 1)," &
" 153 (BC_2, IO_L4, output3, X, 152, 1, PULL0)," & -- PAD71
" 154 (BC_2, IO_L4, input, X)," & -- PAD71
" 155 (BC_2, *, controlr, 1)," &
" 156 (BC_2, IO_M4, output3, X, 155, 1, PULL0)," & -- PAD70
" 157 (BC_2, IO_M4, input, X)," & -- PAD70
" 158 (BC_2, *, controlr, 1)," &
" 159 (BC_2, IO_N4, output3, X, 158, 1, PULL0)," & -- PAD69
" 160 (BC_2, IO_N4, input, X)," & -- PAD69
" 161 (BC_2, *, controlr, 1)," &
" 162 (BC_2, IO_K5, output3, X, 161, 1, PULL0)," & -- PAD68
" 163 (BC_2, IO_K5, input, X)," & -- PAD68
" 164 (BC_2, *, controlr, 1)," &
" 165 (BC_2, IO_L5, output3, X, 164, 1, PULL0)," & -- PAD67
" 166 (BC_2, IO_L5, input, X)," & -- PAD67
" 167 (BC_2, *, controlr, 1)," &
" 168 (BC_2, IO_K6, output3, X, 167, 1, PULL0)," & -- PAD66
" 169 (BC_2, IO_K6, input, X)," & -- PAD66
" 170 (BC_2, *, controlr, 1)," &
" 171 (BC_2, IO_L6, output3, X, 170, 1, PULL0)," & -- PAD65
" 172 (BC_2, IO_L6, input, X)," & -- PAD65
" 173 (BC_2, *, controlr, 1)," &
" 174 (BC_2, IO_M6, output3, X, 173, 1, PULL0)," & -- PAD64
" 175 (BC_2, IO_M6, input, X)," & -- PAD64
" 176 (BC_2, *, controlr, 1)," &
" 177 (BC_2, IO_N6, output3, X, 176, 1, PULL0)," & -- PAD63
" 178 (BC_2, IO_N6, input, X)," & -- PAD63
" 179 (BC_2, *, controlr, 1)," &
" 180 (BC_2, IO_M7, output3, X, 179, 1, PULL0)," & -- PAD62
" 181 (BC_2, IO_M7, input, X)," & -- PAD62
" 182 (BC_2, *, controlr, 1)," &
" 183 (BC_2, IO_N7, output3, X, 182, 1, PULL0)," & -- PAD61
" 184 (BC_2, IO_N7, input, X)," & -- PAD61
" 185 (BC_2, *, controlr, 1)," &
" 186 (BC_2, IO_K7, output3, X, 185, 1, PULL0)," & -- PAD60
" 187 (BC_2, IO_K7, input, X)," & -- PAD60
" 188 (BC_2, *, controlr, 1)," &
" 189 (BC_2, IO_N8, output3, X, 188, 1, PULL0)," & -- PAD59
" 190 (BC_2, IO_N8, input, X)," & -- PAD59
" 191 (BC_2, *, controlr, 1)," &
" 192 (BC_2, IO_M8, output3, X, 191, 1, PULL0)," & -- PAD58
" 193 (BC_2, IO_M8, input, X)," & -- PAD58
" 194 (BC_2, *, controlr, 1)," &
" 195 (BC_2, IO_L8, output3, X, 194, 1, PULL0)," & -- PAD57
" 196 (BC_2, IO_L8, input, X)," & -- PAD57
" 197 (BC_2, *, controlr, 1)," &
" 198 (BC_2, IO_K8, output3, X, 197, 1, PULL0)," & -- PAD56
" 199 (BC_2, IO_K8, input, X)," & -- PAD56
" 200 (BC_2, *, controlr, 1)," &
" 201 (BC_2, IO_N9, output3, X, 200, 1, PULL0)," & -- PAD55
" 202 (BC_2, IO_N9, input, X)," & -- PAD55
" 203 (BC_2, *, controlr, 1)," &
" 204 (BC_2, IO_K9, output3, X, 203, 1, PULL0)," & -- PAD54
" 205 (BC_2, IO_K9, input, X)," & -- PAD54
" 206 (BC_2, *, controlr, 1)," &
" 207 (BC_2, IO_N10, output3, X, 206, 1, PULL0)," & -- PAD53
" 208 (BC_2, IO_N10, input, X)," & -- PAD53
" 209 (BC_2, *, controlr, 1)," &
" 210 (BC_2, IO_M10, output3, X, 209, 1, PULL0)," & -- PAD52
" 211 (BC_2, IO_M10, input, X)," & -- PAD52
" 212 (BC_2, *, controlr, 1)," &
" 213 (BC_2, IO_L10, output3, X, 212, 1, PULL0)," & -- PAD51
" 214 (BC_2, IO_L10, input, X)," & -- PAD51
" 215 (BC_2, *, controlr, 1)," &
" 216 (BC_2, IO_N11, output3, X, 215, 1, PULL1)," & -- PAD50
" 217 (BC_2, IO_N11, input, X)," & -- PAD50
" 218 (BC_2, *, controlr, 1)," &
" 219 (BC_2, IO_M11, output3, X, 218, 1, PULL0)," & -- PAD49
" 220 (BC_2, IO_M11, input, X)," & -- PAD49
" 221 (BC_2, *, controlr, 1)," &
" 222 (BC_2, DONE_N12, output3, X, 221, 1, PULL1)," &
" 223 (BC_2, DONE_N12, input, X)," &
" 224 (BC_2, *, internal, 1)," & -- PWRDWN_B.I
" 225 (BC_2, *, controlr, 1)," &
" 226 (BC_2, CCLK_M13, output3, X, 225, 1, PULL1)," &
" 227 (BC_2, CCLK_M13, input, X)," &
" 228 (BC_2, *, controlr, 1)," &
" 229 (BC_2, IO_L13, output3, X, 228, 1, PULL0)," & -- PAD48
" 230 (BC_2, IO_L13, input, X)," & -- PAD48
" 231 (BC_2, *, controlr, 1)," &
" 232 (BC_2, IO_K10, output3, X, 231, 1, PULL0)," & -- PAD47
" 233 (BC_2, IO_K10, input, X)," & -- PAD47
" 234 (BC_2, *, controlr, 1)," &
" 235 (BC_2, IO_K11, output3, X, 234, 1, PULL0)," & -- PAD46
" 236 (BC_2, IO_K11, input, X)," & -- PAD46
" 237 (BC_2, *, controlr, 1)," &
" 238 (BC_2, IO_K12, output3, X, 237, 1, PULL0)," & -- PAD45
" 239 (BC_2, IO_K12, input, X)," & -- PAD45
" 240 (BC_2, *, controlr, 1)," &
" 241 (BC_2, IO_K13, output3, X, 240, 1, PULL0)," & -- PAD44
" 242 (BC_2, IO_K13, input, X)," & -- PAD44
" 243 (BC_2, *, controlr, 1)," &
" 244 (BC_2, IO_J10, output3, X, 243, 1, PULL0)," & -- PAD43
" 245 (BC_2, IO_J10, input, X)," & -- PAD43
" 246 (BC_2, *, controlr, 1)," &
" 247 (BC_2, IO_J13, output3, X, 246, 1, PULL0)," & -- PAD42
" 248 (BC_2, IO_J13, input, X)," & -- PAD42
" 249 (BC_2, *, controlr, 1)," &
" 250 (BC_2, IO_H11, output3, X, 249, 1, PULL0)," & -- PAD41
" 251 (BC_2, IO_H11, input, X)," & -- PAD41
" 252 (BC_2, *, internal, 1)," & -- PAD40.T
" 253 (BC_2, *, internal, X)," & -- PAD40.O
" 254 (BC_2, *, internal, X)," & -- PAD40.I
" 255 (BC_2, *, internal, 1)," & -- PAD39.T
" 256 (BC_2, *, internal, X)," & -- PAD39.O
" 257 (BC_2, *, internal, X)," & -- PAD39.I
" 258 (BC_2, *, controlr, 1)," &
" 259 (BC_2, IO_H12, output3, X, 258, 1, PULL0)," & -- PAD38
" 260 (BC_2, IO_H12, input, X)," & -- PAD38
" 261 (BC_2, *, controlr, 1)," &
" 262 (BC_2, IO_G12, output3, X, 261, 1, PULL0)," & -- PAD37
" 263 (BC_2, IO_G12, input, X)," & -- PAD37
" 264 (BC_2, *, controlr, 1)," &
" 265 (BC_2, IO_G13, output3, X, 264, 1, PULL0)," & -- PAD36
" 266 (BC_2, IO_G13, input, X)," & -- PAD36
" 267 (BC_2, *, controlr, 1)," &
" 268 (BC_2, IO_G11, output3, X, 267, 1, PULL0)," & -- PAD35
" 269 (BC_2, IO_G11, input, X)," & -- PAD35
" 270 (BC_2, *, internal, 1)," & -- PAD34.T
" 271 (BC_2, *, internal, X)," & -- PAD34.O
" 272 (BC_2, *, internal, X)," & -- PAD34.I
" 273 (BC_2, *, internal, 1)," & -- PAD33.T
" 274 (BC_2, *, internal, X)," & -- PAD33.O
" 275 (BC_2, *, internal, X)," & -- PAD33.I
" 276 (BC_2, *, controlr, 1)," &
" 277 (BC_2, IO_G10, output3, X, 276, 1, PULL0)," & -- PAD32
" 278 (BC_2, IO_G10, input, X)," & -- PAD32
" 279 (BC_2, *, controlr, 1)," &
" 280 (BC_2, IO_F12, output3, X, 279, 1, PULL0)," & -- PAD31
" 281 (BC_2, IO_F12, input, X)," & -- PAD31
" 282 (BC_2, *, controlr, 1)," &
" 283 (BC_2, IO_E11, output3, X, 282, 1, PULL0)," & -- PAD30
" 284 (BC_2, IO_E11, input, X)," & -- PAD30
" 285 (BC_2, *, controlr, 1)," &
" 286 (BC_2, IO_E10, output3, X, 285, 1, PULL0)," & -- PAD29
" 287 (BC_2, IO_E10, input, X)," & -- PAD29
" 288 (BC_2, *, controlr, 1)," &
" 289 (BC_2, IO_D13, output3, X, 288, 1, PULL0)," & -- PAD28
" 290 (BC_2, IO_D13, input, X)," & -- PAD28
" 291 (BC_2, *, controlr, 1)," &
" 292 (BC_2, IO_D12, output3, X, 291, 1, PULL0)," & -- PAD27
" 293 (BC_2, IO_D12, input, X)," & -- PAD27
" 294 (BC_2, *, controlr, 1)," &
" 295 (BC_2, IO_D11, output3, X, 294, 1, PULL0)," & -- PAD26
" 296 (BC_2, IO_D11, input, X)," & -- PAD26
" 297 (BC_2, *, controlr, 1)," &
" 298 (BC_2, IO_C13, output3, X, 297, 1, PULL0)," & -- PAD25
" 299 (BC_2, IO_C13, input, X)"; -- PAD25
attribute DESIGN_WARNING of XC2V40_CS144 : entity is
"This is a preliminary BSDL file which has not been verified." &
"This BSDL file must be modified by the FPGA designer in order to" &
"reflect post-configuration behavior (if any)." &
"To avoid power-down, the boundary scan test vectors should keep" &
"the PWRDWN_B pin high." &
"To avoid losing the current configuration, the boundary scan" &
"test vectors should keep the PROG_B pin" &
"high. If the PROG_B pin goes low by any means," &
"the configuration will be cleared." &
"PWRDWN_B and PROG_B can only be captured, not updated." &
"The value at the pin is always used by the device." &
"HSWAP_EN, M0, M1, and M2 can only be captured, not updated." &
"The value at the pin is always used by the device." &
"The disable result of a 3-stated I/O in this file" &
"correspond to HSWAP_EN being high. When HSWAP_EN" &
"is low, change all PULL0s to PULL1." &
"In EXTEST, output and tristate values are not captured in the" &
"Capture-DR state - those register cells are unchanged." &
"In INTEST, the pin input values are not captured in the" &
"Capture-DR state - those register cells are unchanged." &
"The output and tristate capture values are not valid until after" &
"the device is configured." &
"The tristate control value is not captured properly when" &
"GTS is activated.";
end XC2V40_CS144;
