--------------------------------------------------------------------------------
-- Freescale Boundary Scan Description Language --
--------------------------------------------------------------------------------
-- Boundary Scan Description Language (IEEE 1149.1b) --
-- --
-- Device : MPC8641D Revision 2.1 --
-- File Version : D --
-- File Name : MPC8641D.R2D --
-- File created : Aug 22, 2007 --
-- Package type : FC-CBGA 1023 pins --
-- Voltag Level : 1.1V --
-- BSDL_status : preliminary (revised from Rev2.0 Ver C) --
-- 1149.1 Device Test : untested --
-- System Level Test : untested --
-- --
--------------------------------------------------------------------------------
-- Revision History: --
-- A - Original version --
-- This BSDL file covers the following products: --
-- MPC8641D --
-- MPC8641 --
-- B - Due to an errata, HRESET_B has been declared to be a compliance_enable --
-- pin. --
-- HRESET_B pin. BSDL has been modified to work around this issue. --
-- The patterns generated with this BSDL will be compliant except that --
-- HRESET_B has been declared as compliance pin and the board --
-- interconnect for this pin cannot be tested. --
-- C - Corrected pins names and types to match hardware spec --
-- D - Updated for Revision 2.1 - IDCODE was updated; the chip is now --
-- compliant with the 1149.1 spec; HRESET_B is no longer declared a --
-- compliance pin. --
-- --
-- NOTE: Due to BSDL naming restriction (ports with bit vectors cannot end --
-- in a digit), the following pin names do not match customer --
-- documentation: --
-- PORT BSDL NAME --
-- ============== ================ --
-- XVDD_SRDS1 SRDS1_XVDD --
-- XVDD_SRDS2 SRDS2_XVDD --
-- VDD_CORE0 CORE0_VDD --
-- VDD_CORE1 CORE1_VDD --
-- AVDD_CORE0 CORE0_AVDD --
-- AVDD_CORE1 CORE1_AVDD --
-- SENSE_VDD_CORE0 SENSE_CORE0_VDD --
-- SENSE_VDD_CORE1 SENSE_CORE1_VDD --
-- --
--------------------------------------------------------------------------------
-- --
-- NOTE: Active low ports are designated with a "_B" suffix. --
-- --
-- NOTE: The IEEE 1149.1 standard optional instructions HIGHZ, CLAMP, and --
-- IDCODE are supported. --
-- --
-- --THE FOLLOWING IS LEFT FOR DOCUMENTATION, BUT DOES NOT APPLY TO REV 2.1-- --
-- NOTE: MPC8641D is non-compliant to IEEE 1149.1 due to an issue with the --
-- --
-- NOTE: For assistance with this file, contact your sales office. --
-- --
--------------------------------------------------------------------------------
-- --
--------------------------------------------------------------------------------
-- --
--============================================================================--
-- IMPORTANT NOTICE --
-- This information is provided on an AS IS basis and without warranty. --
-- IN NO EVENT SHALL FREESCALE BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL --
-- DAMAGES ARISING FROM USE OF THIS INFORMATION. THIS DISCLAIMER OF --
-- WARRANTY EXTENDS TO THE USER OF THE INFORMATION, AND TO THEIR CUSTOMERS --
-- OR USERS OF PRODUCTS AND IS IN LIEU OF ALL WARRANTIES WHETHER EXPRESS, --
-- IMPLIED, OR STATUTORY, INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY --
-- OR FITNESS FOR PARTICULAR PURPOSE. --
-- --
-- FREESCALE does not represent or warrant that the information furnished --
-- hereunder is free of infringement of any third party patents, --
-- copyrights, trade secrets, or other intellectual property rights. --
-- --
-- FREESCALE does not represent or warrant that the information is free of --
-- defect, or that it meets any particular standard, requirements or need --
-- of the user of the infomation or their customers. --
-- --
-- FREESCALE reserves the right to change the information in this file --
-- without notice. The BSDL files are also available at: --
-- --
-- http://www.freescale.com --
-- --
--============================================================================--
entity MPC8641D is
generic(PHYSICAL_PIN_MAP : string := "FSL_CBGA_1023");
-- PORT DESCRIPTION TERMS
-- in = input only
-- out = three-state output (0, Z, 1)
-- buffer = two-state output (0, 1)
-- inout = bidirectional
-- linkage = OTHER (vdd, vss, analog)
-- bit = single pin
-- bit_vector = group of pins with suffix 0 to n
port(
TDI : in bit;
TDO : out bit;
TMS : in bit;
TCK : in bit;
TRST_B : in bit;
LSSD_MODE_B : in bit;
TEST_MODE : in bit_vector(0 to 3);
TSEC4_RXD : inout bit_vector(0 to 7);
TSEC4_TXD : inout bit_vector(0 to 7);
TSEC4_TX_EN : inout bit;
TSEC4_TX_ER : inout bit;
TSEC4_GTX_CLK : inout bit;
TSEC3_TX_ER : inout bit;
TSEC4_TX_CLK : inout bit;
TSEC4_RX_ER : inout bit;
TSEC4_RX_CLK : inout bit;
TSEC4_COL : inout bit;
TSEC3_RXD : inout bit_vector(0 to 7);
TSEC3_TXD : inout bit_vector(0 to 7);
TSEC4_CRS : inout bit;
TSEC3_TX_EN : inout bit;
TSEC3_GTX_CLK : inout bit;
TSEC3_TX_CLK : inout bit;
TSEC4_RX_DV : inout bit;
TSEC3_CRS : inout bit;
TSEC3_RX_CLK : inout bit;
TSEC3_RX_DV : inout bit;
EC2_GTX_CLK125 : inout bit;
TSEC3_RX_ER : inout bit;
TSEC3_COL : inout bit;
D1_MDIC : inout bit_vector(0 to 1);
D1_MDQ : inout bit_vector(0 to 63);
D1_MDM : inout bit_vector(0 to 8);
D1_MDQS : inout bit_vector(0 to 8);
D1_MDQS_B : inout bit_vector(0 to 8);
D1_MCK : inout bit_vector(0 to 5);
D1_MCK_B : inout bit_vector(0 to 5);
D1_MECC : inout bit_vector(0 to 7);
D1_MCKE : inout bit_vector(0 to 3);
D1_MBA : inout bit_vector(0 to 2);
D1_MA : inout bit_vector(0 to 15);
D1_MRAS_B : inout bit;
D1_MCAS_B : inout bit;
D1_MWE_B : inout bit;
D1_MCS_B : inout bit_vector(0 to 3);
D1_MODT : inout bit_vector(0 to 3);
SD2_TX : out bit_vector(0 to 7);
SD2_TX_B : out bit_vector(0 to 7);
SD2_RX : in bit_vector(0 to 7);
SD2_RX_B : in bit_vector(0 to 7);
SD2_PLL_TPD : out bit;
SD2_REF_CLK : in bit;
SD2_REF_CLK_B : in bit;
SD2_DLL_TPD : out bit;
SD1_TX : out bit_vector(0 to 7);
SD1_TX_B : out bit_vector(0 to 7);
SD1_RX : in bit_vector(0 to 7);
SD1_RX_B : in bit_vector(0 to 7);
SD1_PLL_TPD : out bit;
SD1_REF_CLK : in bit;
SD1_REF_CLK_B : in bit;
SD1_DLL_TPD : out bit;
TSEC2_RXD : inout bit_vector(0 to 7);
TSEC2_TXD : inout bit_vector(0 to 7);
TSEC2_TX_EN : inout bit;
TSEC2_TX_ER : inout bit;
TSEC2_GTX_CLK : inout bit;
TSEC2_TX_CLK : inout bit;
TSEC2_RX_ER : inout bit;
TSEC2_RX_CLK : inout bit;
TSEC2_COL : inout bit;
TSEC2_CRS : inout bit;
TSEC2_RX_DV : inout bit;
TSEC1_TX_ER : inout bit;
TSEC1_TXD : inout bit_vector(0 to 7);
TSEC1_TX_EN : inout bit;
TSEC1_GTX_CLK : inout bit;
TSEC1_RXD : inout bit_vector(0 to 7);
TSEC1_TX_CLK : inout bit;
TSEC1_CRS : inout bit;
TSEC1_RX_CLK : inout bit;
TSEC1_RX_DV : inout bit;
TSEC1_RX_ER : inout bit;
TSEC1_COL : inout bit;
EC1_GTX_CLK125 : inout bit;
EC_MDC : inout bit;
EC_MDIO : inout bit;
DMA_DREQ_B : inout bit_vector(0 to 1);
DMA_DACK_B : inout bit_vector(0 to 1);
DMA_DDONE_B : inout bit_vector(0 to 1);
UART_SOUT : inout bit_vector(0 to 1);
UART_SIN : inout bit_vector(0 to 1);
UART_CTS_B : inout bit_vector(0 to 1);
UART_RTS_B : inout bit_vector(0 to 1);
IIC1_SDA : inout bit;
IIC1_SCL : inout bit;
IIC2_SDA : inout bit;
IIC2_SCL : inout bit;
IRQ_OUT_B : inout bit;
IRQ : inout bit_vector(0 to 11);
LAD : inout bit_vector(0 to 31);
LDP : inout bit_vector(0 to 3);
LA : inout bit_vector(27 to 31);
LCS_B : inout bit_vector(0 to 7);
LWE_B : inout bit_vector(0 to 3);
LBCTL : inout bit;
LALE : inout bit;
LGPL0 : inout bit;
LGPL1 : inout bit;
LGPL2 : inout bit;
LGPL3 : inout bit;
LGPL4 : inout bit;
LGPL5 : inout bit;
LCKE : inout bit;
LCLK : inout bit_vector(0 to 2);
LSYNC_IN : inout bit;
LSYNC_OUT : inout bit;
HRESET_B : inout bit;
HRESET_REQ_B : inout bit;
SRESET_0_B : inout bit;
SRESET_1_B : inout bit;
CKSTP_IN_B : inout bit;
CKSTP_OUT_B : inout bit;
RTC : inout bit;
SYSCLK : inout bit;
SPARE : inout bit;
SMI_1_B : inout bit;
SMI_0_B : inout bit;
MCP_1_B : inout bit;
MCP_0_B : inout bit;
ASLEEP : inout bit;
CLK_OUT : inout bit;
D2_MSRCID : inout bit_vector(0 to 4);
D2_MDVAL : inout bit;
D1_MSRCID : inout bit_vector(0 to 4);
D1_MDVAL : inout bit;
TRIG_IN : inout bit;
TRIG_OUT : inout bit;
D2_MDIC : inout bit_vector(0 to 1);
D2_MDQ : inout bit_vector(0 to 63);
D2_MDM : inout bit_vector(0 to 8);
D2_MDQS : inout bit_vector(0 to 8);
D2_MDQS_B : inout bit_vector(0 to 8);
D2_MCK : inout bit_vector(0 to 5);
D2_MCK_B : inout bit_vector(0 to 5);
D2_MECC : inout bit_vector(0 to 7);
D2_MCKE : inout bit_vector(0 to 3);
D2_MA : inout bit_vector(0 to 15);
D2_MBA : inout bit_vector(0 to 2);
D2_MRAS_B : inout bit;
D2_MCAS_B : inout bit;
D2_MWE_B : inout bit;
D2_MCS_B : inout bit_vector(0 to 3);
D2_MODT : inout bit_vector(0 to 3);
RSVD0 : in bit;
RSVD0_B : in bit;
RSVD1 : in bit;
RSVD1_B : in bit;
RSVD2 : in bit;
RSVD2_B : in bit;
RSVD3 : in bit;
RSVD3_B : in bit;
RSVD4 : out bit;
RSVD4_B : out bit;
RSVD5 : out bit;
RSVD5_B : out bit;
RSVD6 : inout bit;
RSVD7 : inout bit;
-- Linkage pins
SD1_IMP_CAL_RX : linkage bit;
SD2_IMP_CAL_RX : linkage bit;
SD1_IMP_CAL_TX : linkage bit;
SD2_IMP_CAL_TX : linkage bit;
SD1_DLL_TPA : linkage bit;
SD2_DLL_TPA : linkage bit;
SD1_PLL_TPA : linkage bit;
SD2_PLL_TPA : linkage bit;
D1_MVREF : linkage bit;
D2_MVREF : linkage bit;
TEMP_ANODE : linkage bit;
TEMP_CATHODE : linkage bit;
GND : linkage bit_vector(0 to 127);
LVDD : linkage bit_vector(0 to 2);
SGND : linkage bit_vector(0 to 24);
SVDD : linkage bit_vector(0 to 24);
TVDD : linkage bit_vector(0 to 2);
XGND : linkage bit_vector(0 to 21);
SRDS1_XVDD : linkage bit_vector(0 to 9);
SRDS2_XVDD : linkage bit_vector(0 to 10);
AVDD_LB : linkage bit;
VDD_PLAT : linkage bit_vector(0 to 10);
AVDD_PLAT : linkage bit;
SENSE_VDD_PLAT : linkage bit_vector(0 to 1);
CORE0_VDD : linkage bit_vector(0 to 27);
CORE0_AVDD : linkage bit;
SENSE_CORE0_VDD : linkage bit_vector(0 to 1);
CORE1_VDD : linkage bit_vector(0 to 27);
CORE1_AVDD : linkage bit;
SENSE_CORE1_VDD : linkage bit_vector(0 to 1);
OVDD : linkage bit_vector(0 to 16);
D1_GVDD : linkage bit_vector(0 to 30);
D2_GVDD : linkage bit_vector(0 to 29);
AGND_SRDS1 : linkage bit;
AVDD_SRDS1 : linkage bit;
AGND_SRDS2 : linkage bit;
AVDD_SRDS2 : linkage bit;
NC : linkage bit_vector(0 to 4)
);
use STD_1149_1_2001.all;
attribute COMPONENT_CONFORMANCE of MPC8641D : entity is "STD_1149_1_2001";
attribute PIN_MAP of MPC8641D : entity is PHYSICAL_PIN_MAP;
constant FSL_CBGA_1023: PIN_MAP_STRING :=
"D2_MDQS_B: (A6, A2, F2, K3, AB2, AE3, AK2, AJ6, K5),"&
"D2_MDQ: (A7, B7, C5, D5, C8, D8, D6, A5, C4, A3,"&
"D3, D2, A4, B4, C2, C1, E3, E1, H4, G1,"&
"D1, E4, G3, G2, J4, J2, L1, L3, H3, H1,"&
"K1, L4, AA4, AA2, AD1, AD2, Y1, AA1, AC1, AC3,"&
"AD5, AE1, AG1, AG2, AC4, AD4, AF3, AF4, AH3, AJ1,"&
"AM1, AM3, AH1, AH2, AL2, AL3, AK5, AL5, AK7, AM7,"&
"AK4, AM4, AM6, AJ7),"&
"D1_MDQ: (D15, A14, B12, D12, A15, B15, B13, C13, C11, D11,"&
"D9, A8, A12, A11, A9, B9, F11, G12, K11, K12,"&
"E10, E9, J11, J10, G8, H10, L9, L7, F10, G9,"&
"K9, K8, AC6, AC7, AG8, AH9, AB6, AB8, AE9, AF9,"&
"AL8, AM8, AM10, AK11, AH8, AK8, AJ10, AK10, AL12, AJ12,"&
"AL14, AM14, AL11, AM11, AM13, AK14, AM15, AJ16, AK18, AL18,"&
"AJ15, AL15, AL17, AM17),"&
"D1_MDM: (C14, A10, G11, H9, AD7, AJ9, AM12, AK16, N10),"&
"D1_MDQS: (A13, C10, H12, J7, AE8, AM9, AK13, AK17, N9),"&
"IIC1_SDA: A16,"&
"TRST_B: A17,"&
"D2_MVREF: A18,"&
"IIC2_SDA: A21,"&
"LCS_B: (A22, C22, D23, E22, A23, B23, E23, F23),"&
"LDP: (A24, E24, C24, B24),"&
"LAD: (A30, E29, C29, D28, D29, H25, B29, A29, C28, L22,"&
"M22, A28, C27, H26, G26, B27, B26, A27, E27, G25,"&
"D26, E26, G24, F27, A26, A25, C25, H23, K22, D25,"&
"F25, H22),"&
"UART_CTS_B: (A31, B31),"&
"UART_SOUT: (D31, A32),"&
"D2_MDQS: (B6, B1, F1, K2, AB3, AF1, AL1, AL6, L6),"&
"D2_MDM: (C7, B3, F4, J1, AB1, AE2, AK1, AM5, K6),"&
"D1_MDQS_B: (D14, B10, H13, J8, AD8, AL9, AJ13, AM16, P10),"&
"CLK_OUT: B16,"&
"IIC1_SCL: B17,"&
"HRESET_B: B18,"&
"IIC2_SCL: B21,"&
"IRQ: (G28, G29, H27, J23, M23, J27, F28, J24, L23, B30,"&
"C30, D30),"&
"UART_SIN: (B32, C32),"&
"TEST_MODE: (C16, E17, D18, D16),"&
"D2_MSRCID: (E16, C17, F16, H16, K16),"&
"LSSD_MODE_B: C18,"&
"ASLEEP: C19,"&
"SRESET_0_B: C20,"&
"SRESET_1_B: C21,"&
"UART_RTS_B: (C31, E30),"&
"D2_MDVAL: D19,"&
"LSYNC_OUT: D20,"&
"LBCTL: D21,"&
"LWE_B: (E21, F21, D22, E20),"&
"DMA_DACK_B: (D32, F30),"&
"D2_MCK_B: (V1, G5, AJ4, W2, E6, AG5),"&
"D2_MCK: (U1, F5, AJ3, V2, E7, AG4),"&
"D1_MCK_B: (Y6, E12, AH12, AA7, F13, AG11),"&
"D1_MCK: (W6, E13, AH11, Y7, F14, AG10),"&
"D1_MDIC: (E15, G14),"&
"LALE: E19,"&
"DMA_DREQ_B: (E31, E32),"&
"D2_MDIC: (F8, F7),"&
"D1_MSRCID: (F15, K15, K14, H15, G15),"&
"MCP_0_B: F17,"&
"MCP_1_B: H17,"&
"TMS: F18,"&
"LGPL0: F20,"&
"LGPL1: H20,"&
"LGPL2: J20,"&
"LGPL3: K20,"&
"LGPL4: L21,"&
"LGPL5: J19,"&
"LA: (J21, K21, G22, F24, G21),"&
"DMA_DDONE_B: (F31, F32),"&
"D2_MECC: (H6, J5, M5, M4, G6, H7, M2, M1),"&
"SYSCLK: G16,"&
"TCK: H18,"&
"TDI: J18,"&
"TDO: G18,"&
"LCLK: (G19, L19, M20),"&
"LCKE: H19,"&
"EC_MDC: G31,"&
"EC_MDIO: G32,"&
"TRIG_OUT: J13,"&
"TRIG_IN: J14,"&
"D1_MDVAL: J16,"&
"SPARE: J17,"&
"IRQ_OUT_B: J26,"&
"SD1_IMP_CAL_RX: J28,"&
"SD1_RX_B: (J31, K29, L31, M29, T29, U31, V29, W31),"&
"SD1_RX: (J32, K30, L32, M30, T30, U32, V30, W32),"&
"RTC: K17,"&
"HRESET_REQ_B: K18,"&
"D1_MECC: (M8, M7, R8, T10, L11, L10, P9, R10),"&
"SMI_0_B: L15,"&
"SMI_1_B: L16,"&
"CKSTP_OUT_B: L17,"&
"CKSTP_IN_B: L18,"&
"SD1_TX_B: (L27, M25, N27, P25, R27, T25, U27, V25),"&
"SD1_TX: (L26, M24, N26, P24, R26, T24, U26, V24),"&
"D1_MCKE: (P7, M10, N8, M11),"&
"LSYNC_IN: M19,"&
"D2_MA: (W1, U4, U3, T1, T2, T3, T5, R2, R1, R5,"&
"V4, R4, P1, AH5, P4, N1),"&
"D1_MA: (Y10, W8, W9, V7, V8, U6, V10, U9, U7, U10,"&
"Y9, T6, T8, AE12, R7, P6),"&
"D2_MCKE: (N6, N5, N2, N3),"&
"D1_MBA: (AA8, AA10, T9),"&
"D2_MBA: (W5, V5, P3),"&
"SD1_DLL_TPD: N28,"&
"SD1_REF_CLK_B: N31,"&
"SD1_REF_CLK: N32,"&
"SD1_DLL_TPA: P31,"&
"SD1_PLL_TPA: T28,"&
"SD1_PLL_TPD: U28,"&
"D2_MRAS_B: W3,"&
"D2_MCS_B: (Y3, AF6, AA5, AF7),"&
"D2_MWE_B: Y4,"&
"TEMP_CATHODE: Y11,"&
"SD2_TX_B: (Y25, AA28, AB26, AC28, AE28, AG28, AJ28, AL28),"&
"SD2_TX: (Y24, AA27, AB25, AC27, AE27, AG27, AJ27, AL27),"&
"SD1_IMP_CAL_TX: Y26,"&
"SD2_RX_B: (Y29, AA31, AB29, AC31, AH29, AJ31, AK29, AL31),"&
"SD2_RX: (Y30, AA32, AB30, AC32, AH30, AJ32, AK30, AL32),"&
"TEMP_ANODE: AA11,"&
"SD2_IMP_CAL_RX: AA26,"&
"D2_MCAS_B: AB5,"&
"D1_MCS_B: (AB9, AD10, AC12, AD11),"&
"D1_MWE_B: AB11,"&
"D1_MRAS_B: AB12,"&
"TSEC4_CRS: AB14,"&
"TSEC4_RXD: (AG14, AD13, AF13, AD14, AE14, AB15, AC14, AE17),"&
"TSEC4_TXD: (AC18, AC16, AD18, AD17, AD16, AB18, AB17, AB16),"&
"TSEC2_TXD: (AB20, AJ23, AJ22, AD19, AH23, AH21, AG22, AG21),"&
"TSEC2_TX_ER: AB19,"&
"TSEC2_TX_EN: AB21,"&
"TSEC1_TX_EN: AB22,"&
"D1_MODT: (AC9, AF12, AE11, AF10),"&
"D1_MCAS_B: AC10,"&
"TSEC4_COL: AC13,"&
"TSEC4_RX_DV: AC15,"&
"TSEC2_RX_DV: AC19,"&
"TSEC2_TX_CLK: AC21,"&
"TSEC1_TX_CLK: AC22,"&
"TSEC1_TXD: (AF25, AC23, AG24, AG23, AE24, AE23, AE22, AD22),"&
"TSEC2_GTX_CLK: AD20,"&
"TSEC2_RX_ER: AD21,"&
"SD2_DLL_TPD: AD29,"&
"SD2_DLL_TPA: AD30,"&
"D2_MODT: (AE6, AG7, AE5, AH6),"&
"TSEC3_CRS: AE15,"&
"TSEC3_RXD: (AJ17, AE16, AH16, AH14, AJ19, AH15, AG16, AE19),"&
"TSEC2_CRS: AE20,"&
"TSEC2_COL: AE21,"&
"SD2_REF_CLK_B: AE31,"&
"SD2_REF_CLK: AE32,"&
"TSEC4_RX_ER: AF14,"&
"TSEC3_COL: AF15,"&
"TSEC3_RX_ER: AF16,"&
"TSEC4_TX_EN: AF17,"&
"TSEC4_TX_CLK: AF18,"&
"TSEC4_TX_ER: AF19,"&
"TSEC2_RXD: (AL22, AK22, AM21, AH20, AG20, AF20, AF23, AF22),"&
"TSEC1_RXD: (AL25, AL24, AK26, AK25, AM26, AF26, AH24, AG25),"&
"SD2_PLL_TPD: AF29,"&
"SD2_PLL_TPA: AF31,"&
"TSEC4_RX_CLK: AG13,"&
"TSEC3_RX_DV: AG15,"&
"TSEC4_GTX_CLK: AG17,"&
"TSEC3_GTX_CLK: AG19,"&
"TSEC3_TX_ER: AH17,"&
"TSEC3_TX_CLK: AH18,"&
"TSEC3_TX_EN: AH19,"&
"TSEC1_GTX_CLK: AH25,"&
"TSEC1_TX_ER: AH26,"&
"TSEC3_RX_CLK: AJ18,"&
"TSEC3_TXD: (AL21, AJ21, AM20, AJ20, AM19, AK21, AL20, AL19),"&
"TSEC1_RX_DV: AJ24,"&
"TSEC1_RX_ER: AJ25,"&
"TSEC1_RX_CLK: AK24,"&
"EC1_GTX_CLK125: AL23,"&
"D1_MVREF: AM18,"&
"TSEC2_RX_CLK: AM22,"&
"EC2_GTX_CLK125: AM23,"&
"TSEC1_CRS: AM24,"&
"TSEC1_COL: AM25,"&
"SD2_IMP_CAL_TX: AM29,"&
"RSVD0: V28,"&
"RSVD0_B: W28,"&
"RSVD1: AG32,"&
"RSVD1_B: AG31,"&
"RSVD2: H30,"&
"RSVD2_B: H29,"&
"RSVD3: R32,"&
"RSVD3_B: R31,"&
"RSVD4: K24,"&
"RSVD4_B: K25,"&
"RSVD5: P28,"&
"RSVD5_B: P29,"&
"RSVD6: AD24,"&
"RSVD7: AG26,"&
"GND: (C3, C6, C9, C12, C15, C23, C26, E5, E8, E11,"&
" E14, E18, E25, E28, F3, G7, G10, G13, G20, G23,"&
" G27, G30, H5, J3, J9, J12, J15, J22, J25, K7,"&
" L5, L20, M3, M9, M12, N7, N11, N13, N15, N17,"&
" N19, N21, N23, P5, P12, P16, P20, P22, R3, R9,"&
" R11, R13, R15, R17, R19, R21, R23, T7, T12, T14,"&
" T16, T18, T20, T22, U5, U11, U13, U15, U17, U19,"&
" U21, U23, V3, V9, V12, V14, V16, V18, V22, W7,"&
" W11, W13, W15, W17, W19, W21, W23, Y5, Y14, Y16,"&
" Y18, Y20, Y22, AA3, AA9, AA13, AA15, AA17, AA19, AA21,"&
" AA23, AB7, AB24, AC5, AC11, AD3, AD9, AD15, AE7, AE13,"&
" AE18, AF5, AF11, AF21, AF24, AG3, AG9, AH7, AH13, AJ5,"&
" AJ11, AK3, AK9, AK15, AK19, AK23, AL7, AL13)," &
"LVDD: (AC20, AD23, AH22)," &
"SGND: (H28, H32, J30, K31, L28, L29, M32, N30, R29, T32,"&
" U30, V31, W29, Y32, AA30, AB31, AC29, AD32, AE30, AG29,"&
" AH32, AJ30, AK31, AL29, AM32)," &
"SVDD: (H31, J29, K28, K32, L30, M28, M31, N29, R30, T31,"&
" U29, V32, W30, Y31, AA29, AB32, AC30, AD31, AE29, AG30,"&
" AH31, AJ29, AK32, AL30, AM31)," &
"TVDD: (AC17, AG18, AK20)," &
"XGND: (K27, L25, M26, N24, P27, R25, T26, U24, V27, W25,"&
" Y28, AA24, AB27, AC25, AD28, AE26, AF27, AH28, AJ26, AK27,"&
" AL26, AM28)," &
"SRDS1_XVDD: (K26, L24, M27, N25, P26, R24, R28, T27, U25, V26),"&
"SRDS2_XVDD: (W24, Y27, AA25, AB28, AC26, AD27, AE25, AF28, AH27, AK28,"&
" AM27)," &
"AVDD_LB: (A20)," &
"VDD_PLAT: (M16, M17, M18, N16, N20, N22, P17, P19, P21, P23,"&
" R22)," &
"AVDD_PLAT: (B19)," &
"SENSE_VDD_PLAT: (N18, P18)," &
"CORE0_VDD: (L12, L13, L14, M13, M15, N12, N14, P11, P13, P15,"&
" R12, R14, T11, T13, T15, U12, U14, V11, V13, V15,"&
" W12, W14, Y12, Y13, Y15, AA12, AA14, AB13)," &
"CORE0_AVDD: (B20)," &
"SENSE_CORE0_VDD: (M14, P14)," &
"CORE1_VDD: (R16, R18, R20, T17, T19, T21, T23, U16, U18, U22,"&
" V17, V19, V21, V23, W16, W18, W20, W22, Y17, Y19,"&
" Y21, Y23, AA16, AA18, AA20, AA22, AB23, AC24)," &
"CORE1_AVDD: (A19)," &
"SENSE_CORE1_VDD: (U20, V20)," &
"OVDD: (B22, B25, B28, D17, D24, D27, F19, F22, F26, F29,"&
" G17, H21, H24, K19, K23, M21, AM30)," &
"D1_GVDD: (B11, B14, D10, D13, F9, F12, H8, H11, H14, K10,"&
" K13, L8, P8, R6, U8, V6, W10, Y8, AA6, AB10,"&
" AC8, AD12, AE10, AF8, AG12, AH10, AJ8, AJ14, AK12, AL10,"&
" AL16)," &
"D2_GVDD: (B2, B5, B8, D4, D7, E2, F6, G4, H2, J6,"&
" K4, L2, M6, N4, P2, T4, U2, W4, Y2, AB4,"&
" AC2, AD6, AE4, AF2, AG6, AH4, AJ2, AK6, AL4, AM2)," &
"AGND_SRDS1: (P30)," &
"AVDD_SRDS1: (P32)," &
"AGND_SRDS2: (AF30)," &
"AVDD_SRDS2: (AF32)," &
"NC: (A1, W26, W27, AD25, AD26)";
attribute PORT_GROUPING of MPC8641D : entity is
"Differential_Voltage ("&
"(SD2_TX(7), SD2_TX_B(7)),"&
"(SD2_RX(7), SD2_RX_B(7)),"&
"(SD2_RX(6), SD2_RX_B(6)),"&
"(SD2_TX(6), SD2_TX_B(6)),"&
"(SD2_TX(5), SD2_TX_B(5)),"&
"(SD2_RX(5), SD2_RX_B(5)),"&
"(SD2_RX(4), SD2_RX_B(4)),"&
"(SD2_TX(4), SD2_TX_B(4)),"&
"(SD2_REF_CLK, SD2_REF_CLK_B),"&
"(SD2_RX(3), SD2_RX_B(3)),"&
"(SD2_TX(3), SD2_TX_B(3)),"&
"(SD2_TX(2), SD2_TX_B(2)),"&
"(SD2_RX(2), SD2_RX_B(2)),"&
"(SD2_RX(1), SD2_RX_B(1)),"&
"(SD2_TX(1), SD2_TX_B(1)),"&
"(SD2_TX(0), SD2_TX_B(0)),"&
"(SD2_RX(0), SD2_RX_B(0)),"&
"(SD1_TX(7), SD1_TX_B(7)),"&
"(SD1_RX(7), SD1_RX_B(7)),"&
"(SD1_RX(6), SD1_RX_B(6)),"&
"(SD1_TX(6), SD1_TX_B(6)),"&
"(SD1_TX(5), SD1_TX_B(5)),"&
"(SD1_RX(5), SD1_RX_B(5)),"&
"(SD1_RX(4), SD1_RX_B(4)),"&
"(SD1_TX(4), SD1_TX_B(4)),"&
"(SD1_REF_CLK, SD1_REF_CLK_B),"&
"(SD1_RX(3), SD1_RX_B(3)),"&
"(SD1_TX(3), SD1_TX_B(3)),"&
"(SD1_TX(2), SD1_TX_B(2)),"&
"(SD1_RX(2), SD1_RX_B(2)),"&
"(SD1_RX(1), SD1_RX_B(1)),"&
"(SD1_TX(1), SD1_TX_B(1)),"&
"(SD1_TX(0), SD1_TX_B(0)),"&
"(SD1_RX(0), SD1_RX_B(0)),"&
"(RSVD0, RSVD0_B),"&
"(RSVD1, RSVD1_B),"&
"(RSVD2, RSVD2_B),"&
"(RSVD3, RSVD3_B),"&
"(RSVD4, RSVD4_B),"&
"(RSVD5, RSVD5_B))";
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (30.0e6, BOTH);
attribute TAP_SCAN_RESET of TRST_B : signal is true;
attribute COMPLIANCE_PATTERNS of MPC8641D : entity is
"(LSSD_MODE_B, TEST_MODE(0), TEST_MODE(1), TEST_MODE(2), " &
"TEST_MODE(3)) (11111)";
attribute INSTRUCTION_LENGTH of MPC8641D : entity is 8;
attribute INSTRUCTION_OPCODE of MPC8641D : entity is
-- Public instructions:
"EXTEST (00000000), "& -- Hex 00
"SAMPLE (11110000), "& -- Hex F0
"PRELOAD (11110000), "& -- Hex F0
"BYPASS (11111111), "& -- Hex FF
"HIGHZ (11110010), "& -- Hex F2
"IDCODE (11110011), "& -- Hex F3
"CLAMP (11110001), "& -- Hex F1
-- Private instructions:
"PRIVATE000(11111110), "& -- Hex FE
"PRIVATE001(00000101), "& -- Hex 05
"PRIVATE002(00000110), "& -- Hex 06
"PRIVATE003(00000111), "& -- Hex 07
"PRIVATE004(00000011), "& -- Hex 03
"PRIVATE005(00000100), "& -- Hex 04
"PRIVATE006(00110000), "& -- Hex 30
"PRIVATE007(00001010), "& -- Hex 0A
"PRIVATE008(00111000), "& -- Hex 38
"PRIVATE009(00110100), "& -- Hex 34
"PRIVATE010(00110101), "& -- Hex 35
"PRIVATE011(00110110), "& -- Hex 36
"PRIVATE012(00110111), "& -- Hex 37
"PRIVATE013(01000100), "& -- Hex 44
"PRIVATE014(00001001), "& -- Hex 09
"PRIVATE015(00001011), "& -- Hex 0B
"PRIVATE016(00001100), "& -- Hex 0C
"PRIVATE017(00001110), "& -- Hex 0E
"PRIVATE018(00010000), "& -- Hex 10
"PRIVATE019(00010001), "& -- Hex 11
"PRIVATE020(00010010), "& -- Hex 12
"PRIVATE021(00010011), "& -- Hex 13
"PRIVATE022(00010100), "& -- Hex 14
"PRIVATE023(11111010) "; -- Hex FA
attribute INSTRUCTION_CAPTURE of MPC8641D : entity is "xxxxxx01";
-- Use of some private opcodes can result in damage to the circuit,
-- board, or system.
attribute INSTRUCTION_PRIVATE of MPC8641D : entity is
"PRIVATE000, PRIVATE001, PRIVATE002, PRIVATE003, "&
"PRIVATE004, PRIVATE005, PRIVATE006, PRIVATE007, "&
"PRIVATE008, PRIVATE009, PRIVATE010, PRIVATE011, "&
"PRIVATE012, PRIVATE013, PRIVATE014, PRIVATE015, "&
"PRIVATE016, PRIVATE017, PRIVATE018, PRIVATE019, "&
"PRIVATE020, PRIVATE021, PRIVATE022, PRIVATE023";
-- Hex IDCODE = 10009001D
attribute IDCODE_REGISTER of MPC8641D : entity is
"0001" & -- Version
"0000000010010000" & -- Part number
"00000001110" & -- Manufacturer Identity
"1"; -- Mandatory LSB
attribute REGISTER_ACCESS of MPC8641D : entity is
"BYPASS(BYPASS),"&
"BOUNDARY (SAMPLE)";
attribute BOUNDARY_LENGTH of MPC8641D : entity is 1124;
attribute BOUNDARY_REGISTER of MPC8641D : entity is
-- PORT DESCRIPTION TERMS
-- cell type: BC_6 bidirectional else BC_2
-- port: port name with index if port description says bit_vector
-- function
-- input = input only
-- bidir = bidirectional
-- control = control cell
-- buffer = output only
-- output3 = three state output
-- observe_only = observe only
-- safe = value in control cell to make input = 0 for bidir and controlr
-- ccell = controlling cell number for I/O direction
-- dsval = disabling (input) value
-- rslt = result if disabled (input = Z)
-- tdi
-- num cell port function safe ccell dsval rslt
"1123 (BC_2, *, control, 0), "&
"1122 (BC_6, D1_MDQ(0), bidir, 0, 1123, 0, Z), "&
"1121 (BC_2, *, control, 0), "&
"1120 (BC_6, D1_MDQ(4), bidir, 0, 1121, 0, Z), "&
"1119 (BC_2, *, control, 0), "&
"1118 (BC_6, D1_MDIC(0), bidir, 0, 1119, 0, Z), "&
"1117 (BC_2, *, control, 0), "&
"1116 (BC_6, D1_MDIC(1), bidir, 0, 1117, 0, Z), "&
"1115 (BC_2, *, control, 0), "&
"1114 (BC_6, D1_MDQ(1), bidir, 0, 1115, 0, Z), "&
"1113 (BC_2, *, control, 0), "&
"1112 (BC_6, D1_MDM(0), bidir, 0, 1113, 0, Z), "&
"1111 (BC_2, *, control, 0), "&
"1110 (BC_6, D1_MDQS(0), bidir, 0, 1111, 0, Z), "&
"1109 (BC_2, *, control, 0), "&
"1108 (BC_6, D1_MDQS_B(0), bidir, 0, 1109, 0, Z), "&
"1107 (BC_2, *, control, 0), "&
"1106 (BC_6, D1_MDQ(5), bidir, 0, 1107, 0, Z), "&
"1105 (BC_2, *, control, 0), "&
"1104 (BC_6, D1_MDQ(2), bidir, 0, 1105, 0, Z), "&
"1103 (BC_2, *, control, 0), "&
"1102 (BC_6, D1_MDQ(7), bidir, 0, 1103, 0, Z), "&
"1101 (BC_2, *, control, 0), "&
"1100 (BC_6, D1_MDQ(3), bidir, 0, 1101, 0, Z), "&
"1099 (BC_2, *, control, 0), "&
"1098 (BC_6, D1_MDQ(6), bidir, 0, 1099, 0, Z), "&
"1097 (BC_2, *, control, 0), "&
"1096 (BC_6, D1_MDQ(8), bidir, 0, 1097, 0, Z), "&
"1095 (BC_2, *, control, 0), "&
"1094 (BC_6, D1_MDM(1), bidir, 0, 1095, 0, Z), "&
"1093 (BC_2, *, control, 0), "&
"1092 (BC_6, D1_MDQ(12), bidir, 0, 1093, 0, Z), "&
"1091 (BC_2, *, control, 0), "&
"1090 (BC_6, D1_MDQ(9), bidir, 0, 1091, 0, Z), "&
"1089 (BC_2, *, control, 0), "&
"1088 (BC_6, D1_MDQS_B(1), bidir, 0, 1089, 0, Z), "&
"1087 (BC_2, *, control, 0), "&
"1086 (BC_6, D1_MDQS(1), bidir, 0, 1087, 0, Z), "&
"1085 (BC_2, *, control, 0), "&
"1084 (BC_6, D1_MCK(1), bidir, 0, 1085, 0, Z), "&
"1083 (BC_2, *, control, 0), "&
"1082 (BC_6, D1_MCK_B(4), bidir, 0, 1083, 0, Z), "&
"1081 (BC_2, *, control, 0), "&
"1080 (BC_6, D1_MCK(4), bidir, 0, 1081, 0, Z), "&
"1079 (BC_2, *, control, 0), "&
"1078 (BC_6, D1_MCK_B(1), bidir, 0, 1079, 0, Z), "&
"1077 (BC_2, *, control, 0), "&
"1076 (BC_6, D1_MDQ(11), bidir, 0, 1077, 0, Z), "&
"1075 (BC_2, *, control, 0), "&
"1074 (BC_6, D1_MDQ(10), bidir, 0, 1075, 0, Z), "&
"1073 (BC_2, *, control, 0), "&
"1072 (BC_6, D1_MDQ(13), bidir, 0, 1073, 0, Z), "&
"1071 (BC_2, *, control, 0), "&
"1070 (BC_6, D1_MDQ(14), bidir, 0, 1071, 0, Z), "&
"1069 (BC_2, *, control, 0), "&
"1068 (BC_6, D1_MDQ(15), bidir, 0, 1069, 0, Z), "&
"1067 (BC_2, *, control, 0), "&
"1066 (BC_6, D1_MDQ(20), bidir, 0, 1067, 0, Z), "&
"1065 (BC_2, *, control, 0), "&
"1064 (BC_6, D1_MDQ(16), bidir, 0, 1065, 0, Z), "&
"1063 (BC_2, *, control, 0), "&
"1062 (BC_6, D1_MDQ(17), bidir, 0, 1063, 0, Z), "&
"1061 (BC_2, *, control, 0), "&
"1060 (BC_6, D1_MDQ(21), bidir, 0, 1061, 0, Z), "&
"1059 (BC_2, *, control, 0), "&
"1058 (BC_6, D1_MDM(2), bidir, 0, 1059, 0, Z), "&
"1057 (BC_2, *, control, 0), "&
"1056 (BC_6, D1_MDQS(2), bidir, 0, 1057, 0, Z), "&
"1055 (BC_2, *, control, 0), "&
"1054 (BC_6, D1_MDQS_B(2), bidir, 0, 1055, 0, Z), "&
"1053 (BC_2, *, control, 0), "&
"1052 (BC_6, D1_MDQ(19), bidir, 0, 1053, 0, Z), "&
"1051 (BC_2, *, control, 0), "&
"1050 (BC_6, D1_MDQ(18), bidir, 0, 1051, 0, Z), "&
"1049 (BC_2, *, control, 0), "&
"1048 (BC_6, D1_MDQ(24), bidir, 0, 1049, 0, Z), "&
"1047 (BC_2, *, control, 0), "&
"1046 (BC_6, D1_MDQ(23), bidir, 0, 1047, 0, Z), "&
"1045 (BC_2, *, control, 0), "&
"1044 (BC_6, D1_MDQ(22), bidir, 0, 1045, 0, Z), "&
"1043 (BC_2, *, control, 0), "&
"1042 (BC_6, D1_MDQ(25), bidir, 0, 1043, 0, Z), "&
"1041 (BC_2, *, control, 0), "&
"1040 (BC_6, D1_MDM(3), bidir, 0, 1041, 0, Z), "&
"1039 (BC_2, *, control, 0), "&
"1038 (BC_6, D1_MDQ(29), bidir, 0, 1039, 0, Z), "&
"1037 (BC_2, *, control, 0), "&
"1036 (BC_6, D1_MDQ(28), bidir, 0, 1037, 0, Z), "&
"1035 (BC_2, *, control, 0), "&
"1034 (BC_6, D1_MDQS_B(3), bidir, 0, 1035, 0, Z), "&
"1033 (BC_2, *, control, 0), "&
"1032 (BC_6, D1_MDQS(3), bidir, 0, 1033, 0, Z), "&
"1031 (BC_2, *, control, 0), "&
"1030 (BC_6, D1_MDQ(27), bidir, 0, 1031, 0, Z), "&
"1029 (BC_2, *, control, 0), "&
"1028 (BC_6, D1_MDQ(26), bidir, 0, 1029, 0, Z), "&
"1027 (BC_2, *, control, 0), "&
"1026 (BC_6, D1_MDQ(30), bidir, 0, 1027, 0, Z), "&
"1025 (BC_2, *, control, 0), "&
"1024 (BC_6, D1_MDQ(31), bidir, 0, 1025, 0, Z), "&
"1023 (BC_2, *, control, 0), "&
"1022 (BC_6, D1_MECC(0), bidir, 0, 1023, 0, Z), "&
"1021 (BC_2, *, control, 0), "&
"1020 (BC_6, D1_MECC(4), bidir, 0, 1021, 0, Z), "&
"1019 (BC_2, *, control, 0), "&
"1018 (BC_6, D1_MECC(1), bidir, 0, 1019, 0, Z), "&
"1017 (BC_2, *, control, 0), "&
"1016 (BC_6, D1_MECC(5), bidir, 0, 1017, 0, Z), "&
"1015 (BC_2, *, control, 0), "&
"1014 (BC_6, D1_MDM(8), bidir, 0, 1015, 0, Z), "&
"1013 (BC_2, *, control, 0), "&
"1012 (BC_6, D1_MDQS_B(8), bidir, 0, 1013, 0, Z), "&
"1011 (BC_2, *, control, 0), "&
"1010 (BC_6, D1_MDQS(8), bidir, 0, 1011, 0, Z), "&
"1009 (BC_2, *, control, 0), "&
"1008 (BC_6, D1_MECC(2), bidir, 0, 1009, 0, Z), "&
"1007 (BC_2, *, control, 0), "&
"1006 (BC_6, D1_MECC(7), bidir, 0, 1007, 0, Z), "&
"1005 (BC_2, *, control, 0), "&
"1004 (BC_6, D1_MECC(3), bidir, 0, 1005, 0, Z), "&
"1003 (BC_2, *, control, 0), "&
"1002 (BC_6, D1_MECC(6), bidir, 0, 1003, 0, Z), "&
"1001 (BC_2, *, control, 0), "&
"1000 (BC_6, D1_MCKE(1), bidir, 0, 1001, 0, Z), "&
"999 (BC_2, *, control, 0), "&
"998 (BC_6, D1_MCKE(0), bidir, 0, 999, 0, Z), "&
"997 (BC_2, *, control, 0), "&
"996 (BC_6, D1_MA(15), bidir, 0, 997, 0, Z), "&
"995 (BC_2, *, control, 0), "&
"994 (BC_6, D1_MCKE(2), bidir, 0, 995, 0, Z), "&
"993 (BC_2, *, control, 0), "&
"992 (BC_6, D1_MCKE(3), bidir, 0, 993, 0, Z), "&
"991 (BC_2, *, control, 0), "&
"990 (BC_6, D1_MBA(2), bidir, 0, 991, 0, Z), "&
"989 (BC_2, *, control, 0), "&
"988 (BC_6, D1_MA(11), bidir, 0, 989, 0, Z), "&
"987 (BC_2, *, control, 0), "&
"986 (BC_6, D1_MA(12), bidir, 0, 987, 0, Z), "&
"985 (BC_2, *, control, 0), "&
"984 (BC_6, D1_MA(14), bidir, 0, 985, 0, Z), "&
"983 (BC_2, *, control, 0), "&
"982 (BC_6, D1_MA(9), bidir, 0, 983, 0, Z), "&
"981 (BC_2, *, control, 0), "&
"980 (BC_6, D1_MA(7), bidir, 0, 981, 0, Z), "&
"979 (BC_2, *, control, 0), "&
"978 (BC_6, D1_MA(6), bidir, 0, 979, 0, Z), "&
"977 (BC_2, *, control, 0), "&
"976 (BC_6, D1_MA(8), bidir, 0, 977, 0, Z), "&
"975 (BC_2, *, control, 0), "&
"974 (BC_6, D1_MA(5), bidir, 0, 975, 0, Z), "&
"973 (BC_2, *, control, 0), "&
"972 (BC_6, D1_MA(4), bidir, 0, 973, 0, Z), "&
"971 (BC_2, *, control, 0), "&
"970 (BC_6, D1_MA(1), bidir, 0, 971, 0, Z), "&
"969 (BC_2, *, control, 0), "&
"968 (BC_6, D1_MA(2), bidir, 0, 969, 0, Z), "&
"967 (BC_2, *, control, 0), "&
"966 (BC_6, D1_MA(3), bidir, 0, 967, 0, Z), "&
"965 (BC_2, *, control, 0), "&
"964 (BC_6, D1_MCK_B(0), bidir, 0, 965, 0, Z), "&
"963 (BC_2, *, control, 0), "&
"962 (BC_6, D1_MCK(0), bidir, 0, 963, 0, Z), "&
"961 (BC_2, *, control, 0), "&
"960 (BC_6, D1_MA(0), bidir, 0, 961, 0, Z), "&
"959 (BC_2, *, control, 0), "&
"958 (BC_6, D1_MCK_B(3), bidir, 0, 959, 0, Z), "&
"957 (BC_2, *, control, 0), "&
"956 (BC_6, D1_MCK(3), bidir, 0, 957, 0, Z), "&
"955 (BC_2, *, control, 0), "&
"954 (BC_6, D1_MA(10), bidir, 0, 955, 0, Z), "&
"953 (BC_2, *, control, 0), "&
"952 (BC_6, D1_MRAS_B, bidir, 0, 953, 0, Z), "&
"951 (BC_2, *, control, 0), "&
"950 (BC_6, D1_MBA(0), bidir, 0, 951, 0, Z), "&
"949 (BC_2, *, control, 0), "&
"948 (BC_6, D1_MBA(1), bidir, 0, 949, 0, Z), "&
"947 (BC_2, *, control, 0), "&
"946 (BC_6, D1_MCAS_B, bidir, 0, 947, 0, Z), "&
"945 (BC_2, *, control, 0), "&
"944 (BC_6, D1_MWE_B, bidir, 0, 945, 0, Z), "&
"943 (BC_2, *, control, 0), "&
"942 (BC_6, D1_MCS_B(2), bidir, 0, 943, 0, Z), "&
"941 (BC_2, *, control, 0), "&
"940 (BC_6, D1_MCS_B(0), bidir, 0, 941, 0, Z), "&
"939 (BC_2, *, control, 0), "&
"938 (BC_6, D1_MCS_B(1), bidir, 0, 939, 0, Z), "&
"937 (BC_2, *, control, 0), "&
"936 (BC_6, D1_MCS_B(3), bidir, 0, 937, 0, Z), "&
"935 (BC_2, *, control, 0), "&
"934 (BC_6, D1_MODT(2), bidir, 0, 935, 0, Z), "&
"933 (BC_2, *, control, 0), "&
"932 (BC_6, D1_MODT(1), bidir, 0, 933, 0, Z), "&
"931 (BC_2, *, control, 0), "&
"930 (BC_6, D1_MODT(0), bidir, 0, 931, 0, Z), "&
"929 (BC_2, *, control, 0), "&
"928 (BC_6, D1_MODT(3), bidir, 0, 929, 0, Z), "&
"927 (BC_2, *, control, 0), "&
"926 (BC_6, D1_MA(13), bidir, 0, 927, 0, Z), "&
"925 (BC_2, *, control, 0), "&
"924 (BC_6, D1_MDQ(36), bidir, 0, 925, 0, Z), "&
"923 (BC_2, *, control, 0), "&
"922 (BC_6, D1_MDQ(32), bidir, 0, 923, 0, Z), "&
"921 (BC_2, *, control, 0), "&
"920 (BC_6, D1_MDQ(37), bidir, 0, 921, 0, Z), "&
"919 (BC_2, *, control, 0), "&
"918 (BC_6, D1_MDM(4), bidir, 0, 919, 0, Z), "&
"917 (BC_2, *, control, 0), "&
"916 (BC_6, D1_MDQS(4), bidir, 0, 917, 0, Z), "&
"915 (BC_2, *, control, 0), "&
"914 (BC_6, D1_MDQS_B(4), bidir, 0, 915, 0, Z), "&
"913 (BC_2, *, control, 0), "&
"912 (BC_6, D1_MDQ(33), bidir, 0, 913, 0, Z), "&
"911 (BC_2, *, control, 0), "&
"910 (BC_6, D1_MDQ(38), bidir, 0, 911, 0, Z), "&
"909 (BC_2, *, control, 0), "&
"908 (BC_6, D1_MDQ(35), bidir, 0, 909, 0, Z), "&
"907 (BC_2, *, control, 0), "&
"906 (BC_6, D1_MDQ(34), bidir, 0, 907, 0, Z), "&
"905 (BC_2, *, control, 0), "&
"904 (BC_6, D1_MDQ(39), bidir, 0, 905, 0, Z), "&
"903 (BC_2, *, control, 0), "&
"902 (BC_6, D1_MDQ(44), bidir, 0, 903, 0, Z), "&
"901 (BC_2, *, control, 0), "&
"900 (BC_6, D1_MDQ(41), bidir, 0, 901, 0, Z), "&
"899 (BC_2, *, control, 0), "&
"898 (BC_6, D1_MDQ(45), bidir, 0, 899, 0, Z), "&
"897 (BC_2, *, control, 0), "&
"896 (BC_6, D1_MDQ(40), bidir, 0, 897, 0, Z), "&
"895 (BC_2, *, control, 0), "&
"894 (BC_6, D1_MDQS_B(5), bidir, 0, 895, 0, Z), "&
"893 (BC_2, *, control, 0), "&
"892 (BC_6, D1_MDQS(5), bidir, 0, 893, 0, Z), "&
"891 (BC_2, *, control, 0), "&
"890 (BC_6, D1_MDQ(42), bidir, 0, 891, 0, Z), "&
"889 (BC_2, *, control, 0), "&
"888 (BC_6, D1_MDM(5), bidir, 0, 889, 0, Z), "&
"887 (BC_2, *, control, 0), "&
"886 (BC_6, D1_MDQ(46), bidir, 0, 887, 0, Z), "&
"885 (BC_2, *, control, 0), "&
"884 (BC_6, D1_MDQ(47), bidir, 0, 885, 0, Z), "&
"883 (BC_2, *, control, 0), "&
"882 (BC_6, D1_MDQ(48), bidir, 0, 883, 0, Z), "&
"881 (BC_2, *, control, 0), "&
"880 (BC_6, D1_MDQ(52), bidir, 0, 881, 0, Z), "&
"879 (BC_2, *, control, 0), "&
"878 (BC_6, D1_MDQ(43), bidir, 0, 879, 0, Z), "&
"877 (BC_2, *, control, 0), "&
"876 (BC_6, D1_MDQ(53), bidir, 0, 877, 0, Z), "&
"875 (BC_2, *, control, 0), "&
"874 (BC_6, D1_MDQ(49), bidir, 0, 875, 0, Z), "&
"873 (BC_2, *, control, 0), "&
"872 (BC_6, D1_MCK(5), bidir, 0, 873, 0, Z), "&
"871 (BC_2, *, control, 0), "&
"870 (BC_6, D1_MCK_B(2), bidir, 0, 871, 0, Z), "&
"869 (BC_2, *, control, 0), "&
"868 (BC_6, D1_MCK(2), bidir, 0, 869, 0, Z), "&
"867 (BC_2, *, control, 0), "&
"866 (BC_6, D1_MCK_B(5), bidir, 0, 867, 0, Z), "&
"865 (BC_2, *, control, 0), "&
"864 (BC_6, D1_MDM(6), bidir, 0, 865, 0, Z), "&
"863 (BC_2, *, control, 0), "&
"862 (BC_6, D1_MDQS(6), bidir, 0, 863, 0, Z), "&
"861 (BC_2, *, control, 0), "&
"860 (BC_6, D1_MDQS_B(6), bidir, 0, 861, 0, Z), "&
"859 (BC_2, *, control, 0), "&
"858 (BC_6, D1_MDQ(54), bidir, 0, 859, 0, Z), "&
"857 (BC_2, *, control, 0), "&
"856 (BC_6, D1_MDQ(50), bidir, 0, 857, 0, Z), "&
"855 (BC_2, *, control, 0), "&
"854 (BC_6, D1_MDQ(60), bidir, 0, 855, 0, Z), "&
"853 (BC_2, *, control, 0), "&
"852 (BC_6, D1_MDQ(55), bidir, 0, 853, 0, Z), "&
"851 (BC_2, *, control, 0), "&
"850 (BC_6, D1_MDQ(51), bidir, 0, 851, 0, Z), "&
"849 (BC_2, *, control, 0), "&
"848 (BC_6, D1_MDQ(56), bidir, 0, 849, 0, Z), "&
"847 (BC_2, *, control, 0), "&
"846 (BC_6, D1_MDM(7), bidir, 0, 847, 0, Z), "&
"845 (BC_2, *, control, 0), "&
"844 (BC_6, D1_MDQ(57), bidir, 0, 845, 0, Z), "&
"843 (BC_2, *, control, 0), "&
"842 (BC_6, D1_MDQ(61), bidir, 0, 843, 0, Z), "&
"841 (BC_2, *, control, 0), "&
"840 (BC_6, D1_MDQS_B(7), bidir, 0, 841, 0, Z), "&
"839 (BC_2, *, control, 0), "&
"838 (BC_6, D1_MDQS(7), bidir, 0, 839, 0, Z), "&
"837 (BC_2, *, control, 0), "&
"836 (BC_6, D1_MDQ(63), bidir, 0, 837, 0, Z), "&
"835 (BC_2, *, control, 0), "&
"834 (BC_6, D1_MDQ(62), bidir, 0, 835, 0, Z), "&
"833 (BC_2, *, control, 0), "&
"832 (BC_6, D1_MDQ(58), bidir, 0, 833, 0, Z), "&
"831 (BC_2, *, control, 0), "&
"830 (BC_6, D1_MDQ(59), bidir, 0, 831, 0, Z), "&
"829 (BC_2, *, control, 0), "&
"828 (BC_6, RSVD7, bidir, 0, 829, 0, Z), "&
"827 (BC_2, *, control, 0), "&
"826 (BC_6, RSVD6, bidir, 0, 827, 0, Z), "&
"825 (BC_2, *, control, 0), "&
"824 (BC_6, TSEC2_RXD(3), bidir, 0, 825, 0, Z), "&
"823 (BC_2, *, control, 0), "&
"822 (BC_6, TSEC2_TXD(0), bidir, 0, 823, 0, Z), "&
"821 (BC_2, *, control, 0), "&
"820 (BC_6, TSEC2_TX_EN, bidir, 0, 821, 0, Z), "&
"819 (BC_2, *, control, 0), "&
"818 (BC_6, TSEC2_TX_ER, bidir, 0, 819, 0, Z), "&
"817 (BC_2, *, control, 0), "&
"816 (BC_6, TSEC2_TXD(6), bidir, 0, 817, 0, Z), "&
"815 (BC_2, *, control, 0), "&
"814 (BC_6, TSEC2_RXD(4), bidir, 0, 815, 0, Z), "&
"813 (BC_2, *, control, 0), "&
"812 (BC_6, TSEC2_RXD(5), bidir, 0, 813, 0, Z), "&
"811 (BC_2, *, control, 0), "&
"810 (BC_6, TSEC2_GTX_CLK, bidir, 0, 811, 0, Z), "&
"809 (BC_2, *, control, 0), "&
"808 (BC_6, TSEC2_TXD(7), bidir, 0, 809, 0, Z), "&
"807 (BC_2, *, control, 0), "&
"806 (BC_6, TSEC1_TX_ER, bidir, 0, 807, 0, Z), "&
"805 (BC_2, *, control, 0), "&
"804 (BC_6, TSEC2_RXD(0), bidir, 0, 805, 0, Z), "&
"803 (BC_2, *, control, 0), "&
"802 (BC_6, TSEC2_RXD(1), bidir, 0, 803, 0, Z), "&
"801 (BC_2, *, control, 0), "&
"800 (BC_6, TSEC2_TXD(1), bidir, 0, 801, 0, Z), "&
"799 (BC_2, *, control, 0), "&
"798 (BC_6, TSEC2_TX_CLK, bidir, 0, 799, 0, Z), "&
"797 (BC_2, *, control, 0), "&
"796 (BC_6, TSEC2_RX_ER, bidir, 0, 797, 0, Z), "&
"795 (BC_2, *, control, 0), "&
"794 (BC_6, TSEC2_RXD(6), bidir, 0, 795, 0, Z), "&
"793 (BC_2, *, control, 0), "&
"792 (BC_6, TSEC2_RX_CLK, bidir, 0, 793, 0, Z), "&
"791 (BC_2, *, control, 0), "&
"790 (BC_6, TSEC2_RXD(7), bidir, 0, 791, 0, Z), "&
"789 (BC_2, *, control, 0), "&
"788 (BC_6, TSEC2_RXD(2), bidir, 0, 789, 0, Z), "&
"787 (BC_2, *, control, 0), "&
"786 (BC_6, TSEC2_COL, bidir, 0, 787, 0, Z), "&
"785 (BC_2, *, control, 0), "&
"784 (BC_6, TSEC2_TXD(3), bidir, 0, 785, 0, Z), "&
"783 (BC_2, *, control, 0), "&
"782 (BC_6, TSEC2_TXD(5), bidir, 0, 783, 0, Z), "&
"781 (BC_2, *, control, 0), "&
"780 (BC_6, TSEC2_TXD(2), bidir, 0, 781, 0, Z), "&
"779 (BC_2, *, control, 0), "&
"778 (BC_6, TSEC1_TXD(0), bidir, 0, 779, 0, Z), "&
"777 (BC_2, *, control, 0), "&
"776 (BC_6, TSEC2_TXD(4), bidir, 0, 777, 0, Z), "&
"775 (BC_2, *, control, 0), "&
"774 (BC_6, TSEC2_CRS, bidir, 0, 775, 0, Z), "&
"773 (BC_2, *, control, 0), "&
"772 (BC_6, TSEC1_TX_EN, bidir, 0, 773, 0, Z), "&
"771 (BC_2, *, control, 0), "&
"770 (BC_6, TSEC1_TXD(3), bidir, 0, 771, 0, Z), "&
"769 (BC_2, *, control, 0), "&
"768 (BC_6, TSEC1_GTX_CLK, bidir, 0, 769, 0, Z), "&
"767 (BC_2, *, control, 0), "&
"766 (BC_6, TSEC1_TXD(5), bidir, 0, 767, 0, Z), "&
"765 (BC_2, *, control, 0), "&
"764 (BC_6, TSEC1_RXD(5), bidir, 0, 765, 0, Z), "&
"763 (BC_2, *, control, 0), "&
"762 (BC_6, TSEC1_TX_CLK, bidir, 0, 763, 0, Z), "&
"761 (BC_2, *, control, 0), "&
"760 (BC_6, TSEC1_RXD(6), bidir, 0, 761, 0, Z), "&
"759 (BC_2, *, control, 0), "&
"758 (BC_6, TSEC1_TXD(7), bidir, 0, 759, 0, Z), "&
"757 (BC_2, *, control, 0), "&
"756 (BC_6, TSEC1_TXD(6), bidir, 0, 757, 0, Z), "&
"755 (BC_2, *, control, 0), "&
"754 (BC_6, TSEC2_RX_DV, bidir, 0, 755, 0, Z), "&
"753 (BC_2, *, control, 0), "&
"752 (BC_6, TSEC1_CRS, bidir, 0, 753, 0, Z), "&
"751 (BC_2, *, control, 0), "&
"750 (BC_6, TSEC1_RXD(2), bidir, 0, 751, 0, Z), "&
"749 (BC_2, *, control, 0), "&
"748 (BC_6, TSEC1_RXD(3), bidir, 0, 749, 0, Z), "&
"747 (BC_2, *, control, 0), "&
"746 (BC_6, TSEC1_RXD(0), bidir, 0, 747, 0, Z), "&
"745 (BC_2, *, control, 0), "&
"744 (BC_6, TSEC1_RX_CLK, bidir, 0, 745, 0, Z), "&
"743 (BC_2, *, control, 0), "&
"742 (BC_6, TSEC1_RXD(1), bidir, 0, 743, 0, Z), "&
"741 (BC_2, *, control, 0), "&
"740 (BC_6, TSEC1_TXD(2), bidir, 0, 741, 0, Z), "&
"739 (BC_2, *, control, 0), "&
"738 (BC_6, TSEC1_RX_DV, bidir, 0, 739, 0, Z), "&
"737 (BC_2, *, control, 0), "&
"736 (BC_6, TSEC1_RXD(7), bidir, 0, 737, 0, Z), "&
"735 (BC_2, *, control, 0), "&
"734 (BC_6, EC1_GTX_CLK125, bidir, 0, 735, 0, Z), "&
"733 (BC_2, *, control, 0), "&
"732 (BC_6, TSEC1_TXD(1), bidir, 0, 733, 0, Z), "&
"731 (BC_2, *, control, 0), "&
"730 (BC_6, TSEC1_RX_ER, bidir, 0, 731, 0, Z), "&
"729 (BC_2, *, control, 0), "&
"728 (BC_6, TSEC1_COL, bidir, 0, 729, 0, Z), "&
"727 (BC_2, *, control, 0), "&
"726 (BC_6, TSEC1_RXD(4), bidir, 0, 727, 0, Z), "&
"725 (BC_2, *, control, 0), "&
"724 (BC_6, TSEC1_TXD(4), bidir, 0, 725, 0, Z), "&
"723 (BC_2, *, control, 0), "&
"722 (BC_6, EC_MDIO, bidir, 0, 723, 0, Z), "&
"721 (BC_2, *, control, 0), "&
"720 (BC_6, EC_MDC, bidir, 0, 721, 0, Z), "&
"719 (BC_2, *, control, 0), "&
"718 (BC_6, DMA_DREQ_B(0), bidir, 0, 719, 0, Z), "&
"717 (BC_2, *, control, 0), "&
"716 (BC_6, DMA_DREQ_B(1), bidir, 0, 717, 0, Z), "&
"715 (BC_2, *, control, 0), "&
"714 (BC_6, DMA_DACK_B(0), bidir, 0, 715, 0, Z), "&
"713 (BC_2, *, control, 0), "&
"712 (BC_6, DMA_DACK_B(1), bidir, 0, 713, 0, Z), "&
"711 (BC_2, *, control, 0), "&
"710 (BC_6, DMA_DDONE_B(0), bidir, 0, 711, 0, Z), "&
"709 (BC_2, *, control, 0), "&
"708 (BC_6, DMA_DDONE_B(1), bidir, 0, 709, 0, Z), "&
"707 (BC_2, *, control, 0), "&
"706 (BC_6, UART_SOUT(0), bidir, 0, 707, 0, Z), "&
"705 (BC_2, *, control, 0), "&
"704 (BC_6, UART_SOUT(1), bidir, 0, 705, 0, Z), "&
"703 (BC_2, *, control, 0), "&
"702 (BC_6, UART_SIN(0), bidir, 0, 703, 0, Z), "&
"701 (BC_2, *, control, 0), "&
"700 (BC_6, UART_SIN(1), bidir, 0, 701, 0, Z), "&
"699 (BC_2, *, control, 0), "&
"698 (BC_6, UART_CTS_B(0), bidir, 0, 699, 0, Z), "&
"697 (BC_2, *, control, 0), "&
"696 (BC_6, UART_CTS_B(1), bidir, 0, 697, 0, Z), "&
"695 (BC_2, *, control, 0), "&
"694 (BC_6, UART_RTS_B(0), bidir, 0, 695, 0, Z), "&
"693 (BC_2, *, control, 0), "&
"692 (BC_6, UART_RTS_B(1), bidir, 0, 693, 0, Z), "&
"691 (BC_2, *, control, 0), "&
"690 (BC_6, IIC1_SDA, bidir, 0, 691, 0, Z), "&
"689 (BC_2, *, control, 0), "&
"688 (BC_6, IIC1_SCL, bidir, 0, 689, 0, Z), "&
"687 (BC_2, *, control, 0), "&
"686 (BC_6, IIC2_SDA, bidir, 0, 687, 0, Z), "&
"685 (BC_2, *, control, 0), "&
"684 (BC_6, IIC2_SCL, bidir, 0, 685, 0, Z), "&
"683 (BC_2, *, control, 0), "&
"682 (BC_6, IRQ_OUT_B, bidir, 0, 683, 0, Z), "&
"681 (BC_2, *, control, 0), "&
"680 (BC_6, IRQ(0), bidir, 0, 681, 0, Z), "&
"679 (BC_2, *, control, 0), "&
"678 (BC_6, IRQ(1), bidir, 0, 679, 0, Z), "&
"677 (BC_2, *, control, 0), "&
"676 (BC_6, IRQ(2), bidir, 0, 677, 0, Z), "&
"675 (BC_2, *, control, 0), "&
"674 (BC_6, IRQ(3), bidir, 0, 675, 0, Z), "&
"673 (BC_2, *, control, 0), "&
"672 (BC_6, IRQ(4), bidir, 0, 673, 0, Z), "&
"671 (BC_2, *, control, 0), "&
"670 (BC_6, IRQ(5), bidir, 0, 671, 0, Z), "&
"669 (BC_2, *, control, 0), "&
"668 (BC_6, IRQ(6), bidir, 0, 669, 0, Z), "&
"667 (BC_2, *, control, 0), "&
"666 (BC_6, IRQ(7), bidir, 0, 667, 0, Z), "&
"665 (BC_2, *, control, 0), "&
"664 (BC_6, IRQ(8), bidir, 0, 665, 0, Z), "&
"663 (BC_2, *, control, 0), "&
"662 (BC_6, IRQ(9), bidir, 0, 663, 0, Z), "&
"661 (BC_2, *, control, 0), "&
"660 (BC_6, IRQ(10), bidir, 0, 661, 0, Z), "&
"659 (BC_2, *, control, 0), "&
"658 (BC_6, IRQ(11), bidir, 0, 659, 0, Z), "&
"657 (BC_2, *, control, 0), "&
"656 (BC_6, LAD(0), bidir, 0, 657, 0, Z), "&
"655 (BC_2, *, control, 0), "&
"654 (BC_6, LAD(1), bidir, 0, 655, 0, Z), "&
"653 (BC_2, *, control, 0), "&
"652 (BC_6, LAD(2), bidir, 0, 653, 0, Z), "&
"651 (BC_2, *, control, 0), "&
"650 (BC_6, LAD(3), bidir, 0, 651, 0, Z), "&
"649 (BC_2, *, control, 0), "&
"648 (BC_6, LAD(4), bidir, 0, 649, 0, Z), "&
"647 (BC_2, *, control, 0), "&
"646 (BC_6, LAD(5), bidir, 0, 647, 0, Z), "&
"645 (BC_2, *, control, 0), "&
"644 (BC_6, LAD(6), bidir, 0, 645, 0, Z), "&
"643 (BC_2, *, control, 0), "&
"642 (BC_6, LAD(7), bidir, 0, 643, 0, Z), "&
"641 (BC_2, *, control, 0), "&
"640 (BC_6, LAD(8), bidir, 0, 641, 0, Z), "&
"639 (BC_2, *, control, 0), "&
"638 (BC_6, LAD(9), bidir, 0, 639, 0, Z), "&
"637 (BC_2, *, control, 0), "&
"636 (BC_6, LAD(10), bidir, 0, 637, 0, Z), "&
"635 (BC_2, *, control, 0), "&
"634 (BC_6, LAD(11), bidir, 0, 635, 0, Z), "&
"633 (BC_2, *, control, 0), "&
"632 (BC_6, LAD(12), bidir, 0, 633, 0, Z), "&
"631 (BC_2, *, control, 0), "&
"630 (BC_6, LAD(13), bidir, 0, 631, 0, Z), "&
"629 (BC_2, *, control, 0), "&
"628 (BC_6, LAD(14), bidir, 0, 629, 0, Z), "&
"627 (BC_2, *, control, 0), "&
"626 (BC_6, LAD(15), bidir, 0, 627, 0, Z), "&
"625 (BC_2, *, control, 0), "&
"624 (BC_6, LAD(16), bidir, 0, 625, 0, Z), "&
"623 (BC_2, *, control, 0), "&
"622 (BC_6, LAD(17), bidir, 0, 623, 0, Z), "&
"621 (BC_2, *, control, 0), "&
"620 (BC_6, LAD(18), bidir, 0, 621, 0, Z), "&
"619 (BC_2, *, control, 0), "&
"618 (BC_6, LAD(19), bidir, 0, 619, 0, Z), "&
"617 (BC_2, *, control, 0), "&
"616 (BC_6, LAD(20), bidir, 0, 617, 0, Z), "&
"615 (BC_2, *, control, 0), "&
"614 (BC_6, LAD(21), bidir, 0, 615, 0, Z), "&
"613 (BC_2, *, control, 0), "&
"612 (BC_6, LAD(22), bidir, 0, 613, 0, Z), "&
"611 (BC_2, *, control, 0), "&
"610 (BC_6, LAD(23), bidir, 0, 611, 0, Z), "&
"609 (BC_2, *, control, 0), "&
"608 (BC_6, LAD(24), bidir, 0, 609, 0, Z), "&
"607 (BC_2, *, control, 0), "&
"606 (BC_6, LAD(25), bidir, 0, 607, 0, Z), "&
"605 (BC_2, *, control, 0), "&
"604 (BC_6, LAD(26), bidir, 0, 605, 0, Z), "&
"603 (BC_2, *, control, 0), "&
"602 (BC_6, LAD(27), bidir, 0, 603, 0, Z), "&
"601 (BC_2, *, control, 0), "&
"600 (BC_6, LAD(28), bidir, 0, 601, 0, Z), "&
"599 (BC_2, *, control, 0), "&
"598 (BC_6, LAD(29), bidir, 0, 599, 0, Z), "&
"597 (BC_2, *, control, 0), "&
"596 (BC_6, LAD(30), bidir, 0, 597, 0, Z), "&
"595 (BC_2, *, control, 0), "&
"594 (BC_6, LAD(31), bidir, 0, 595, 0, Z), "&
"593 (BC_2, *, control, 0), "&
"592 (BC_6, LDP(0), bidir, 0, 593, 0, Z), "&
"591 (BC_2, *, control, 0), "&
"590 (BC_6, LDP(1), bidir, 0, 591, 0, Z), "&
"589 (BC_2, *, control, 0), "&
"588 (BC_6, LDP(2), bidir, 0, 589, 0, Z), "&
"587 (BC_2, *, control, 0), "&
"586 (BC_6, LDP(3), bidir, 0, 587, 0, Z), "&
"585 (BC_2, *, control, 0), "&
"584 (BC_6, LA(27), bidir, 0, 585, 0, Z), "&
"583 (BC_2, *, control, 0), "&
"582 (BC_6, LA(28), bidir, 0, 583, 0, Z), "&
"581 (BC_2, *, control, 0), "&
"580 (BC_6, LA(29), bidir, 0, 581, 0, Z), "&
"579 (BC_2, *, control, 0), "&
"578 (BC_6, LA(30), bidir, 0, 579, 0, Z), "&
"577 (BC_2, *, control, 0), "&
"576 (BC_6, LA(31), bidir, 0, 577, 0, Z), "&
"575 (BC_2, *, control, 0), "&
"574 (BC_6, LCS_B(0), bidir, 0, 575, 0, Z), "&
"573 (BC_2, *, control, 0), "&
"572 (BC_6, LCS_B(1), bidir, 0, 573, 0, Z), "&
"571 (BC_2, *, control, 0), "&
"570 (BC_6, LCS_B(2), bidir, 0, 571, 0, Z), "&
"569 (BC_2, *, control, 0), "&
"568 (BC_6, LCS_B(3), bidir, 0, 569, 0, Z), "&
"567 (BC_2, *, control, 0), "&
"566 (BC_6, LCS_B(4), bidir, 0, 567, 0, Z), "&
"565 (BC_2, *, control, 0), "&
"564 (BC_6, LCS_B(5), bidir, 0, 565, 0, Z), "&
"563 (BC_2, *, control, 0), "&
"562 (BC_6, LCS_B(6), bidir, 0, 563, 0, Z), "&
"561 (BC_2, *, control, 0), "&
"560 (BC_6, LCS_B(7), bidir, 0, 561, 0, Z), "&
"559 (BC_2, *, control, 0), "&
"558 (BC_6, LWE_B(0), bidir, 0, 559, 0, Z), "&
"557 (BC_2, *, control, 0), "&
"556 (BC_6, LWE_B(1), bidir, 0, 557, 0, Z), "&
"555 (BC_2, *, control, 0), "&
"554 (BC_6, LWE_B(2), bidir, 0, 555, 0, Z), "&
"553 (BC_2, *, control, 0), "&
"552 (BC_6, LWE_B(3), bidir, 0, 553, 0, Z), "&
"551 (BC_2, *, control, 0), "&
"550 (BC_6, LBCTL, bidir, 0, 551, 0, Z), "&
"549 (BC_2, *, control, 0), "&
"548 (BC_6, LALE, bidir, 0, 549, 0, Z), "&
"547 (BC_2, *, control, 0), "&
"546 (BC_6, LGPL0, bidir, 0, 547, 0, Z), "&
"545 (BC_2, *, control, 0), "&
"544 (BC_6, LGPL1, bidir, 0, 545, 0, Z), "&
"543 (BC_2, *, control, 0), "&
"542 (BC_6, LGPL2, bidir, 0, 543, 0, Z), "&
"541 (BC_2, *, control, 0), "&
"540 (BC_6, LGPL3, bidir, 0, 541, 0, Z), "&
"539 (BC_2, *, control, 0), "&
"538 (BC_6, LGPL4, bidir, 0, 539, 0, Z), "&
"537 (BC_2, *, control, 0), "&
"536 (BC_6, LGPL5, bidir, 0, 537, 0, Z), "&
"535 (BC_2, *, control, 0), "&
"534 (BC_6, LCKE, bidir, 0, 535, 0, Z), "&
"533 (BC_2, *, control, 0), "&
"532 (BC_6, LCLK(0), bidir, 0, 533, 0, Z), "&
"531 (BC_2, *, control, 0), "&
"530 (BC_6, LCLK(1), bidir, 0, 531, 0, Z), "&
"529 (BC_2, *, control, 0), "&
"528 (BC_6, LCLK(2), bidir, 0, 529, 0, Z), "&
"527 (BC_2, *, control, 0), "&
"526 (BC_6, LSYNC_OUT, bidir, 0, 527, 0, Z), "&
"525 (BC_2, *, control, 0), "&
"524 (BC_6, LSYNC_IN, bidir, 0, 525, 0, Z), "&
"523 (BC_2, *, control, 0), "&
"522 (BC_6, HRESET_B, bidir, 0, 523, 0, Z), "&
"521 (BC_2, *, control, 0), "&
"520 (BC_6, HRESET_REQ_B, bidir, 0, 521, 0, Z), "&
"519 (BC_2, *, control, 0), "&
"518 (BC_6, SRESET_0_B, bidir, 0, 519, 0, Z), "&
"517 (BC_2, *, control, 0), "&
"516 (BC_6, SRESET_1_B, bidir, 0, 517, 0, Z), "&
"515 (BC_2, *, control, 0), "&
"514 (BC_6, CKSTP_IN_B, bidir, 0, 515, 0, Z), "&
"513 (BC_2, *, control, 0), "&
"512 (BC_6, CKSTP_OUT_B, bidir, 0, 513, 0, Z), "&
"511 (BC_2, *, control, 0), "&
"510 (BC_6, RTC, bidir, 0, 511, 0, Z), "&
"509 (BC_2, *, control, 0), "&
"508 (BC_6, SYSCLK, bidir, 0, 509, 0, Z), "&
"507 (BC_2, *, control, 0), "&
"506 (BC_6, SPARE, bidir, 0, 507, 0, Z), "&
"505 (BC_2, *, control, 0), "&
"504 (BC_6, SMI_1_B, bidir, 0, 505, 0, Z), "&
"503 (BC_2, *, control, 0), "&
"502 (BC_6, SMI_0_B, bidir, 0, 503, 0, Z), "&
"501 (BC_2, *, control, 0), "&
"500 (BC_6, MCP_1_B, bidir, 0, 501, 0, Z), "&
"499 (BC_2, *, control, 0), "&
"498 (BC_6, MCP_0_B, bidir, 0, 499, 0, Z), "&
"497 (BC_2, *, control, 0), "&
"496 (BC_6, ASLEEP, bidir, 0, 497, 0, Z), "&
"495 (BC_2, *, control, 0), "&
"494 (BC_6, CLK_OUT, bidir, 0, 495, 0, Z), "&
"493 (BC_2, *, control, 0), "&
"492 (BC_6, D2_MSRCID(0), bidir, 0, 493, 0, Z), "&
"491 (BC_2, *, control, 0), "&
"490 (BC_6, D2_MSRCID(1), bidir, 0, 491, 0, Z), "&
"489 (BC_2, *, control, 0), "&
"488 (BC_6, D2_MSRCID(2), bidir, 0, 489, 0, Z), "&
"487 (BC_2, *, control, 0), "&
"486 (BC_6, D2_MSRCID(3), bidir, 0, 487, 0, Z), "&
"485 (BC_2, *, control, 0), "&
"484 (BC_6, D2_MSRCID(4), bidir, 0, 485, 0, Z), "&
"483 (BC_2, *, control, 0), "&
"482 (BC_6, D2_MDVAL, bidir, 0, 483, 0, Z), "&
"481 (BC_2, *, control, 0), "&
"480 (BC_6, D1_MSRCID(0), bidir, 0, 481, 0, Z), "&
"479 (BC_2, *, control, 0), "&
"478 (BC_6, D1_MSRCID(1), bidir, 0, 479, 0, Z), "&
"477 (BC_2, *, control, 0), "&
"476 (BC_6, D1_MSRCID(2), bidir, 0, 477, 0, Z), "&
"475 (BC_2, *, control, 0), "&
"474 (BC_6, D1_MSRCID(3), bidir, 0, 475, 0, Z), "&
"473 (BC_2, *, control, 0), "&
"472 (BC_6, D1_MSRCID(4), bidir, 0, 473, 0, Z), "&
"471 (BC_2, *, control, 0), "&
"470 (BC_6, TRIG_IN, bidir, 0, 471, 0, Z), "&
"469 (BC_2, *, control, 0), "&
"468 (BC_6, TRIG_OUT, bidir, 0, 469, 0, Z), "&
"467 (BC_2, *, control, 0), "&
"466 (BC_6, D1_MDVAL, bidir, 0, 467, 0, Z), "&
"465 (BC_2, *, control, 0), "&
"464 (BC_6, D2_MDQ(0), bidir, 0, 465, 0, Z), "&
"463 (BC_2, *, control, 0), "&
"462 (BC_6, D2_MDQ(4), bidir, 0, 463, 0, Z), "&
"461 (BC_2, *, control, 0), "&
"460 (BC_6, D2_MDIC(0), bidir, 0, 461, 0, Z), "&
"459 (BC_2, *, control, 0), "&
"458 (BC_6, D2_MDIC(1), bidir, 0, 459, 0, Z), "&
"457 (BC_2, *, control, 0), "&
"456 (BC_6, D2_MDQ(1), bidir, 0, 457, 0, Z), "&
"455 (BC_2, *, control, 0), "&
"454 (BC_6, D2_MDM(0), bidir, 0, 455, 0, Z), "&
"453 (BC_2, *, control, 0), "&
"452 (BC_6, D2_MDQS(0), bidir, 0, 453, 0, Z), "&
"451 (BC_2, *, control, 0), "&
"450 (BC_6, D2_MDQS_B(0), bidir, 0, 451, 0, Z), "&
"449 (BC_2, *, control, 0), "&
"448 (BC_6, D2_MDQ(5), bidir, 0, 449, 0, Z), "&
"447 (BC_2, *, control, 0), "&
"446 (BC_6, D2_MDQ(2), bidir, 0, 447, 0, Z), "&
"445 (BC_2, *, control, 0), "&
"444 (BC_6, D2_MDQ(6), bidir, 0, 445, 0, Z), "&
"443 (BC_2, *, control, 0), "&
"442 (BC_6, D2_MDQ(8), bidir, 0, 443, 0, Z), "&
"441 (BC_2, *, control, 0), "&
"440 (BC_6, D2_MDQ(7), bidir, 0, 441, 0, Z), "&
"439 (BC_2, *, control, 0), "&
"438 (BC_6, D2_MDQ(3), bidir, 0, 439, 0, Z), "&
"437 (BC_2, *, control, 0), "&
"436 (BC_6, D2_MDM(1), bidir, 0, 437, 0, Z), "&
"435 (BC_2, *, control, 0), "&
"434 (BC_6, D2_MDQ(12), bidir, 0, 435, 0, Z), "&
"433 (BC_2, *, control, 0), "&
"432 (BC_6, D2_MDQ(9), bidir, 0, 433, 0, Z), "&
"431 (BC_2, *, control, 0), "&
"430 (BC_6, D2_MDQS_B(1), bidir, 0, 431, 0, Z), "&
"429 (BC_2, *, control, 0), "&
"428 (BC_6, D2_MDQS(1), bidir, 0, 429, 0, Z), "&
"427 (BC_2, *, control, 0), "&
"426 (BC_6, D2_MCK(1), bidir, 0, 427, 0, Z), "&
"425 (BC_2, *, control, 0), "&
"424 (BC_6, D2_MCK_B(4), bidir, 0, 425, 0, Z), "&
"423 (BC_2, *, control, 0), "&
"422 (BC_6, D2_MCK(4), bidir, 0, 423, 0, Z), "&
"421 (BC_2, *, control, 0), "&
"420 (BC_6, D2_MCK_B(1), bidir, 0, 421, 0, Z), "&
"419 (BC_2, *, control, 0), "&
"418 (BC_6, D2_MDQ(11), bidir, 0, 419, 0, Z), "&
"417 (BC_2, *, control, 0), "&
"416 (BC_6, D2_MDQ(10), bidir, 0, 417, 0, Z), "&
"415 (BC_2, *, control, 0), "&
"414 (BC_6, D2_MDQ(13), bidir, 0, 415, 0, Z), "&
"413 (BC_2, *, control, 0), "&
"412 (BC_6, D2_MDQ(14), bidir, 0, 413, 0, Z), "&
"411 (BC_2, *, control, 0), "&
"410 (BC_6, D2_MDQ(15), bidir, 0, 411, 0, Z), "&
"409 (BC_2, *, control, 0), "&
"408 (BC_6, D2_MDQ(20), bidir, 0, 409, 0, Z), "&
"407 (BC_2, *, control, 0), "&
"406 (BC_6, D2_MDQ(16), bidir, 0, 407, 0, Z), "&
"405 (BC_2, *, control, 0), "&
"404 (BC_6, D2_MDQ(17), bidir, 0, 405, 0, Z), "&
"403 (BC_2, *, control, 0), "&
"402 (BC_6, D2_MDQ(21), bidir, 0, 403, 0, Z), "&
"401 (BC_2, *, control, 0), "&
"400 (BC_6, D2_MDM(2), bidir, 0, 401, 0, Z), "&
"399 (BC_2, *, control, 0), "&
"398 (BC_6, D2_MDQS(2), bidir, 0, 399, 0, Z), "&
"397 (BC_2, *, control, 0), "&
"396 (BC_6, D2_MDQS_B(2), bidir, 0, 397, 0, Z), "&
"395 (BC_2, *, control, 0), "&
"394 (BC_6, D2_MDQ(19), bidir, 0, 395, 0, Z), "&
"393 (BC_2, *, control, 0), "&
"392 (BC_6, D2_MDQ(18), bidir, 0, 393, 0, Z), "&
"391 (BC_2, *, control, 0), "&
"390 (BC_6, D2_MDQ(24), bidir, 0, 391, 0, Z), "&
"389 (BC_2, *, control, 0), "&
"388 (BC_6, D2_MDQ(23), bidir, 0, 389, 0, Z), "&
"387 (BC_2, *, control, 0), "&
"386 (BC_6, D2_MDQ(22), bidir, 0, 387, 0, Z), "&
"385 (BC_2, *, control, 0), "&
"384 (BC_6, D2_MDQ(25), bidir, 0, 385, 0, Z), "&
"383 (BC_2, *, control, 0), "&
"382 (BC_6, D2_MDM(3), bidir, 0, 383, 0, Z), "&
"381 (BC_2, *, control, 0), "&
"380 (BC_6, D2_MDQ(29), bidir, 0, 381, 0, Z), "&
"379 (BC_2, *, control, 0), "&
"378 (BC_6, D2_MDQ(28), bidir, 0, 379, 0, Z), "&
"377 (BC_2, *, control, 0), "&
"376 (BC_6, D2_MDQS_B(3), bidir, 0, 377, 0, Z), "&
"375 (BC_2, *, control, 0), "&
"374 (BC_6, D2_MDQS(3), bidir, 0, 375, 0, Z), "&
"373 (BC_2, *, control, 0), "&
"372 (BC_6, D2_MDQ(27), bidir, 0, 373, 0, Z), "&
"371 (BC_2, *, control, 0), "&
"370 (BC_6, D2_MDQ(26), bidir, 0, 371, 0, Z), "&
"369 (BC_2, *, control, 0), "&
"368 (BC_6, D2_MDQ(30), bidir, 0, 369, 0, Z), "&
"367 (BC_2, *, control, 0), "&
"366 (BC_6, D2_MDQ(31), bidir, 0, 367, 0, Z), "&
"365 (BC_2, *, control, 0), "&
"364 (BC_6, D2_MECC(0), bidir, 0, 365, 0, Z), "&
"363 (BC_2, *, control, 0), "&
"362 (BC_6, D2_MECC(4), bidir, 0, 363, 0, Z), "&
"361 (BC_2, *, control, 0), "&
"360 (BC_6, D2_MECC(1), bidir, 0, 361, 0, Z), "&
"359 (BC_2, *, control, 0), "&
"358 (BC_6, D2_MECC(5), bidir, 0, 359, 0, Z), "&
"357 (BC_2, *, control, 0), "&
"356 (BC_6, D2_MDM(8), bidir, 0, 357, 0, Z), "&
"355 (BC_2, *, control, 0), "&
"354 (BC_6, D2_MDQS_B(8), bidir, 0, 355, 0, Z), "&
"353 (BC_2, *, control, 0), "&
"352 (BC_6, D2_MDQS(8), bidir, 0, 353, 0, Z), "&
"351 (BC_2, *, control, 0), "&
"350 (BC_6, D2_MECC(2), bidir, 0, 351, 0, Z), "&
"349 (BC_2, *, control, 0), "&
"348 (BC_6, D2_MECC(7), bidir, 0, 349, 0, Z), "&
"347 (BC_2, *, control, 0), "&
"346 (BC_6, D2_MECC(3), bidir, 0, 347, 0, Z), "&
"345 (BC_2, *, control, 0), "&
"344 (BC_6, D2_MECC(6), bidir, 0, 345, 0, Z), "&
"343 (BC_2, *, control, 0), "&
"342 (BC_6, D2_MCKE(1), bidir, 0, 343, 0, Z), "&
"341 (BC_2, *, control, 0), "&
"340 (BC_6, D2_MCKE(0), bidir, 0, 341, 0, Z), "&
"339 (BC_2, *, control, 0), "&
"338 (BC_6, D2_MA(15), bidir, 0, 339, 0, Z), "&
"337 (BC_2, *, control, 0), "&
"336 (BC_6, D2_MCKE(2), bidir, 0, 337, 0, Z), "&
"335 (BC_2, *, control, 0), "&
"334 (BC_6, D2_MCKE(3), bidir, 0, 335, 0, Z), "&
"333 (BC_2, *, control, 0), "&
"332 (BC_6, D2_MBA(2), bidir, 0, 333, 0, Z), "&
"331 (BC_2, *, control, 0), "&
"330 (BC_6, D2_MA(11), bidir, 0, 331, 0, Z), "&
"329 (BC_2, *, control, 0), "&
"328 (BC_6, D2_MA(12), bidir, 0, 329, 0, Z), "&
"327 (BC_2, *, control, 0), "&
"326 (BC_6, D2_MA(14), bidir, 0, 327, 0, Z), "&
"325 (BC_2, *, control, 0), "&
"324 (BC_6, D2_MA(9), bidir, 0, 325, 0, Z), "&
"323 (BC_2, *, control, 0), "&
"322 (BC_6, D2_MA(7), bidir, 0, 323, 0, Z), "&
"321 (BC_2, *, control, 0), "&
"320 (BC_6, D2_MA(6), bidir, 0, 321, 0, Z), "&
"319 (BC_2, *, control, 0), "&
"318 (BC_6, D2_MA(8), bidir, 0, 319, 0, Z), "&
"317 (BC_2, *, control, 0), "&
"316 (BC_6, D2_MA(5), bidir, 0, 317, 0, Z), "&
"315 (BC_2, *, control, 0), "&
"314 (BC_6, D2_MA(4), bidir, 0, 315, 0, Z), "&
"313 (BC_2, *, control, 0), "&
"312 (BC_6, D2_MA(1), bidir, 0, 313, 0, Z), "&
"311 (BC_2, *, control, 0), "&
"310 (BC_6, D2_MA(2), bidir, 0, 311, 0, Z), "&
"309 (BC_2, *, control, 0), "&
"308 (BC_6, D2_MA(3), bidir, 0, 309, 0, Z), "&
"307 (BC_2, *, control, 0), "&
"306 (BC_6, D2_MCK_B(0), bidir, 0, 307, 0, Z), "&
"305 (BC_2, *, control, 0), "&
"304 (BC_6, D2_MCK(0), bidir, 0, 305, 0, Z), "&
"303 (BC_2, *, control, 0), "&
"302 (BC_6, D2_MA(0), bidir, 0, 303, 0, Z), "&
"301 (BC_2, *, control, 0), "&
"300 (BC_6, D2_MCK_B(3), bidir, 0, 301, 0, Z), "&
"299 (BC_2, *, control, 0), "&
"298 (BC_6, D2_MCK(3), bidir, 0, 299, 0, Z), "&
"297 (BC_2, *, control, 0), "&
"296 (BC_6, D2_MA(10), bidir, 0, 297, 0, Z), "&
"295 (BC_2, *, control, 0), "&
"294 (BC_6, D2_MRAS_B, bidir, 0, 295, 0, Z), "&
"293 (BC_2, *, control, 0), "&
"292 (BC_6, D2_MBA(0), bidir, 0, 293, 0, Z), "&
"291 (BC_2, *, control, 0), "&
"290 (BC_6, D2_MBA(1), bidir, 0, 291, 0, Z), "&
"289 (BC_2, *, control, 0), "&
"288 (BC_6, D2_MCAS_B, bidir, 0, 289, 0, Z), "&
"287 (BC_2, *, control, 0), "&
"286 (BC_6, D2_MWE_B, bidir, 0, 287, 0, Z), "&
"285 (BC_2, *, control, 0), "&
"284 (BC_6, D2_MCS_B(2), bidir, 0, 285, 0, Z), "&
"283 (BC_2, *, control, 0), "&
"282 (BC_6, D2_MCS_B(0), bidir, 0, 283, 0, Z), "&
"281 (BC_2, *, control, 0), "&
"280 (BC_6, D2_MCS_B(1), bidir, 0, 281, 0, Z), "&
"279 (BC_2, *, control, 0), "&
"278 (BC_6, D2_MCS_B(3), bidir, 0, 279, 0, Z), "&
"277 (BC_2, *, control, 0), "&
"276 (BC_6, D2_MODT(2), bidir, 0, 277, 0, Z), "&
"275 (BC_2, *, control, 0), "&
"274 (BC_6, D2_MODT(1), bidir, 0, 275, 0, Z), "&
"273 (BC_2, *, control, 0), "&
"272 (BC_6, D2_MODT(0), bidir, 0, 273, 0, Z), "&
"271 (BC_2, *, control, 0), "&
"270 (BC_6, D2_MODT(3), bidir, 0, 271, 0, Z), "&
"269 (BC_2, *, control, 0), "&
"268 (BC_6, D2_MA(13), bidir, 0, 269, 0, Z), "&
"267 (BC_2, *, control, 0), "&
"266 (BC_6, D2_MDQ(36), bidir, 0, 267, 0, Z), "&
"265 (BC_2, *, control, 0), "&
"264 (BC_6, D2_MDQ(32), bidir, 0, 265, 0, Z), "&
"263 (BC_2, *, control, 0), "&
"262 (BC_6, D2_MDQ(37), bidir, 0, 263, 0, Z), "&
"261 (BC_2, *, control, 0), "&
"260 (BC_6, D2_MDM(4), bidir, 0, 261, 0, Z), "&
"259 (BC_2, *, control, 0), "&
"258 (BC_6, D2_MDQS(4), bidir, 0, 259, 0, Z), "&
"257 (BC_2, *, control, 0), "&
"256 (BC_6, D2_MDQS_B(4), bidir, 0, 257, 0, Z), "&
"255 (BC_2, *, control, 0), "&
"254 (BC_6, D2_MDQ(33), bidir, 0, 255, 0, Z), "&
"253 (BC_2, *, control, 0), "&
"252 (BC_6, D2_MDQ(38), bidir, 0, 253, 0, Z), "&
"251 (BC_2, *, control, 0), "&
"250 (BC_6, D2_MDQ(35), bidir, 0, 251, 0, Z), "&
"249 (BC_2, *, control, 0), "&
"248 (BC_6, D2_MDQ(34), bidir, 0, 249, 0, Z), "&
"247 (BC_2, *, control, 0), "&
"246 (BC_6, D2_MDQ(39), bidir, 0, 247, 0, Z), "&
"245 (BC_2, *, control, 0), "&
"244 (BC_6, D2_MDQ(44), bidir, 0, 245, 0, Z), "&
"243 (BC_2, *, control, 0), "&
"242 (BC_6, D2_MDQ(41), bidir, 0, 243, 0, Z), "&
"241 (BC_2, *, control, 0), "&
"240 (BC_6, D2_MDQ(45), bidir, 0, 241, 0, Z), "&
"239 (BC_2, *, control, 0), "&
"238 (BC_6, D2_MDQ(40), bidir, 0, 239, 0, Z), "&
"237 (BC_2, *, control, 0), "&
"236 (BC_6, D2_MDQS_B(5), bidir, 0, 237, 0, Z), "&
"235 (BC_2, *, control, 0), "&
"234 (BC_6, D2_MDQS(5), bidir, 0, 235, 0, Z), "&
"233 (BC_2, *, control, 0), "&
"232 (BC_6, D2_MDQ(42), bidir, 0, 233, 0, Z), "&
"231 (BC_2, *, control, 0), "&
"230 (BC_6, D2_MDM(5), bidir, 0, 231, 0, Z), "&
"229 (BC_2, *, control, 0), "&
"228 (BC_6, D2_MDQ(46), bidir, 0, 229, 0, Z), "&
"227 (BC_2, *, control, 0), "&
"226 (BC_6, D2_MDQ(47), bidir, 0, 227, 0, Z), "&
"225 (BC_2, *, control, 0), "&
"224 (BC_6, D2_MDQ(48), bidir, 0, 225, 0, Z), "&
"223 (BC_2, *, control, 0), "&
"222 (BC_6, D2_MDQ(52), bidir, 0, 223, 0, Z), "&
"221 (BC_2, *, control, 0), "&
"220 (BC_6, D2_MDQ(43), bidir, 0, 221, 0, Z), "&
"219 (BC_2, *, control, 0), "&
"218 (BC_6, D2_MDQ(53), bidir, 0, 219, 0, Z), "&
"217 (BC_2, *, control, 0), "&
"216 (BC_6, D2_MDQ(49), bidir, 0, 217, 0, Z), "&
"215 (BC_2, *, control, 0), "&
"214 (BC_6, D2_MCK(5), bidir, 0, 215, 0, Z), "&
"213 (BC_2, *, control, 0), "&
"212 (BC_6, D2_MCK_B(2), bidir, 0, 213, 0, Z), "&
"211 (BC_2, *, control, 0), "&
"210 (BC_6, D2_MCK(2), bidir, 0, 211, 0, Z), "&
"209 (BC_2, *, control, 0), "&
"208 (BC_6, D2_MCK_B(5), bidir, 0, 209, 0, Z), "&
"207 (BC_2, *, control, 0), "&
"206 (BC_6, D2_MDM(6), bidir, 0, 207, 0, Z), "&
"205 (BC_2, *, control, 0), "&
"204 (BC_6, D2_MDQS(6), bidir, 0, 205, 0, Z), "&
"203 (BC_2, *, control, 0), "&
"202 (BC_6, D2_MDQS_B(6), bidir, 0, 203, 0, Z), "&
"201 (BC_2, *, control, 0), "&
"200 (BC_6, D2_MDQ(54), bidir, 0, 201, 0, Z), "&
"199 (BC_2, *, control, 0), "&
"198 (BC_6, D2_MDQ(50), bidir, 0, 199, 0, Z), "&
"197 (BC_2, *, control, 0), "&
"196 (BC_6, D2_MDQ(60), bidir, 0, 197, 0, Z), "&
"195 (BC_2, *, control, 0), "&
"194 (BC_6, D2_MDQ(55), bidir, 0, 195, 0, Z), "&
"193 (BC_2, *, control, 0), "&
"192 (BC_6, D2_MDQ(51), bidir, 0, 193, 0, Z), "&
"191 (BC_2, *, control, 0), "&
"190 (BC_6, D2_MDQ(56), bidir, 0, 191, 0, Z), "&
"189 (BC_2, *, control, 0), "&
"188 (BC_6, D2_MDM(7), bidir, 0, 189, 0, Z), "&
"187 (BC_2, *, control, 0), "&
"186 (BC_6, D2_MDQ(57), bidir, 0, 187, 0, Z), "&
"185 (BC_2, *, control, 0), "&
"184 (BC_6, D2_MDQ(61), bidir, 0, 185, 0, Z), "&
"183 (BC_2, *, control, 0), "&
"182 (BC_6, D2_MDQS_B(7), bidir, 0, 183, 0, Z), "&
"181 (BC_2, *, control, 0), "&
"180 (BC_6, D2_MDQS(7), bidir, 0, 181, 0, Z), "&
"179 (BC_2, *, control, 0), "&
"178 (BC_6, D2_MDQ(63), bidir, 0, 179, 0, Z), "&
"177 (BC_2, *, control, 0), "&
"176 (BC_6, D2_MDQ(62), bidir, 0, 177, 0, Z), "&
"175 (BC_2, *, control, 0), "&
"174 (BC_6, D2_MDQ(58), bidir, 0, 175, 0, Z), "&
"173 (BC_2, *, control, 0), "&
"172 (BC_6, D2_MDQ(59), bidir, 0, 173, 0, Z), "&
"171 (BC_2, *, control, 0), "&
"170 (BC_6, TSEC4_RXD(3), bidir, 0, 171, 0, Z), "&
"169 (BC_2, *, control, 0), "&
"168 (BC_6, TSEC4_TXD(0), bidir, 0, 169, 0, Z), "&
"167 (BC_2, *, control, 0), "&
"166 (BC_6, TSEC4_TX_EN, bidir, 0, 167, 0, Z), "&
"165 (BC_2, *, control, 0), "&
"164 (BC_6, TSEC4_TX_ER, bidir, 0, 165, 0, Z), "&
"163 (BC_2, *, control, 0), "&
"162 (BC_6, TSEC4_TXD(6), bidir, 0, 163, 0, Z), "&
"161 (BC_2, *, control, 0), "&
"160 (BC_6, TSEC4_RXD(4), bidir, 0, 161, 0, Z), "&
"159 (BC_2, *, control, 0), "&
"158 (BC_6, TSEC4_RXD(5), bidir, 0, 159, 0, Z), "&
"157 (BC_2, *, control, 0), "&
"156 (BC_6, TSEC4_GTX_CLK, bidir, 0, 157, 0, Z), "&
"155 (BC_2, *, control, 0), "&
"154 (BC_6, TSEC4_TXD(7), bidir, 0, 155, 0, Z), "&
"153 (BC_2, *, control, 0), "&
"152 (BC_6, TSEC3_TX_ER, bidir, 0, 153, 0, Z), "&
"151 (BC_2, *, control, 0), "&
"150 (BC_6, TSEC4_RXD(0), bidir, 0, 151, 0, Z), "&
"149 (BC_2, *, control, 0), "&
"148 (BC_6, TSEC4_RXD(1), bidir, 0, 149, 0, Z), "&
"147 (BC_2, *, control, 0), "&
"146 (BC_6, TSEC3_TXD(1), bidir, 0, 147, 0, Z), "&
"145 (BC_2, *, control, 0), "&
"144 (BC_6, TSEC4_TX_CLK, bidir, 0, 145, 0, Z), "&
"143 (BC_2, *, control, 0), "&
"142 (BC_6, TSEC4_RX_ER, bidir, 0, 143, 0, Z), "&
"141 (BC_2, *, control, 0), "&
"140 (BC_6, TSEC4_RXD(6), bidir, 0, 141, 0, Z), "&
"139 (BC_2, *, control, 0), "&
"138 (BC_6, TSEC4_RX_CLK, bidir, 0, 139, 0, Z), "&
"137 (BC_2, *, control, 0), "&
"136 (BC_6, TSEC4_RXD(7), bidir, 0, 137, 0, Z), "&
"135 (BC_2, *, control, 0), "&
"134 (BC_6, TSEC4_RXD(2), bidir, 0, 135, 0, Z), "&
"133 (BC_2, *, control, 0), "&
"132 (BC_6, TSEC4_COL, bidir, 0, 133, 0, Z), "&
"131 (BC_2, *, control, 0), "&
"130 (BC_6, TSEC4_TXD(3), bidir, 0, 131, 0, Z), "&
"129 (BC_2, *, control, 0), "&
"128 (BC_6, TSEC4_TXD(5), bidir, 0, 129, 0, Z), "&
"127 (BC_2, *, control, 0), "&
"126 (BC_6, TSEC4_TXD(2), bidir, 0, 127, 0, Z), "&
"125 (BC_2, *, control, 0), "&
"124 (BC_6, TSEC3_TXD(0), bidir, 0, 125, 0, Z), "&
"123 (BC_2, *, control, 0), "&
"122 (BC_6, TSEC4_TXD(4), bidir, 0, 123, 0, Z), "&
"121 (BC_2, *, control, 0), "&
"120 (BC_6, TSEC4_CRS, bidir, 0, 121, 0, Z), "&
"119 (BC_2, *, control, 0), "&
"118 (BC_6, TSEC3_TXD(5), bidir, 0, 119, 0, Z), "&
"117 (BC_2, *, control, 0), "&
"116 (BC_6, TSEC3_GTX_CLK, bidir, 0, 117, 0, Z), "&
"115 (BC_2, *, control, 0), "&
"114 (BC_6, TSEC3_TXD(3), bidir, 0, 115, 0, Z), "&
"113 (BC_2, *, control, 0), "&
"112 (BC_6, TSEC3_RXD(5), bidir, 0, 113, 0, Z), "&
"111 (BC_2, *, control, 0), "&
"110 (BC_6, TSEC3_TXD(7), bidir, 0, 111, 0, Z), "&
"109 (BC_2, *, control, 0), "&
"108 (BC_6, TSEC3_TX_CLK, bidir, 0, 109, 0, Z), "&
"107 (BC_2, *, control, 0), "&
"106 (BC_6, TSEC3_TX_EN, bidir, 0, 107, 0, Z), "&
"105 (BC_2, *, control, 0), "&
"104 (BC_6, TSEC4_RX_DV, bidir, 0, 105, 0, Z), "&
"103 (BC_2, *, control, 0), "&
"102 (BC_6, TSEC3_RXD(3), bidir, 0, 103, 0, Z), "&
"101 (BC_2, *, control, 0), "&
"100 (BC_6, TSEC3_RXD(2), bidir, 0, 101, 0, Z), "&
"99 (BC_2, *, control, 0), "&
"98 (BC_6, TSEC3_TXD(6), bidir, 0, 99, 0, Z), "&
"97 (BC_2, *, control, 0), "&
"96 (BC_6, TSEC3_RXD(6), bidir, 0, 97, 0, Z), "&
"95 (BC_2, *, control, 0), "&
"94 (BC_6, TSEC3_RX_CLK, bidir, 0, 95, 0, Z), "&
"93 (BC_2, *, control, 0), "&
"92 (BC_6, TSEC3_TXD(2), bidir, 0, 93, 0, Z), "&
"91 (BC_2, *, control, 0), "&
"90 (BC_6, TSEC3_RXD(0), bidir, 0, 91, 0, Z), "&
"89 (BC_2, *, control, 0), "&
"88 (BC_6, TSEC3_CRS, bidir, 0, 89, 0, Z), "&
"87 (BC_2, *, control, 0), "&
"86 (BC_6, TSEC3_RXD(7), bidir, 0, 87, 0, Z), "&
"85 (BC_2, *, control, 0), "&
"84 (BC_6, TSEC3_RX_ER, bidir, 0, 85, 0, Z), "&
"83 (BC_2, *, control, 0), "&
"82 (BC_6, TSEC4_TXD(1), bidir, 0, 83, 0, Z), "&
"81 (BC_2, *, control, 0), "&
"80 (BC_6, TSEC3_RX_DV, bidir, 0, 81, 0, Z), "&
"79 (BC_2, *, control, 0), "&
"78 (BC_6, TSEC3_RXD(1), bidir, 0, 79, 0, Z), "&
"77 (BC_2, *, control, 0), "&
"76 (BC_6, TSEC3_TXD(4), bidir, 0, 77, 0, Z), "&
"75 (BC_2, *, control, 0), "&
"74 (BC_6, TSEC3_RXD(4), bidir, 0, 75, 0, Z), "&
"73 (BC_2, *, control, 0), "&
"72 (BC_6, TSEC3_COL, bidir, 0, 73, 0, Z), "&
"71 (BC_2, *, control, 0), "&
"70 (BC_6, EC2_GTX_CLK125, bidir, 0, 71, 0, Z), "&
"69 (BC_2, SD2_TX(7), output3, 0, 68, 1, Z), "&
"68 (BC_2, *, control, 1), "&
"67 (BC_4, SD2_RX(7), observe_only, X), "&
"66 (BC_4, SD2_RX(6), observe_only, X), "&
"65 (BC_2, SD2_TX(6), output3, 0, 64, 1, Z), "&
"64 (BC_2, *, control, 1), "&
"63 (BC_2, SD2_TX(5), output3, 0, 62, 1, Z), "&
"62 (BC_2, *, control, 1), "&
"61 (BC_4, SD2_RX(5), observe_only, X), "&
"60 (BC_4, SD2_RX(4), observe_only, X), "&
"59 (BC_2, SD2_TX(4), output3, 0, 58, 1, Z), "&
"58 (BC_2, *, control, 1), "&
"57 (BC_2, *, internal, X), "&
"56 (BC_2, *, internal, 1), "&
"55 (BC_4, RSVD1, observe_only, X), "&
"54 (BC_2, SD2_PLL_TPD, output3, 0, 53, 1, Z), "&
"53 (BC_2, *, control, 1), "&
"52 (BC_4, SD2_REF_CLK, clock, X), "&
"51 (BC_2, SD2_DLL_TPD, output3, 0, 50, 1, Z), "&
"50 (BC_2, *, control, 1), "&
"49 (BC_4, SD2_RX(3), observe_only, X), "&
"48 (BC_2, SD2_TX(3), output3, 0, 47, 1, Z), "&
"47 (BC_2, *, control, 1), "&
"46 (BC_2, SD2_TX(2), output3, 0, 45, 1, Z), "&
"45 (BC_2, *, control, 1), "&
"44 (BC_4, SD2_RX(2), observe_only, X), "&
"43 (BC_4, SD2_RX(1), observe_only, X), "&
"42 (BC_2, SD2_TX(1), output3, 0, 41, 1, Z), "&
"41 (BC_2, *, control, 1), "&
"40 (BC_2, SD2_TX(0), output3, 0, 39, 1, Z), "&
"39 (BC_2, *, control, 1), "&
"38 (BC_4, SD2_RX(0), observe_only, X), "&
"37 (BC_4, RSVD0, observe_only, X), "&
"36 (BC_2, *, internal, X), "&
"35 (BC_2, *, internal, 1), "&
"34 (BC_2, SD1_TX(7), output3, 0, 33, 1, Z), "&
"33 (BC_2, *, control, 1), "&
"32 (BC_4, SD1_RX(7), observe_only, X), "&
"31 (BC_4, SD1_RX(6), observe_only, X), "&
"30 (BC_2, SD1_TX(6), output3, 0, 29, 1, Z), "&
"29 (BC_2, *, control, 1), "&
"28 (BC_2, SD1_TX(5), output3, 0, 27, 1, Z), "&
"27 (BC_2, *, control, 1), "&
"26 (BC_4, SD1_RX(5), observe_only, X), "&
"25 (BC_4, SD1_RX(4), observe_only, X), "&
"24 (BC_2, SD1_TX(4), output3, 0, 23, 1, Z), "&
"23 (BC_2, *, control, 1), "&
"22 (BC_2, RSVD5, output3, 0, 21, 1, Z), "&
"21 (BC_2, *, control, 1), "&
"20 (BC_4, RSVD3, observe_only, X), "&
"19 (BC_2, SD1_PLL_TPD, output3, 0, 18, 1, Z), "&
"18 (BC_2, *, control, 1), "&
"17 (BC_4, SD1_REF_CLK, clock, X), "&
"16 (BC_2, SD1_DLL_TPD, output3, 0, 15, 1, Z), "&
"15 (BC_2, *, control, 1), "&
"14 (BC_4, SD1_RX(3), observe_only, X), "&
"13 (BC_2, SD1_TX(3), output3, 0, 12, 1, Z), "&
"12 (BC_2, *, control, 1), "&
"11 (BC_2, SD1_TX(2), output3, 0, 10, 1, Z), "&
"10 (BC_2, *, control, 1), "&
"9 (BC_4, SD1_RX(2), observe_only, X), "&
"8 (BC_4, SD1_RX(1), observe_only, X), "&
"7 (BC_2, SD1_TX(1), output3, 0, 6, 1, Z), "&
"6 (BC_2, *, control, 1), "&
"5 (BC_2, SD1_TX(0), output3, 0, 4, 1, Z), "&
"4 (BC_2, *, control, 1), "&
"3 (BC_4, SD1_RX(0), observe_only, X), "&
"2 (BC_4, RSVD2, observe_only, X), "&
"1 (BC_2, RSVD4, output3, 0, 0, 1, Z), "&
"0 (BC_2, *, control, 1)" ;
-- tdo
end MPC8641D;