-------------------------------------------------------------------------
-- --
-- Copyright Microchip Technology Inc. 2017. All rights reserved. --
-- --
-- --
-- IMPORTANT NOTICE --
-- --
-- --
-- Software License Agreement --
-- --
-- The software supplied herewith by Microchip Technology Incorporated --
-- (the "Company") for its PICmicro® Microcontroller is intended and --
-- supplied to you, the Company's customer, for use solely and --
-- exclusively on Microchip PICmicro Microcontroller products. The --
-- software is owned by the Company and/or its supplier, and is --
-- protected under applicable copyright laws. All rights are reserved. --
-- Any use in violation of the foregoing restrictions may subject the --
-- user to criminal sanctions under applicable laws, as well as to --
-- civil liability for the breach of the terms and conditions of this --
-- license. --
-- THIS SOFTWARE IS PROVIDED IN AN "AS IS" CONDITION. NO WARRANTIES, --
-- WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED --
-- TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A --
-- PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. THE COMPANY SHALL NOT, --
-- IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL OR --
-- CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. --
-------------------------------------------------------------------------
-- BSDL file
-- File Name : dsPIC33CH512MP206.bsd
-- File Revision : Revision: <Unversioned>
-- Date created : June 18, 2018
-- Device : dsPIC33CH512MP206
-- Silicon Rev : N/A
-- Package : TQFP64,QFN64
-- Notes:
--1. The behavior of the Oscillator Boundary Scan cells are dependant
-- on the Oscillator Fuse settings and therefore caution must be used
-- when controlling the BSC's on RB0, RB1.
-- ************************************************************************
-- * PORT DEFINITIONS *
-- ************************************************************************
entity dsPIC33CH512MP206 is
generic (PHYSICAL_PIN_MAP : string := "TQFP64");
port (
AVDDA :linkage bit;
AVSSA :linkage bit;
NMCLR :inout bit;
RA0 :inout bit;
RA1 :inout bit;
RA2 :inout bit;
RA3 :inout bit;
RA4 :inout bit;
RB0 :inout bit;
RB1 :inout bit;
RB2 :inout bit;
RB3 :inout bit;
RB4 :inout bit;
RB5 :inout bit;
RB6 :inout bit;
RB8 :inout bit;
RB9 :inout bit;
RB13 :inout bit;
RB14 :inout bit;
RB15 :inout bit;
RC0 :inout bit;
RC1 :inout bit;
RC2 :inout bit;
RC3 :inout bit;
RC4 :inout bit;
RC5 :inout bit;
RC6 :inout bit;
RC7 :inout bit;
RC8 :inout bit;
RC9 :inout bit;
RC10 :inout bit;
RC11 :inout bit;
RC12 :inout bit;
RC13 :inout bit;
RC14 :inout bit;
RC15 :inout bit;
RD0 :inout bit;
RD1 :inout bit;
RD2 :inout bit;
RD3 :inout bit;
RD4 :inout bit;
RD5 :inout bit;
RD6 :inout bit;
RD7 :inout bit;
RD8 :inout bit;
RD9 :inout bit;
RD10 :inout bit;
RD11 :inout bit;
RD12 :inout bit;
RD13 :inout bit;
RD14 :inout bit;
RD15 :inout bit;
TCK :in bit;
TDI :in bit;
TDO :out bit;
TMS :in bit;
VDD1A :linkage bit;
VDD2A :linkage bit;
VDD3A :linkage bit;
VDD4A :linkage bit;
VSS1A :linkage bit;
VSS2A :linkage bit;
VSS3A :linkage bit;
VSS4A :linkage bit
);
use STD_1149_1_2001.all;
attribute COMPONENT_CONFORMANCE of dsPIC33CH512MP206 : entity is "STD_1149_1_2001";
-- *********************************************************************
-- * PIN MAPPING *
-- *********************************************************************
attribute PIN_MAP of dsPIC33CH512MP206 : entity is PHYSICAL_PIN_MAP;
constant TQFP64 : PIN_MAP_STRING :=
" RB14: 1 ,"&
" RB15: 2 ,"&
" RC12: 3 ,"&
" RC13: 4 ,"&
" RC14: 5 ,"&
" RC15: 6 ,"&
" NMCLR: 7 ,"&
" RD15: 8 ,"&
" VSS1A: 9 ,"&
" VDD1A: 10 ,"&
" RD14: 11 ,"&
" RD13: 12 ,"&
" RC0: 13 ,"&
" RA0: 14 ,"&
" RA1: 15 ,"&
" RA2: 16 ,"&
" RA3: 17 ,"&
" RA4: 18 ,"&
" AVDDA: 19 ,"&
" AVSSA: 20 ,"&
" RD12: 21 ,"&
" RC1: 22 ,"&
" RC2: 23 ,"&
" RC6: 24 ,"&
" VDD2A: 25 ,"&
" VSS2A: 26 ,"&
" RC3: 27 ,"&
" RB0: 28 ,"&
" RB1: 29 ,"&
" RD11: 30 ,"&
" RD10: 31 ,"&
" RC7: 32 ,"&
" RB2: 33 ,"&
" RB3: 34 ,"&
" RB4: 35 ,"&
" RC8: 36 ,"&
" RC9: 37 ,"&
" RD9: 38 ,"&
" RD8: 39 ,"&
" VSS3A: 40 ,"&
" VDD3A: 41 ,"&
" RD7: 42 ,"&
" RD6: 43 ,"&
" RD5: 44 ,"&
" RB5: 45 ,"&
" RB6: 46 ,"&
" TDO: 47 ,"&
" RB8: 48 ,"&
" RB9: 49 ,"&
" RC4: 50 ,"&
" RC5: 51 ,"&
" RC10: 52 ,"&
" RC11: 53 ,"&
" RD4: 54 ,"&
" RD3: 55 ,"&
" VSS4A: 56 ,"&
" VDD4A: 57 ,"&
" RD2: 58 ,"&
" RD1: 59 ,"&
" RD0: 60 ,"&
" TMS: 61 ,"&
" TCK: 62 ,"&
" TDI: 63 ,"&
" RB13: 64 ";
constant QFN64 : PIN_MAP_STRING :=
" RB14: 1 ,"&
" RB15: 2 ,"&
" RC12: 3 ,"&
" RC13: 4 ,"&
" RC14: 5 ,"&
" RC15: 6 ,"&
" NMCLR: 7 ,"&
" RD15: 8 ,"&
" VSS1A: 9 ,"&
" VDD1A: 10 ,"&
" RD14: 11 ,"&
" RD13: 12 ,"&
" RC0: 13 ,"&
" RA0: 14 ,"&
" RA1: 15 ,"&
" RA2: 16 ,"&
" RA3: 17 ,"&
" RA4: 18 ,"&
" AVDDA: 19 ,"&
" AVSSA: 20 ,"&
" RD12: 21 ,"&
" RC1: 22 ,"&
" RC2: 23 ,"&
" RC6: 24 ,"&
" VDD2A: 25 ,"&
" VSS2A: 26 ,"&
" RC3: 27 ,"&
" RB0: 28 ,"&
" RB1: 29 ,"&
" RD11: 30 ,"&
" RD10: 31 ,"&
" RC7: 32 ,"&
" RB2: 33 ,"&
" RB3: 34 ,"&
" RB4: 35 ,"&
" RC8: 36 ,"&
" RC9: 37 ,"&
" RD9: 38 ,"&
" RD8: 39 ,"&
" VSS3A: 40 ,"&
" VDD3A: 41 ,"&
" RD7: 42 ,"&
" RD6: 43 ,"&
" RD5: 44 ,"&
" RB5: 45 ,"&
" RB6: 46 ,"&
" TDO: 47 ,"&
" RB8: 48 ,"&
" RB9: 49 ,"&
" RC4: 50 ,"&
" RC5: 51 ,"&
" RC10: 52 ,"&
" RC11: 53 ,"&
" RD4: 54 ,"&
" RD3: 55 ,"&
" VSS4A: 56 ,"&
" VDD4A: 57 ,"&
" RD2: 58 ,"&
" RD1: 59 ,"&
" RD0: 60 ,"&
" TMS: 61 ,"&
" TCK: 62 ,"&
" TDI: 63 ,"&
" RB13: 64 ";
-- *********************************************************************
-- * IEEE 1149.1 TAP PORTS *
-- *********************************************************************
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (10.00e6,BOTH);
-- *********************************************************************
-- * INSTRUCTIONS AND REGISTER ACCESS *
-- *********************************************************************
attribute INSTRUCTION_LENGTH of dsPIC33CH512MP206 : entity is 4;
attribute INSTRUCTION_OPCODE of dsPIC33CH512MP206 : entity is
"BYPASS (1111), "&
"EXTEST (0011), "&
"SAMPLE (0001), "&
"PRELOAD (0001), "&
"IDCODE (0010), "&
"MCHP_CMD (1000)," &
"MCHP_SCAN (0111)," &
"MCHP_EXEC (1001)," &
"MCHP_JDATA (1010)," &
"HIGHZ (0100)";
attribute INSTRUCTION_CAPTURE of dsPIC33CH512MP206 : entity is "0001";
attribute IDCODE_REGISTER of dsPIC33CH512MP206 : entity is
"xxxx" & -- Version - With a MASK on device revision
"0111110100010011" & -- Part number
"00000101001" & -- Manufacturer ID = 11'h029
"1"; -- Required by IEEE std 1149.1-2001
attribute REGISTER_ACCESS of dsPIC33CH512MP206 : entity is
"BOUNDARY (PRELOAD,SAMPLE,EXTEST),"&
"BYPASS (BYPASS,HIGHZ),"&
"MCHP_CMD[4] (MCHP_CMD,MCHP_SCAN),"&
"MCHP_EXEC[4] (MCHP_EXEC,MCHP_JDATA),"&
"DEVICE_ID (IDCODE)";
-- *********************************************************************
-- * BOUNDARY SCAN CELL INFORMATION *
-- *********************************************************************
attribute BOUNDARY_LENGTH of dsPIC33CH512MP206 : entity is 150;
attribute BOUNDARY_REGISTER of dsPIC33CH512MP206 : entity is
--BSC group 0 for I/O pin 1
" 0 ( BC_1 , RB14, input, X)," &
" 1 ( BC_1 , *, control, 0)," &
" 2 ( BC_1 , RB14, output3, X, 1, 0, Z)," &
--BSC group 1 for I/O pin 2
" 3 ( BC_1 , RB15, input, X)," &
" 4 ( BC_1 , *, control, 0)," &
" 5 ( BC_1 , RB15, output3, X, 4, 0, Z)," &
--BSC group 2 for I/O pin 3
" 6 ( BC_1 , RC12, input, X)," &
" 7 ( BC_1 , *, control, 0)," &
" 8 ( BC_1 , RC12, output3, X, 7, 0, Z)," &
--BSC group 3 for I/O pin 4
" 9 ( BC_1 , RC13, input, X)," &
" 10 ( BC_1 , *, control, 0)," &
" 11 ( BC_1 , RC13, output3, X, 10, 0, Z)," &
--BSC group 4 for I/O pin 5
" 12 ( BC_1 , RC14, input, X)," &
" 13 ( BC_1 , *, control, 0)," &
" 14 ( BC_1 , RC14, output3, X, 13, 0, Z)," &
--BSC group 5 for I/O pin 6
" 15 ( BC_1 , RC15, input, X)," &
" 16 ( BC_1 , *, control, 0)," &
" 17 ( BC_1 , RC15, output3, X, 16, 0, Z)," &
--BSC group 6 for I/O pin 7
" 18 ( BC_1 , NMCLR, input, X)," &
" 19 ( BC_1 , *, control, 0)," &
" 20 ( BC_1 , NMCLR, output3, X, 19, 0, Z)," &
--BSC group 7 for I/O pin 8
" 21 ( BC_1 , RD15, input, X)," &
" 22 ( BC_1 , *, control, 0)," &
" 23 ( BC_1 , RD15, output3, X, 22, 0, Z)," &
--BSC group 8 for I/O pin 11
" 24 ( BC_1 , RD14, input, X)," &
" 25 ( BC_1 , *, control, 0)," &
" 26 ( BC_1 , RD14, output3, X, 25, 0, Z)," &
--BSC group 9 for I/O pin 12
" 27 ( BC_1 , RD13, input, X)," &
" 28 ( BC_1 , *, control, 0)," &
" 29 ( BC_1 , RD13, output3, X, 28, 0, Z)," &
--BSC group 10 for I/O pin 13
" 30 ( BC_1 , RC0, input, X)," &
" 31 ( BC_1 , *, control, 0)," &
" 32 ( BC_1 , RC0, output3, X, 31, 0, Z)," &
--BSC group 11 for I/O pin 14
" 33 ( BC_1 , RA0, input, X)," &
" 34 ( BC_1 , *, control, 0)," &
" 35 ( BC_1 , RA0, output3, X, 34, 0, Z)," &
--BSC group 12 for I/O pin 15
" 36 ( BC_1 , RA1, input, X)," &
" 37 ( BC_1 , *, control, 0)," &
" 38 ( BC_1 , RA1, output3, X, 37, 0, Z)," &
--BSC group 13 for I/O pin 16
" 39 ( BC_1 , RA2, input, X)," &
" 40 ( BC_1 , *, control, 0)," &
" 41 ( BC_1 , RA2, output3, X, 40, 0, Z)," &
--BSC group 14 for I/O pin 17
" 42 ( BC_1 , RA3, input, X)," &
" 43 ( BC_1 , *, control, 0)," &
" 44 ( BC_1 , RA3, output3, X, 43, 0, Z)," &
--BSC group 15 for I/O pin 18
" 45 ( BC_1 , RA4, input, X)," &
" 46 ( BC_1 , *, control, 0)," &
" 47 ( BC_1 , RA4, output3, X, 46, 0, Z)," &
--BSC group 16 for I/O pin 21
" 48 ( BC_1 , RD12, input, X)," &
" 49 ( BC_1 , *, control, 0)," &
" 50 ( BC_1 , RD12, output3, X, 49, 0, Z)," &
--BSC group 17 for I/O pin 22
" 51 ( BC_1 , RC1, input, X)," &
" 52 ( BC_1 , *, control, 0)," &
" 53 ( BC_1 , RC1, output3, X, 52, 0, Z)," &
--BSC group 18 for I/O pin 23
" 54 ( BC_1 , RC2, input, X)," &
" 55 ( BC_1 , *, control, 0)," &
" 56 ( BC_1 , RC2, output3, X, 55, 0, Z)," &
--BSC group 19 for I/O pin 24
" 57 ( BC_1 , RC6, input, X)," &
" 58 ( BC_1 , *, control, 0)," &
" 59 ( BC_1 , RC6, output3, X, 58, 0, Z)," &
--BSC group 20 for I/O pin 27
" 60 ( BC_1 , RC3, input, X)," &
" 61 ( BC_1 , *, control, 0)," &
" 62 ( BC_1 , RC3, output3, X, 61, 0, Z)," &
--BSC group 21 for I/O pin 28
" 63 ( BC_1 , RB0, input, X)," &
" 64 ( BC_1 , *, control, 0)," &
" 65 ( BC_1 , RB0, output3, X, 64, 0, Z)," &
--BSC group 22 for I/O pin 29
" 66 ( BC_1 , RB1, input, X)," &
" 67 ( BC_1 , *, control, 0)," &
" 68 ( BC_1 , RB1, output3, X, 67, 0, Z)," &
--BSC group 23 for I/O pin 30
" 69 ( BC_1 , RD11, input, X)," &
" 70 ( BC_1 , *, control, 0)," &
" 71 ( BC_1 , RD11, output3, X, 70, 0, Z)," &
--BSC group 24 for I/O pin 31
" 72 ( BC_1 , RD10, input, X)," &
" 73 ( BC_1 , *, control, 0)," &
" 74 ( BC_1 , RD10, output3, X, 73, 0, Z)," &
--BSC group 25 for I/O pin 32
" 75 ( BC_1 , RC7, input, X)," &
" 76 ( BC_1 , *, control, 0)," &
" 77 ( BC_1 , RC7, output3, X, 76, 0, Z)," &
--BSC group 26 for I/O pin 33
" 78 ( BC_1 , RB2, input, X)," &
" 79 ( BC_1 , *, control, 0)," &
" 80 ( BC_1 , RB2, output3, X, 79, 0, Z)," &
--BSC group 27 for I/O pin 34
" 81 ( BC_1 , RB3, input, X)," &
" 82 ( BC_1 , *, control, 0)," &
" 83 ( BC_1 , RB3, output3, X, 82, 0, Z)," &
--BSC group 28 for I/O pin 35
" 84 ( BC_1 , RB4, input, X)," &
" 85 ( BC_1 , *, control, 0)," &
" 86 ( BC_1 , RB4, output3, X, 85, 0, Z)," &
--BSC group 29 for I/O pin 36
" 87 ( BC_1 , RC8, input, X)," &
" 88 ( BC_1 , *, control, 0)," &
" 89 ( BC_1 , RC8, output3, X, 88, 0, Z)," &
--BSC group 30 for I/O pin 37
" 90 ( BC_1 , RC9, input, X)," &
" 91 ( BC_1 , *, control, 0)," &
" 92 ( BC_1 , RC9, output3, X, 91, 0, Z)," &
--BSC group 31 for I/O pin 38
" 93 ( BC_1 , RD9, input, X)," &
" 94 ( BC_1 , *, control, 0)," &
" 95 ( BC_1 , RD9, output3, X, 94, 0, Z)," &
--BSC group 32 for I/O pin 39
" 96 ( BC_1 , RD8, input, X)," &
" 97 ( BC_1 , *, control, 0)," &
" 98 ( BC_1 , RD8, output3, X, 97, 0, Z)," &
--BSC group 33 for I/O pin 42
" 99 ( BC_1 , RD7, input, X)," &
" 100 ( BC_1 , *, control, 0)," &
" 101 ( BC_1 , RD7, output3, X, 100, 0, Z)," &
--BSC group 34 for I/O pin 43
" 102 ( BC_1 , RD6, input, X)," &
" 103 ( BC_1 , *, control, 0)," &
" 104 ( BC_1 , RD6, output3, X, 103, 0, Z)," &
--BSC group 35 for I/O pin 44
" 105 ( BC_1 , RD5, input, X)," &
" 106 ( BC_1 , *, control, 0)," &
" 107 ( BC_1 , RD5, output3, X, 106, 0, Z)," &
--BSC group 36 for I/O pin 45
" 108 ( BC_1 , RB5, input, X)," &
" 109 ( BC_1 , *, control, 0)," &
" 110 ( BC_1 , RB5, output3, X, 109, 0, Z)," &
--BSC group 37 for I/O pin 46
" 111 ( BC_1 , RB6, input, X)," &
" 112 ( BC_1 , *, control, 0)," &
" 113 ( BC_1 , RB6, output3, X, 112, 0, Z)," &
--BSC group 38 for I/O pin 48
" 114 ( BC_1 , RB8, input, X)," &
" 115 ( BC_1 , *, control, 0)," &
" 116 ( BC_1 , RB8, output3, X, 115, 0, Z)," &
--BSC group 39 for I/O pin 49
" 117 ( BC_1 , RB9, input, X)," &
" 118 ( BC_1 , *, control, 0)," &
" 119 ( BC_1 , RB9, output3, X, 118, 0, Z)," &
--BSC group 40 for I/O pin 50
" 120 ( BC_1 , RC4, input, X)," &
" 121 ( BC_1 , *, control, 0)," &
" 122 ( BC_1 , RC4, output3, X, 121, 0, Z)," &
--BSC group 41 for I/O pin 51
" 123 ( BC_1 , RC5, input, X)," &
" 124 ( BC_1 , *, control, 0)," &
" 125 ( BC_1 , RC5, output3, X, 124, 0, Z)," &
--BSC group 42 for I/O pin 52
" 126 ( BC_1 , RC10, input, X)," &
" 127 ( BC_1 , *, control, 0)," &
" 128 ( BC_1 , RC10, output3, X, 127, 0, Z)," &
--BSC group 43 for I/O pin 53
" 129 ( BC_1 , RC11, input, X)," &
" 130 ( BC_1 , *, control, 0)," &
" 131 ( BC_1 , RC11, output3, X, 130, 0, Z)," &
--BSC group 44 for I/O pin 54
" 132 ( BC_1 , RD4, input, X)," &
" 133 ( BC_1 , *, control, 0)," &
" 134 ( BC_1 , RD4, output3, X, 133, 0, Z)," &
--BSC group 45 for I/O pin 55
" 135 ( BC_1 , RD3, input, X)," &
" 136 ( BC_1 , *, control, 0)," &
" 137 ( BC_1 , RD3, output3, X, 136, 0, Z)," &
--BSC group 46 for I/O pin 58
" 138 ( BC_1 , RD2, input, X)," &
" 139 ( BC_1 , *, control, 0)," &
" 140 ( BC_1 , RD2, output3, X, 139, 0, Z)," &
--BSC group 47 for I/O pin 59
" 141 ( BC_1 , RD1, input, X)," &
" 142 ( BC_1 , *, control, 0)," &
" 143 ( BC_1 , RD1, output3, X, 142, 0, Z)," &
--BSC group 48 for I/O pin 60
" 144 ( BC_1 , RD0, input, X)," &
" 145 ( BC_1 , *, control, 0)," &
" 146 ( BC_1 , RD0, output3, X, 145, 0, Z)," &
--BSC group 49 for I/O pin 64
" 147 ( BC_1 , RB13, input, X)," &
" 148 ( BC_1 , *, control, 0)," &
" 149 ( BC_1 , RB13, output3, X, 148, 0, Z)";
end dsPIC33CH512MP206;