BSDL Files Library for JTAG

The only free public library that contains thousands of BSDL (Boundary Scan Description Language) models to use with BScan/JTAG tools

BSDL model: LAN9730

-- *****************************************************************************

--   BSDL file for design LAN9730

--   Created by Synopsys Version D-2010.03-SP3 (Jul 18, 2010)

--   Designer: 
--   Company:  

--   Date: Thu Jan 13 21:16:17 2011

-- *****************************************************************************


 entity LAN9730 is
   
-- This section identifies the default device package selected.
   
   generic (PHYSICAL_PIN_MAP: string:= "LAN9730ABZJ");
   
-- This section declares all the ports in the design.
   
   port ( 
          TEST2	          : in       bit;
          EEDI                   : in       bit;
          SLEW_TUNE              : in       bit;
          TCK_RXD1               : in       bit;
          TDI_RXD3               : in       bit;
          TMS_RXD2               : in       bit;
          nRESET                 : in       bit;
          nTRST_RXD0             : in       bit;
          PHY_SEL                : in       bit;
          TEST1                  : in       bit;
          COL_GPIO0              : inout    bit;
          CRS_GPIO3              : inout    bit;
          EECLK                  : inout    bit;
          EECS                   : inout    bit;
          EEDO_nAMDIXEN          : inout    bit;
          MDC_GPIO2              : inout    bit;
          MDIO_GPIO1             : inout    bit;
          RXCLK                  : inout    bit;
          RXDV                   : inout    bit;
          RXER                   : inout    bit;
          TXCLK                  : inout    bit;
          TXD0_GPIO4             : inout    bit;
          TXD1_GPIO5             : inout    bit;
          TXD2_GPIO6             : inout    bit;
          TXD3_GPIO7             : inout    bit;
          TXEN                   : inout    bit;
          nFDX_LED_GPIO8         : inout    bit;
          nLNKA_LED_GPIO9        : inout    bit;
          nPHY_INT               : inout    bit;
          nSPD_LED_GPIO10        : inout    bit;
          TDO_nPHYRST            : out      bit;
          TXER                   : inout    bit;
          CORE_REG_EN            : linkage  bit;
          EXRES                  : linkage  bit;
          HSIC_DATA              : linkage  bit;
          HSIC_STROBE            : linkage  bit;
          RXN                    : linkage  bit;
          RXP                    : linkage  bit;
          TXN                    : linkage  bit;
          TXP                    : linkage  bit;
          USBRBIAS               : linkage  bit;
          XI                     : linkage  bit;
          XO                     : linkage  bit
   );
   
   use STD_1149_1_2001.all;
   
   attribute COMPONENT_CONFORMANCE of LAN9730: entity is "STD_1149_1_2001";
   
   attribute PIN_MAP of LAN9730: entity is PHYSICAL_PIN_MAP;
   
-- This section specifies the pin map for each port. This information is 
-- extracted from the port-to-pin map file that was read in using the 
-- "read_pin_map" command.
   
     constant LAN9730ABZJ: PIN_MAP_STRING := 
        "TEST2              : P13," &
        "EEDI               : P32," &
        "SLEW_TUNE          : P20," &
        "TCK_RXD1           : P38," &
        "TDI_RXD3           : P40," &
        "TMS_RXD2           : P39," &
        "nRESET             : P24," &
        "nTRST_RXD0         : P36," &
        "COL_GPIO0          : P46," &
        "CRS_GPIO3          : P45," &
        "EECLK              : P29," &
        "EECS               : P30," &
        "EEDO_nAMDIXEN      : P31," &
        "MDC_GPIO2          : P22," &
        "MDIO_GPIO1         : P23," &
        "RXCLK              : P41," &
        "RXDV               : P42," &
        "RXER               : P44," &
        "TXCLK              : P47," &
        "TXD0_GPIO4         : P56," &
        "TXD1_GPIO5         : P55," &
        "TXD2_GPIO6         : P54," &
        "TXD3_GPIO7         : P53," &
        "TXEN               : P43," &
        "nFDX_LED_GPIO8     : P26," &
        "nLNKA_LED_GPIO9    : P27," &
        "nPHY_INT           : P1," &
        "nSPD_LED_GPIO10    : P28," &
        "TDO_nPHYRST        : P37," &
        "TXER               : P14," &
        "CORE_REG_EN        : P49," &
        "EXRES              : P7," &
        "HSIC_DATA          : P10," &
        "HSIC_STROBE        : P11," &
        "PHY_SEL            : P34," &
        "RXN                : P5," &
        "RXP                : P6," &
        "TEST1              : P33," &
        "TXN                : P2," &
        "TXP                : P3," &
        "USBRBIAS           : P16," &
        "XI                 : P18," &
        "XO                 : P19";
   
-- This section specifies the TAP ports. For the TAP TCK port, the parameters in 
-- the brackets are:
--        First Field : Maximum  TCK frequency.
--        Second Field: Allowable states TCK may be stopped in.
   
   attribute TAP_SCAN_CLOCK of TCK_RXD1     : signal is (2.500000e+07, BOTH);
   attribute TAP_SCAN_IN    of TDI_RXD3     : signal is true;
   attribute TAP_SCAN_MODE  of TMS_RXD2     : signal is true;
   attribute TAP_SCAN_OUT   of TDO_nPHYRST  : signal is true;
   attribute TAP_SCAN_RESET of nTRST_RXD0   : signal is true;
   
-- Specifies the compliance enable patterns for the design. It lists a set of 
-- design ports and the values that they should be set to, in order to enable 
-- compliance to IEEE Std 1149.1
   
   attribute COMPLIANCE_PATTERNS of LAN9730: entity is 
        "(PHY_SEL, TEST1) (00)";
   
-- Specifies the number of bits in the instruction register.
   
   attribute INSTRUCTION_LENGTH of LAN9730: entity is 6;
   
-- Specifies the boundary-scan instructions implemented in the design and their 
-- opcodes.
   
   attribute INSTRUCTION_OPCODE of LAN9730: entity is 
     "BYPASS          (111111)," &
     "EXTEST          (000001)," &
     "SAMPLE          (000100)," &
     "PRELOAD         (000100)," &
     "HIGHZ           (000011)," &
     "IDCODE          (001010)";
 
   
-- Specifies the bit pattern that is loaded into the instruction register when 
-- the TAP controller passes through the Capture-IR state. The standard mandates 
-- that the two LSBs must be "01". The remaining bits are design specific.
   
   attribute INSTRUCTION_CAPTURE of LAN9730: entity is "000001";
   
-- Specifies the private instructions implemented in the design
   
   
-- Specifies the bit pattern that is loaded into the DEVICE_ID register during 
-- the IDCODE instruction when the TAP controller passes through the Capture-DR 
-- state.
   
   attribute IDCODE_REGISTER of LAN9730: entity is 
     "0000" &                  
 -- 4-bit version number
     "0000000010010001" &      
 -- 16-bit part number
     "01000100010" &           
 -- 11-bit identity of the manufacturer
     "1";                      
 -- Required by IEEE Std 1149.1
   
-- This section specifies the test data register placed between TDI and TDO for 
-- each implemented instruction.
   
   attribute REGISTER_ACCESS of LAN9730: entity is 
        "BYPASS          (BYPASS)," &
        "BOUNDARY        (EXTEST, SAMPLE, PRELOAD)," &
        "DEVICE_ID       (IDCODE)";
    
-- Specifies the length of the boundary scan register.
   
   attribute BOUNDARY_LENGTH of LAN9730: entity is 46;
   
-- The following list specifies the characteristics of each cell in the boundary 
-- scan register from TDI to TDO. The following is a description of the label 
-- fields:
--      num     : Is the cell number.
--      cell    : Is the cell type as defined by the standard.
--      port    : Is the design port name. Control cells do not have a port 
--                name.
--      function: Is the function of the cell as defined by the standard. Is one 
--                of input, output2, output3, bidir, control or controlr.
--      safe    : Specifies the value that the BSR cell should be loaded with 
--                for safe operation when the software might otherwise choose a 
--                random value.
--      ccell   : The control cell number. Specifies the control cell that 
--                drives the output enable for this port.
--      disval  : Specifies the value that is loaded into the control cell to 
--                disable the output enable for the corresponding port.
--      rslt    : Resulting state. Shows the state of the driver when it is 
--                disabled.
   
   attribute BOUNDARY_REGISTER of LAN9730: entity is 
--     
--    num   cell   port             function      safe  [ccell  disval  rslt]
--     
     "45   (BC_2,  *,                control,      1),                        " &
     "44   (BC_7,  nPHY_INT,         bidir,        X,    45,     1,      Z),  " &
     "43   (BC_2,  TEST2,            input,        X),                        " &
     "42   (BC_2,  *,                control,      1),                        " &
     "41   (BC_7,  TXER,             bidir,        X,    42,     1,      Z),  " &
     "40   (BC_2,  SLEW_TUNE,        input,        X),                        " &
     "39   (BC_2,  *,                control,      1),                        " &
     "38   (BC_7,  MDC_GPIO2,        bidir,        X,    39,     1,      Z),  " &
     "37   (BC_2,  *,                control,      1),                        " &
     "36   (BC_7,  MDIO_GPIO1,       bidir,        X,    37,     1,      Z),  " &
     "35   (BC_2,  nRESET,           input,        X),                        " &
     "34   (BC_2,  *,                control,      1),                        " &
     "33   (BC_7,  nFDX_LED_GPIO8,   bidir,        X,    34,     1,      Z),  " &
     "32   (BC_2,  *,                control,      1),                        " &
     "31   (BC_7,  nLNKA_LED_GPIO9,  bidir,        X,    32,     1,      Z),  " &
     "30   (BC_2,  *,                control,      1),                        " &
     "29   (BC_7,  nSPD_LED_GPIO10,  bidir,        X,    30,     1,      Z),  " &
     "28   (BC_2,  *,                control,      1),                        " &
     "27   (BC_7,  EECLK,            bidir,        X,    28,     1,      Z),  " &
     "26   (BC_2,  *,                control,      1),                        " &
     "25   (BC_7,  EECS,             bidir,        X,    26,     1,      Z),  " &
     "24   (BC_2,  *,                control,      1),                        " &
     "23   (BC_7,  EEDO_nAMDIXEN,    bidir,        X,    24,     1,      Z),  " &
     "22   (BC_2,  EEDI,             input,        X),                        " &
     "21   (BC_2,  *,                control,      1),                        " &
     "20   (BC_7,  RXCLK,            bidir,        X,    21,     1,      Z),  " &
     "19   (BC_2,  *,                control,      1),                        " &
     "18   (BC_7,  RXDV,             bidir,        X,    19,     1,      Z),  " &
     "17   (BC_2,  *,                control,      1),                        " &
     "16   (BC_7,  TXEN,             bidir,        X,    17,     1,      Z),  " &
     "15   (BC_2,  *,                control,      1),                        " &
     "14   (BC_7,  RXER,             bidir,        X,    15,     1,      Z),  " &
     "13   (BC_2,  *,                control,      1),                        " &
     "12   (BC_7,  CRS_GPIO3,        bidir,        X,    13,     1,      Z),  " &
     "11   (BC_2,  *,                control,      1),                        " &
     "10   (BC_7,  COL_GPIO0,        bidir,        X,    11,     1,      Z),  " &
     "9    (BC_2,  *,                control,      1),                        " &
     "8    (BC_7,  TXCLK,            bidir,        X,    9,      1,      Z),  " &
     "7    (BC_2,  *,                control,      1),                        " &
     "6    (BC_7,  TXD3_GPIO7,       bidir,        X,    7,      1,      Z),  " &
     "5    (BC_2,  *,                control,      1),                        " &
     "4    (BC_7,  TXD2_GPIO6,       bidir,        X,    5,      1,      Z),  " &
     "3    (BC_2,  *,                control,      1),                        " &
     "2    (BC_7,  TXD1_GPIO5,       bidir,        X,    3,      1,      Z),  " &
     "1    (BC_2,  *,                control,      1),                        " &
     "0    (BC_7,  TXD0_GPIO4,       bidir,        X,    1,      1,      Z)   ";
 
 end LAN9730;