----------------------------------------------------------------------
-- TI TMS320DM6435 Fixed-Point DSP with Boundary Scan --
----------------------------------------------------------------------
-- Supported Devices: TMS320DM6435 Revision 1.0 --
----------------------------------------------------------------------
-- Created by : Texas Instruments Incorporated --
-- Documentation : TMS320DM6435 Users Guide --
-- BSDL Revision : 0.6 originally created --
-- --
-- BSDL Status : Preliminary --
-- Date Created : 06/05/2006 --
-- --
----------------------------------------------------------------------
-------------------------------------------------------------------------------
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-------------------------------------------------------------------
entity TMS320DM6435 is
generic(PHYSICAL_PIN_MAP : string := "ZWT");
port(
RSV17 : inout bit;
RSV18 : inout bit;
RSV19 : inout bit;
EMA3_GP11 : inout bit;
EMA2_CLE_GP8_AEAW0_PLLMS0: inout bit;
EMBA1_GP5_AEM0 : inout bit;
CWEn_EMR_Wn_GP35 : inout bit;
CI0CCD8_EMA20_GP44: inout bit;
CI1CCD9_EMA19_GP45: inout bit;
CI2CCD10_EMA18_GP46: inout bit;
CI3CCD11_EMA17_GP47: inout bit;
CI4CCD12_EMA16_GP48: inout bit;
CI5CCD13_EMA15_GP49: inout bit;
CI6CCD14_EMA14_GP50: inout bit;
CI7CCD15_EMA13_GP51: inout bit;
CLKOUT0_PWM2_GP84: inout bit;
AHCLKR0_CLKR0_GP101: inout bit;
AHCLKX0_GP108 : inout bit;
ACLKR0_CLKX0_GP99: inout bit;
ACLKX0_GP106 : inout bit;
EMD0_GP14 : inout bit;
EMD1_GP15 : inout bit;
EMD2_GP16 : inout bit;
EMD3_GP17 : inout bit;
EMD4_GP18 : inout bit;
EMD5_GP19 : inout bit;
EMD6_GP20 : inout bit;
EMD7_GP21 : inout bit;
DDRA0 : inout bit;
DDRA1 : inout bit;
DDRA2 : inout bit;
DDRA3 : inout bit;
DDRA4 : inout bit;
DDRA5 : inout bit;
DDRA6 : inout bit;
DDRA7 : inout bit;
DDRA8 : inout bit;
DDRA9 : inout bit;
DDRA10 : inout bit;
DDRA11 : inout bit;
DDRA12 : inout bit;
DDR_BA0 : inout bit;
DDR_BA1 : inout bit;
DDR_BA2 : inout bit;
DDRCASn : inout bit;
DDRCKE : inout bit;
DDR_CLK : inout bit;
DDR_CLKn : inout bit;
DDRCSn : inout bit;
DDRD0 : inout bit;
DDRD1 : inout bit;
DDRD2 : inout bit;
DDRD3 : inout bit;
DDRD4 : inout bit;
DDRD5 : inout bit;
DDRD6 : inout bit;
DDRD7 : inout bit;
DDRD8 : inout bit;
DDRD9 : inout bit;
DDRD10 : inout bit;
DDRD11 : inout bit;
DDRD12 : inout bit;
DDRD13 : inout bit;
DDRD14 : inout bit;
DDRD15 : inout bit;
DDRD16 : inout bit;
DDRD17 : inout bit;
DDRD18 : inout bit;
DDRD19 : inout bit;
DDRD20 : inout bit;
DDRD21 : inout bit;
DDRD22 : inout bit;
DDRD23 : inout bit;
DDRD24 : inout bit;
DDRD25 : inout bit;
DDRD26 : inout bit;
DDRD27 : inout bit;
DDRD28 : inout bit;
DDRD29 : inout bit;
DDRD30 : inout bit;
DDRD31 : inout bit;
DDRDQM0 : inout bit;
DDRDQM1 : inout bit;
DDRDQM2 : inout bit;
DDRDQM3 : inout bit;
DDRDQS0 : inout bit;
DDRDQS1 : inout bit;
DDRDQS2 : inout bit;
DDRDQS3 : inout bit;
DDRRASn : inout bit;
DDRWEn : inout bit;
AFSR0_DR0_GP100 : inout bit;
AMUTE0_GP110 : inout bit;
AXR01_DX0_GP104 : inout bit;
AFSX0_GP107 : inout bit;
EMA5_GP96 : inout bit;
EMA6_GP95 : inout bit;
EMA7_GP94 : inout bit;
EMA8_GP93 : inout bit;
EMA9_GP92 : inout bit;
EMA10_GP91 : inout bit;
EMA11_GP90 : inout bit;
EMA12_GP89 : inout bit;
CFIELD_EMA21_GP34: inout bit;
EMWAIT_RDY_BSYn : inout bit;
EMWEn : inout bit;
EMOEn : inout bit;
AXR03_FSR0_GP102 : inout bit;
AXR00_GP105 : inout bit;
AXR02_FSX0_GP103 : inout bit;
AMUTEIN0_GP109 : inout bit;
EMCS2n_GP12 : inout bit;
EMA1_ALE_GP9_AEAW1_PLLMS1: inout bit;
GP0 : inout bit;
GP1 : inout bit;
GP2 : inout bit;
GP3 : inout bit;
GP4_PWM1 : inout bit;
VLYNQCLOCK_GP57 : inout bit;
URXD0_GP85 : inout bit;
UTXD0_GP86 : inout bit;
UCTS0_GP87 : inout bit;
URTS0_PWM0_GP88 : inout bit;
HASn_MDIO_GP83 : inout bit;
HCNTL0_MRXER_GP76: inout bit;
HCNTL1_MTXEN_GP75: inout bit;
HCSn_MDCLK_GP81 : inout bit;
HD0_VLYNQSCRUN_GP58: inout bit;
HD1_VLYNQRXD0_GP59: inout bit;
HD2_VLYNQRXD1_GP60: inout bit;
HD3_VLYNQRXD2_GP61: inout bit;
HD4_VLYNQRXD3_GP62: inout bit;
HD5_VLYNQTXD0_GP63: inout bit;
HD6_VLYNQTXD1_GP64: inout bit;
HD7_VLYNQTXD2_GP65: inout bit;
HD8_VLYNQTXD3_GP66: inout bit;
HD9_MCOL_GP67 : inout bit;
HD10_MCRS_GP68 : inout bit;
HD11_MTXD3_GP69 : inout bit;
HD12_MTXD2_GP70 : inout bit;
HD13_MTXD1_GP71 : inout bit;
HD14_MTXD0_GP72 : inout bit;
HD15_MTXCLK_GP73 : inout bit;
HD_GP52 : inout bit;
HDS1n_MRXD1_GP79 : inout bit;
HDS2n_MRXD0_GP78 : inout bit;
HHWIL_MRXDV_GP74 : inout bit;
HINTn_MRXD3_GP82 : inout bit;
HRDYn_MRXD2_GP80 : inout bit;
HR_Wn_MRXCLK_GP77: inout bit;
EMCS5n_GP33 : inout bit;
SCL : inout bit;
SDA : inout bit;
EMCS3n_GP13 : inout bit;
PCLK_GP54 : inout bit;
EMA4_GP10_AEAW2_PLLMS2: inout bit;
EMA0_GP7_AEM2 : inout bit;
EMBA0_GP6_AEM1 : inout bit;
TINP0L_GP98 : inout bit;
HECCRX_TINP1L_URXD1_GP56: inout bit;
CLKS0_TOUT0L_GP97: inout bit;
HECCTX_TOUT1L_UTXD1_GP55: inout bit;
GP31 : inout bit;
VD_GP53 : inout bit;
GP30 : inout bit;
EMCS4n_GP32 : inout bit;
YI0CCD0_GP36 : inout bit;
YI1CCD1_GP37 : inout bit;
YI2CCD2_GP38 : inout bit;
YI3CCD3_GP39 : inout bit;
YI4CCD4_GP40 : inout bit;
YI5CCD5_GP41 : inout bit;
YI6CCD6_GP42 : inout bit;
YI7CCD7_GP43 : inout bit;
GP22_BOOTMODE0 : inout bit;
GP23_BOOTMODE1 : inout bit;
GP24_BOOTMODE2 : inout bit;
GP25_BOOTMODE3 : inout bit;
GP26_FASTBOOT : inout bit;
GP27 : inout bit;
GP28 : inout bit;
GP29 : inout bit;
RESETn : in bit;
TRSTn : in bit;
TCK : in bit;
TDI : in bit;
TMS : in bit;
TDO : out bit;
EMU0 : in bit; -- B.8.10.3.d compliance pins must be type in
EMU1 : in bit; -- B.8.10.3.d compliance pins must be type in
PORn : in bit;
RSV16 : in bit;
RESETOUTn : out bit;
-- MXI_CLKIN : in bit;
-- MXO : out bit;
-- RSV2 : in bit;
-- RSV3 : out bit;
-- RSV4 : out bit;
-- RSV5 : out bit;
-- RSV7 : out bit;
-- RSV8 : out bit;
-- RSV9 : out bit;
-- RSV10 : out bit;
-- DDRZN : out bit;
-- DDRZP : out bit;
-- RSV15 : inout bit;
-- RSV6 : in bit;
-- DDRVREF : in bit;
VSS : linkage bit_vector(1 to 81);
VDD : linkage bit_vector(1 to 72));
use STD_1149_1_2001.all; -- Get standard attributes and definitions
attribute COMPONENT_CONFORMANCE of TMS320DM6435: entity is
"STD_1149_1_2001";
attribute PIN_MAP of TMS320DM6435: entity is PHYSICAL_PIN_MAP;
constant ZWT : PIN_MAP_STRING :=
"RSV17 :E10," &
"RSV18 :E11," &
"RSV19 :E12," &
"EMA3_GP11 :B18," &
"EMA2_CLE_GP8_AEAW0_PLLMS0 :B16," &
"EMBA1_GP5_AEM0 :C16," &
"CWEn_EMR_Wn_GP35 :D13," &
"CI0CCD8_EMA20_GP44 :C12," &
"CI1CCD9_EMA19_GP45 :B12," &
"CI2CCD10_EMA18_GP46 :D11," &
"CI3CCD11_EMA17_GP47 :A11," &
"CI4CCD12_EMA16_GP48 :C11," &
"CI5CCD13_EMA15_GP49 :B11," &
"CI6CCD14_EMA14_GP50 :A10," &
"CI7CCD15_EMA13_GP51 :B10," &
"CLKOUT0_PWM2_GP84 :M1," &
"AHCLKR0_CLKR0_GP101 :J2," &
"AHCLKX0_GP108 :G1," &
"ACLKR0_CLKX0_GP99 :H1," &
"ACLKX0_GP106 :F1," &
"EMD0_GP14 :D16," &
"EMD1_GP15 :D18," &
"EMD2_GP16 :D17," &
"EMD3_GP17 :E16," &
"EMD4_GP18 :E18," &
"EMD5_GP19 :E17," &
"EMD6_GP20 :F16," &
"EMD7_GP21 :F17," &
"DDRA0 :W13," &
"DDRA1 :U13," &
"DDRA2 :V13," &
"DDRA3 :U12," &
"DDRA4 :V12," &
"DDRA5 :W12," &
"DDRA6 :W11," &
"DDRA7 :V11," &
"DDRA8 :V10," &
"DDRA9 :U11," &
"DDRA10 :U10," &
"DDRA11 :W10," &
"DDRA12 :W9," &
"DDR_BA0 :U8," &
"DDR_BA1 :V9," &
"DDR_BA2 :U9," &
"DDRCASn :T7," &
"DDRCKE :V8," &
"DDR_CLK :W7," &
"DDR_CLKn :W8," &
"DDRCSn :T9," &
"DDRD0 :T1," &
"DDRD1 :T2," &
"DDRD2 :U1," &
"DDRD3 :U2," &
"DDRD4 :V2," &
"DDRD5 :U3," &
"DDRD6 :V3," &
"DDRD7 :W3," &
"DDRD8 :V4," &
"DDRD9 :W4," &
"DDRD10 :U5," &
"DDRD11 :V5," &
"DDRD12 :W5," &
"DDRD13 :V6," &
"DDRD14 :W6," &
"DDRD15 :V7," &
"DDRD16 :W14," &
"DDRD17 :V14," &
"DDRD18 :W15," &
"DDRD19 :V15," &
"DDRD20 :U15," &
"DDRD21 :W16," &
"DDRD22 :V16," &
"DDRD23 :T17," &
"DDRD24 :V17," &
"DDRD25 :U17," &
"DDRD26 :T18," &
"DDRD27 :W17," &
"DDRD28 :U18," &
"DDRD29 :V18," &
"DDRD30 :U19," &
"DDRD31 :T19," &
"DDRDQM0 :T4," &
"DDRDQM1 :T6," &
"DDRDQM2 :T14," &
"DDRDQM3 :T16," &
"DDRDQS0 :U4," &
"DDRDQS1 :U6," &
"DDRDQS2 :U14," &
"DDRDQS3 :U16," &
"DDRRASn :U7," &
"DDRWEn :T8," &
"AFSR0_DR0_GP100 :H4," &
"AMUTE0_GP110 :G3," &
"AXR01_DX0_GP104 :J3," &
"AFSX0_GP107 :G2," &
"EMA5_GP96 :B8," &
"EMA6_GP95 :D8," &
"EMA7_GP94 :C9," &
"EMA8_GP93 :B9," &
"EMA9_GP92 :D9," &
"EMA10_GP91 :A9," &
"EMA11_GP90 :C10," &
"EMA12_GP89 :D10," &
"CFIELD_EMA21_GP34 :D12," &
"EMWAIT_RDY_BSYn :E15," &
"EMWEn :E14," &
"EMOEn :D15," &
"AXR03_FSR0_GP102 :G4," &
"AXR00_GP105 :H2," &
"AXR02_FSX0_GP103 :H3," &
"AMUTEIN0_GP109 :F2," &
"EMCS2n_GP12 :C19," &
"EMA1_ALE_GP9_AEAW1_PLLMS1 :A16," &
"GP0 :E1," &
"GP1 :E2," &
"GP2 :E3," &
"GP3 :E4," &
"GP4_PWM1 :F3," &
"VLYNQCLOCK_GP57 :A7," &
"URXD0_GP85 :L2," &
"UTXD0_GP86 :K3," &
"UCTS0_GP87 :L1," &
"URTS0_PWM0_GP88 :L3," &
"HASn_MDIO_GP83 :D1," &
"HCNTL0_MRXER_GP76 :B3," &
"HCNTL1_MTXEN_GP75 :D3," &
"HCSn_MDCLK_GP81 :C1," &
"HD0_VLYNQSCRUN_GP58 :C8," &
"HD1_VLYNQRXD0_GP59 :D7," &
"HD2_VLYNQRXD1_GP60 :A8," &
"HD3_VLYNQRXD2_GP61 :B7," &
"HD4_VLYNQRXD3_GP62 :C7," &
"HD5_VLYNQTXD0_GP63 :A6," &
"HD6_VLYNQTXD1_GP64 :D6," &
"HD7_VLYNQTXD2_GP65 :B6," &
"HD8_VLYNQTXD3_GP66 :A5," &
"HD9_MCOL_GP67 :C6," &
"HD10_MCRS_GP68 :B5," &
"HD11_MTXD3_GP69 :C5," &
"HD12_MTXD2_GP70 :D5," &
"HD13_MTXD1_GP71 :B4," &
"HD14_MTXD0_GP72 :D4," &
"HD15_MTXCLK_GP73 :A4," &
"HD_GP52 :A15," &
"HDS1n_MRXD1_GP79 :B2," &
"HDS2n_MRXD0_GP78 :C3," &
"HHWIL_MRXDV_GP74 :C4," &
"HINTn_MRXD3_GP82 :C2," &
"HRDYn_MRXD2_GP80 :D2," &
"HR_Wn_MRXCLK_GP77 :A3," &
"EMCS5n_GP33 :F19," &
"SCL :M2," &
"SDA :M3," &
"EMCS3n_GP13 :C18," &
"PCLK_GP54 :A14," &
"EMA4_GP10_AEAW2_PLLMS2 :A17," &
"EMA0_GP7_AEM2 :B17," &
"EMBA0_GP6_AEM1 :C17," &
"TINP0L_GP98 :K2," &
"HECCRX_TINP1L_URXD1_GP56 :L4," &
"CLKS0_TOUT0L_GP97 :J4," &
"HECCTX_TOUT1L_UTXD1_GP55 :K4," &
"GP31 :D19," &
"VD_GP53 :A13," &
"GP30 :G19," &
"EMCS4n_GP32 :E19," &
"YI0CCD0_GP36 :C15," &
"YI1CCD1_GP37 :B15," &
"YI2CCD2_GP38 :C14," &
"YI3CCD3_GP39 :B14," &
"YI4CCD4_GP40 :D14," &
"YI5CCD5_GP41 :C13," &
"YI6CCD6_GP42 :B13," &
"YI7CCD7_GP43 :A12," &
"GP22_BOOTMODE0 :F18," &
"GP23_BOOTMODE1 :F15," &
"GP24_BOOTMODE2 :G15," &
"GP25_BOOTMODE3 :G16," &
"GP26_FASTBOOT :G17," &
"GP27 :H17," &
"GP28 :H16," &
"GP29 :H15," &
"RESETn :M4," &
"TRSTn :R2," &
"TCK :N1," &
"TDI :P4," &
"TMS :R3," &
"TDO :P3," &
"EMU0 :P2," &
"EMU1 :N2," &
"PORn :N4," &
"RSV16 :T3," &
"RESETOUTn :N3," &
-- "MXI_CLKIN :K19," &
-- "MXO :J19," &
-- "RSV2 :K5," &
-- "RSV3 :L5," &
-- "RSV4 :L15," &
-- "RSV5 :R13," &
-- "RSV7 :P19," &
-- "RSV8 :P18," &
-- "RSV9 :N18," &
-- "RSV10 :N17," &
-- "DDRZN :T10," &
-- "DDRZP :T11," &
-- "RSV15 :N16," &
-- "RSV6 :N19," &
-- "DDRVREF :T15," &
"VSS :(W2, W1, V19, R9, R7, R5, R19, R18, R17, R15, R11, R1, P8, P6, P14, P12, P10," &
"N9, N7, N5, N14, N13, N11, M8, M6, M19, M18, M17, M16, M14, M12, M10, L9, L7," &
"L19, L17, L13, L11, K8, K6, K16, K14, K12, K10, K1, J9, J7, J5, J18, J17, J15," &
"J13, J11, H8, H6, H19, H14, H12, H10, G9, G7, G5, G18, G13, G11, F8, F6, F4," &
"F14, F12, F10, E9, E7, E13, B19, B1, A19, P15, P16, T13, K18)," &
"VDD :(G12, G10, G8, P1, N6, M5, M15, L6, K17, K15, J6, J16, J14, J1, H5, H18, G6," &
"G14, F9, F7, F5, F13, F11, E8, E6, A2, A18, A1, W19, W18, V1, T5, R8, R6, R4," &
"R16, R14, R12, R10, P9, P7, P5, P13, P11, L18, L14, M9, M7, L8, L10, K9, K7, J8," &
"J10, H9, H7, N8, N10, M13, M11, L12, K13, K11, J12, H13, H11, N12, E5, N15," &
"P17, T12, L16)";
-- *********************************************************
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_RESET of TRSTn : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (20.00e6, BOTH);
attribute COMPLIANCE_PATTERNS of TMS320DM6435: entity is "(EMU1,EMU0,PORn)(111)";
attribute INSTRUCTION_LENGTH of TMS320DM6435: entity is 6;
attribute INSTRUCTION_OPCODE of TMS320DM6435: entity is
"EXTEST (011000), " &
"BYPASS (111111), " &
"HIGHZ (011110), " &
"PRELOAD (011100), " &
"IDCODE (000100), " &
"SAMPLE (011011), " &
"PRIVATE (000000, " &
" 000001, " &
" 000010, " &
" 000011, " &
" 000101, " &
" 000110, " &
" 000111, " &
" 001000, " &
" 001001, " &
" 001010, " &
" 001011, " &
" 001100, " &
" 001101, " &
" 001110, " &
" 001111, " &
" 010000, " &
" 010001, " &
" 010010, " &
" 010011, " &
" 010100, " &
" 010101, " &
" 010110, " &
" 010111, " &
" 011001, " &
" 011010, " &
" 011101, " &
" 011111, " &
" 100000, " &
" 100001, " &
" 100010, " &
" 100011, " &
" 100100, " &
" 100101, " &
" 100110, " &
" 100111, " &
" 101000, " &
" 101001, " &
" 101010, " &
" 101011, " &
" 101100, " &
" 101101, " &
" 101110, " &
" 101111, " &
" 110000, " &
" 110001, " &
" 110010, " &
" 110011, " &
" 110100, " &
" 110101, " &
" 110110, " &
" 110111, " &
" 111000, " &
" 111001, " &
" 111010, " &
" 111011, " &
" 111100, " &
" 111101, " &
" 111110) " ;
attribute INSTRUCTION_CAPTURE of TMS320DM6435: entity is "XXXX01";
attribute INSTRUCTION_PRIVATE of TMS320DM6435: entity is "PRIVATE";
-- Do not support SAMPLE on DDR outputs
-- Do not support INTEST on DDR inputs
attribute IDCODE_REGISTER of TMS320DM6435: entity is
"0000" & -- Version number
"1011011100100001" & -- Part number -- C64LC pin package ID
"00000010111" & -- Manufacturer ID -- Texas Instruments
"1"; -- Required by IEEE Std.
attribute REGISTER_ACCESS of TMS320DM6435: entity is
"BOUNDARY (EXTEST, PRELOAD, SAMPLE)," &
"BYPASS (BYPASS, HIGHZ) " ;
attribute BOUNDARY_LENGTH of TMS320DM6435: entity is 550;
attribute BOUNDARY_REGISTER of TMS320DM6435: entity is
--- num cell port function safe ccell disval rslt
"0 (bc_1, RSV16, input, X)," &
"1 (bc_1, *, control, 1)," &
"2 (bc_1, RESETOUTn, output3, X, 1, 1, Z)," &
"3 (bc_1, RESETn, input, X)," &
"4 (bc_4, *, internal, 0)," &
"5 (bc_1, SDA, output2, 1, 5, 1, Weak1)," &
"6 (bc_1, SDA, input, X)," &
"7 (bc_1, *, control, 1)," &
"8 (bc_1,HECCRX_TINP1L_URXD1_GP56, output3, X, 7, 1, Z)," &
"9 (bc_1,HECCRX_TINP1L_URXD1_GP56, input, X)," &
"10 (bc_4, *, internal, 0)," &
"11 (bc_1, SCL, output2, 1, 11, 1, Weak1)," &
"12 (bc_1, SCL, input, X)," &
"13 (bc_1, *, control, 1)," &
"14 (bc_1, URTS0_PWM0_GP88, output3, X, 13, 1, Z)," &
"15 (bc_1, URTS0_PWM0_GP88, input, X)," &
"16 (bc_1, *, control, 1)," &
"17 (bc_1,CLKOUT0_PWM2_GP84, output3, X, 16, 1, Z)," &
"18 (bc_1,CLKOUT0_PWM2_GP84, input, X)," &
"19 (bc_1, *, control, 1)," &
"20 (bc_1, URXD0_GP85, output3, X, 19, 1, Z)," &
"21 (bc_1, URXD0_GP85, input, X)," &
"22 (bc_1, *, control, 1)," &
"23 (bc_1,HECCTX_TOUT1L_UTXD1_GP55, output3, X, 22, 1, Z)," &
"24 (bc_1,HECCTX_TOUT1L_UTXD1_GP55, input, X)," &
"25 (bc_1, *, control, 1)," &
"26 (bc_1, UCTS0_GP87, output3, X, 25, 1, Z)," &
"27 (bc_1, UCTS0_GP87, input, X)," &
"28 (bc_1, *, control, 1)," &
"29 (bc_1, UTXD0_GP86, output3, X, 28, 1, Z)," &
"30 (bc_1, UTXD0_GP86, input, X)," &
"31 (bc_1, *, control, 1)," &
"32 (bc_1, TINP0L_GP98, output3, X, 31, 1, Z)," &
"33 (bc_1, TINP0L_GP98, input, X)," &
"34 (bc_1, *, control, 1)," &
"35 (bc_1,CLKS0_TOUT0L_GP97, output3, X, 34, 1, Z)," &
"36 (bc_1,CLKS0_TOUT0L_GP97, input, X)," &
"37 (bc_1, *, control, 1)," &
"38 (bc_1,AHCLKR0_CLKR0_GP101, output3, X, 37, 1, Z)," &
"39 (bc_1,AHCLKR0_CLKR0_GP101, input, X)," &
"40 (bc_1, *, control, 1)," &
"41 (bc_1, AXR01_DX0_GP104, output3, X, 40, 1, Z)," &
"42 (bc_1, AXR01_DX0_GP104, input, X)," &
"43 (bc_1, *, control, 1)," &
"44 (bc_1, AXR02_FSX0_GP103, output3, X, 43, 1, Z)," &
"45 (bc_1, AXR02_FSX0_GP103, input, X)," &
"46 (bc_1, *, control, 1)," &
"47 (bc_1, AXR00_GP105, output3, X, 46, 1, Z)," &
"48 (bc_1, AXR00_GP105, input, X)," &
"49 (bc_1, *, control, 1)," &
"50 (bc_1, AFSR0_DR0_GP100, output3, X, 49, 1, Z)," &
"51 (bc_1, AFSR0_DR0_GP100, input, X)," &
"52 (bc_1, *, control, 1)," &
"53 (bc_1,ACLKR0_CLKX0_GP99, output3, X, 52, 1, Z)," &
"54 (bc_1,ACLKR0_CLKX0_GP99, input, X)," &
"55 (bc_1, *, control, 1)," &
"56 (bc_1, AMUTE0_GP110, output3, X, 55, 1, Z)," &
"57 (bc_1, AMUTE0_GP110, input, X)," &
"58 (bc_1, *, control, 1)," &
"59 (bc_1, AHCLKX0_GP108, output3, X, 58, 1, Z)," &
"60 (bc_1, AHCLKX0_GP108, input, X)," &
"61 (bc_1, *, control, 1)," &
"62 (bc_1, AXR03_FSR0_GP102, output3, X, 61, 1, Z)," &
"63 (bc_1, AXR03_FSR0_GP102, input, X)," &
"64 (bc_1, *, control, 1)," &
"65 (bc_1, AFSX0_GP107, output3, X, 64, 1, Z)," &
"66 (bc_1, AFSX0_GP107, input, X)," &
"67 (bc_1, *, control, 1)," &
"68 (bc_1, ACLKX0_GP106, output3, X, 67, 1, Z)," &
"69 (bc_1, ACLKX0_GP106, input, X)," &
"70 (bc_1, *, control, 1)," &
"71 (bc_1, AMUTEIN0_GP109, output3, X, 70, 1, Z)," &
"72 (bc_1, AMUTEIN0_GP109, input, X)," &
"73 (bc_1, *, control, 1)," &
"74 (bc_1, GP4_PWM1, output3, X, 73, 1, Z)," &
"75 (bc_1, GP4_PWM1, input, X)," &
"76 (bc_1, *, control, 1)," &
"77 (bc_1, GP0, output3, X, 76, 1, Z)," &
"78 (bc_1, GP0, input, X)," &
"79 (bc_1, *, control, 1)," &
"80 (bc_1, HCSn_MDCLK_GP81, output3, X, 79, 1, Z)," &
"81 (bc_1, HCSn_MDCLK_GP81, input, X)," &
"82 (bc_1, *, control, 1)," &
"83 (bc_1, GP1, output3, X, 82, 1, Z)," &
"84 (bc_1, GP1, input, X)," &
"85 (bc_1, *, control, 1)," &
"86 (bc_1, HINTn_MRXD3_GP82, output3, X, 85, 1, Z)," &
"87 (bc_1, HINTn_MRXD3_GP82, input, X)," &
"88 (bc_1, *, control, 1)," &
"89 (bc_1, GP2, output3, X, 88, 1, Z)," &
"90 (bc_1, GP2, input, X)," &
"91 (bc_1, *, control, 1)," &
"92 (bc_1, HDS2n_MRXD0_GP78, output3, X, 91, 1, Z)," &
"93 (bc_1, HDS2n_MRXD0_GP78, input, X)," &
"94 (bc_1, *, control, 1)," &
"95 (bc_1, GP3, output3, X, 94, 1, Z)," &
"96 (bc_1, GP3, input, X)," &
"97 (bc_1, *, control, 1)," &
"98 (bc_1, HHWIL_MRXDV_GP74, output3, X, 97, 1, Z)," &
"99 (bc_1, HHWIL_MRXDV_GP74, input, X)," &
"100 (bc_1, *, control, 1)," &
"101 (bc_1, HASn_MDIO_GP83, output3, X, 100, 1, Z)," &
"102 (bc_1, HASn_MDIO_GP83, input, X)," &
"103 (bc_1, *, control, 1)," &
"104 (bc_1, HD11_MTXD3_GP69, output3, X, 103, 1, Z)," &
"105 (bc_1, HD11_MTXD3_GP69, input, X)," &
"106 (bc_1, *, control, 1)," &
"107 (bc_1, HRDYn_MRXD2_GP80, output3, X, 106, 1, Z)," &
"108 (bc_1, HRDYn_MRXD2_GP80, input, X)," &
"109 (bc_1, *, control, 1)," &
"110 (bc_1,HCNTL0_MRXER_GP76, output3, X, 109, 1, Z)," &
"111 (bc_1,HCNTL0_MRXER_GP76, input, X)," &
"112 (bc_1, *, control, 1)," &
"113 (bc_1,HCNTL1_MTXEN_GP75, output3, X, 112, 1, Z)," &
"114 (bc_1,HCNTL1_MTXEN_GP75, input, X)," &
"115 (bc_1, *, control, 1)," &
"116 (bc_1, HDS1n_MRXD1_GP79, output3, X, 115, 1, Z)," &
"117 (bc_1, HDS1n_MRXD1_GP79, input, X)," &
"118 (bc_1, *, control, 1)," &
"119 (bc_1, HD14_MTXD0_GP72, output3, X, 118, 1, Z)," &
"120 (bc_1, HD14_MTXD0_GP72, input, X)," &
"121 (bc_1, *, control, 1)," &
"122 (bc_1, HD13_MTXD1_GP71, output3, X, 121, 1, Z)," &
"123 (bc_1, HD13_MTXD1_GP71, input, X)," &
"124 (bc_1, *, control, 1)," &
"125 (bc_1, HD12_MTXD2_GP70, output3, X, 124, 1, Z)," &
"126 (bc_1, HD12_MTXD2_GP70, input, X)," &
"127 (bc_1, *, control, 1)," &
"128 (bc_1,HR_Wn_MRXCLK_GP77, output3, X, 127, 1, Z)," &
"129 (bc_1,HR_Wn_MRXCLK_GP77, input, X)," &
"130 (bc_1, *, control, 1)," &
"131 (bc_1,HD6_VLYNQTXD1_GP64, output3, X, 130, 1, Z)," &
"132 (bc_1,HD6_VLYNQTXD1_GP64, input, X)," &
"133 (bc_1, *, control, 1)," &
"134 (bc_1, HD10_MCRS_GP68, output3, X, 133, 1, Z)," &
"135 (bc_1, HD10_MCRS_GP68, input, X)," &
"136 (bc_1, *, control, 1)," &
"137 (bc_1,HD1_VLYNQRXD0_GP59, output3, X, 136, 1, Z)," &
"138 (bc_1,HD1_VLYNQRXD0_GP59, input, X)," &
"139 (bc_1, *, control, 1)," &
"140 (bc_1, HD15_MTXCLK_GP73, output3, X, 139, 1, Z)," &
"141 (bc_1, HD15_MTXCLK_GP73, input, X)," &
"142 (bc_1, *, control, 1)," &
"143 (bc_1, HD9_MCOL_GP67, output3, X, 142, 1, Z)," &
"144 (bc_1, HD9_MCOL_GP67, input, X)," &
"145 (bc_1, *, control, 1)," &
"146 (bc_1,HD7_VLYNQTXD2_GP65, output3, X, 145, 1, Z)," &
"147 (bc_1,HD7_VLYNQTXD2_GP65, input, X)," &
"148 (bc_1, *, control, 1)," &
"149 (bc_1,HD4_VLYNQRXD3_GP62, output3, X, 148, 1, Z)," &
"150 (bc_1,HD4_VLYNQRXD3_GP62, input, X)," &
"151 (bc_1, *, control, 1)," &
"152 (bc_1,HD8_VLYNQTXD3_GP66, output3, X, 151, 1, Z)," &
"153 (bc_1,HD8_VLYNQTXD3_GP66, input, X)," &
"154 (bc_1, *, control, 1)," &
"155 (bc_1, EMA6_GP95, output3, X, 154, 1, Z)," &
"156 (bc_1, EMA6_GP95, input, X)," &
"157 (bc_1, *, control, 1)," &
"158 (bc_1,HD5_VLYNQTXD0_GP63, output3, X, 157, 1, Z)," &
"159 (bc_1,HD5_VLYNQTXD0_GP63, input, X)," &
"160 (bc_1, *, control, 1)," &
"161 (bc_1,HD3_VLYNQRXD2_GP61, output3, X, 160, 1, Z)," &
"162 (bc_1,HD3_VLYNQRXD2_GP61, input, X)," &
"163 (bc_1, *, control, 1)," &
"164 (bc_1, VLYNQCLOCK_GP57, output3, X, 163, 1, Z)," &
"165 (bc_1, VLYNQCLOCK_GP57, input, X)," &
"166 (bc_1, *, control, 1)," &
"167 (bc_1,HD0_VLYNQSCRUN_GP58, output3, X, 166, 1, Z)," &
"168 (bc_1,HD0_VLYNQSCRUN_GP58, input, X)," &
"169 (bc_1, *, control, 1)," &
"170 (bc_1, EMA5_GP96, output3, X, 169, 1, Z)," &
"171 (bc_1, EMA5_GP96, input, X)," &
"172 (bc_1, *, control, 1)," &
"173 (bc_1,HD2_VLYNQRXD1_GP60, output3, X, 172, 1, Z)," &
"174 (bc_1,HD2_VLYNQRXD1_GP60, input, X)," &
"175 (bc_1, *, control, 1)," &
"176 (bc_1, EMA9_GP92, output3, X, 175, 1, Z)," &
"177 (bc_1, EMA9_GP92, input, X)," &
"178 (bc_1, *, control, 1)," &
"179 (bc_1, EMA8_GP93, output3, X, 178, 1, Z)," &
"180 (bc_1, EMA8_GP93, input, X)," &
"181 (bc_1, *, control, 1)," &
"182 (bc_1, EMA7_GP94, output3, X, 181, 1, Z)," &
"183 (bc_1, EMA7_GP94, input, X)," &
"184 (bc_1, *, control, 1)," &
"185 (bc_1, EMA10_GP91, output3, X, 184, 1, Z)," &
"186 (bc_1, EMA10_GP91, input, X)," &
"187 (bc_1, *, control, 1)," &
"188 (bc_1, EMA11_GP90, output3, X, 187, 1, Z)," &
"189 (bc_1, EMA11_GP90, input, X)," &
"190 (bc_1, *, control, 1)," &
"191 (bc_1, RSV17, output3, X, 190, 1, Z)," &
"192 (bc_1, RSV17, input, X)," &
"193 (bc_1, *, control, 1)," &
"194 (bc_1,CI7CCD15_EMA13_GP51, output3, X, 193, 1, Z)," &
"195 (bc_1,CI7CCD15_EMA13_GP51, input, X)," &
"196 (bc_1, *, control, 1)," &
"197 (bc_1, EMA12_GP89, output3, X, 196, 1, Z)," &
"198 (bc_1, EMA12_GP89, input, X)," &
"199 (bc_1, *, control, 1)," &
"200 (bc_1,CI6CCD14_EMA14_GP50, output3, X, 199, 1, Z)," &
"201 (bc_1,CI6CCD14_EMA14_GP50, input, X)," &
"202 (bc_1, *, control, 1)," &
"203 (bc_1,CI4CCD12_EMA16_GP48, output3, X, 202, 1, Z)," &
"204 (bc_1,CI4CCD12_EMA16_GP48, input, X)," &
"205 (bc_1, *, control, 1)," &
"206 (bc_1,CI5CCD13_EMA15_GP49, output3, X, 205, 1, Z)," &
"207 (bc_1,CI5CCD13_EMA15_GP49, input, X)," &
"208 (bc_1, *, control, 1)," &
"209 (bc_1,CI2CCD10_EMA18_GP46, output3, X, 208, 1, Z)," &
"210 (bc_1,CI2CCD10_EMA18_GP46, input, X)," &
"211 (bc_1, *, control, 1)," &
"212 (bc_1,CI3CCD11_EMA17_GP47, output3, X, 211, 1, Z)," &
"213 (bc_1,CI3CCD11_EMA17_GP47, input, X)," &
"214 (bc_1, *, control, 1)," &
"215 (bc_1, RSV18, output3, X, 214, 1, Z)," &
"216 (bc_1, RSV18, input, X)," &
"217 (bc_1, *, control, 1)," &
"218 (bc_1,CI1CCD9_EMA19_GP45, output3, X, 217, 1, Z)," &
"219 (bc_1,CI1CCD9_EMA19_GP45, input, X)," &
"220 (bc_1, *, control, 1)," &
"221 (bc_1, RSV19, output3, X, 220, 1, Z)," &
"222 (bc_1, RSV19, input, X)," &
"223 (bc_1, *, control, 1)," &
"224 (bc_1,CI0CCD8_EMA20_GP44, output3, X, 223, 1, Z)," &
"225 (bc_1,CI0CCD8_EMA20_GP44, input, X)," &
"226 (bc_1, *, control, 1)," &
"227 (bc_1,CFIELD_EMA21_GP34, output3, X, 226, 1, Z)," &
"228 (bc_1,CFIELD_EMA21_GP34, input, X)," &
"229 (bc_1, *, control, 1)," &
"230 (bc_1, YI7CCD7_GP43, output3, X, 229, 1, Z)," &
"231 (bc_1, YI7CCD7_GP43, input, X)," &
"232 (bc_1, *, control, 1)," &
"233 (bc_1, VD_GP53, output3, X, 232, 1, Z)," &
"234 (bc_1, VD_GP53, input, X)," &
"235 (bc_1, *, control, 1)," &
"236 (bc_1, YI6CCD6_GP42, output3, X, 235, 1, Z)," &
"237 (bc_1, YI6CCD6_GP42, input, X)," &
"238 (bc_1, *, control, 1)," &
"239 (bc_1, YI5CCD5_GP41, output3, X, 238, 1, Z)," &
"240 (bc_1, YI5CCD5_GP41, input, X)," &
"241 (bc_1, *, control, 1)," &
"242 (bc_1, YI3CCD3_GP39, output3, X, 241, 1, Z)," &
"243 (bc_1, YI3CCD3_GP39, input, X)," &
"244 (bc_1, *, control, 1)," &
"245 (bc_1, PCLK_GP54, output3, X, 244, 1, Z)," &
"246 (bc_1, PCLK_GP54, input, X)," &
"247 (bc_1, *, control, 1)," &
"248 (bc_1, CWEn_EMR_Wn_GP35, output3, X, 247, 1, Z)," &
"249 (bc_1, CWEn_EMR_Wn_GP35, input, X)," &
"250 (bc_1, *, control, 1)," &
"251 (bc_1, HD_GP52, output3, X, 250, 1, Z)," &
"252 (bc_1, HD_GP52, input, X)," &
"253 (bc_1, *, control, 1)," &
"254 (bc_1, YI2CCD2_GP38, output3, X, 253, 1, Z)," &
"255 (bc_1, YI2CCD2_GP38, input, X)," &
"256 (bc_1, *, control, 1)," &
"257 (bc_1, YI1CCD1_GP37, output3, X, 256, 1, Z)," &
"258 (bc_1, YI1CCD1_GP37, input, X)," &
"259 (bc_1, *, control, 1)," &
"260 (bc_1, YI4CCD4_GP40, output3, X, 259, 1, Z)," &
"261 (bc_1, YI4CCD4_GP40, input, X)," &
"262 (bc_1, *, control, 1)," &
"263 (bc_1, EMWEn, output3, X, 262, 1, Z)," &
"264 (bc_1, EMWEn, input, X)," &
"265 (bc_1, *, control, 1)," &
"266 (bc_1, YI0CCD0_GP36, output3, X, 265, 1, Z)," &
"267 (bc_1, YI0CCD0_GP36, input, X)," &
"268 (bc_1, *, control, 1)," &
"269 (bc_1,EMA2_CLE_GP8_AEAW0_PLLMS0, output3, X, 268, 1, Z)," &
"270 (bc_1,EMA2_CLE_GP8_AEAW0_PLLMS0, input, X)," &
"271 (bc_1, *, control, 1)," &
"272 (bc_1,EMA1_ALE_GP9_AEAW1_PLLMS1, output3, X, 271, 1, Z)," &
"273 (bc_1,EMA1_ALE_GP9_AEAW1_PLLMS1, input, X)," &
"274 (bc_1, *, control, 1)," &
"275 (bc_1,EMA4_GP10_AEAW2_PLLMS2, output3, X, 274, 1, Z)," &
"276 (bc_1,EMA4_GP10_AEAW2_PLLMS2, input, X)," &
"277 (bc_1, *, control, 1)," &
"278 (bc_1, EMOEn, output3, X, 277, 1, Z)," &
"279 (bc_1, EMOEn, input, X)," &
"280 (bc_1, *, control, 1)," &
"281 (bc_1, EMA0_GP7_AEM2, output3, X, 280, 1, Z)," &
"282 (bc_1, EMA0_GP7_AEM2, input, X)," &
"283 (bc_1, *, control, 1)," &
"284 (bc_1, EMBA1_GP5_AEM0, output3, X, 283, 1, Z)," &
"285 (bc_1, EMBA1_GP5_AEM0, input, X)," &
"286 (bc_1, *, control, 1)," &
"287 (bc_1, EMD0_GP14, output3, X, 286, 1, Z)," &
"288 (bc_1, EMD0_GP14, input, X)," &
"289 (bc_1, *, control, 1)," &
"290 (bc_1, EMD2_GP16, output3, X, 289, 1, Z)," &
"291 (bc_1, EMD2_GP16, input, X)," &
"292 (bc_1, *, control, 1)," &
"293 (bc_1, EMD3_GP17, output3, X, 292, 1, Z)," &
"294 (bc_1, EMD3_GP17, input, X)," &
"295 (bc_1, *, control, 1)," &
"296 (bc_1, EMA3_GP11, output3, X, 295, 1, Z)," &
"297 (bc_1, EMA3_GP11, input, X)," &
"298 (bc_1, *, control, 1)," &
"299 (bc_1, EMD6_GP20, output3, X, 298, 1, Z)," &
"300 (bc_1, EMD6_GP20, input, X)," &
"301 (bc_1, *, control, 1)," &
"302 (bc_1, EMCS3n_GP13, output3, X, 301, 1, Z)," &
"303 (bc_1, EMCS3n_GP13, input, X)," &
"304 (bc_1, *, control, 1)," &
"305 (bc_1, EMWAIT_RDY_BSYn, output3, X, 304, 1, Z)," &
"306 (bc_1, EMWAIT_RDY_BSYn, input, X)," &
"307 (bc_1, *, control, 1)," &
"308 (bc_1, EMD1_GP15, output3, X, 307, 1, Z)," &
"309 (bc_1, EMD1_GP15, input, X)," &
"310 (bc_1, *, control, 1)," &
"311 (bc_1, EMBA0_GP6_AEM1, output3, X, 310, 1, Z)," &
"312 (bc_1, EMBA0_GP6_AEM1, input, X)," &
"313 (bc_1, *, control, 1)," &
"314 (bc_1, EMD4_GP18, output3, X, 313, 1, Z)," &
"315 (bc_1, EMD4_GP18, input, X)," &
"316 (bc_1, *, control, 1)," &
"317 (bc_1, GP22_BOOTMODE0, output3, X, 316, 1, Z)," &
"318 (bc_1, GP22_BOOTMODE0, input, X)," &
"319 (bc_1, *, control, 1)," &
"320 (bc_1, GP25_BOOTMODE3, output3, X, 319, 1, Z)," &
"321 (bc_1, GP25_BOOTMODE3, input, X)," &
"322 (bc_1, *, control, 1)," &
"323 (bc_1, EMCS2n_GP12, output3, X, 322, 1, Z)," &
"324 (bc_1, EMCS2n_GP12, input, X)," &
"325 (bc_1, *, control, 1)," &
"326 (bc_1, EMD5_GP19, output3, X, 325, 1, Z)," &
"327 (bc_1, EMD5_GP19, input, X)," &
"328 (bc_1, *, control, 1)," &
"329 (bc_1, GP31, output3, X, 328, 1, Z)," &
"330 (bc_1, GP31, input, X)," &
"331 (bc_1, *, control, 1)," &
"332 (bc_1, EMD7_GP21, output3, X, 331, 1, Z)," &
"333 (bc_1, EMD7_GP21, input, X)," &
"334 (bc_1, *, control, 1)," &
"335 (bc_1, GP23_BOOTMODE1, output3, X, 334, 1, Z)," &
"336 (bc_1, GP23_BOOTMODE1, input, X)," &
"337 (bc_1, *, control, 1)," &
"338 (bc_1, EMCS4n_GP32, output3, X, 337, 1, Z)," &
"339 (bc_1, EMCS4n_GP32, input, X)," &
"340 (bc_1, *, control, 1)," &
"341 (bc_1, GP26_FASTBOOT, output3, X, 340, 1, Z)," &
"342 (bc_1, GP26_FASTBOOT, input, X)," &
"343 (bc_1, *, control, 1)," &
"344 (bc_1, GP28, output3, X, 343, 1, Z)," &
"345 (bc_1, GP28, input, X)," &
"346 (bc_1, *, control, 1)," &
"347 (bc_1, EMCS5n_GP33, output3, X, 346, 1, Z)," &
"348 (bc_1, EMCS5n_GP33, input, X)," &
"349 (bc_1, *, control, 1)," &
"350 (bc_1, GP24_BOOTMODE2, output3, X, 349, 1, Z)," &
"351 (bc_1, GP24_BOOTMODE2, input, X)," &
"352 (bc_1, *, control, 1)," &
"353 (bc_1, GP29, output3, X, 352, 1, Z)," &
"354 (bc_1, GP29, input, X)," &
"355 (bc_1, *, control, 1)," &
"356 (bc_1, GP30, output3, X, 355, 1, Z)," &
"357 (bc_1, GP30, input, X)," &
"358 (bc_1, *, control, 1)," &
"359 (bc_1, GP27, output3, X, 358, 1, Z)," &
"360 (bc_1, GP27, input, X)," &
"361 (bc_1, *, control, 1)," &
"362 (bc_1, DDRD31, output3, X, 361, 1, Z)," &
"363 (bc_1, DDRD31, input, X)," &
"364 (bc_1, *, control, 1)," &
"365 (bc_1, DDRD30, output3, X, 364, 1, Z)," &
"366 (bc_1, DDRD30, input, X)," &
"367 (bc_1, *, control, 1)," &
"368 (bc_1, DDRD29, output3, X, 367, 1, Z)," &
"369 (bc_1, DDRD29, input, X)," &
"370 (bc_1, *, control, 1)," &
"371 (bc_1, DDRD28, output3, X, 370, 1, Z)," &
"372 (bc_1, DDRD28, input, X)," &
"373 (bc_1, *, control, 1)," &
"374 (bc_1, DDRDQM3, output3, X, 373, 1, Z)," &
"375 (bc_1, DDRDQM3, input, X)," &
"376 (bc_1, *, control, 1)," &
"377 (bc_1, DDRDQS3, output3, X, 376, 1, Z)," &
"378 (bc_1, DDRDQS3, input, X)," &
"379 (bc_1, *, control, 1)," &
"380 (bc_1, DDRD27, output3, X, 379, 1, Z)," &
"381 (bc_1, DDRD27, input, X)," &
"382 (bc_1, *, control, 1)," &
"383 (bc_1, DDRD26, output3, X, 382, 1, Z)," &
"384 (bc_1, DDRD26, input, X)," &
"385 (bc_1, *, control, 1)," &
"386 (bc_1, DDRD25, output3, X, 385, 1, Z)," &
"387 (bc_1, DDRD25, input, X)," &
"388 (bc_1, *, control, 1)," &
"389 (bc_1, DDRD24, output3, X, 388, 1, Z)," &
"390 (bc_1, DDRD24, input, X)," &
"391 (bc_1, *, control, 1)," &
"392 (bc_1, DDRD23, output3, X, 391, 1, Z)," &
"393 (bc_1, DDRD23, input, X)," &
"394 (bc_1, *, control, 1)," &
"395 (bc_1, DDRD22, output3, X, 394, 1, Z)," &
"396 (bc_1, DDRD22, input, X)," &
"397 (bc_1, *, control, 1)," &
"398 (bc_1, DDRD21, output3, X, 397, 1, Z)," &
"399 (bc_1, DDRD21, input, X)," &
"400 (bc_1, *, control, 1)," &
"401 (bc_1, DDRD20, output3, X, 400, 1, Z)," &
"402 (bc_1, DDRD20, input, X)," &
"403 (bc_1, *, control, 1)," &
"404 (bc_1, DDRDQS2, output3, X, 403, 1, Z)," &
"405 (bc_1, DDRDQS2, input, X)," &
"406 (bc_1, *, control, 1)," &
"407 (bc_1, DDRDQM2, output3, X, 406, 1, Z)," &
"408 (bc_1, DDRDQM2, input, X)," &
"409 (bc_1, *, control, 1)," &
"410 (bc_1, DDRD19, output3, X, 409, 1, Z)," &
"411 (bc_1, DDRD19, input, X)," &
"412 (bc_1, *, control, 1)," &
"413 (bc_1, DDRD18, output3, X, 412, 1, Z)," &
"414 (bc_1, DDRD18, input, X)," &
"415 (bc_1, *, control, 1)," &
"416 (bc_1, DDRD17, output3, X, 415, 1, Z)," &
"417 (bc_1, DDRD17, input, X)," &
"418 (bc_1, *, control, 1)," &
"419 (bc_1, DDRD16, output3, X, 418, 1, Z)," &
"420 (bc_1, DDRD16, input, X)," &
"421 (bc_1, *, control, 1)," &
"422 (bc_1, DDRA0, output3, X, 421, 1, Z)," &
"423 (bc_1, DDRA0, input, X)," &
"424 (bc_1, *, control, 1)," &
"425 (bc_1, DDRA1, output3, X, 424, 1, Z)," &
"426 (bc_1, DDRA1, input, X)," &
"427 (bc_1, *, control, 1)," &
"428 (bc_1, DDRA2, output3, X, 427, 1, Z)," &
"429 (bc_1, DDRA2, input, X)," &
"430 (bc_1, *, control, 1)," &
"431 (bc_1, DDRA3, output3, X, 430, 1, Z)," &
"432 (bc_1, DDRA3, input, X)," &
"433 (bc_1, *, control, 1)," &
"434 (bc_1, DDRA4, output3, X, 433, 1, Z)," &
"435 (bc_1, DDRA4, input, X)," &
"436 (bc_1, *, control, 1)," &
"437 (bc_1, DDRA5, output3, X, 436, 1, Z)," &
"438 (bc_1, DDRA5, input, X)," &
"439 (bc_1, *, control, 1)," &
"440 (bc_1, DDRA6, output3, X, 439, 1, Z)," &
"441 (bc_1, DDRA6, input, X)," &
"442 (bc_1, *, control, 1)," &
"443 (bc_1, DDRA7, output3, X, 442, 1, Z)," &
"444 (bc_1, DDRA7, input, X)," &
"445 (bc_1, *, control, 1)," &
"446 (bc_1, DDRA8, output3, X, 445, 1, Z)," &
"447 (bc_1, DDRA8, input, X)," &
"448 (bc_1, *, control, 1)," &
"449 (bc_1, DDRA9, output3, X, 448, 1, Z)," &
"450 (bc_1, DDRA9, input, X)," &
"451 (bc_1, *, control, 1)," &
"452 (bc_1, DDRA10, output3, X, 451, 1, Z)," &
"453 (bc_1, DDRA10, input, X)," &
"454 (bc_1, *, control, 1)," &
"455 (bc_1, DDRA11, output3, X, 454, 1, Z)," &
"456 (bc_1, DDRA11, input, X)," &
"457 (bc_1, *, control, 1)," &
"458 (bc_1, DDRA12, output3, X, 457, 1, Z)," &
"459 (bc_1, DDRA12, input, X)," &
"460 (bc_1, *, control, 1)," &
"461 (bc_1, DDR_BA0, output3, X, 460, 1, Z)," &
"462 (bc_1, DDR_BA0, input, X)," &
"463 (bc_1, *, control, 1)," &
"464 (bc_1, DDR_BA1, output3, X, 463, 1, Z)," &
"465 (bc_1, DDR_BA1, input, X)," &
"466 (bc_1, *, control, 1)," &
"467 (bc_1, DDR_BA2, output3, X, 466, 1, Z)," &
"468 (bc_1, DDR_BA2, input, X)," &
"469 (bc_1, *, control, 1)," &
"470 (bc_1, DDR_CLKn, output3, X, 469, 1, Z)," &
"471 (bc_1, DDR_CLKn, input, X)," &
"472 (bc_1, *, control, 1)," &
"473 (bc_1, DDR_CLK, output3, X, 472, 1, Z)," &
"474 (bc_1, DDR_CLK, input, X)," &
"475 (bc_1, *, control, 1)," &
"476 (bc_1, DDRCKE, output3, X, 475, 1, Z)," &
"477 (bc_1, DDRCKE, input, X)," &
"478 (bc_1, *, control, 1)," &
"479 (bc_1, DDRCSn, output3, X, 478, 1, Z)," &
"480 (bc_1, DDRCSn, input, X)," &
"481 (bc_1, *, control, 1)," &
"482 (bc_1, DDRWEn, output3, X, 481, 1, Z)," &
"483 (bc_1, DDRWEn, input, X)," &
"484 (bc_1, *, control, 1)," &
"485 (bc_1, DDRRASn, output3, X, 484, 1, Z)," &
"486 (bc_1, DDRRASn, input, X)," &
"487 (bc_1, *, control, 1)," &
"488 (bc_1, DDRCASn, output3, X, 487, 1, Z)," &
"489 (bc_1, DDRCASn, input, X)," &
"490 (bc_1, *, control, 1)," &
"491 (bc_1, DDRD15, output3, X, 490, 1, Z)," &
"492 (bc_1, DDRD15, input, X)," &
"493 (bc_1, *, control, 1)," &
"494 (bc_1, DDRD14, output3, X, 493, 1, Z)," &
"495 (bc_1, DDRD14, input, X)," &
"496 (bc_1, *, control, 1)," &
"497 (bc_1, DDRD13, output3, X, 496, 1, Z)," &
"498 (bc_1, DDRD13, input, X)," &
"499 (bc_1, *, control, 1)," &
"500 (bc_1, DDRD12, output3, X, 499, 1, Z)," &
"501 (bc_1, DDRD12, input, X)," &
"502 (bc_1, *, control, 1)," &
"503 (bc_1, DDRDQM1, output3, X, 502, 1, Z)," &
"504 (bc_1, DDRDQM1, input, X)," &
"505 (bc_1, *, control, 1)," &
"506 (bc_1, DDRDQS1, output3, X, 505, 1, Z)," &
"507 (bc_1, DDRDQS1, input, X)," &
"508 (bc_1, *, control, 1)," &
"509 (bc_1, DDRD11, output3, X, 508, 1, Z)," &
"510 (bc_1, DDRD11, input, X)," &
"511 (bc_1, *, control, 1)," &
"512 (bc_1, DDRD10, output3, X, 511, 1, Z)," &
"513 (bc_1, DDRD10, input, X)," &
"514 (bc_1, *, control, 1)," &
"515 (bc_1, DDRD9, output3, X, 514, 1, Z)," &
"516 (bc_1, DDRD9, input, X)," &
"517 (bc_1, *, control, 1)," &
"518 (bc_1, DDRD8, output3, X, 517, 1, Z)," &
"519 (bc_1, DDRD8, input, X)," &
"520 (bc_1, *, control, 1)," &
"521 (bc_1, DDRD7, output3, X, 520, 1, Z)," &
"522 (bc_1, DDRD7, input, X)," &
"523 (bc_1, *, control, 1)," &
"524 (bc_1, DDRD6, output3, X, 523, 1, Z)," &
"525 (bc_1, DDRD6, input, X)," &
"526 (bc_1, *, control, 1)," &
"527 (bc_1, DDRD5, output3, X, 526, 1, Z)," &
"528 (bc_1, DDRD5, input, X)," &
"529 (bc_1, *, control, 1)," &
"530 (bc_1, DDRD4, output3, X, 529, 1, Z)," &
"531 (bc_1, DDRD4, input, X)," &
"532 (bc_1, *, control, 1)," &
"533 (bc_1, DDRDQS0, output3, X, 532, 1, Z)," &
"534 (bc_1, DDRDQS0, input, X)," &
"535 (bc_1, *, control, 1)," &
"536 (bc_1, DDRDQM0, output3, X, 535, 1, Z)," &
"537 (bc_1, DDRDQM0, input, X)," &
"538 (bc_1, *, control, 1)," &
"539 (bc_1, DDRD3, output3, X, 538, 1, Z)," &
"540 (bc_1, DDRD3, input, X)," &
"541 (bc_1, *, control, 1)," &
"542 (bc_1, DDRD2, output3, X, 541, 1, Z)," &
"543 (bc_1, DDRD2, input, X)," &
"544 (bc_1, *, control, 1)," &
"545 (bc_1, DDRD1, output3, X, 544, 1, Z)," &
"546 (bc_1, DDRD1, input, X)," &
"547 (bc_1, *, control, 1)," &
"548 (bc_1, DDRD0, output3, X, 547, 1, Z)," &
"549 (bc_1, DDRD0, input, X)" ;
attribute DESIGN_WARNING of TMS320DM6435: entity is
"According to simulation, BSD JTAG TAP may not work correctly unless " &
"device has completed Power on Reset sequence first. If the BSDL tool " &
"does not use TRSTn pin, please put a 10K Ohm pull up resistor on this pin. " ;
end TMS320DM6435;
