BSDL Files Library for JTAG

The only free public library that contains thousands of BSDL (Boundary Scan Description Language) models to use with BScan/JTAG tools

BSDL model: MT9300

-- Boundary Scan Description Language (BSDL) for MITEL MT9300 IC
-- File name : MT9300.bsd
-- DEVICE : MITEL MT9300 Multi-Channel Voice Echo Canceller
-- BSDL revision : STD_1149_1_1994
-- Date created: Dec 22, 1998
-- Last Updated: June 07, 1999
-- Documentation: MT9300 Advance Information Data Sheet
-- Packages: 160-pin PQFP
--
--                     IMPORTANT NOTICE
--
-- MITEL and MT9300 are trademarks of MITEL Corporation. MITEL
-- products, marketed under trademarks, are protected under
-- numerous US and foreign patents and pending applications,
-- maskwork rights, and copyrights. MITEL warrants performance
-- of its semiconductor products to current specifications in
-- accordance with MITEL's standard warranty, but reserves the
-- right to make changes to any products and services at any
-- time without notice. MITEL assumes no responsibility or
-- liability arising out of the application or use of any
-- information, product, or service described herein except as
-- expressly agreed to in writing by MITEL Corporation. MITEL
-- customers are advised to obtain the latest version of the
-- device specifications before relying on any published
-- information.
-- ............................................................65
-- 1.9.2000 VSN Systems / JTAG Technologies BV (JD)
-- Changed disable value from 0 to 1 for the following nets:
-- D[0..7], Rout, Sout, Dtab and IRQb
--
--


entity MT9300 is
       generic (PHYSICAL_PIN_MAP:string:="PQFP_160");


port (
	RESETb    : in           bit;
	MCLK      : in           bit;
	Fsel      : in           bit;
	-- st-bus port
	C4ib      : in           bit;
	F0ib      : in           bit;
	Rin       : in           bit;
	Sin       : in           bit;
	Rout      : out          bit;
	Sout      : out          bit;
	ODE       : in           bit;
	-- internal connections
	IC0       : in           bit_vector(0 to 13);
	IC0_14    : linkage      bit; -- This is the MSBit of
-- the IC0 vector, and has been renamed IC0_14 because this is
-- a linkage bit, rather than an in bit. Not in BS chain.
	-- microport
	DSb       : in           bit;
	CSb       : in           bit;
	R_Wb      : in           bit;
	A         : in           bit_vector(0 to 10);
	D         : inout        bit_vector(0 to 7);
	DTAb      : out          bit;
	IRQb      : out          bit;
	-- TAP Controller
	TCK       : in           bit;
	TMS       : in           bit;
	TDI       : in           bit;
	TRSTb     : in           bit;
	TDO       : out          bit;
	-- Supplies and NC
	VDD       : linkage      bit_vector(1 to 14);
					       -- not in BS chain
	GND       : linkage      bit_vector(1 to 20);
					       -- not in BS chain
	NC        : linkage      bit_vector(1 to 70);
					       -- not in BS chain
	PLLVDD    : linkage      bit;	       -- not in BS chain
	PLLGND    : linkage      bit	       -- not in BS chain
  );
  --end of ports

-- BSDL description conforms to 1994 standard
use STD_1149_1_1994.all;

attribute COMPONENT_CONFORMANCE of MT9300: entity is
      "STD_1149_1_1993";

attribute PIN_MAP of MT9300: entity is
	PHYSICAL_PIN_MAP;

constant PQFP_160: PIN_MAP_STRING:=
  "IRQb:9,"&
  "DSb:10,"&
  "CSb:11,"&
  "R_Wb:12,"&
  "DTAb:13,"&
  "ODE:105,"&
  "Sout:106,"&
  "Rout:107,"&
  "Sin:109,"&
  "Rin:110,"&
  "F0ib:111,"&
  "C4ib:112,"&
  "MCLK:140,"&
  "Fsel:143,"&
  "RESETb:158,"&
  "D:( 18, 19, 20, 21, 23, 24, 25, 26),"&
  "A:( 44, 45, 46, 47, 49, 50, 51, 52, 54, 55, 56),"&
  "IC0:( 57, 59, 114, 115, 116, 117, 120, 121, 122,"&
	 "133, 134, 135, 144, 145),"&
  "IC0_14:157,"&
-- TAP controller pins
  "TMS:152,"&
  "TDI:153,"&
  "TDO:154,"&
  "TCK:155,"&
  "TRSTb:156,"&
-- Pins not scanned by boundary-scan
  "GND:( 1, 2, 17, 27, 37, 38, 48, 58, 76, 77, 81, 87, 98, 108,"&
        "118, 119, 138, 139, 148, 149),"&
  "VDD:( 8, 22, 32, 43, 53, 63, 79, 93, 103, 113, 124, 141,"&
        "142, 159),"&
  "PLLGND:146,"&
  "PLLVDD:147,"&
  "NC:( 3, 4, 5, 6, 7, 14, 15, 16, 28, 29, 30, 31, 33, 34, 35,"&
       "36, 39, 40, 41, 42, 60, 61, 62, 64, 65, 66, 67,"&
       "68, 69, 70, 71, 72, 73, 74, 75, 78, 80,"&
       "82, 83, 84, 85, 86, 88, 89, 90, 91, 92, 94, 95, 96, 97,"&
       "99, 100, 101, 102, 104, 123, 125, 126, 127, 128,"&
       "129, 130, 131, 132, 136, 137, 150, 151, 160)";

-- Scan port identification
  attribute TAP_SCAN_IN of TDI:     signal is true;
  attribute TAP_SCAN_MODE of TMS:   signal is true;
  attribute TAP_SCAN_OUT of TDO:    signal is true;
  attribute TAP_SCAN_RESET of TRSTb:signal is true;
  attribute TAP_SCAN_CLOCK of TCK:  signal is (10.00e6, BOTH);

-- TAP Description
   attribute INSTRUCTION_LENGTH of MT9300: entity is 3;
   attribute INSTRUCTION_OPCODE of MT9300: entity is
   "BYPASS (111),"&
   "IDCODE (001),"&
   "EXTEST (000),"&
   "SAMPLE (010, 011, 100, 101, 110)";
   attribute INSTRUCTION_CAPTURE of MT9300: entity is "001";

-- ID code
  attribute IDCODE_REGISTER of MT9300: entity is
        "0000" &                  -- 4-bit version (0)
        "1001001100000000" &      -- 16-bit part number 9300
        "00010100101" &           -- 11-bit manufacturer (Mitel)
        "1";                      -- mandatory LSB

   attribute BOUNDARY_LENGTH of MT9300: entity is 60;

-- THE BOUNDARY SCAN CHAIN
-- The first cell (i.e., numbered 0) is closest to TDO

   attribute BOUNDARY_REGISTER of MT9300: entity is

-- num   cell    port     function  safe  [ccell   disval   rslt]
-----------------------------------------------------------------
   "59   (BC_4,  RESETb,  input,    0), "&
   "58   (BC_4,  MCLK,	  clock,    X), "&
   "57   (BC_4,  Fsel,    input,    X), "&
   "56   (BC_4,  IC0(9),  input,    0), "&
   "55   (BC_4,  IC0(10), input,    0), "&
   "54   (BC_4,  IC0(11), input,    0), "&
   "53   (BC_4,  C4ib,    clock,    X), "&
   "52   (BC_4,  F0ib,    input,    X), "&
   "51   (BC_4,  Rin,	  input,    X), "&
   "50   (BC_4,  Sin,     input,    X), "&
   "49   (BC_1,  Rout,	  output3,  X,     47,     1,       Z), "&
   "48   (BC_1,  Sout,    output3,  X,     47,     1,       Z), "&
   "47   (BC_1,  *,       control,  X), "&
   "46   (BC_4,  ODE,     input,    X), "&
   "45   (BC_4,  IC0(3),  input,    X), "&
   "44   (BC_4,  IC0(4),  input,    X), "&
   "43   (BC_4,  IC0(5),  input,    X), "&
   "42   (BC_4,  IC0(6),  input,    X), "&
   "41   (BC_4,  IC0(7),  input,    X), "&
   "40   (BC_4,  IC0(8),  input,    X), "&
   "39   (BC_4,  IC0(2),  input,    X), "&
   "38   (BC_4,  IC0(12), input,    X), "&
   "37   (BC_4,  IC0(13), input,    X), "&
   "36   (BC_4,  DSb,     input,    X), "&
   "35   (BC_4,  CSb,     input,    X), "&
   "34   (BC_4,  R_Wb,    input,    X), "&
   "33   (BC_1,  DTAb,    output3,  X,     32,     1,   Weak1), "&
   "32   (BC_1,  *,       control,  X), "&
   "31   (BC_4,  A(0),    input,    X), "&
   "30   (BC_4,  A(1),    input,    X), "&
   "29   (BC_4,  A(2),    input,    X), "&
   "28   (BC_4,  A(3),    input,    X), "&
   "27   (BC_4,  A(4),    input,    X), "&
   "26   (BC_4,  IC0(0),  input,    X), "&
   "25   (BC_4,  IC0(1),  input,    X), "&
   "24   (BC_4,  A(5),    input,    X), "&
   "23   (BC_4,  A(6),    input,    X), "&
   "22   (BC_4,  A(7),    input,    X), "&
   "21   (BC_4,  A(8),    input,    X), "&
   "20   (BC_4,  A(9),    input,    X), "&
   "19   (BC_4,  A(10),   input,    X), "&
   "18   (BC_4,  D(0),    input,    X), "&
   "17   (BC_1,  D(0),	  output3,  X,      2,     1,       Z), "&
   "16   (BC_4,  D(1),    input,    X), "&
   "15   (BC_1,  D(1),    output3,  X,      2,     1,       Z), "&
   "14   (BC_4,  D(2),    input,    X), "&
   "13   (BC_1,  D(2),    output3,  X,      2,     1,       Z), "&
   "12   (BC_4,  D(3),    input,    X), "&
   "11   (BC_1,  D(3),    output3,  X,      2,     1,       Z), "&
   "10   (BC_4,  D(4),    input,    X), "&
   "9    (BC_1,  D(4),    output3,  X,      2,     1,       Z), "&
   "8    (BC_4,  D(5),    input,    X), "&
   "7    (BC_1,  D(5),    output3,  X,      2,     1,       Z), "&
   "6    (BC_4,  D(6),    input,    X), "&
   "5    (BC_1,  D(6),    output3,  X,      2,     1,       Z), "&
   "4    (BC_4,  D(7),    input,    X), "&
   "3    (BC_1,  D(7),    output3,  X,      2,     1,       Z), "&
   "2    (BC_1,  *,	  control,  X), "&
   "1    (BC_1,  IRQb,    output3,  X,      0,     1,   Weak1), "&
   "0    (BC_1,  *,       control,  X) ";

end MT9300;