BSDL Files Library for JTAG

The only free public library that contains thousands of BSDL (Boundary Scan Description Language) models to use with BScan/JTAG tools

BSDL model: CY7C1277V18

--*******************************************************************************************************
--**  Copyright (c) 2007 Cypress Semiconductor
--**  All rights reserved.
--**                                                    
--**  File Name:        1277V18_x9_165.bsdl         History: 1.0 -- New BSDL model
--**  Release:          1.0                                               
--**  Last Updated:     June 11, 2007          
--** Written by : Cypress MID Applications
--** Queries ? :contact Cypress MID Applications
--** Note : This part is fully compliant with IEEE standard 1149.1
--**  Part #:           CY7C1277V18
--**  Package:          165 Ball FBGA
--**  Function:         4M x 9 DDR2+ 2-Word Burst SRAM, BSDL file for JTAG
--**
--**
--*******************************************************************************************************

entity CY7C1277V18 is
      generic (PHYSICAL_PIN_MAP : string := "FBGA");

      port  (
                A:       in      bit_vector(0 to 20);
                BW0_n:    in      bit;
                QVLD:    buffer  bit;   
                CQ:      buffer  bit;
                CQ_n:    buffer  bit;
                DOFF_N:  in      bit;   
                K:       in      bit;
                K_n:     in      bit;
                R_W_n:  in       bit;
                LD_n:   in      bit;
                DQ:     inout   bit_vector(0 to 8);
                TMS:    in      bit;
                TDI:    in      bit;
                TCK:    in      bit;
                TDO:    out     bit;   
                ZQ:     in      bit;
                VREF:   linkage bit_vector(0 to 1);
                VDD:    linkage bit_vector(0 to 9);
                VSS:    linkage bit_vector(0 to 24);
                VDDQ:   linkage bit_vector(0 to 15);
                NC:     linkage bit_vector(0 to 67)
             );

        use STD_1149_1_2001.all;

        attribute COMPONENT_CONFORMANCE of CY7C1277V18 : entity is "STD_1149_1_1993";

        attribute PIN_MAP of CY7C1277V18 : entity is PHYSICAL_PIN_MAP;

                constant  FBGA:PIN_MAP_STRING:=
                        "A:(N6,P7,N7,R7,R8,P8,R9,A10,A9,B8,C7, " &
                         "C6,C5,B4,A3,R3,R4,P4,P5,N5,R5), " & --Address
                        "BW0_n:B7, " &--Byte Write
                        "QVLD:P6, " &--Output Positive Clock
                        "CQ:A11, " &--Echo Positive Clock
                        "CQ_n:A1, " &--Echo Negative Clock
                        "DOFF_N:H1, " &--DLL Off pin
                        "K:B6, " &--Input Positive Clock
                        "K_n:A6, " &--Input Negative Clock
                        "R_W_n:A4, " &--Write Enable
                        "LD_n:A8, " &--Synchronous Burst
               "DQ:(L11,J10,E11,B11,E3,G3,L2,P3,P11), " &--Data Pins
                        "TMS:R10, " &--JTAG Test Mode Select
                        "TDI:R11, " &--JTAG Test Data In
                        "TCK:R2, " &--JTAG Test Clock
                        "TDO:R1, " &--JTAG Test Data Out
                        "ZQ:H11, " &--Programmable Impedance Pin
                        "VREF:(H2, H10), " &--Input Voltage Reference
                        "VDD:(F5,F7,G5,G7,H5,H7,J5,J7,K5,K7), " &
                        "VSS:(C4,C8,D4,D5,D6,D7,D8,E5, " &
                        "E6,E7,F6,G6,H6,J6,K6,L5,L6,L7, " &
                        "M4,M5,M6,M7,M8,N4,N8), " &
                        "VDDQ:(E4,E8,F4,F8,G4,G8,H3,H4,H8,H9, " &
                        "J4,J8,K4,K8,L4,L8), " &
                        "NC:(A2,A5,A7,B1,B2,B3,B5,B9,B10,C1,C2,C3, " &
                        "C9,C10,C11,D1,D2,D3,D9,D10,D11,E1, " & 
                        "E2,E9,E10,F1,F2,F3,F9,F10,F11,G1, " &
                        "G2,G9,G10,G11,J1,J2,J3,J9,J11,K1, " &
                        "K2,K3,K9,K10,K11,L1,L3,L9,L10,M1, " &
                        "M2,M3,M9,M10,M11,N1,N2,N3,N9,N10,  " &
                        "N11,P1,P2,P9,P10,R6) ";

      attribute TAP_SCAN_IN    of TDI : signal is true;
      attribute TAP_SCAN_OUT   of TDO : signal is true;
      attribute TAP_SCAN_MODE  of TMS : signal is true;
      attribute TAP_SCAN_CLOCK of TCK : signal is (10.0e6, BOTH);

      attribute INSTRUCTION_LENGTH of CY7C1277V18 : entity is 3;

      attribute INSTRUCTION_OPCODE of CY7C1277V18 : entity is
                "EXTEST (000)," &
                "IDCODE (001)," &
                "SAMPLEZ(010)," &-- Sample-Z
                "RESERV1(011)," &
                "SAMPLE (100)," &-- Sample
                "PRELOAD (100)," &-- Preload
                "RESERV2(101)," &
                "RESERV3(110)," &
                "BYPASS (111) ";

      attribute INSTRUCTION_CAPTURE of CY7C1277V18: entity is "001";

        attribute INSTRUCTION_PRIVATE of CY7C1277V18 : entity is
                "RESERV1, RESERV2, RESERV3"; 

      attribute IDCODE_REGISTER of CY7C1277V18 : entity is
                "000"& -- Reserved for version number
                "11010111000001111"& -- Defines the type of SRAM
                "00000110100"& -- Unique ID for SRAM vendor
                "1";-- ID register Presence indicator

      attribute REGISTER_ACCESS of CY7C1277V18 : entity is
        "BOUNDARY       (EXTEST,SAMPLEZ,SAMPLE)," &
                "BYPASS (BYPASS)";

      attribute BOUNDARY_LENGTH of CY7C1277V18 : entity is 109;

      attribute BOUNDARY_REGISTER of CY7C1277V18 : entity is
        "0      (BC_4, *,             internal,  X)," &
        "1      (BC_9, QVLD,               output2,  X)," &
        "2      (BC_4, A(0),    input,  X)," &
        "3      (BC_4, A(1),    input,  X)," &
        "4      (BC_4, A(2),    input,  X)," &
        "5      (BC_4, A(3),    input,  X)," &
        "6      (BC_4, A(4),    input,  X)," &
        "7      (BC_4, A(5),    input,  X)," &
        "8      (BC_4, A(6),    input,  X)," &
        "9      (BC_7, DQ(8),   bidir   , X, 108, 0, Z)," &
        "10     (BC_4, *,       internal,       X)," &
        "11     (BC_4, *,       internal,       X)," &
        "12     (BC_4, *,       internal,       X)," &
        "13     (BC_4, *,       internal,       X)," &
        "14     (BC_4, *,       internal,       X)," &
        "15     (BC_4, *,       internal,       X)," &
        "16     (BC_4, *,       internal,       X)," &
        "17     (BC_7, DQ(0),   bidir,  X, 108, 0, Z), " &
        "18     (BC_4, *,       internal,       X)," &
        "19     (BC_4, *,       internal,       X)," &
        "20     (BC_4, *,       internal,       X)," &
        "21     (BC_4, *,       internal,       X)," &
        "22     (BC_4, *,       internal,       X)," &
        "23     (BC_4, *,       internal,       X)," &
        "24     (BC_4, *,       internal,       X)," &
        "25     (BC_7, DQ(1),   bidir,  X, 108, 0, Z), " &
        "26     (BC_4, *,       internal,       X)," &
        "27     (BC_4, ZQ,      input,  X)," &
        "28     (BC_4, *,       internal,       X)," &
        "29     (BC_4, *,       internal,       X)," &
        "30     (BC_4, *,       internal,       X)," &
        "31     (BC_4, *,       internal,       X)," &
        "32     (BC_4, *,       internal,       X)," &
        "33     (BC_4, *,       internal,       X)," &
        "34     (BC_7, DQ(2),   bidir,  X, 108, 0, Z), " &
        "35     (BC_4, *,       internal,       X)," &
        "36     (BC_4, *,       internal,       X)," &
        "37     (BC_4, *,       internal,       X)," &
        "38     (BC_4, *,       internal,       X)," &
        "39     (BC_4, *,       internal,       X)," &
        "40     (BC_4, *,       internal,       X)," &
        "41     (BC_4, *,       internal,       X)," &
        "42     (BC_7, DQ(3),   bidir,  X, 108, 0, Z), " &
        "43     (BC_4, *,       internal,       X)," &
        "44     (BC_4, *,       internal,       X)," &
        "45     (BC_4, *,       internal,       X)," &
        "46     (BC_9, CQ,      output2,        X)," &
        "47     (BC_4, A(7),    input  ,       X)," &
        "48     (BC_4, A(8),    input,  X)," &
        "49     (BC_4, A(9),    input,  X)," &
        "50     (BC_4, A(10),    input,  X)," &
        "51     (BC_4, A(11),   input,  X)," &
        "52     (BC_4, LD_n,    input,  X)," &
        "53     (BC_4, *,       internal,       X)," &
        "54     (BC_4, BW0_n,  input,  X)," &
        "55     (BC_4, K,       input,  X)," &
        "56     (BC_4, K_n,     input,  X)," &
        "57     (BC_4, *,       internal,       X)," &
        "58     (BC_4, *,       internal,  X)," &
        "59     (BC_4, R_W_n,   input,  X)," &
        "60     (BC_4, A(12),   input,  X)," &
        "61     (BC_4, A(13),   input,  X)," &
        "62     (BC_4, A(14),   input,  X)," &
        "63     (BC_4, *,       internal,  X)," &
        "64     (BC_9, CQ_n,    output2,        X)," &  
        "65     (BC_4, *,       internal,       X)," &  
        "66     (BC_4, *,       internal,       X)," &
        "67     (BC_4, *,       internal,       X)," &
        "68     (BC_4, *,       internal,       X)," &
        "69     (BC_4, *,       internal,       X)," &
        "70     (BC_4, *,       internal,       X)," &
        "71     (BC_4, *,       internal,       X)," &
        "72     (BC_4, *,       internal,       X)," &
        "73     (BC_7, DQ(4),   bidir,  X, 108, 0, Z), " &
        "74     (BC_4, *,       internal,       X)," &
        "75     (BC_4, *,       internal,       X)," &
        "76     (BC_4, *,       internal,       X)," &
        "77     (BC_4, *,       internal,       X)," &
        "78     (BC_4, *,       internal,       X)," &
        "79     (BC_4, *,       internal,       X)," &
        "80     (BC_4, *,       internal,       X)," &
        "81     (BC_7, DQ(5),   bidir,  X, 108, 0, Z), " &
        "82     (BC_4, *,       internal,       X)," &
        "83     (BC_4, DOFF_N,  input,       X)," &
        "84     (BC_4, *,       internal,       X)," &
        "85     (BC_4, *,       internal,       X)," &
        "86     (BC_4, *,       internal,       X)," &
        "87     (BC_4, *,       internal,       X)," &
        "88     (BC_4, *,       internal,       X)," &
        "89     (BC_4, *,       internal,       X)," &
        "90     (BC_7, DQ(6),   bidir,  X, 108, 0, Z), " &
        "91     (BC_4, *,       internal,       X)," &
        "92      (BC_4, *,       internal,       X)," &
        "93     (BC_4, *,       internal,       X)," &
        "94     (BC_4, *,       internal,       X)," &
        "95     (BC_4, *,       internal,       X)," &
        "96     (BC_4, *,       internal,       X)," &
        "97     (BC_4, *,       internal,       X)," &
        "98     (BC_7, DQ(7),   bidir,  X, 108, 0, Z), " &
        "99     (BC_4, *,       internal,       X)," &
        "100     (BC_4, *,       internal,       X)," &
        "101    (BC_4, *,       internal,       X)," &
        "102    (BC_4, A(15),   input,  X)," &
        "103   (BC_4, A(16),   input,  X)," &
        "104   (BC_4, A(17),   input,  X)," &
        "105   (BC_4, A(18),   input,  X)," &
        "106   (BC_4, A(19),   input,  X)," &
        "107   (BC_4, A(20),   input,  X)," &
        "108   (BC_2, *,    controlr,	0)";

end CY7C1277V18;