------------------------------------------------------------------------
-- A T M E L A R M M I C R O C O N T R O L L E R S --
------------------------------------------------------------------------
-- BSDL file
--
-- File Name: AT91SAM7L128_BGA144.BSD
-- File Revision: 2.0
-- Date: Wed Jan 24 15:46:46 2007
-- Created by: Atmel Corporation
-- File Status: Released
--
-- Device: AT91SAM7L128
-- Package: R_LFBGA144_K
--
-- Visit http://www.atmel.com for a updated list of BSDL files.
--
------------------------------------------------------------------------
-- Syntax and Semantics are checked against the IEEE 1149.1 standard. --
-- The logical functioning of the standard Boundary-Scan instructions --
-- and of the associated bypass, idcode and boundary-scan register --
-- described in this BSDL file has been verified against its related --
-- silicon by JTAG Technologies B.V. --
------------------------------------------------------------------------
------------------------------------------------------------------------
-- IMPORTANT NOTICE --
-- --
-- Copyright 2005 Atmel Corporation. All Rights Reserved. --
-- --
-- Atmel assumes no responsibility or liability arising out --
-- this application or use of any information described herein --
-- except as expressly agreed to in writing by Atmel Corporation. --
-- --
-- ------------------------------------------------------------------ --
-- This BSDL File has been verified on severals BSDL Syntax --
-- Checker/Compilers --
-- --
-- --
-- AGILENT 3070 BSDL COMPILER Tuesday, January 15, 2008 3:44 AM --
-- BSDL File AT91SAM7L128_BGA144.bsd, package R_LFBGA144_K compiled --
-- successfully. 0 ERRORS, 0 WARNINGS, OBJECT PRODUCED --
------------------------------------------------------------------------
entity AT91SAM7L128 is
-- This section identifies the default device package selected.
generic (PHYSICAL_PIN_MAP: string:= "R_LFBGA144_K");
-- This section declares all the ports in the design.
port (
icetck : in bit;
icetdi : in bit;
icetms : in bit;
nrst : in bit;
pa0 : inout bit;
pa1 : inout bit;
pa10 : inout bit;
pa11 : inout bit;
pa12 : inout bit;
pa13 : inout bit;
pa14 : inout bit;
pa15 : inout bit;
pa16 : inout bit;
pa17 : inout bit;
pa18 : inout bit;
pa19 : inout bit;
pa2 : inout bit;
pa20 : inout bit;
pa21 : inout bit;
pa22 : inout bit;
pa23 : inout bit;
pa24 : inout bit;
pa25 : inout bit;
pa3 : inout bit;
pa4 : inout bit;
pa5 : inout bit;
pa6 : inout bit;
pa7 : inout bit;
pa8 : inout bit;
pa9 : inout bit;
pb0 : inout bit;
pb1 : inout bit;
pb10 : inout bit;
pb11 : inout bit;
pb12 : inout bit;
pb13 : inout bit;
pb14 : inout bit;
pb15 : inout bit;
pb16 : inout bit;
pb17 : inout bit;
pb18 : inout bit;
pb19 : inout bit;
pb2 : inout bit;
pb20 : inout bit;
pb21 : inout bit;
pb22 : inout bit;
pb23 : inout bit;
pb3 : inout bit;
pb4 : inout bit;
pb5 : inout bit;
pb6 : inout bit;
pb7 : inout bit;
pb8 : inout bit;
pb9 : inout bit;
pc0 : inout bit;
pc1 : inout bit;
pc10 : inout bit;
pc11 : inout bit;
pc12 : inout bit;
pc13 : inout bit;
pc14 : inout bit;
pc15 : inout bit;
pc16 : inout bit;
pc17 : inout bit;
pc18 : inout bit;
pc19 : inout bit;
pc2 : inout bit;
pc20 : inout bit;
pc21 : inout bit;
pc22 : inout bit;
pc23 : inout bit;
pc24 : inout bit;
pc25 : inout bit;
pc26 : inout bit;
pc27 : inout bit;
pc28 : inout bit;
pc29 : inout bit;
pc3 : inout bit;
pc4 : inout bit;
pc5 : inout bit;
pc6 : inout bit;
pc7 : inout bit;
pc8 : inout bit;
pc9 : inout bit;
icetdo : out bit;
clkin : linkage bit;
erase : linkage bit;
fwup : linkage bit;
jtagsel : in bit;
nrstb : linkage bit;
test : linkage bit;
xin32k : linkage bit;
xout32k : linkage bit
);
use STD_1149_1_2001.all;
attribute COMPONENT_CONFORMANCE of AT91SAM7L128: entity is "STD_1149_1_2001";
attribute PIN_MAP of AT91SAM7L128: entity is PHYSICAL_PIN_MAP;
-- This section specifies the pin map for each port. This information is
-- extracted from the port-to-pin map file that was read in using the
-- "read_pin_map" command.
constant R_LFBGA144_K: PIN_MAP_STRING :=
"icetck : F9," &
"icetdi : C6," &
"icetms : G10," &
"nrst : G9," &
"pa0 : B2," &
"pa1 : B1," &
"pa10 : E2," &
"pa11 : E4," &
"pa12 : F4," &
"pa13 : F2," &
"pa14 : F3," &
"pa15 : G4," &
"pa16 : G3," &
"pa17 : G2," &
"pa18 : H4," &
"pa19 : H3," &
"pa2 : C3," &
"pa20 : J5," &
"pa21 : J4," &
"pa22 : H2," &
"pa23 : J2," &
"pa24 : J3," &
"pa25 : K4," &
"pa3 : C1," &
"pa4 : C2," &
"pa5 : D2," &
"pa6 : D1," &
"pa7 : D3," &
"pa8 : E5," &
"pa9 : E3," &
"pb0 : M2," &
"pb1 : M3," &
"pb10 : K6," &
"pb11 : L6," &
"pb12 : L7," &
"pb13 : K7," &
"pb14 : J8," &
"pb15 : K8," &
"pb16 : M8," &
"pb17 : L8," &
"pb18 : M9," &
"pb19 : L9," &
"pb2 : M4," &
"pb20 : K9," &
"pb21 : M10," &
"pb22 : L10," &
"pb23 : L11," &
"pb3 : K5," &
"pb4 : L4," &
"pb5 : L5," &
"pb6 : M5," &
"pb7 : M6," &
"pb8 : J6," &
"pb9 : J7," &
"pc0 : E10," &
"pc1 : F11," &
"pc10 : C11," &
"pc11 : B12," &
"pc12 : A12," &
"pc13 : B11," &
"pc14 : A11," &
"pc15 : B10," &
"pc16 : C9," &
"pc17 : A9," &
"pc18 : D8," &
"pc19 : C8," &
"pc2 : E11," &
"pc20 : B9," &
"pc21 : D7," &
"pc22 : C7," &
"pc23 : A8," &
"pc24 : A7," &
"pc25 : D6," &
"pc26 : D5," &
"pc27 : B6," &
"pc28 : H11," &
"pc29 : H9," &
"pc3 : D12," &
"pc4 : D11," &
"pc5 : E9," &
"pc6 : D9," &
"pc7 : D10," &
"pc8 : C12," &
"pc9 : C10," &
"icetdo : B5," &
"clkin : C4," &
"erase : G11," &
"fwup : C5," &
"jtagsel : F10," &
"nrstb : B3," &
"test : B4," &
"xin32k : A2," &
"xout32k : A1";
-- This section specifies the TAP ports. For the TAP TCK port, the parameters in
-- the brackets are:
-- First Field : Maximum TCK frequency.
-- Second Field: Allowable states TCK may be stopped in.
attribute TAP_SCAN_CLOCK of icetck: signal is (1.000000e+06, BOTH);
attribute TAP_SCAN_IN of icetdi: signal is true;
attribute TAP_SCAN_MODE of icetms: signal is true;
attribute TAP_SCAN_OUT of icetdo: signal is true;
attribute TAP_SCAN_RESET of nrst : signal is true;
-- Specifies the compliance enable patterns for the design. It lists a set of
-- design ports and the values that they should be set to, in order to enable
-- compliance to IEEE Std 1149.1
attribute COMPLIANCE_PATTERNS of AT91SAM7L128: entity is
"(jtagsel) (1)";
-- Specifies the number of bits in the instruction register.
attribute INSTRUCTION_LENGTH of AT91SAM7L128: entity is 3;
-- Specifies the boundary-scan instructions implemented in the design and their
-- opcodes.
attribute INSTRUCTION_OPCODE of AT91SAM7L128: entity is
"BYPASS (111)," &
"EXTEST (000)," &
"SAMPLE (100)," &
"INTEST (010)," &
"PRELOAD (100)," &
"HIGHZ (001)," &
"IDCODE (011)";
-- Specifies the bit pattern that is loaded into the instruction register when
-- the TAP controller passes through the Capture-IR state. The standard mandates
-- that the two LSBs must be "01". The remaining bits are design specific.
attribute INSTRUCTION_CAPTURE of AT91SAM7L128: entity is "001";
-- Specifies the bit pattern that is loaded into the DEVICE_ID register during
-- the IDCODE instruction when the TAP controller passes through the Capture-DR
-- state.
attribute IDCODE_REGISTER of AT91SAM7L128: entity is
"0000" &
-- 4-bit version number
"0101101100011110" &
-- 16-bit part number
"00000011111" &
-- 11-bit identity of the manufacturer
"1";
-- Required by IEEE Std 1149.1
-- This section specifies the test data register placed between TDI and TDO for
-- each implemented instruction.
attribute REGISTER_ACCESS of AT91SAM7L128: entity is
"BYPASS (BYPASS, HIGHZ)," &
"BOUNDARY (EXTEST, SAMPLE, INTEST, PRELOAD)," &
"DEVICE_ID (IDCODE)";
-- Specifies the length of the boundary scan register.
attribute BOUNDARY_LENGTH of AT91SAM7L128: entity is 160;
-- The following list specifies the characteristics of each cell in the boundary
-- scan register from TDI to TDO. The following is a description of the label
-- fields:
-- num : Is the cell number.
-- cell : Is the cell type as defined by the standard.
-- port : Is the design port name. Control cells do not have a port
-- name.
-- function: Is the function of the cell as defined by the standard. Is one
-- of input, output2, output3, bidir, control or controlr.
-- safe : Specifies the value that the BSR cell should be loaded with
-- for safe operation when the software might otherwise choose a
-- random value.
-- ccell : The control cell number. Specifies the control cell that
-- drives the output enable for this port.
-- disval : Specifies the value that is loaded into the control cell to
-- disable the output enable for the corresponding port.
-- rslt : Resulting state. Shows the state of the driver when it is
-- disabled.
attribute BOUNDARY_REGISTER of AT91SAM7L128: entity is
--
-- num cell port function safe [ccell disval rslt]
--
"159 (BC_1, *, control, 1), "
&
"158 (BC_7, pb0, bidir, X, 159, 1, Z), "
&
"157 (BC_1, *, control, 1), "
&
"156 (BC_7, pb1, bidir, X, 157, 1, Z), "
&
"155 (BC_1, *, control, 1), "
&
"154 (BC_7, pb2, bidir, X, 155, 1, Z), "
&
"153 (BC_1, *, control, 1), "
&
"152 (BC_7, pb3, bidir, X, 153, 1, Z), "
&
"151 (BC_1, *, control, 1), "
&
"150 (BC_7, pb4, bidir, X, 151, 1, Z), "
&
"149 (BC_1, *, control, 1), "
&
"148 (BC_7, pb5, bidir, X, 149, 1, Z), "
&
"147 (BC_1, *, control, 1), "
&
"146 (BC_7, pb6, bidir, X, 147, 1, Z), "
&
"145 (BC_1, *, control, 1), "
&
"144 (BC_7, pb7, bidir, X, 145, 1, Z), "
&
"143 (BC_1, *, control, 1), "
&
"142 (BC_7, pb8, bidir, X, 143, 1, Z), "
&
"141 (BC_1, *, control, 1), "
&
"140 (BC_7, pb9, bidir, X, 141, 1, Z), "
&
"139 (BC_1, *, control, 1), "
&
"138 (BC_7, pb10, bidir, X, 139, 1, Z), "
&
"137 (BC_1, *, control, 1), "
&
"136 (BC_7, pb11, bidir, X, 137, 1, Z), "
&
"135 (BC_1, *, control, 1), "
&
"134 (BC_7, pb12, bidir, X, 135, 1, Z), "
&
"133 (BC_1, *, control, 1), "
&
"132 (BC_7, pb13, bidir, X, 133, 1, Z), "
&
"131 (BC_1, *, control, 1), "
&
"130 (BC_7, pb14, bidir, X, 131, 1, Z), "
&
"129 (BC_1, *, control, 1), "
&
"128 (BC_7, pb15, bidir, X, 129, 1, Z), "
&
"127 (BC_1, *, control, 1), "
&
"126 (BC_7, pb16, bidir, X, 127, 1, Z), "
&
"125 (BC_1, *, control, 1), "
&
"124 (BC_7, pb17, bidir, X, 125, 1, Z), "
&
"123 (BC_1, *, control, 1), "
&
"122 (BC_7, pb18, bidir, X, 123, 1, Z), "
&
"121 (BC_1, *, control, 1), "
&
"120 (BC_7, pb19, bidir, X, 121, 1, Z), "
&
"119 (BC_1, *, control, 1), "
&
"118 (BC_7, pb20, bidir, X, 119, 1, Z), "
&
"117 (BC_1, *, control, 1), "
&
"116 (BC_7, pb21, bidir, X, 117, 1, Z), "
&
"115 (BC_1, *, control, 1), "
&
"114 (BC_7, pb22, bidir, X, 115, 1, Z), "
&
"113 (BC_1, *, control, 1), "
&
"112 (BC_7, pb23, bidir, X, 113, 1, Z), "
&
"111 (BC_1, *, control, 1), "
&
"110 (BC_7, pc28, bidir, X, 111, 1, Z), "
&
"109 (BC_1, *, control, 1), "
&
"108 (BC_7, pc29, bidir, X, 109, 1, Z), "
&
"107 (BC_1, *, control, 1), "
&
"106 (BC_7, pc0, bidir, X, 107, 1, Z), "
&
"105 (BC_1, *, control, 1), "
&
"104 (BC_7, pc1, bidir, X, 105, 1, Z), "
&
"103 (BC_1, *, control, 1), "
&
"102 (BC_7, pc2, bidir, X, 103, 1, Z), "
&
"101 (BC_1, *, control, 1), "
&
"100 (BC_7, pc3, bidir, X, 101, 1, Z), "
&
"99 (BC_1, *, control, 1), "
&
"98 (BC_7, pc4, bidir, X, 99, 1, Z), "
&
"97 (BC_1, *, control, 1), "
&
"96 (BC_7, pc5, bidir, X, 97, 1, Z), "
&
"95 (BC_1, *, control, 1), "
&
"94 (BC_7, pc6, bidir, X, 95, 1, Z), "
&
"93 (BC_1, *, control, 1), "
&
"92 (BC_7, pc7, bidir, X, 93, 1, Z), "
&
"91 (BC_1, *, control, 1), "
&
"90 (BC_7, pc8, bidir, X, 91, 1, Z), "
&
"89 (BC_1, *, control, 1), "
&
"88 (BC_7, pc9, bidir, X, 89, 1, Z), "
&
"87 (BC_1, *, control, 1), "
&
"86 (BC_7, pc10, bidir, X, 87, 1, Z), "
&
"85 (BC_1, *, control, 1), "
&
"84 (BC_7, pc11, bidir, X, 85, 1, Z), "
&
"83 (BC_1, *, control, 1), "
&
"82 (BC_7, pc12, bidir, X, 83, 1, Z), "
&
"81 (BC_1, *, control, 1), "
&
"80 (BC_7, pc13, bidir, X, 81, 1, Z), "
&
"79 (BC_1, *, control, 1), "
&
"78 (BC_7, pc14, bidir, X, 79, 1, Z), "
&
"77 (BC_1, *, control, 1), "
&
"76 (BC_7, pc15, bidir, X, 77, 1, Z), "
&
"75 (BC_1, *, control, 1), "
&
"74 (BC_7, pc16, bidir, X, 75, 1, Z), "
&
"73 (BC_1, *, control, 1), "
&
"72 (BC_7, pc17, bidir, X, 73, 1, Z), "
&
"71 (BC_1, *, control, 1), "
&
"70 (BC_7, pc18, bidir, X, 71, 1, Z), "
&
"69 (BC_1, *, control, 1), "
&
"68 (BC_7, pc19, bidir, X, 69, 1, Z), "
&
"67 (BC_1, *, control, 1), "
&
"66 (BC_7, pc20, bidir, X, 67, 1, Z), "
&
"65 (BC_1, *, control, 1), "
&
"64 (BC_7, pc21, bidir, X, 65, 1, Z), "
&
"63 (BC_1, *, control, 1), "
&
"62 (BC_7, pc22, bidir, X, 63, 1, Z), "
&
"61 (BC_1, *, control, 1), "
&
"60 (BC_7, pc23, bidir, X, 61, 1, Z), "
&
"59 (BC_1, *, control, 1), "
&
"58 (BC_7, pc24, bidir, X, 59, 1, Z), "
&
"57 (BC_1, *, control, 1), "
&
"56 (BC_7, pc25, bidir, X, 57, 1, Z), "
&
"55 (BC_1, *, control, 1), "
&
"54 (BC_7, pc26, bidir, X, 55, 1, Z), "
&
"53 (BC_1, *, control, 1), "
&
"52 (BC_7, pc27, bidir, X, 53, 1, Z), "
&
"51 (BC_1, *, control, 1), "
&
"50 (BC_7, pa0, bidir, X, 51, 1, Z), "
&
"49 (BC_1, *, control, 1), "
&
"48 (BC_7, pa1, bidir, X, 49, 1, Z), "
&
"47 (BC_1, *, control, 1), "
&
"46 (BC_7, pa2, bidir, X, 47, 1, Z), "
&
"45 (BC_1, *, control, 1), "
&
"44 (BC_7, pa3, bidir, X, 45, 1, Z), "
&
"43 (BC_1, *, control, 1), "
&
"42 (BC_7, pa4, bidir, X, 43, 1, Z), "
&
"41 (BC_1, *, control, 1), "
&
"40 (BC_7, pa5, bidir, X, 41, 1, Z), "
&
"39 (BC_1, *, control, 1), "
&
"38 (BC_7, pa6, bidir, X, 39, 1, Z), "
&
"37 (BC_1, *, control, 1), "
&
"36 (BC_7, pa7, bidir, X, 37, 1, Z), "
&
"35 (BC_1, *, control, 1), "
&
"34 (BC_7, pa8, bidir, X, 35, 1, Z), "
&
"33 (BC_1, *, control, 1), "
&
"32 (BC_7, pa9, bidir, X, 33, 1, Z), "
&
"31 (BC_1, *, control, 1), "
&
"30 (BC_7, pa10, bidir, X, 31, 1, Z), "
&
"29 (BC_1, *, control, 1), "
&
"28 (BC_7, pa11, bidir, X, 29, 1, Z), "
&
"27 (BC_1, *, control, 1), "
&
"26 (BC_7, pa12, bidir, X, 27, 1, Z), "
&
"25 (BC_1, *, control, 1), "
&
"24 (BC_7, pa13, bidir, X, 25, 1, Z), "
&
"23 (BC_1, *, control, 1), "
&
"22 (BC_7, pa14, bidir, X, 23, 1, Z), "
&
"21 (BC_1, *, control, 1), "
&
"20 (BC_7, pa15, bidir, X, 21, 1, Z), "
&
"19 (BC_1, *, control, 1), "
&
"18 (BC_7, pa16, bidir, X, 19, 1, Z), "
&
"17 (BC_1, *, control, 1), "
&
"16 (BC_7, pa17, bidir, X, 17, 1, Z), "
&
"15 (BC_1, *, control, 1), "
&
"14 (BC_7, pa18, bidir, X, 15, 1, Z), "
&
"13 (BC_1, *, control, 1), "
&
"12 (BC_7, pa19, bidir, X, 13, 1, Z), "
&
"11 (BC_1, *, control, 1), "
&
"10 (BC_7, pa20, bidir, X, 11, 1, Z), "
&
"9 (BC_1, *, control, 1), "
&
"8 (BC_7, pa21, bidir, X, 9, 1, Z), "
&
"7 (BC_1, *, control, 1), "
&
"6 (BC_7, pa22, bidir, X, 7, 1, Z), "
&
"5 (BC_1, *, control, 1), "
&
"4 (BC_7, pa23, bidir, X, 5, 1, Z), "
&
"3 (BC_1, *, control, 1), "
&
"2 (BC_7, pa24, bidir, X, 3, 1, Z), "
&
"1 (BC_1, *, control, 1), "
&
"0 (BC_7, pa25, bidir, X, 1, 1, Z) ";
end AT91SAM7L128;